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tx39.c revision 1.32 
      1 /*	$NetBSD: tx39.c,v 1.32 2003/04/02 03:58:12 thorpej Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by UCHIYAMA Yasushi.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *        This product includes software developed by the NetBSD
     21  *        Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 #include "opt_vr41xx.h"
     40 #include "opt_tx39xx.h"
     41 #include "m38813c.h"
     42 #include "tc5165buf.h"
     43 
     44 #include <sys/param.h>
     45 #include <sys/systm.h>
     46 
     47 #include <uvm/uvm_extern.h>
     48 
     49 #include <mips/cache.h>
     50 
     51 #include <machine/locore.h>   /* cpu_id */
     52 #include <machine/bootinfo.h> /* bootinfo */
     53 #include <machine/sysconf.h>  /* platform */
     54 
     55 #include <machine/platid.h>
     56 #include <machine/platid_mask.h>
     57 
     58 #include <machine/bus.h>
     59 
     60 #include <hpcmips/tx/tx39biureg.h>
     61 #include <hpcmips/tx/tx39reg.h>
     62 #include <hpcmips/tx/tx39var.h>
     63 #ifdef TX391X
     64 #include <hpcmips/tx/tx3912videovar.h>
     65 #endif
     66 
     67 #include <sys/termios.h>
     68 #include <sys/ttydefaults.h>
     69 #include <hpcmips/tx/tx39uartvar.h>
     70 #ifndef CONSPEED
     71 #define CONSPEED TTYDEF_SPEED
     72 #endif
     73 
     74 /* console keyboard */
     75 #if NM38813C > 0
     76 #include <hpcmips/dev/m38813cvar.h>
     77 #endif
     78 #if NTC5165BUF > 0
     79 #include <hpcmips/dev/tc5165bufvar.h>
     80 #endif
     81 
     82 struct tx_chipset_tag tx_chipset;
     83 
     84 void	tx_init(void);
     85 #if defined(VR41XX) && defined(TX39XX)
     86 #define	TX_INTR	tx_intr
     87 #else
     88 #define	TX_INTR	cpu_intr	/* locore_mips3 directly call this */
     89 #endif
     90 
     91 extern void TX_INTR(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
     92 
     93 void	tx39clock_cpuspeed(int *, int *);
     94 
     95 /* TX39-specific initialization vector */
     96 void	tx_cons_init(void);
     97 void    tx_fb_init(caddr_t *);
     98 void    tx_mem_init(paddr_t);
     99 void	tx_find_dram(paddr_t, paddr_t);
    100 void	tx_reboot(int, char *);
    101 
    102 void
    103 tx_init()
    104 {
    105 	tx_chipset_tag_t tc;
    106 	int model, rev;
    107 	int cpuclock;
    108 
    109 	tc = tx_conf_get_tag();
    110 	/*
    111 	 * Platform Specific Function Hooks
    112 	 */
    113 	platform.cpu_intr	= TX_INTR;
    114 	platform.cpu_idle	= NULL; /* not implemented yet */
    115 	platform.cons_init	= tx_cons_init;
    116 	platform.fb_init	= tx_fb_init;
    117 	platform.mem_init	= tx_mem_init;
    118 	platform.reboot		= tx_reboot;
    119 
    120 
    121 	model = MIPS_PRID_REV(cpu_id);
    122 
    123 	switch (model) {
    124 	default:
    125 		/* Unknown TOSHIBA TX39-series */
    126 		sprintf(cpu_name, "Unknown TOSHIBA TX39-series %x", model);
    127 		break;
    128 	case TMPR3912:
    129 		tx39clock_cpuspeed(&cpuclock, &cpuspeed);
    130 
    131 		sprintf(cpu_name, "TOSHIBA TMPR3912 %d.%02d MHz",
    132 		    cpuclock / 1000000, (cpuclock % 1000000) / 10000);
    133 		tc->tc_chipset = __TX391X;
    134 		break;
    135 	case TMPR3922:
    136 		tx39clock_cpuspeed(&cpuclock, &cpuspeed);
    137 		rev = tx_conf_read(tc, TX3922_REVISION_REG);
    138 
    139 		sprintf(cpu_name, "TOSHIBA TMPR3922 rev. %x.%x "
    140 		    "%d.%02d MHz", (rev >> 4) & 0xf, rev & 0xf,
    141 		    cpuclock / 1000000, (cpuclock % 1000000) / 10000);
    142 		tc->tc_chipset = __TX392X;
    143 		break;
    144 	}
    145 }
    146 
    147 void
    148 tx_fb_init(caddr_t *kernend)
    149 {
    150 #ifdef TX391X
    151 	paddr_t fb_end;
    152 
    153 	fb_end = MIPS_KSEG0_TO_PHYS(mem_clusters[0].start +
    154 	    mem_clusters[0].size - 1);
    155 	tx3912video_init(MIPS_KSEG0_TO_PHYS(*kernend), &fb_end);
    156 
    157 	/* Skip V-RAM area */
    158 	*kernend = (caddr_t)MIPS_PHYS_TO_KSEG0(fb_end);
    159 #endif /* TX391X */
    160 #ifdef TX392X
    161 	/*
    162 	 *  Plum V-RAM isn't accessible until pmap_bootstrap,
    163 	 * at this time, frame buffer device is disabled.
    164 	 */
    165 	bootinfo->fb_addr = 0;
    166 #endif /* TX392X */
    167 }
    168 
    169 void
    170 tx_mem_init(paddr_t kernend)
    171 {
    172 
    173 	mem_clusters[0].start = 0;
    174 	mem_clusters[0].size = kernend;
    175 	mem_cluster_cnt = 1;
    176 	/* search DRAM bank 0 */
    177 	tx_find_dram(kernend, 0x02000000);
    178 
    179 	/* search DRAM bank 1 */
    180 	tx_find_dram(0x02000000, 0x04000000);
    181 }
    182 
    183 void
    184 tx_find_dram(paddr_t start, paddr_t end)
    185 {
    186 	caddr_t page, startaddr, endaddr;
    187 	u_int32_t magic0, magic1;
    188 #define MAGIC0		(*(__volatile u_int32_t *)(page + 0))
    189 #define MAGIC1		(*(__volatile u_int32_t *)(page + 4))
    190 
    191 	startaddr = (void *)MIPS_PHYS_TO_KSEG1(start);
    192 	endaddr = (void *)MIPS_PHYS_TO_KSEG1(end);
    193 
    194 	page = startaddr;
    195 	if (badaddr(page, 4))
    196 		return;
    197 
    198 	do {
    199 		magic0 = random();
    200 		magic1 = random();
    201 	} while (MAGIC0 == magic0 || MAGIC0 == magic1);
    202 
    203 	MAGIC0 = magic0;
    204 	MAGIC1 = magic1;
    205 	wbflush();
    206 
    207 	if (MAGIC0 != magic0 || MAGIC1 != magic1)
    208 		return;
    209 
    210 	for (page += PAGE_SIZE; page < endaddr; page += PAGE_SIZE) {
    211 		if (badaddr(page, 4))
    212 			return;
    213 		if (MAGIC0 == magic0 &&
    214 		    MAGIC1 == magic1) {
    215 			goto memend_found;
    216 		}
    217 	}
    218 
    219 	/* check for 32MByte memory */
    220 	page -= PAGE_SIZE;
    221 	MAGIC0 = magic0;
    222 	MAGIC1 = magic1;
    223 	wbflush();
    224 	if (MAGIC0 != magic0 || MAGIC1 != magic1)
    225 		return; /* no memory in this bank */
    226 
    227  memend_found:
    228 	mem_clusters[mem_cluster_cnt].start = start;
    229 	mem_clusters[mem_cluster_cnt].size = page - startaddr;
    230 
    231 	/* skip kernel area */
    232 	if (mem_cluster_cnt == 1)
    233 		mem_clusters[mem_cluster_cnt].size -= start;
    234 
    235 	mem_cluster_cnt++;
    236 #undef MAGIC0
    237 #undef MAGIC1
    238 }
    239 
    240 void
    241 tx_reboot(int howto, char *bootstr)
    242 {
    243 
    244 	goto *(u_int32_t *)MIPS_RESET_EXC_VEC;
    245 }
    246 
    247 void
    248 tx_cons_init()
    249 {
    250 	int slot;
    251 #define CONSPLATIDMATCH(p)						\
    252 	platid_match(&platid, &platid_mask_MACH_##p)
    253 
    254 #ifdef SERIALCONSSLOT
    255 	slot = SERIALCONSSLOT;
    256 #else
    257 	slot = TX39_UARTA;
    258 #endif
    259 	if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) {
    260 		if(txcom_cnattach(slot, CONSPEED,
    261 		    (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8)) {
    262 			panic("tx_cons_init: can't attach serial console.");
    263 		}
    264 	} else {
    265 #if NM38813C > 0
    266 		if(CONSPLATIDMATCH(VICTOR_INTERLINK) &&
    267 		    m38813c_cnattach(TX39_SYSADDR_CARD1)) {
    268 			goto panic;
    269 		}
    270 #endif
    271 #if NTC5165BUF > 0
    272 		if(CONSPLATIDMATCH(COMPAQ_C) &&
    273 		    tc5165buf_cnattach(TX39_SYSADDR_CS3)) {
    274 			goto panic;
    275 		}
    276 
    277 		if(CONSPLATIDMATCH(SHARP_TELIOS) &&
    278 		    tc5165buf_cnattach(TX39_SYSADDR_CS1)) {
    279 			goto panic;
    280 		}
    281 
    282 		if(CONSPLATIDMATCH(SHARP_MOBILON) &&
    283 		    tc5165buf_cnattach(TX39_SYSADDR_MCS0)) {
    284 			goto panic;
    285 		}
    286 #endif
    287 	}
    288 
    289 	return;
    290  panic:
    291 	panic("tx_cons_init: can't init console");
    292 	/* NOTREACHED */
    293 }
    294 
    295 void
    296 tx_conf_register_intr(tx_chipset_tag_t t, void *intrt)
    297 {
    298 
    299 	KASSERT(t == &tx_chipset);
    300 	tx_chipset.tc_intrt = intrt;
    301 }
    302 
    303 void
    304 tx_conf_register_power(tx_chipset_tag_t t, void *powert)
    305 {
    306 
    307 	KASSERT(t == &tx_chipset);
    308 	tx_chipset.tc_powert = powert;
    309 }
    310 
    311 void
    312 tx_conf_register_clock(tx_chipset_tag_t t, void *clockt)
    313 {
    314 
    315 	KASSERT(t == &tx_chipset);
    316 	tx_chipset.tc_clockt = clockt;
    317 }
    318 
    319 void
    320 tx_conf_register_sound(tx_chipset_tag_t t, void *soundt)
    321 {
    322 
    323 	KASSERT(t == &tx_chipset);
    324 	tx_chipset.tc_soundt = soundt;
    325 }
    326 
    327 void
    328 tx_conf_register_video(tx_chipset_tag_t t, void *videot)
    329 {
    330 
    331 	KASSERT(t == &tx_chipset);
    332 	tx_chipset.tc_videot = videot;
    333 }
    334