tx39.c revision 1.33 1 /* $NetBSD: tx39.c,v 1.33 2003/07/15 02:29:32 lukem Exp $ */
2
3 /*-
4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by UCHIYAMA Yasushi.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #include <sys/cdefs.h>
40 __KERNEL_RCSID(0, "$NetBSD: tx39.c,v 1.33 2003/07/15 02:29:32 lukem Exp $");
41
42 #include "opt_vr41xx.h"
43 #include "opt_tx39xx.h"
44 #include "m38813c.h"
45 #include "tc5165buf.h"
46
47 #include <sys/param.h>
48 #include <sys/systm.h>
49
50 #include <uvm/uvm_extern.h>
51
52 #include <mips/cache.h>
53
54 #include <machine/locore.h> /* cpu_id */
55 #include <machine/bootinfo.h> /* bootinfo */
56 #include <machine/sysconf.h> /* platform */
57
58 #include <machine/platid.h>
59 #include <machine/platid_mask.h>
60
61 #include <machine/bus.h>
62
63 #include <hpcmips/tx/tx39biureg.h>
64 #include <hpcmips/tx/tx39reg.h>
65 #include <hpcmips/tx/tx39var.h>
66 #ifdef TX391X
67 #include <hpcmips/tx/tx3912videovar.h>
68 #endif
69
70 #include <sys/termios.h>
71 #include <sys/ttydefaults.h>
72 #include <hpcmips/tx/tx39uartvar.h>
73 #ifndef CONSPEED
74 #define CONSPEED TTYDEF_SPEED
75 #endif
76
77 /* console keyboard */
78 #if NM38813C > 0
79 #include <hpcmips/dev/m38813cvar.h>
80 #endif
81 #if NTC5165BUF > 0
82 #include <hpcmips/dev/tc5165bufvar.h>
83 #endif
84
85 struct tx_chipset_tag tx_chipset;
86
87 void tx_init(void);
88 #if defined(VR41XX) && defined(TX39XX)
89 #define TX_INTR tx_intr
90 #else
91 #define TX_INTR cpu_intr /* locore_mips3 directly call this */
92 #endif
93
94 extern void TX_INTR(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
95
96 void tx39clock_cpuspeed(int *, int *);
97
98 /* TX39-specific initialization vector */
99 void tx_cons_init(void);
100 void tx_fb_init(caddr_t *);
101 void tx_mem_init(paddr_t);
102 void tx_find_dram(paddr_t, paddr_t);
103 void tx_reboot(int, char *);
104
105 void
106 tx_init()
107 {
108 tx_chipset_tag_t tc;
109 int model, rev;
110 int cpuclock;
111
112 tc = tx_conf_get_tag();
113 /*
114 * Platform Specific Function Hooks
115 */
116 platform.cpu_intr = TX_INTR;
117 platform.cpu_idle = NULL; /* not implemented yet */
118 platform.cons_init = tx_cons_init;
119 platform.fb_init = tx_fb_init;
120 platform.mem_init = tx_mem_init;
121 platform.reboot = tx_reboot;
122
123
124 model = MIPS_PRID_REV(cpu_id);
125
126 switch (model) {
127 default:
128 /* Unknown TOSHIBA TX39-series */
129 sprintf(cpu_name, "Unknown TOSHIBA TX39-series %x", model);
130 break;
131 case TMPR3912:
132 tx39clock_cpuspeed(&cpuclock, &cpuspeed);
133
134 sprintf(cpu_name, "TOSHIBA TMPR3912 %d.%02d MHz",
135 cpuclock / 1000000, (cpuclock % 1000000) / 10000);
136 tc->tc_chipset = __TX391X;
137 break;
138 case TMPR3922:
139 tx39clock_cpuspeed(&cpuclock, &cpuspeed);
140 rev = tx_conf_read(tc, TX3922_REVISION_REG);
141
142 sprintf(cpu_name, "TOSHIBA TMPR3922 rev. %x.%x "
143 "%d.%02d MHz", (rev >> 4) & 0xf, rev & 0xf,
144 cpuclock / 1000000, (cpuclock % 1000000) / 10000);
145 tc->tc_chipset = __TX392X;
146 break;
147 }
148 }
149
150 void
151 tx_fb_init(caddr_t *kernend)
152 {
153 #ifdef TX391X
154 paddr_t fb_end;
155
156 fb_end = MIPS_KSEG0_TO_PHYS(mem_clusters[0].start +
157 mem_clusters[0].size - 1);
158 tx3912video_init(MIPS_KSEG0_TO_PHYS(*kernend), &fb_end);
159
160 /* Skip V-RAM area */
161 *kernend = (caddr_t)MIPS_PHYS_TO_KSEG0(fb_end);
162 #endif /* TX391X */
163 #ifdef TX392X
164 /*
165 * Plum V-RAM isn't accessible until pmap_bootstrap,
166 * at this time, frame buffer device is disabled.
167 */
168 bootinfo->fb_addr = 0;
169 #endif /* TX392X */
170 }
171
172 void
173 tx_mem_init(paddr_t kernend)
174 {
175
176 mem_clusters[0].start = 0;
177 mem_clusters[0].size = kernend;
178 mem_cluster_cnt = 1;
179 /* search DRAM bank 0 */
180 tx_find_dram(kernend, 0x02000000);
181
182 /* search DRAM bank 1 */
183 tx_find_dram(0x02000000, 0x04000000);
184 }
185
186 void
187 tx_find_dram(paddr_t start, paddr_t end)
188 {
189 caddr_t page, startaddr, endaddr;
190 u_int32_t magic0, magic1;
191 #define MAGIC0 (*(__volatile u_int32_t *)(page + 0))
192 #define MAGIC1 (*(__volatile u_int32_t *)(page + 4))
193
194 startaddr = (void *)MIPS_PHYS_TO_KSEG1(start);
195 endaddr = (void *)MIPS_PHYS_TO_KSEG1(end);
196
197 page = startaddr;
198 if (badaddr(page, 4))
199 return;
200
201 do {
202 magic0 = random();
203 magic1 = random();
204 } while (MAGIC0 == magic0 || MAGIC0 == magic1);
205
206 MAGIC0 = magic0;
207 MAGIC1 = magic1;
208 wbflush();
209
210 if (MAGIC0 != magic0 || MAGIC1 != magic1)
211 return;
212
213 for (page += PAGE_SIZE; page < endaddr; page += PAGE_SIZE) {
214 if (badaddr(page, 4))
215 return;
216 if (MAGIC0 == magic0 &&
217 MAGIC1 == magic1) {
218 goto memend_found;
219 }
220 }
221
222 /* check for 32MByte memory */
223 page -= PAGE_SIZE;
224 MAGIC0 = magic0;
225 MAGIC1 = magic1;
226 wbflush();
227 if (MAGIC0 != magic0 || MAGIC1 != magic1)
228 return; /* no memory in this bank */
229
230 memend_found:
231 mem_clusters[mem_cluster_cnt].start = start;
232 mem_clusters[mem_cluster_cnt].size = page - startaddr;
233
234 /* skip kernel area */
235 if (mem_cluster_cnt == 1)
236 mem_clusters[mem_cluster_cnt].size -= start;
237
238 mem_cluster_cnt++;
239 #undef MAGIC0
240 #undef MAGIC1
241 }
242
243 void
244 tx_reboot(int howto, char *bootstr)
245 {
246
247 goto *(u_int32_t *)MIPS_RESET_EXC_VEC;
248 }
249
250 void
251 tx_cons_init()
252 {
253 int slot;
254 #define CONSPLATIDMATCH(p) \
255 platid_match(&platid, &platid_mask_MACH_##p)
256
257 #ifdef SERIALCONSSLOT
258 slot = SERIALCONSSLOT;
259 #else
260 slot = TX39_UARTA;
261 #endif
262 if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) {
263 if(txcom_cnattach(slot, CONSPEED,
264 (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8)) {
265 panic("tx_cons_init: can't attach serial console.");
266 }
267 } else {
268 #if NM38813C > 0
269 if(CONSPLATIDMATCH(VICTOR_INTERLINK) &&
270 m38813c_cnattach(TX39_SYSADDR_CARD1)) {
271 goto panic;
272 }
273 #endif
274 #if NTC5165BUF > 0
275 if(CONSPLATIDMATCH(COMPAQ_C) &&
276 tc5165buf_cnattach(TX39_SYSADDR_CS3)) {
277 goto panic;
278 }
279
280 if(CONSPLATIDMATCH(SHARP_TELIOS) &&
281 tc5165buf_cnattach(TX39_SYSADDR_CS1)) {
282 goto panic;
283 }
284
285 if(CONSPLATIDMATCH(SHARP_MOBILON) &&
286 tc5165buf_cnattach(TX39_SYSADDR_MCS0)) {
287 goto panic;
288 }
289 #endif
290 }
291
292 return;
293 panic:
294 panic("tx_cons_init: can't init console");
295 /* NOTREACHED */
296 }
297
298 void
299 tx_conf_register_intr(tx_chipset_tag_t t, void *intrt)
300 {
301
302 KASSERT(t == &tx_chipset);
303 tx_chipset.tc_intrt = intrt;
304 }
305
306 void
307 tx_conf_register_power(tx_chipset_tag_t t, void *powert)
308 {
309
310 KASSERT(t == &tx_chipset);
311 tx_chipset.tc_powert = powert;
312 }
313
314 void
315 tx_conf_register_clock(tx_chipset_tag_t t, void *clockt)
316 {
317
318 KASSERT(t == &tx_chipset);
319 tx_chipset.tc_clockt = clockt;
320 }
321
322 void
323 tx_conf_register_sound(tx_chipset_tag_t t, void *soundt)
324 {
325
326 KASSERT(t == &tx_chipset);
327 tx_chipset.tc_soundt = soundt;
328 }
329
330 void
331 tx_conf_register_video(tx_chipset_tag_t t, void *videot)
332 {
333
334 KASSERT(t == &tx_chipset);
335 tx_chipset.tc_videot = videot;
336 }
337