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tx39.c revision 1.39.18.1 
      1 /*	$NetBSD: tx39.c,v 1.39.18.1 2010/02/01 04:18:31 matt Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by UCHIYAMA Yasushi.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #include <sys/cdefs.h>
     33 __KERNEL_RCSID(0, "$NetBSD: tx39.c,v 1.39.18.1 2010/02/01 04:18:31 matt Exp $");
     34 
     35 #include "opt_vr41xx.h"
     36 #include "opt_tx39xx.h"
     37 #include "m38813c.h"
     38 #include "tc5165buf.h"
     39 
     40 #include <sys/param.h>
     41 #include <sys/systm.h>
     42 
     43 #include <uvm/uvm_extern.h>
     44 
     45 #include <mips/cache.h>
     46 
     47 #include <machine/bootinfo.h> /* bootinfo */
     48 #include <machine/sysconf.h>  /* platform */
     49 
     50 #include <machine/platid.h>
     51 #include <machine/platid_mask.h>
     52 
     53 #include <machine/bus.h>
     54 
     55 #include <hpcmips/tx/tx39biureg.h>
     56 #include <hpcmips/tx/tx39reg.h>
     57 #include <hpcmips/tx/tx39var.h>
     58 #ifdef TX391X
     59 #include <hpcmips/tx/tx3912videovar.h>
     60 #endif
     61 
     62 #include <sys/termios.h>
     63 #include <sys/ttydefaults.h>
     64 #include <hpcmips/tx/tx39uartvar.h>
     65 #ifndef CONSPEED
     66 #define CONSPEED TTYDEF_SPEED
     67 #endif
     68 
     69 /* console keyboard */
     70 #if NM38813C > 0
     71 #include <hpcmips/dev/m38813cvar.h>
     72 #endif
     73 #if NTC5165BUF > 0
     74 #include <hpcmips/dev/tc5165bufvar.h>
     75 #endif
     76 
     77 struct tx_chipset_tag tx_chipset;
     78 
     79 void	tx_init(void);
     80 #if defined(VR41XX) && defined(TX39XX)
     81 #define	TX_INTR	tx_intr
     82 #else
     83 #define	TX_INTR	cpu_intr	/* locore_mips3 directly call this */
     84 #endif
     85 
     86 extern void TX_INTR(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
     87 
     88 void	tx39clock_cpuspeed(int *, int *);
     89 
     90 /* TX39-specific initialization vector */
     91 void	tx_cons_init(void);
     92 void    tx_fb_init(void **);
     93 void    tx_mem_init(paddr_t);
     94 void	tx_find_dram(paddr_t, paddr_t);
     95 void	tx_reboot(int, char *);
     96 
     97 void
     98 tx_init()
     99 {
    100 	tx_chipset_tag_t tc;
    101 	int model, rev;
    102 	int cpuclock;
    103 
    104 	tc = tx_conf_get_tag();
    105 	/*
    106 	 * Platform Specific Function Hooks
    107 	 */
    108 	platform.cpu_intr	= TX_INTR;
    109 	platform.cpu_idle	= NULL; /* not implemented yet */
    110 	platform.cons_init	= tx_cons_init;
    111 	platform.fb_init	= tx_fb_init;
    112 	platform.mem_init	= tx_mem_init;
    113 	platform.reboot		= tx_reboot;
    114 
    115 
    116 	model = MIPS_PRID_REV(mips_options.mips_cpu_id);
    117 
    118 	switch (model) {
    119 	default:
    120 		/* Unknown TOSHIBA TX39-series */
    121 		sprintf(cpu_name, "Unknown TOSHIBA TX39-series %x", model);
    122 		break;
    123 	case TMPR3912:
    124 		tx39clock_cpuspeed(&cpuclock, &cpuspeed);
    125 
    126 		sprintf(cpu_name, "TOSHIBA TMPR3912 %d.%02d MHz",
    127 		    cpuclock / 1000000, (cpuclock % 1000000) / 10000);
    128 		tc->tc_chipset = __TX391X;
    129 		break;
    130 	case TMPR3922:
    131 		tx39clock_cpuspeed(&cpuclock, &cpuspeed);
    132 		rev = tx_conf_read(tc, TX3922_REVISION_REG);
    133 
    134 		sprintf(cpu_name, "TOSHIBA TMPR3922 rev. %x.%x "
    135 		    "%d.%02d MHz", (rev >> 4) & 0xf, rev & 0xf,
    136 		    cpuclock / 1000000, (cpuclock % 1000000) / 10000);
    137 		tc->tc_chipset = __TX392X;
    138 		break;
    139 	}
    140 }
    141 
    142 void
    143 tx_fb_init(void **kernend)
    144 {
    145 #ifdef TX391X
    146 	paddr_t fb_end;
    147 
    148 	fb_end = MIPS_KSEG0_TO_PHYS(mem_clusters[0].start +
    149 	    mem_clusters[0].size - 1);
    150 	tx3912video_init(MIPS_KSEG0_TO_PHYS(*kernend), &fb_end);
    151 
    152 	/* Skip V-RAM area */
    153 	*kernend = (void *)MIPS_PHYS_TO_KSEG0(fb_end);
    154 #endif /* TX391X */
    155 #ifdef TX392X
    156 	/*
    157 	 *  Plum V-RAM isn't accessible until pmap_bootstrap,
    158 	 * at this time, frame buffer device is disabled.
    159 	 */
    160 	bootinfo->fb_addr = 0;
    161 #endif /* TX392X */
    162 }
    163 
    164 void
    165 tx_mem_init(paddr_t kernend)
    166 {
    167 
    168 	mem_clusters[0].start = 0;
    169 	mem_clusters[0].size = kernend;
    170 	mem_cluster_cnt = 1;
    171 	/* search DRAM bank 0 */
    172 	tx_find_dram(kernend, 0x02000000);
    173 
    174 	/* search DRAM bank 1 */
    175 	tx_find_dram(0x02000000, 0x04000000);
    176 }
    177 
    178 void
    179 tx_find_dram(paddr_t start, paddr_t end)
    180 {
    181 	char *page, *startaddr, *endaddr;
    182 	u_int32_t magic0, magic1;
    183 #define MAGIC0		(*(volatile u_int32_t *)(page + 0))
    184 #define MAGIC1		(*(volatile u_int32_t *)(page + 4))
    185 
    186 	startaddr = (char *)MIPS_PHYS_TO_KSEG1(start);
    187 	endaddr = (char *)MIPS_PHYS_TO_KSEG1(end);
    188 
    189 	page = startaddr;
    190 	if (badaddr(page, 4))
    191 		return;
    192 
    193 	do {
    194 		magic0 = random();
    195 		magic1 = random();
    196 	} while (MAGIC0 == magic0 || MAGIC0 == magic1);
    197 
    198 	MAGIC0 = magic0;
    199 	MAGIC1 = magic1;
    200 	wbflush();
    201 
    202 	if (MAGIC0 != magic0 || MAGIC1 != magic1)
    203 		return;
    204 
    205 	for (page += PAGE_SIZE; page < endaddr; page += PAGE_SIZE) {
    206 		if (badaddr(page, 4))
    207 			return;
    208 		if (MAGIC0 == magic0 &&
    209 		    MAGIC1 == magic1) {
    210 			goto memend_found;
    211 		}
    212 	}
    213 
    214 	/* check for 32MByte memory */
    215 	page -= PAGE_SIZE;
    216 	MAGIC0 = magic0;
    217 	MAGIC1 = magic1;
    218 	wbflush();
    219 	if (MAGIC0 != magic0 || MAGIC1 != magic1)
    220 		return; /* no memory in this bank */
    221 
    222  memend_found:
    223 	mem_clusters[mem_cluster_cnt].start = start;
    224 	mem_clusters[mem_cluster_cnt].size = page - startaddr;
    225 
    226 	/* skip kernel area */
    227 	if (mem_cluster_cnt == 1)
    228 		mem_clusters[mem_cluster_cnt].size -= start;
    229 
    230 	mem_cluster_cnt++;
    231 #undef MAGIC0
    232 #undef MAGIC1
    233 }
    234 
    235 void
    236 tx_reboot(int howto, char *bootstr)
    237 {
    238 
    239 	goto *(u_int32_t *)MIPS_RESET_EXC_VEC;
    240 }
    241 
    242 void
    243 tx_cons_init()
    244 {
    245 	int slot;
    246 #define CONSPLATIDMATCH(p)						\
    247 	platid_match(&platid, &platid_mask_MACH_##p)
    248 
    249 #ifdef SERIALCONSSLOT
    250 	slot = SERIALCONSSLOT;
    251 #else
    252 	slot = TX39_UARTA;
    253 #endif
    254 	if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) {
    255 		if(txcom_cnattach(slot, CONSPEED,
    256 		    (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8)) {
    257 			panic("tx_cons_init: can't attach serial console.");
    258 		}
    259 	} else {
    260 #if NM38813C > 0
    261 		if(CONSPLATIDMATCH(VICTOR_INTERLINK) &&
    262 		    m38813c_cnattach(TX39_SYSADDR_CARD1)) {
    263 			goto panic;
    264 		}
    265 #endif
    266 #if NTC5165BUF > 0
    267 		if(CONSPLATIDMATCH(COMPAQ_C) &&
    268 		    tc5165buf_cnattach(TX39_SYSADDR_CS3)) {
    269 			goto panic;
    270 		}
    271 
    272 		if(CONSPLATIDMATCH(SHARP_TELIOS) &&
    273 		    tc5165buf_cnattach(TX39_SYSADDR_CS1)) {
    274 			goto panic;
    275 		}
    276 
    277 		if(CONSPLATIDMATCH(SHARP_MOBILON) &&
    278 		    tc5165buf_cnattach(TX39_SYSADDR_MCS0)) {
    279 			goto panic;
    280 		}
    281 #endif
    282 	}
    283 
    284 	return;
    285  panic:
    286 	panic("tx_cons_init: can't init console");
    287 	/* NOTREACHED */
    288 }
    289 
    290 void
    291 tx_conf_register_intr(tx_chipset_tag_t t, void *intrt)
    292 {
    293 
    294 	KASSERT(t == &tx_chipset);
    295 	tx_chipset.tc_intrt = intrt;
    296 }
    297 
    298 void
    299 tx_conf_register_power(tx_chipset_tag_t t, void *powert)
    300 {
    301 
    302 	KASSERT(t == &tx_chipset);
    303 	tx_chipset.tc_powert = powert;
    304 }
    305 
    306 void
    307 tx_conf_register_clock(tx_chipset_tag_t t, void *clockt)
    308 {
    309 
    310 	KASSERT(t == &tx_chipset);
    311 	tx_chipset.tc_clockt = clockt;
    312 }
    313 
    314 void
    315 tx_conf_register_sound(tx_chipset_tag_t t, void *soundt)
    316 {
    317 
    318 	KASSERT(t == &tx_chipset);
    319 	tx_chipset.tc_soundt = soundt;
    320 }
    321 
    322 void
    323 tx_conf_register_video(tx_chipset_tag_t t, void *videot)
    324 {
    325 
    326 	KASSERT(t == &tx_chipset);
    327 	tx_chipset.tc_videot = videot;
    328 }
    329