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tx39.c revision 1.7 
      1 /*	$NetBSD: tx39.c,v 1.7 1999/12/12 18:40:33 uch Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1999, by UCHIYAMA Yasushi
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. The name of the developer may NOT be used to endorse or promote products
     13  *    derived from this software without specific prior written permission.
     14  *
     15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     25  * SUCH DAMAGE.
     26  *
     27  */
     28 
     29 #include "opt_tx39_debug.h"
     30 #include "m38813c.h"
     31 #include "p7416buf.h"
     32 #include "tc5165buf.h"
     33 
     34 #include <sys/param.h>
     35 #include <sys/systm.h>
     36 #include <sys/device.h>
     37 
     38 #include <machine/locore.h>   /* cpu_id */
     39 #include <machine/bootinfo.h> /* bootinfo */
     40 #include <machine/sysconf.h>  /* platform */
     41 
     42 #include <machine/platid.h>
     43 #include <machine/platid_mask.h>
     44 
     45 #include <machine/bus.h>
     46 #include <machine/intr.h>
     47 
     48 #include <hpcmips/hpcmips/machdep.h> /* cpu_model */
     49 
     50 #include <hpcmips/tx/tx39biureg.h>
     51 #include <hpcmips/tx/tx39reg.h>
     52 #include <hpcmips/tx/tx39var.h>
     53 #ifdef TX391X
     54 #include <hpcmips/tx/tx3912videovar.h>
     55 #endif
     56 
     57 #include <sys/termios.h>
     58 #include <sys/ttydefaults.h>
     59 #include <hpcmips/tx/tx39uartvar.h>
     60 #ifndef CONSPEED
     61 #define CONSPEED TTYDEF_SPEED
     62 #endif
     63 
     64 /* console keyboard */
     65 #if NP7416BUF > 0
     66 #include <hpcmips/dev/p7416bufvar.h>
     67 #endif
     68 #if NM38813C > 0
     69 #include <hpcmips/dev/m38813cvar.h>
     70 #endif
     71 #if NTC5165BUF > 0
     72 #include <hpcmips/dev/tc5165bufvar.h>
     73 #endif
     74 
     75 extern unsigned nullclkread __P((void));
     76 extern unsigned (*clkread) __P((void));
     77 
     78 struct tx_chipset_tag tx_chipset;
     79 
     80 #ifdef TX39_DEBUG
     81 u_int32_t tx39debugflag;
     82 #endif
     83 
     84 void	tx_init __P((void));
     85 int	tx39icu_intr __P((u_int32_t, u_int32_t, u_int32_t, u_int32_t));
     86 int	tx39_find_dram __P((u_int32_t, u_int32_t));
     87 
     88 /* TX39-specific initialization vector */
     89 void	tx_os_init __P((void));
     90 void	tx_bus_reset __P((void));
     91 void	tx_cons_init __P((void));
     92 void	tx_device_register __P((struct device *, void *));
     93 void    tx_fb_init __P((caddr_t*));
     94 int     tx_mem_init __P((caddr_t));
     95 void	tx_reboot __P((int howto, char *bootstr));
     96 int	tx_intr __P((u_int32_t mask, u_int32_t pc, u_int32_t statusReg,
     97 		     u_int32_t causeReg));
     98 
     99 void
    100 tx_init()
    101 {
    102 	tx_chipset_tag_t tc;
    103 	int model, rev;
    104 
    105 	tc = tx_conf_get_tag();
    106 	/*
    107 	 * Platform Specific Function Hooks
    108 	 */
    109 	platform.os_init = tx_os_init;
    110 	platform.bus_reset = tx_bus_reset;
    111 	platform.cons_init = tx_cons_init;
    112 	platform.device_register = tx_device_register;
    113 	platform.fb_init = tx_fb_init;
    114 	platform.mem_init = tx_mem_init;
    115 	platform.reboot = tx_reboot;
    116 
    117 	model = (cpu_id.cpu.cp_majrev << 4)| cpu_id.cpu.cp_minrev;
    118 
    119 	switch (model) {
    120 	default:
    121 		 /* Unknown TOSHIBA TX39-series */
    122 		sprintf(cpu_model, "Unknown TOSHIBA TX39-series %x.%x",
    123 			cpu_id.cpu.cp_majrev, cpu_id.cpu.cp_minrev);
    124 		break;
    125 	case TMPR3912:
    126 		sprintf(cpu_model, "TOSHIBA TMPR3912");
    127 		cpuspeed = 50; /* XXX Should calibrate XXX */
    128 		break;
    129 	case TMPR3922:
    130 		rev = tx_conf_read(tc, TX3922_REVISION_REG);
    131 		sprintf(cpu_model, "TOSHIBA TMPR3922 rev. %x.%x",
    132 			(rev >> 4) & 0xf, rev & 0xf);
    133 		cpuspeed = 100; /* XXX Should calibrate XXX */
    134 		break;
    135 	}
    136 }
    137 
    138 void
    139 tx_os_init()
    140 {
    141 	/*
    142 	 * Set up interrupt handling and I/O addresses.
    143 	 */
    144 	mips_hardware_intr = tx39icu_intr;
    145 
    146 	splvec.splbio = MIPS_SPL_2_4;
    147 	splvec.splnet = MIPS_SPL_2_4;
    148 	splvec.spltty = MIPS_SPL_2_4;
    149 	splvec.splimp = MIPS_SPL_2_4;
    150 	splvec.splclock = MIPS_SPL_2_4;
    151 	splvec.splstatclock = MIPS_SPL_2_4;
    152 
    153 	/* no high resolution timer circuit; possibly never called */
    154 	clkread = nullclkread;
    155 }
    156 
    157 void
    158 tx_fb_init(kernend)
    159 	caddr_t *kernend;
    160 {
    161 #ifdef TX391X
    162 	tx_chipset_tag_t tc;
    163 	u_int32_t fb_start, fb_addr, fb_size, fb_line_bytes;
    164 
    165 	/* Initialize to access TX39 configuration register */
    166 	tc = tx_conf_get_tag();
    167 
    168 	fb_start = MIPS_KSEG0_TO_PHYS(*kernend);
    169 	tx3912video_init(tc, fb_start, bootinfo->fb_width,
    170 			bootinfo->fb_height, &fb_addr, &fb_size,
    171 			&fb_line_bytes);
    172 
    173 	/* Setup bootinfo */
    174 	bootinfo->fb_line_bytes = fb_line_bytes;
    175 	bootinfo->fb_addr = (unsigned char*)MIPS_PHYS_TO_KSEG1(fb_addr);
    176 
    177 	/* Skip V-RAM area */
    178 	*kernend += fb_size;
    179 #endif /* TX391X */
    180 #ifdef TX392X
    181 	/*
    182 	 *  Plum V-RAM isn't accessible until pmap_bootstrap,
    183 	 * at this time, frame buffer device is disabled.
    184 	 */
    185 	bootinfo->fb_addr = 0;
    186 #endif /* TX392X */
    187 }
    188 
    189 int
    190 tx_mem_init(kernend)
    191 	caddr_t kernend; /* kseg0 */
    192 {
    193 	u_int32_t startaddr, endaddr;
    194 	int npage, xpage, kpage;
    195 
    196 	startaddr = MIPS_PHYS_TO_KSEG1(
    197 		(btoc((u_int32_t)kernend - MIPS_KSEG0_START)) << PGSHIFT);
    198 	endaddr = MIPS_PHYS_TO_KSEG1(TX39_SYSADDR_DRAMBANK0CS1 +
    199 				     TX39_SYSADDR_DRAMBANK_LEN);
    200 	kpage = btoc(MIPS_KSEG1_TO_PHYS(startaddr));
    201 
    202 	/* D-RAM bank0 */
    203 	npage = tx39_find_dram(startaddr, endaddr);
    204 
    205 	printf("DRAM bank0: %d pages (%dMByte) reserved %d pages\n",
    206 	       npage + 1, ((npage  + 1) * NBPG) / 0x100000, kpage + 1);
    207 	npage -= kpage; /* exclude kernel area */
    208 
    209 	/* Clear DRAM area */
    210 	memset((void*)startaddr, 0, npage * NBPG);
    211 
    212 	/* D-RAM bank1 XXX find only. not usable yet */
    213 	startaddr = MIPS_PHYS_TO_KSEG1(TX39_SYSADDR_DRAMBANK1CS1);
    214 	endaddr = MIPS_PHYS_TO_KSEG1(TX39_SYSADDR_DRAMBANK1CS1 +
    215 				     TX39_SYSADDR_DRAMBANK_LEN);
    216 	xpage = tx39_find_dram(startaddr, endaddr);
    217 	printf("DRAM bank1: %d pages (%dMByte) ...but not usable yet\n",
    218 	       xpage + 1, ((xpage + 1) * NBPG) / 0x100000);
    219 
    220 	/*
    221 	 *  Clear currently unused D-RAM area
    222 	 *  (For reboot Windows CE clearly)
    223 	 */
    224 	memset((void*)startaddr, 0, npage * NBPG);
    225 	memset((void*)(KERNBASE + 0x400), 0,
    226 	       KERNTEXTOFF - KERNBASE - 0x800);
    227 
    228 	return npage; /* Return bank0's memory only */
    229 }
    230 
    231 void
    232 tx_reboot(howto, bootstr)
    233 	int howto;
    234 	char *bootstr;
    235 {
    236 	goto *(u_int32_t *)MIPS_RESET_EXC_VEC;
    237 }
    238 
    239 int
    240 tx39_find_dram(startaddr, endaddr)
    241 	u_int32_t startaddr; /* kseg1 */
    242 	u_int32_t endaddr;    /* kseg1 */
    243 {
    244 #define DRAM_MAGIC0 0xac1dcafe
    245 #define DRAM_MAGIC1 0x19700220
    246 	u_int32_t page;
    247 	int npage;
    248 
    249 	page = startaddr;
    250 	((volatile int *)page)[0] = DRAM_MAGIC0;
    251 	((volatile int *)page)[4] = DRAM_MAGIC1;
    252 	page += NBPG;
    253 	for (npage = 0; page < endaddr; page += NBPG, npage++) {
    254 		if ((((volatile int *)page)[0] == DRAM_MAGIC0 &&
    255 		     ((volatile int *)page)[4] == DRAM_MAGIC1)) {
    256 			return npage;
    257 		}
    258 	}
    259 	/* no memory in this bank */
    260 	return 0;
    261 }
    262 
    263 void
    264 tx_bus_reset()
    265 {
    266 	/* hpcmips port don't use */
    267 }
    268 
    269 void
    270 tx_cons_init()
    271 {
    272 	int slot;
    273 #define CONSPLATIDMATCH(p) \
    274 	platid_match(&platid, &platid_mask_MACH_##p)
    275 
    276 #ifdef SERIALCONSSLOT
    277 	slot = SERIALCONSSLOT;
    278 #else
    279 	slot = TX39_UARTA;
    280 #endif
    281 	if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) {
    282 		if(txcom_cnattach(slot, CONSPEED,
    283 				  (TTYDEF_CFLAG & ~(CSIZE | PARENB)) |
    284 				  CS8)) {
    285 			panic("tx_cons_init: can't attach serial console.");
    286 		}
    287 	} else {
    288 #if NP7416BUF > 0
    289 		if(CONSPLATIDMATCH(COMPAQ_C) &&
    290 		   p7416buf_cnattach(TX39_SYSADDR_CS3)) {
    291 			panic("tx_cons_init: can't init console");
    292 		}
    293 #endif
    294 #if NM38813C > 0
    295 		if(CONSPLATIDMATCH(VICTOR_INTERLINK) &&
    296 		   m38813c_cnattach(TX39_SYSADDR_CARD1)) {
    297 			panic("tx_cons_init: can't init console");
    298 		}
    299 #endif
    300 #if NTC5165BUF > 0
    301 		if(CONSPLATIDMATCH(SHARP_TELIOS) &&
    302 		   tc5165buf_cnattach(TX39_SYSADDR_CS1)) {
    303 			panic("tx_cons_init: can't init console");
    304 		}
    305 #endif
    306 	}
    307 
    308 }
    309 
    310 void
    311 tx_device_register(dev, aux)
    312 	struct device *dev;
    313 	void *aux;
    314 {
    315 	/* hpcmips port don't use */
    316 }
    317 
    318 void
    319 tx_conf_register_intr(t, intrt)
    320 	tx_chipset_tag_t t;
    321 	void *intrt;
    322 {
    323 	if (tx_chipset.tc_intrt) {
    324 		panic("duplicate intrt");
    325 	}
    326 
    327 	if (t != &tx_chipset) {
    328 		panic("bogus tx_chipset_tag");
    329 	}
    330 
    331 	tx_chipset.tc_intrt = intrt;
    332 }
    333 
    334 #ifdef TX39_PREFER_FUNCTION
    335 tx_chipset_tag_t
    336 tx_conf_get_tag()
    337 {
    338 	return (tx_chipset_tag_t)&tx_chipset;
    339 }
    340 
    341 txreg_t
    342 tx_conf_read(t, reg)
    343 	tx_chipset_tag_t t;
    344 	int reg;
    345 {
    346 	return *((txreg_t*)(TX39_SYSADDR_CONFIG_REG_KSEG1 + reg));
    347 }
    348 
    349 void
    350 tx_conf_write(t, reg, val)
    351 	tx_chipset_tag_t t;
    352 	int reg;
    353 	txreg_t val;
    354 {
    355 	*((txreg_t*)(TX39_SYSADDR_CONFIG_REG_KSEG1 + reg)) = val;
    356 }
    357 #endif /* TX39_PREFER_FUNCTION */
    358 
    359 int
    360 __is_set_print(reg, mask, name)
    361 	u_int32_t reg;
    362 	int mask;
    363 	char *name;
    364 {
    365 	if (reg & mask) {
    366 		printf("%s ", name);
    367 		return 1;
    368 	}
    369 	return 0;
    370 }
    371