tx3912video.c revision 1.4.2.2
1 1.4.2.2 wrstuden /* $NetBSD: tx3912video.c,v 1.4.2.2 1999/12/27 18:32:10 wrstuden Exp $ */ 2 1.4.2.2 wrstuden 3 1.4.2.2 wrstuden /* 4 1.4.2.2 wrstuden * Copyright (c) 1999, by UCHIYAMA Yasushi 5 1.4.2.2 wrstuden * All rights reserved. 6 1.4.2.2 wrstuden * 7 1.4.2.2 wrstuden * Redistribution and use in source and binary forms, with or without 8 1.4.2.2 wrstuden * modification, are permitted provided that the following conditions 9 1.4.2.2 wrstuden * are met: 10 1.4.2.2 wrstuden * 1. Redistributions of source code must retain the above copyright 11 1.4.2.2 wrstuden * notice, this list of conditions and the following disclaimer. 12 1.4.2.2 wrstuden * 2. The name of the developer may NOT be used to endorse or promote products 13 1.4.2.2 wrstuden * derived from this software without specific prior written permission. 14 1.4.2.2 wrstuden * 15 1.4.2.2 wrstuden * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 1.4.2.2 wrstuden * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 1.4.2.2 wrstuden * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 1.4.2.2 wrstuden * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 1.4.2.2 wrstuden * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 1.4.2.2 wrstuden * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 1.4.2.2 wrstuden * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 1.4.2.2 wrstuden * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 1.4.2.2 wrstuden * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 1.4.2.2 wrstuden * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 1.4.2.2 wrstuden * SUCH DAMAGE. 26 1.4.2.2 wrstuden * 27 1.4.2.2 wrstuden */ 28 1.4.2.2 wrstuden #include "opt_tx39_debug.h" 29 1.4.2.2 wrstuden #include "fb.h" 30 1.4.2.2 wrstuden 31 1.4.2.2 wrstuden #include <sys/param.h> 32 1.4.2.2 wrstuden #include <sys/systm.h> 33 1.4.2.2 wrstuden #include <sys/device.h> 34 1.4.2.2 wrstuden #include <sys/extent.h> 35 1.4.2.2 wrstuden 36 1.4.2.2 wrstuden #include <machine/bus.h> 37 1.4.2.2 wrstuden #include <machine/bootinfo.h> /* bootinfo */ 38 1.4.2.2 wrstuden 39 1.4.2.2 wrstuden #include <hpcmips/tx/tx39var.h> 40 1.4.2.2 wrstuden #include <hpcmips/tx/tx3912videovar.h> 41 1.4.2.2 wrstuden #include <hpcmips/tx/tx3912videoreg.h> 42 1.4.2.2 wrstuden 43 1.4.2.2 wrstuden #if NFB > 0 44 1.4.2.2 wrstuden #include <dev/rcons/raster.h> 45 1.4.2.2 wrstuden #include <dev/wscons/wsdisplayvar.h> 46 1.4.2.2 wrstuden #include <arch/hpcmips/dev/fbvar.h> 47 1.4.2.2 wrstuden #endif 48 1.4.2.2 wrstuden 49 1.4.2.2 wrstuden void tx3912video_framebuffer_init __P((tx_chipset_tag_t, u_int32_t, 50 1.4.2.2 wrstuden u_int32_t)); 51 1.4.2.2 wrstuden int tx3912video_framebuffer_alloc __P((tx_chipset_tag_t, u_int32_t, 52 1.4.2.2 wrstuden int, int, int, u_int32_t*, 53 1.4.2.2 wrstuden u_int32_t*)); 54 1.4.2.2 wrstuden void tx3912video_reset __P((tx_chipset_tag_t)); 55 1.4.2.2 wrstuden void tx3912video_resolution_init __P((tx_chipset_tag_t, int, int)); 56 1.4.2.2 wrstuden int tx3912video_fbdepth __P((tx_chipset_tag_t, int)); 57 1.4.2.2 wrstuden 58 1.4.2.2 wrstuden static u_int32_t framebuffer, framebuffersize; 59 1.4.2.2 wrstuden 60 1.4.2.2 wrstuden int tx3912video_match __P((struct device*, struct cfdata*, void*)); 61 1.4.2.2 wrstuden void tx3912video_attach __P((struct device*, struct device*, void*)); 62 1.4.2.2 wrstuden int tx3912video_print __P((void*, const char*)); 63 1.4.2.2 wrstuden 64 1.4.2.2 wrstuden struct tx3912video_softc { 65 1.4.2.2 wrstuden struct device sc_dev; 66 1.4.2.2 wrstuden u_int32_t sc_fbaddr; 67 1.4.2.2 wrstuden u_int32_t sc_fbsize; 68 1.4.2.2 wrstuden }; 69 1.4.2.2 wrstuden 70 1.4.2.2 wrstuden struct fb_attach_args { 71 1.4.2.2 wrstuden const char *fba_name; 72 1.4.2.2 wrstuden }; 73 1.4.2.2 wrstuden 74 1.4.2.2 wrstuden struct cfattach tx3912video_ca = { 75 1.4.2.2 wrstuden sizeof(struct tx3912video_softc), tx3912video_match, 76 1.4.2.2 wrstuden tx3912video_attach 77 1.4.2.2 wrstuden }; 78 1.4.2.2 wrstuden 79 1.4.2.2 wrstuden int 80 1.4.2.2 wrstuden tx3912video_match(parent, cf, aux) 81 1.4.2.2 wrstuden struct device *parent; 82 1.4.2.2 wrstuden struct cfdata *cf; 83 1.4.2.2 wrstuden void *aux; 84 1.4.2.2 wrstuden { 85 1.4.2.2 wrstuden return 1; 86 1.4.2.2 wrstuden } 87 1.4.2.2 wrstuden 88 1.4.2.2 wrstuden void 89 1.4.2.2 wrstuden tx3912video_attach(parent, self, aux) 90 1.4.2.2 wrstuden struct device *parent; 91 1.4.2.2 wrstuden struct device *self; 92 1.4.2.2 wrstuden void *aux; 93 1.4.2.2 wrstuden { 94 1.4.2.2 wrstuden struct txsim_attach_args *ta = aux; 95 1.4.2.2 wrstuden struct tx3912video_softc *sc = (void*)self; 96 1.4.2.2 wrstuden tx_chipset_tag_t tc = ta->ta_tc; 97 1.4.2.2 wrstuden struct fb_attach_args fba; 98 1.4.2.2 wrstuden 99 1.4.2.2 wrstuden printf("\n"); 100 1.4.2.2 wrstuden sc->sc_fbaddr = framebuffer; 101 1.4.2.2 wrstuden sc->sc_fbsize = framebuffersize; 102 1.4.2.2 wrstuden printf("TMPR3912 video module ["); 103 1.4.2.2 wrstuden tx3912video_fbdepth(tc, 1); 104 1.4.2.2 wrstuden printf("] frame buffer: 0x%08x-0x%08x\n", sc->sc_fbaddr, 105 1.4.2.2 wrstuden sc->sc_fbaddr + sc->sc_fbsize); 106 1.4.2.2 wrstuden 107 1.4.2.2 wrstuden /* Attach frame buffer device */ 108 1.4.2.2 wrstuden #if NFB > 0 109 1.4.2.2 wrstuden if (!(bootinfo->bi_cnuse & BI_CNUSE_SERIAL)) { 110 1.4.2.2 wrstuden if (fb_cnattach(0, 0, 0, 0)) { 111 1.4.2.2 wrstuden panic("tx3912video_attach: can't init fb console"); 112 1.4.2.2 wrstuden } 113 1.4.2.2 wrstuden } 114 1.4.2.2 wrstuden fba.fba_name = "fb"; 115 1.4.2.2 wrstuden config_found(self, &fba, tx3912video_print); 116 1.4.2.2 wrstuden #endif 117 1.4.2.2 wrstuden } 118 1.4.2.2 wrstuden 119 1.4.2.2 wrstuden int 120 1.4.2.2 wrstuden tx3912video_print(aux, pnp) 121 1.4.2.2 wrstuden void *aux; 122 1.4.2.2 wrstuden const char *pnp; 123 1.4.2.2 wrstuden { 124 1.4.2.2 wrstuden return pnp ? QUIET : UNCONF; 125 1.4.2.2 wrstuden } 126 1.4.2.2 wrstuden 127 1.4.2.2 wrstuden int 128 1.4.2.2 wrstuden tx3912video_init(tc, fb_start, fb_width, fb_height, fb_addr, fb_size, 129 1.4.2.2 wrstuden fb_line_bytes) 130 1.4.2.2 wrstuden tx_chipset_tag_t tc; 131 1.4.2.2 wrstuden u_int32_t fb_start; /* Physical address */ 132 1.4.2.2 wrstuden int fb_width, fb_height; 133 1.4.2.2 wrstuden u_int32_t *fb_addr, *fb_size; 134 1.4.2.2 wrstuden int *fb_line_bytes; 135 1.4.2.2 wrstuden { 136 1.4.2.2 wrstuden u_int32_t addr, size; 137 1.4.2.2 wrstuden int fb_depth; 138 1.4.2.2 wrstuden 139 1.4.2.2 wrstuden /* Inquire bit depth */ 140 1.4.2.2 wrstuden fb_depth = tx3912video_fbdepth(tc, 0); 141 1.4.2.2 wrstuden 142 1.4.2.2 wrstuden /* Allocate framebuffer area */ 143 1.4.2.2 wrstuden if (tx3912video_framebuffer_alloc(tc, fb_start, fb_width, fb_height, 144 1.4.2.2 wrstuden fb_depth, &addr, &size)) { 145 1.4.2.2 wrstuden return 1; 146 1.4.2.2 wrstuden } 147 1.4.2.2 wrstuden #if notyet 148 1.4.2.2 wrstuden tx3912video_resolution_init(tc, fb_width, fb_height); 149 1.4.2.2 wrstuden #else 150 1.4.2.2 wrstuden /* Use Windows CE setting. */ 151 1.4.2.2 wrstuden #endif 152 1.4.2.2 wrstuden /* Set DMA transfer address to VID module */ 153 1.4.2.2 wrstuden tx3912video_framebuffer_init(tc, addr, size); 154 1.4.2.2 wrstuden 155 1.4.2.2 wrstuden /* Syncronize framebuffer addr to frame signal */ 156 1.4.2.2 wrstuden tx3912video_reset(tc); 157 1.4.2.2 wrstuden 158 1.4.2.2 wrstuden *fb_line_bytes = (fb_width * fb_depth) / 8; 159 1.4.2.2 wrstuden *fb_addr = addr; /* Phsical address */ 160 1.4.2.2 wrstuden *fb_size = size; 161 1.4.2.2 wrstuden 162 1.4.2.2 wrstuden return 0; 163 1.4.2.2 wrstuden } 164 1.4.2.2 wrstuden 165 1.4.2.2 wrstuden int 166 1.4.2.2 wrstuden tx3912video_framebuffer_alloc(tc, start, h, v, depth, fb_addr, fb_size) 167 1.4.2.2 wrstuden tx_chipset_tag_t tc; 168 1.4.2.2 wrstuden u_int32_t start; 169 1.4.2.2 wrstuden int h, v, depth; 170 1.4.2.2 wrstuden u_int32_t *fb_addr, *fb_size; 171 1.4.2.2 wrstuden { 172 1.4.2.2 wrstuden struct extent_fixed ex_fixed[2]; 173 1.4.2.2 wrstuden struct extent *ex; 174 1.4.2.2 wrstuden u_long addr, size; 175 1.4.2.2 wrstuden int err; 176 1.4.2.2 wrstuden 177 1.4.2.2 wrstuden /* Calcurate frame buffer size */ 178 1.4.2.2 wrstuden size = (h * v * depth) / 8; 179 1.4.2.2 wrstuden 180 1.4.2.2 wrstuden /* Allocate V-RAM area */ 181 1.4.2.2 wrstuden if (!(ex = extent_create("Frame buffer address", start, 182 1.4.2.2 wrstuden start + TX3912_FRAMEBUFFER_MAX, 183 1.4.2.2 wrstuden 0, (caddr_t)ex_fixed, sizeof ex_fixed, 184 1.4.2.2 wrstuden EX_NOWAIT))) { 185 1.4.2.2 wrstuden return 1; 186 1.4.2.2 wrstuden } 187 1.4.2.2 wrstuden if((err = extent_alloc_subregion(ex, start, start + size, size, 188 1.4.2.2 wrstuden TX3912_FRAMEBUFFER_ALIGNMENT, 189 1.4.2.2 wrstuden TX3912_FRAMEBUFFER_BOUNDARY, 190 1.4.2.2 wrstuden EX_FAST|EX_NOWAIT, &addr))) { 191 1.4.2.2 wrstuden return 1; 192 1.4.2.2 wrstuden } 193 1.4.2.2 wrstuden framebuffer = addr; 194 1.4.2.2 wrstuden framebuffersize = size; 195 1.4.2.2 wrstuden *fb_addr = addr; 196 1.4.2.2 wrstuden *fb_size = size; 197 1.4.2.2 wrstuden 198 1.4.2.2 wrstuden return 0; 199 1.4.2.2 wrstuden } 200 1.4.2.2 wrstuden 201 1.4.2.2 wrstuden void 202 1.4.2.2 wrstuden tx3912video_framebuffer_init(tc, fb_addr, fb_size) 203 1.4.2.2 wrstuden tx_chipset_tag_t tc; 204 1.4.2.2 wrstuden u_int32_t fb_addr, fb_size; 205 1.4.2.2 wrstuden { 206 1.4.2.2 wrstuden u_int32_t reg, vaddr, bank, base; 207 1.4.2.2 wrstuden 208 1.4.2.2 wrstuden /* XXX currently I don't set DFVAL, so force DF signal toggled on 209 1.4.2.2 wrstuden * XXX each frame. */ 210 1.4.2.2 wrstuden reg = tx_conf_read(tc, TX3912_VIDEOCTRL1_REG); 211 1.4.2.2 wrstuden reg &= ~TX3912_VIDEOCTRL1_DFMODE; 212 1.4.2.2 wrstuden tx_conf_write(tc, TX3912_VIDEOCTRL1_REG, reg); 213 1.4.2.2 wrstuden 214 1.4.2.2 wrstuden /* Set DMA transfer start and end address */ 215 1.4.2.2 wrstuden 216 1.4.2.2 wrstuden bank = TX3912_VIDEOCTRL3_VIDBANK(fb_addr); 217 1.4.2.2 wrstuden base = TX3912_VIDEOCTRL3_VIDBASEHI(fb_addr); 218 1.4.2.2 wrstuden reg = TX3912_VIDEOCTRL3_VIDBANK_SET(0, bank); 219 1.4.2.2 wrstuden /* Upper address counter */ 220 1.4.2.2 wrstuden reg = TX3912_VIDEOCTRL3_VIDBASEHI_SET(reg, base); 221 1.4.2.2 wrstuden tx_conf_write(tc, TX3912_VIDEOCTRL3_REG, reg); 222 1.4.2.2 wrstuden 223 1.4.2.2 wrstuden /* Lower address counter */ 224 1.4.2.2 wrstuden base = TX3912_VIDEOCTRL4_VIDBASELO(fb_addr + fb_size); 225 1.4.2.2 wrstuden reg = TX3912_VIDEOCTRL4_VIDBASELO_SET(0, base); 226 1.4.2.2 wrstuden 227 1.4.2.2 wrstuden /* Set DF-signal rate */ 228 1.4.2.2 wrstuden reg = TX3912_VIDEOCTRL4_DFVAL_SET(reg, 0); /* XXX not yet*/ 229 1.4.2.2 wrstuden 230 1.4.2.2 wrstuden /* Set VIDDONE signal delay after FRAME signal */ 231 1.4.2.2 wrstuden /* XXX not yet*/ 232 1.4.2.2 wrstuden tx_conf_write(tc, TX3912_VIDEOCTRL4_REG, reg); 233 1.4.2.2 wrstuden 234 1.4.2.2 wrstuden /* Clear frame buffer */ 235 1.4.2.2 wrstuden vaddr = MIPS_PHYS_TO_KSEG1(fb_addr); 236 1.4.2.2 wrstuden bzero((void*)vaddr, fb_size); 237 1.4.2.2 wrstuden } 238 1.4.2.2 wrstuden 239 1.4.2.2 wrstuden void 240 1.4.2.2 wrstuden tx3912video_resolution_init(tc, h, v) 241 1.4.2.2 wrstuden tx_chipset_tag_t tc; 242 1.4.2.2 wrstuden int h; 243 1.4.2.2 wrstuden int v; 244 1.4.2.2 wrstuden { 245 1.4.2.2 wrstuden u_int32_t reg, val; 246 1.4.2.2 wrstuden int split, bit8, horzval, lineval; 247 1.4.2.2 wrstuden 248 1.4.2.2 wrstuden reg = tx_conf_read(tc, TX3912_VIDEOCTRL1_REG); 249 1.4.2.2 wrstuden split = reg & TX3912_VIDEOCTRL1_DISPSPLIT; 250 1.4.2.2 wrstuden bit8 = (TX3912_VIDEOCTRL1_BITSEL(reg) == 251 1.4.2.2 wrstuden TX3912_VIDEOCTRL1_BITSEL_8BITCOLOR); 252 1.4.2.2 wrstuden val = TX3912_VIDEOCTRL1_BITSEL(reg); 253 1.4.2.2 wrstuden 254 1.4.2.2 wrstuden if ((val == TX3912_VIDEOCTRL1_BITSEL_8BITCOLOR) && 255 1.4.2.2 wrstuden !split) { 256 1.4.2.2 wrstuden /* (LCD horizontal pixels / 8bit) * RGB - 1 */ 257 1.4.2.2 wrstuden horzval = (h / 8) * 3 - 1; 258 1.4.2.2 wrstuden } else { 259 1.4.2.2 wrstuden horzval = h / 4 - 1; 260 1.4.2.2 wrstuden } 261 1.4.2.2 wrstuden lineval = (split ? v / 2 : v) - 1; 262 1.4.2.2 wrstuden 263 1.4.2.2 wrstuden /* Video rate */ 264 1.4.2.2 wrstuden /* XXX 265 1.4.2.2 wrstuden * probably This value should be determined from DFINT and LCDINT 266 1.4.2.2 wrstuden */ 267 1.4.2.2 wrstuden reg = TX3912_VIDEOCTRL2_VIDRATE_SET(0, horzval + 1); 268 1.4.2.2 wrstuden /* Horizontal size of LCD */ 269 1.4.2.2 wrstuden reg = TX3912_VIDEOCTRL2_HORZVAL_SET(reg, horzval); 270 1.4.2.2 wrstuden /* # of lines for the LCD */ 271 1.4.2.2 wrstuden reg = TX3912_VIDEOCTRL2_LINEVAL_SET(reg, lineval); 272 1.4.2.2 wrstuden 273 1.4.2.2 wrstuden tx_conf_write(tc, TX3912_VIDEOCTRL2_REG, reg); 274 1.4.2.2 wrstuden } 275 1.4.2.2 wrstuden 276 1.4.2.2 wrstuden int 277 1.4.2.2 wrstuden tx3912video_fbdepth(tc, verbose) 278 1.4.2.2 wrstuden tx_chipset_tag_t tc; 279 1.4.2.2 wrstuden int verbose; 280 1.4.2.2 wrstuden { 281 1.4.2.2 wrstuden u_int32_t reg, val; 282 1.4.2.2 wrstuden 283 1.4.2.2 wrstuden reg = tx_conf_read(tc, TX3912_VIDEOCTRL1_REG); 284 1.4.2.2 wrstuden val = TX3912_VIDEOCTRL1_BITSEL(reg); 285 1.4.2.2 wrstuden switch (val) { 286 1.4.2.2 wrstuden case TX3912_VIDEOCTRL1_BITSEL_8BITCOLOR: 287 1.4.2.2 wrstuden if (verbose) 288 1.4.2.2 wrstuden printf("8bit color"); 289 1.4.2.2 wrstuden return 8; 290 1.4.2.2 wrstuden case TX3912_VIDEOCTRL1_BITSEL_4BITGREYSCALE: 291 1.4.2.2 wrstuden if (verbose) 292 1.4.2.2 wrstuden printf("4bit greyscale"); 293 1.4.2.2 wrstuden return 4; 294 1.4.2.2 wrstuden case TX3912_VIDEOCTRL1_BITSEL_2BITGREYSCALE: 295 1.4.2.2 wrstuden if (verbose) 296 1.4.2.2 wrstuden printf("2bit greyscale"); 297 1.4.2.2 wrstuden return 2; 298 1.4.2.2 wrstuden case TX3912_VIDEOCTRL1_BITSEL_MONOCHROME: 299 1.4.2.2 wrstuden if (verbose) 300 1.4.2.2 wrstuden printf("monochrome"); 301 1.4.2.2 wrstuden return 1; 302 1.4.2.2 wrstuden } 303 1.4.2.2 wrstuden return 0; 304 1.4.2.2 wrstuden } 305 1.4.2.2 wrstuden 306 1.4.2.2 wrstuden void 307 1.4.2.2 wrstuden tx3912video_reset(tc) 308 1.4.2.2 wrstuden tx_chipset_tag_t tc; 309 1.4.2.2 wrstuden { 310 1.4.2.2 wrstuden u_int32_t reg; 311 1.4.2.2 wrstuden 312 1.4.2.2 wrstuden reg = tx_conf_read(tc, TX3912_VIDEOCTRL1_REG); 313 1.4.2.2 wrstuden 314 1.4.2.2 wrstuden /* Disable video logic at end of this frame */ 315 1.4.2.2 wrstuden reg |= TX3912_VIDEOCTRL1_ENFREEZEFRAME; 316 1.4.2.2 wrstuden tx_conf_write(tc, TX3912_VIDEOCTRL1_REG, reg); 317 1.4.2.2 wrstuden 318 1.4.2.2 wrstuden /* Wait for end of frame */ 319 1.4.2.2 wrstuden delay(300 * 1000); 320 1.4.2.2 wrstuden 321 1.4.2.2 wrstuden /* Make sure to disable video logic */ 322 1.4.2.2 wrstuden reg &= ~TX3912_VIDEOCTRL1_ENVID; 323 1.4.2.2 wrstuden tx_conf_write(tc, TX3912_VIDEOCTRL1_REG, reg); 324 1.4.2.2 wrstuden 325 1.4.2.2 wrstuden delay(1000); 326 1.4.2.2 wrstuden 327 1.4.2.2 wrstuden /* Enable video logic again */ 328 1.4.2.2 wrstuden reg &= ~TX3912_VIDEOCTRL1_ENFREEZEFRAME; 329 1.4.2.2 wrstuden reg |= TX3912_VIDEOCTRL1_ENVID; 330 1.4.2.2 wrstuden tx_conf_write(tc, TX3912_VIDEOCTRL1_REG, reg); 331 1.4.2.2 wrstuden 332 1.4.2.2 wrstuden delay(1000); 333 1.4.2.2 wrstuden } 334 1.4.2.2 wrstuden 335 1.4.2.2 wrstuden 336
Indexes created Thu Nov 06 21:09:53 GMT 2025