tx39biu.c revision 1.4.2.2
1 1.4.2.2 bouyer /* $NetBSD: tx39biu.c,v 1.4.2.2 2000/11/20 20:47:15 bouyer Exp $ */ 2 1.4.2.2 bouyer 3 1.4.2.2 bouyer /* 4 1.4.2.2 bouyer * Copyright (c) 1999, by UCHIYAMA Yasushi 5 1.4.2.2 bouyer * All rights reserved. 6 1.4.2.2 bouyer * 7 1.4.2.2 bouyer * Redistribution and use in source and binary forms, with or without 8 1.4.2.2 bouyer * modification, are permitted provided that the following conditions 9 1.4.2.2 bouyer * are met: 10 1.4.2.2 bouyer * 1. Redistributions of source code must retain the above copyright 11 1.4.2.2 bouyer * notice, this list of conditions and the following disclaimer. 12 1.4.2.2 bouyer * 2. The name of the developer may NOT be used to endorse or promote products 13 1.4.2.2 bouyer * derived from this software without specific prior written permission. 14 1.4.2.2 bouyer * 15 1.4.2.2 bouyer * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 1.4.2.2 bouyer * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 1.4.2.2 bouyer * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 1.4.2.2 bouyer * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 1.4.2.2 bouyer * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 1.4.2.2 bouyer * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 1.4.2.2 bouyer * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 1.4.2.2 bouyer * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 1.4.2.2 bouyer * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 1.4.2.2 bouyer * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 1.4.2.2 bouyer * SUCH DAMAGE. 26 1.4.2.2 bouyer * 27 1.4.2.2 bouyer */ 28 1.4.2.2 bouyer #include "opt_tx39_debug.h" 29 1.4.2.2 bouyer #include "opt_tx39_watchdogtimer.h" 30 1.4.2.2 bouyer #include "opt_tx39biudebug.h" 31 1.4.2.2 bouyer 32 1.4.2.2 bouyer #include <sys/param.h> 33 1.4.2.2 bouyer #include <sys/systm.h> 34 1.4.2.2 bouyer #include <sys/device.h> 35 1.4.2.2 bouyer 36 1.4.2.2 bouyer #include <machine/bus.h> 37 1.4.2.2 bouyer 38 1.4.2.2 bouyer #include <hpcmips/tx/tx39var.h> 39 1.4.2.2 bouyer #include <hpcmips/tx/tx39biureg.h> 40 1.4.2.2 bouyer 41 1.4.2.2 bouyer #include <hpcmips/tx/txcsbusvar.h> 42 1.4.2.2 bouyer 43 1.4.2.2 bouyer #define ISSET(x, s) ((x) & (1 << (s))) 44 1.4.2.2 bouyer #define ISSETPRINT(r, s, m) __is_set_print((u_int32_t)(r), \ 45 1.4.2.2 bouyer TX39_MEMCONFIG##s##_##m, #m) 46 1.4.2.2 bouyer 47 1.4.2.2 bouyer int tx39biu_match __P((struct device*, struct cfdata*, void*)); 48 1.4.2.2 bouyer void tx39biu_attach __P((struct device*, struct device*, void*)); 49 1.4.2.2 bouyer void tx39biu_callback __P((struct device*)); 50 1.4.2.2 bouyer int tx39biu_print __P((void*, const char*)); 51 1.4.2.2 bouyer int tx39biu_intr __P((void*)); 52 1.4.2.2 bouyer 53 1.4.2.2 bouyer static void *__sc; /* XXX */ 54 1.4.2.2 bouyer 55 1.4.2.2 bouyer void tx39biu_dump __P((tx_chipset_tag_t)); 56 1.4.2.2 bouyer 57 1.4.2.2 bouyer struct tx39biu_softc { 58 1.4.2.2 bouyer struct device sc_dev; 59 1.4.2.2 bouyer tx_chipset_tag_t sc_tc; 60 1.4.2.2 bouyer }; 61 1.4.2.2 bouyer 62 1.4.2.2 bouyer struct cfattach tx39biu_ca = { 63 1.4.2.2 bouyer sizeof(struct tx39biu_softc), tx39biu_match, tx39biu_attach 64 1.4.2.2 bouyer }; 65 1.4.2.2 bouyer 66 1.4.2.2 bouyer int 67 1.4.2.2 bouyer tx39biu_match(parent, cf, aux) 68 1.4.2.2 bouyer struct device *parent; 69 1.4.2.2 bouyer struct cfdata *cf; 70 1.4.2.2 bouyer void *aux; 71 1.4.2.2 bouyer { 72 1.4.2.2 bouyer return ATTACH_NORMAL; 73 1.4.2.2 bouyer } 74 1.4.2.2 bouyer 75 1.4.2.2 bouyer void 76 1.4.2.2 bouyer tx39biu_attach(parent, self, aux) 77 1.4.2.2 bouyer struct device *parent; 78 1.4.2.2 bouyer struct device *self; 79 1.4.2.2 bouyer void *aux; 80 1.4.2.2 bouyer { 81 1.4.2.2 bouyer struct txsim_attach_args *ta = aux; 82 1.4.2.2 bouyer struct tx39biu_softc *sc = (void*)self; 83 1.4.2.2 bouyer tx_chipset_tag_t tc; 84 1.4.2.2 bouyer #ifdef TX39_WATCHDOGTIMER 85 1.4.2.2 bouyer txreg_t reg; 86 1.4.2.2 bouyer #endif 87 1.4.2.2 bouyer 88 1.4.2.2 bouyer sc->sc_tc = tc = ta->ta_tc; 89 1.4.2.2 bouyer printf("\n"); 90 1.4.2.2 bouyer #ifdef TX39BIUDEBUG 91 1.4.2.2 bouyer tx39biu_dump(tc); 92 1.4.2.2 bouyer #endif 93 1.4.2.2 bouyer 94 1.4.2.2 bouyer #ifdef TX39_WATCHDOGTIMER 95 1.4.2.2 bouyer /* 96 1.4.2.2 bouyer * CLRWRBUSERRINT Bus error connected CPU HwInt0 97 1.4.2.2 bouyer */ 98 1.4.2.2 bouyer reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG); 99 1.4.2.2 bouyer reg |= TX39_MEMCONFIG4_ENWATCH; 100 1.4.2.2 bouyer reg = TX39_MEMCONFIG4_WATCHTIMEVAL_SET(reg, 0xf); 101 1.4.2.2 bouyer tx_conf_write(tc, TX39_MEMCONFIG4_REG, reg); 102 1.4.2.2 bouyer 103 1.4.2.2 bouyer reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG); 104 1.4.2.2 bouyer if (reg & TX39_MEMCONFIG4_ENWATCH) { 105 1.4.2.2 bouyer int i; 106 1.4.2.2 bouyer i = TX39_MEMCONFIG4_WATCHTIMEVAL(reg); 107 1.4.2.2 bouyer i = (1000 * (i + 1) * 64) / 36864; 108 1.4.2.2 bouyer printf("WatchDogTimerRate: %dus\n", i); 109 1.4.2.2 bouyer } 110 1.4.2.2 bouyer #endif 111 1.4.2.2 bouyer __sc = sc; 112 1.4.2.2 bouyer 113 1.4.2.2 bouyer /* Clear watch dog timer interrupt */ 114 1.4.2.2 bouyer tx39biu_intr(sc); 115 1.4.2.2 bouyer 116 1.4.2.2 bouyer /* 117 1.4.2.2 bouyer * Chip select virtual bridge 118 1.4.2.2 bouyer */ 119 1.4.2.2 bouyer config_defer(self, tx39biu_callback); 120 1.4.2.2 bouyer } 121 1.4.2.2 bouyer 122 1.4.2.2 bouyer void 123 1.4.2.2 bouyer tx39biu_callback(self) 124 1.4.2.2 bouyer struct device *self; 125 1.4.2.2 bouyer { 126 1.4.2.2 bouyer struct tx39biu_softc *sc = (void*)self; 127 1.4.2.2 bouyer struct csbus_attach_args cba; 128 1.4.2.2 bouyer 129 1.4.2.2 bouyer cba.cba_busname = "txcsbus"; 130 1.4.2.2 bouyer cba.cba_tc = sc->sc_tc; 131 1.4.2.2 bouyer config_found(self, &cba, tx39biu_print); 132 1.4.2.2 bouyer } 133 1.4.2.2 bouyer 134 1.4.2.2 bouyer int 135 1.4.2.2 bouyer tx39biu_print(aux, pnp) 136 1.4.2.2 bouyer void *aux; 137 1.4.2.2 bouyer const char *pnp; 138 1.4.2.2 bouyer { 139 1.4.2.2 bouyer return pnp ? QUIET : UNCONF; 140 1.4.2.2 bouyer } 141 1.4.2.2 bouyer 142 1.4.2.2 bouyer int 143 1.4.2.2 bouyer tx39biu_intr(arg) 144 1.4.2.2 bouyer void *arg; 145 1.4.2.2 bouyer { 146 1.4.2.2 bouyer struct tx39biu_softc *sc = __sc; 147 1.4.2.2 bouyer tx_chipset_tag_t tc; 148 1.4.2.2 bouyer txreg_t reg; 149 1.4.2.2 bouyer 150 1.4.2.2 bouyer if (!sc) { 151 1.4.2.2 bouyer return 0; 152 1.4.2.2 bouyer } 153 1.4.2.2 bouyer tc = sc->sc_tc; 154 1.4.2.2 bouyer /* Clear interrupt */ 155 1.4.2.2 bouyer reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG); 156 1.4.2.2 bouyer reg |= TX39_MEMCONFIG4_CLRWRBUSERRINT; 157 1.4.2.2 bouyer tx_conf_write(tc, TX39_MEMCONFIG4_REG, reg); 158 1.4.2.2 bouyer reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG); 159 1.4.2.2 bouyer reg &= ~TX39_MEMCONFIG4_CLRWRBUSERRINT; 160 1.4.2.2 bouyer tx_conf_write(tc, TX39_MEMCONFIG4_REG, reg); 161 1.4.2.2 bouyer 162 1.4.2.2 bouyer return 0; 163 1.4.2.2 bouyer } 164 1.4.2.2 bouyer 165 1.4.2.2 bouyer void 166 1.4.2.2 bouyer tx39biu_dump(tc) 167 1.4.2.2 bouyer tx_chipset_tag_t tc; 168 1.4.2.2 bouyer { 169 1.4.2.2 bouyer char *rowsel[] = {"18,17:9", "22,18,20,19,17:9", "20,22,21,19,17:9", 170 1.4.2.2 bouyer "22,23,21,19,17:9"}; 171 1.4.2.2 bouyer char *colsel[] = {"22,20,18,8:1", "19,18,8:2", "21,20,18,8:2", 172 1.4.2.2 bouyer "23,22,20,18,8:2", "24,22,20,18,8:2", 173 1.4.2.2 bouyer "18,p,X,8:0","22,p,X,21,8:0", "18,p,X,21,8:1", 174 1.4.2.2 bouyer "22,p,X,23,21,8:1", "24,23,21,8:2"}; 175 1.4.2.2 bouyer txreg_t reg; 176 1.4.2.2 bouyer int i; 177 1.4.2.2 bouyer /* 178 1.4.2.2 bouyer * Memory config 0 register 179 1.4.2.2 bouyer */ 180 1.4.2.2 bouyer reg = tx_conf_read(tc, TX39_MEMCONFIG0_REG); 181 1.4.2.2 bouyer printf(" config0:"); 182 1.4.2.2 bouyer ISSETPRINT(reg, 0, ENDCLKOUTTRI); 183 1.4.2.2 bouyer ISSETPRINT(reg, 0, DISDQMINIT); 184 1.4.2.2 bouyer ISSETPRINT(reg, 0, ENSDRAMPD); 185 1.4.2.2 bouyer ISSETPRINT(reg, 0, SHOWDINO); 186 1.4.2.2 bouyer ISSETPRINT(reg, 0, ENRMAP2); 187 1.4.2.2 bouyer ISSETPRINT(reg, 0, ENRMAP1); 188 1.4.2.2 bouyer ISSETPRINT(reg, 0, ENWRINPAGE); 189 1.4.2.2 bouyer ISSETPRINT(reg, 0, ENCS3USER); 190 1.4.2.2 bouyer ISSETPRINT(reg, 0, ENCS2USER); 191 1.4.2.2 bouyer ISSETPRINT(reg, 0, ENCS1USER); 192 1.4.2.2 bouyer ISSETPRINT(reg, 0, ENCS1DRAM); 193 1.4.2.2 bouyer ISSETPRINT(reg, 0, CS3SIZE); 194 1.4.2.2 bouyer ISSETPRINT(reg, 0, CS2SIZE); 195 1.4.2.2 bouyer ISSETPRINT(reg, 0, CS1SIZE); 196 1.4.2.2 bouyer ISSETPRINT(reg, 0, CS0SIZE); 197 1.4.2.2 bouyer printf("\n"); 198 1.4.2.2 bouyer for (i = 0; i < 2; i++) { 199 1.4.2.2 bouyer int r, c; 200 1.4.2.2 bouyer printf(" BANK%d: ", i); 201 1.4.2.2 bouyer switch (i ? TX39_MEMCONFIG0_BANK1CONF(reg) 202 1.4.2.2 bouyer : TX39_MEMCONFIG0_BANK0CONF(reg)) { 203 1.4.2.2 bouyer case TX39_MEMCONFIG0_BANKCONF_16BITSDRAM: 204 1.4.2.2 bouyer printf("16bit SDRAM"); 205 1.4.2.2 bouyer break; 206 1.4.2.2 bouyer case TX39_MEMCONFIG0_BANKCONF_8BITSDRAM: 207 1.4.2.2 bouyer printf("8bit SDRAM"); 208 1.4.2.2 bouyer break; 209 1.4.2.2 bouyer case TX39_MEMCONFIG0_BANKCONF_32BITSDHDRAM: 210 1.4.2.2 bouyer printf("32bit DRAM/HDRAM"); 211 1.4.2.2 bouyer break; 212 1.4.2.2 bouyer case TX39_MEMCONFIG0_BANKCONF_16BITSDHDRAM: 213 1.4.2.2 bouyer printf("16bit DRAM/HDRAM"); 214 1.4.2.2 bouyer break; 215 1.4.2.2 bouyer } 216 1.4.2.2 bouyer if (i == 1) { 217 1.4.2.2 bouyer r = TX39_MEMCONFIG0_ROWSEL1(reg); 218 1.4.2.2 bouyer c = TX39_MEMCONFIG0_COLSEL1(reg); 219 1.4.2.2 bouyer } else { 220 1.4.2.2 bouyer r = TX39_MEMCONFIG0_ROWSEL0(reg); 221 1.4.2.2 bouyer c = TX39_MEMCONFIG0_COLSEL0(reg); 222 1.4.2.2 bouyer } 223 1.4.2.2 bouyer printf(" ROW %s COL %s\n", rowsel[r], colsel[c]); 224 1.4.2.2 bouyer } 225 1.4.2.2 bouyer 226 1.4.2.2 bouyer /* 227 1.4.2.2 bouyer * Memory config 3 register 228 1.4.2.2 bouyer */ 229 1.4.2.2 bouyer printf(" config3:"); 230 1.4.2.2 bouyer reg = tx_conf_read(tc, TX39_MEMCONFIG3_REG); 231 1.4.2.2 bouyer #ifdef TX391X 232 1.4.2.2 bouyer ISSETPRINT(reg, 3, ENMCS3PAGE); 233 1.4.2.2 bouyer ISSETPRINT(reg, 3, ENMCS2PAGE); 234 1.4.2.2 bouyer ISSETPRINT(reg, 3, ENMCS1PAGE); 235 1.4.2.2 bouyer ISSETPRINT(reg, 3, ENMCS0PAGE); 236 1.4.2.2 bouyer #endif /* TX391X */ 237 1.4.2.2 bouyer ISSETPRINT(reg, 3, ENCS3PAGE); 238 1.4.2.2 bouyer ISSETPRINT(reg, 3, ENCS2PAGE); 239 1.4.2.2 bouyer ISSETPRINT(reg, 3, ENCS1PAGE); 240 1.4.2.2 bouyer ISSETPRINT(reg, 3, ENCS0PAGE); 241 1.4.2.2 bouyer ISSETPRINT(reg, 3, CARD2WAITEN); 242 1.4.2.2 bouyer ISSETPRINT(reg, 3, CARD1WAITEN); 243 1.4.2.2 bouyer ISSETPRINT(reg, 3, CARD2IOEN); 244 1.4.2.2 bouyer ISSETPRINT(reg, 3, CARD1IOEN); 245 1.4.2.2 bouyer #ifdef TX391X 246 1.4.2.2 bouyer ISSETPRINT(reg, 3, PORT8SEL); 247 1.4.2.2 bouyer #endif /* TX391X */ 248 1.4.2.2 bouyer #ifdef TX392X 249 1.4.2.2 bouyer ISSETPRINT(reg, 3, CARD2_8SEL); 250 1.4.2.2 bouyer ISSETPRINT(reg, 3, CARD1_8SEL); 251 1.4.2.2 bouyer #endif /* TX392X */ 252 1.4.2.2 bouyer 253 1.4.2.2 bouyer printf("\n"); 254 1.4.2.2 bouyer 255 1.4.2.2 bouyer /* 256 1.4.2.2 bouyer * Memory config 4 register 257 1.4.2.2 bouyer */ 258 1.4.2.2 bouyer reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG); 259 1.4.2.2 bouyer printf(" config4:"); 260 1.4.2.2 bouyer ISSETPRINT(reg, 4, ENBANK1HDRAM); 261 1.4.2.2 bouyer ISSETPRINT(reg, 4, ENBANK0HDRAM); 262 1.4.2.2 bouyer ISSETPRINT(reg, 4, ENARB); 263 1.4.2.2 bouyer ISSETPRINT(reg, 4, DISSNOOP); 264 1.4.2.2 bouyer ISSETPRINT(reg, 4, CLRWRBUSERRINT); 265 1.4.2.2 bouyer ISSETPRINT(reg, 4, ENBANK1OPT); 266 1.4.2.2 bouyer ISSETPRINT(reg, 4, ENBANK0OPT); 267 1.4.2.2 bouyer ISSETPRINT(reg, 4, ENWATCH); 268 1.4.2.2 bouyer ISSETPRINT(reg, 4, MEMPOWERDOWN); 269 1.4.2.2 bouyer ISSETPRINT(reg, 4, ENRFSH1); 270 1.4.2.2 bouyer ISSETPRINT(reg, 4, ENRFSH0); 271 1.4.2.2 bouyer if (reg & TX39_MEMCONFIG4_ENWATCH) { 272 1.4.2.2 bouyer i = TX39_MEMCONFIG4_WATCHTIMEVAL(reg); 273 1.4.2.2 bouyer i = (1000 * (i + 1) * 64) / 36864; 274 1.4.2.2 bouyer printf("WatchDogTimerRate: %dus", i); 275 1.4.2.2 bouyer } 276 1.4.2.2 bouyer printf("\n"); 277 1.4.2.2 bouyer } 278 1.4.2.2 bouyer 279
Indexes created Wed Nov 05 00:09:41 GMT 2025