tx39biu.c revision 1.10.4.1
1 /* $NetBSD: tx39biu.c,v 1.10.4.1 2006/09/09 02:39:44 rpaulo Exp $ */ 2 3 /*- 4 * Copyright (c) 1999-2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: tx39biu.c,v 1.10.4.1 2006/09/09 02:39:44 rpaulo Exp $"); 41 42 #include "opt_tx39_watchdogtimer.h" 43 #include "opt_tx39biu_debug.h" 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/device.h> 48 49 #include <machine/bus.h> 50 #include <machine/debug.h> 51 52 #include <hpcmips/tx/tx39var.h> 53 #include <hpcmips/tx/tx39biureg.h> 54 #include <hpcmips/tx/txcsbusvar.h> 55 56 #ifdef TX39BIU_DEBUG 57 #define DPRINTF_ENABLE 58 #define DPRINTF_DEBUG tx39biu_debug 59 #endif 60 #include <machine/debug.h> 61 62 #define ISSETPRINT(r, s, m) dbg_bitmask_print((u_int32_t)(r), \ 63 TX39_MEMCONFIG ## s ## _ ##m, #m) 64 65 int tx39biu_match(struct device *, struct cfdata *, void *); 66 void tx39biu_attach(struct device *, struct device *, void *); 67 void tx39biu_callback(struct device *); 68 int tx39biu_print(void *, const char *); 69 int tx39biu_intr(void *); 70 71 static void *__sc; /* XXX */ 72 #ifdef TX39BIU_DEBUG 73 void tx39biu_dump(tx_chipset_tag_t); 74 #endif 75 76 struct tx39biu_softc { 77 struct device sc_dev; 78 tx_chipset_tag_t sc_tc; 79 }; 80 81 CFATTACH_DECL(tx39biu, sizeof(struct tx39biu_softc), 82 tx39biu_match, tx39biu_attach, NULL, NULL); 83 84 int 85 tx39biu_match(parent, cf, aux) 86 struct device *parent; 87 struct cfdata *cf; 88 void *aux; 89 { 90 return (ATTACH_NORMAL); 91 } 92 93 void 94 tx39biu_attach(parent, self, aux) 95 struct device *parent; 96 struct device *self; 97 void *aux; 98 { 99 struct txsim_attach_args *ta = aux; 100 struct tx39biu_softc *sc = (void*)self; 101 tx_chipset_tag_t tc; 102 #ifdef TX39_WATCHDOGTIMER 103 txreg_t reg; 104 #endif 105 106 sc->sc_tc = tc = ta->ta_tc; 107 printf("\n"); 108 #ifdef TX39BIU_DEBUG 109 tx39biu_dump(tc); 110 #endif 111 112 #ifdef TX39_WATCHDOGTIMER 113 /* 114 * CLRWRBUSERRINT Bus error connected CPU HwInt0 115 */ 116 reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG); 117 reg |= TX39_MEMCONFIG4_ENWATCH; 118 reg = TX39_MEMCONFIG4_WATCHTIMEVAL_SET(reg, 0xf); 119 tx_conf_write(tc, TX39_MEMCONFIG4_REG, reg); 120 121 reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG); 122 if (reg & TX39_MEMCONFIG4_ENWATCH) { 123 int i; 124 i = TX39_MEMCONFIG4_WATCHTIMEVAL(reg); 125 i = (1000 * (i + 1) * 64) / 36864; 126 printf("WatchDogTimerRate: %dus\n", i); 127 } 128 #endif 129 __sc = sc; 130 131 /* Clear watch dog timer interrupt */ 132 tx39biu_intr(sc); 133 134 /* 135 * Chip select virtual bridge 136 */ 137 config_defer(self, tx39biu_callback); 138 } 139 140 void 141 tx39biu_callback(self) 142 struct device *self; 143 { 144 struct tx39biu_softc *sc = (void*)self; 145 struct csbus_attach_args cba; 146 147 cba.cba_busname = "txcsbus"; 148 cba.cba_tc = sc->sc_tc; 149 config_found(self, &cba, tx39biu_print); 150 } 151 152 int 153 tx39biu_print(aux, pnp) 154 void *aux; 155 const char *pnp; 156 { 157 return (pnp ? QUIET : UNCONF); 158 } 159 160 int 161 tx39biu_intr(arg) 162 void *arg; 163 { 164 struct tx39biu_softc *sc = __sc; 165 tx_chipset_tag_t tc; 166 txreg_t reg; 167 168 if (!sc) { 169 return (0); 170 } 171 tc = sc->sc_tc; 172 /* Clear interrupt */ 173 reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG); 174 reg |= TX39_MEMCONFIG4_CLRWRBUSERRINT; 175 tx_conf_write(tc, TX39_MEMCONFIG4_REG, reg); 176 reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG); 177 reg &= ~TX39_MEMCONFIG4_CLRWRBUSERRINT; 178 tx_conf_write(tc, TX39_MEMCONFIG4_REG, reg); 179 180 return (0); 181 } 182 183 #ifdef TX39BIU_DEBUG 184 void 185 tx39biu_dump(tc) 186 tx_chipset_tag_t tc; 187 { 188 char *rowsel[] = {"18,17:9", "22,18,20,19,17:9", "20,22,21,19,17:9", 189 "22,23,21,19,17:9"}; 190 char *colsel[] = {"22,20,18,8:1", "19,18,8:2", "21,20,18,8:2", 191 "23,22,20,18,8:2", "24,22,20,18,8:2", 192 "18,p,X,8:0","22,p,X,21,8:0", "18,p,X,21,8:1", 193 "22,p,X,23,21,8:1", "24,23,21,8:2"}; 194 txreg_t reg; 195 int i; 196 /* 197 * Memory config 0 register 198 */ 199 reg = tx_conf_read(tc, TX39_MEMCONFIG0_REG); 200 printf(" config0:"); 201 ISSETPRINT(reg, 0, ENDCLKOUTTRI); 202 ISSETPRINT(reg, 0, DISDQMINIT); 203 ISSETPRINT(reg, 0, ENSDRAMPD); 204 ISSETPRINT(reg, 0, SHOWDINO); 205 ISSETPRINT(reg, 0, ENRMAP2); 206 ISSETPRINT(reg, 0, ENRMAP1); 207 ISSETPRINT(reg, 0, ENWRINPAGE); 208 ISSETPRINT(reg, 0, ENCS3USER); 209 ISSETPRINT(reg, 0, ENCS2USER); 210 ISSETPRINT(reg, 0, ENCS1USER); 211 ISSETPRINT(reg, 0, ENCS1DRAM); 212 ISSETPRINT(reg, 0, CS3SIZE); 213 ISSETPRINT(reg, 0, CS2SIZE); 214 ISSETPRINT(reg, 0, CS1SIZE); 215 ISSETPRINT(reg, 0, CS0SIZE); 216 printf("\n"); 217 for (i = 0; i < 2; i++) { 218 int r, c; 219 printf(" BANK%d: ", i); 220 switch (i ? TX39_MEMCONFIG0_BANK1CONF(reg) 221 : TX39_MEMCONFIG0_BANK0CONF(reg)) { 222 case TX39_MEMCONFIG0_BANKCONF_16BITSDRAM: 223 printf("16bit SDRAM"); 224 break; 225 case TX39_MEMCONFIG0_BANKCONF_8BITSDRAM: 226 printf("8bit SDRAM"); 227 break; 228 case TX39_MEMCONFIG0_BANKCONF_32BITSDHDRAM: 229 printf("32bit DRAM/HDRAM"); 230 break; 231 case TX39_MEMCONFIG0_BANKCONF_16BITSDHDRAM: 232 printf("16bit DRAM/HDRAM"); 233 break; 234 } 235 if (i == 1) { 236 r = TX39_MEMCONFIG0_ROWSEL1(reg); 237 c = TX39_MEMCONFIG0_COLSEL1(reg); 238 } else { 239 r = TX39_MEMCONFIG0_ROWSEL0(reg); 240 c = TX39_MEMCONFIG0_COLSEL0(reg); 241 } 242 printf(" ROW %s COL %s\n", rowsel[r], colsel[c]); 243 } 244 245 /* 246 * Memory config 3 register 247 */ 248 printf(" config3:"); 249 reg = tx_conf_read(tc, TX39_MEMCONFIG3_REG); 250 #ifdef TX391X 251 ISSETPRINT(reg, 3, ENMCS3PAGE); 252 ISSETPRINT(reg, 3, ENMCS2PAGE); 253 ISSETPRINT(reg, 3, ENMCS1PAGE); 254 ISSETPRINT(reg, 3, ENMCS0PAGE); 255 #endif /* TX391X */ 256 ISSETPRINT(reg, 3, ENCS3PAGE); 257 ISSETPRINT(reg, 3, ENCS2PAGE); 258 ISSETPRINT(reg, 3, ENCS1PAGE); 259 ISSETPRINT(reg, 3, ENCS0PAGE); 260 ISSETPRINT(reg, 3, CARD2WAITEN); 261 ISSETPRINT(reg, 3, CARD1WAITEN); 262 ISSETPRINT(reg, 3, CARD2IOEN); 263 ISSETPRINT(reg, 3, CARD1IOEN); 264 #ifdef TX391X 265 ISSETPRINT(reg, 3, PORT8SEL); 266 #endif /* TX391X */ 267 #ifdef TX392X 268 ISSETPRINT(reg, 3, CARD2_8SEL); 269 ISSETPRINT(reg, 3, CARD1_8SEL); 270 #endif /* TX392X */ 271 272 printf("\n"); 273 274 /* 275 * Memory config 4 register 276 */ 277 reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG); 278 printf(" config4:"); 279 ISSETPRINT(reg, 4, ENBANK1HDRAM); 280 ISSETPRINT(reg, 4, ENBANK0HDRAM); 281 ISSETPRINT(reg, 4, ENARB); 282 ISSETPRINT(reg, 4, DISSNOOP); 283 ISSETPRINT(reg, 4, CLRWRBUSERRINT); 284 ISSETPRINT(reg, 4, ENBANK1OPT); 285 ISSETPRINT(reg, 4, ENBANK0OPT); 286 ISSETPRINT(reg, 4, ENWATCH); 287 ISSETPRINT(reg, 4, MEMPOWERDOWN); 288 ISSETPRINT(reg, 4, ENRFSH1); 289 ISSETPRINT(reg, 4, ENRFSH0); 290 if (reg & TX39_MEMCONFIG4_ENWATCH) { 291 i = TX39_MEMCONFIG4_WATCHTIMEVAL(reg); 292 i = (1000 * (i + 1) * 64) / 36864; 293 printf("WatchDogTimerRate: %dus", i); 294 } 295 printf("\n"); 296 } 297 #endif /* TX39BIU_DEBUG */ 298
Indexes created Tue Nov 04 22:10:08 GMT 2025