Home | History | Annotate | Line # | Download | only in tx
tx39biu.c revision 1.13
      1 /*	$NetBSD: tx39biu.c,v 1.13 2008/04/28 20:23:21 martin Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 1999-2002 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by UCHIYAMA Yasushi.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #include <sys/cdefs.h>
     33 __KERNEL_RCSID(0, "$NetBSD: tx39biu.c,v 1.13 2008/04/28 20:23:21 martin Exp $");
     34 
     35 #include "opt_tx39_watchdogtimer.h"
     36 #include "opt_tx39biu_debug.h"
     37 
     38 #include <sys/param.h>
     39 #include <sys/systm.h>
     40 #include <sys/device.h>
     41 
     42 #include <machine/bus.h>
     43 #include <machine/debug.h>
     44 
     45 #include <hpcmips/tx/tx39var.h>
     46 #include <hpcmips/tx/tx39biureg.h>
     47 #include <hpcmips/tx/txcsbusvar.h>
     48 
     49 #ifdef	TX39BIU_DEBUG
     50 #define DPRINTF_ENABLE
     51 #define DPRINTF_DEBUG	tx39biu_debug
     52 #endif
     53 
     54 #define ISSETPRINT(r, s, m) dbg_bitmask_print((u_int32_t)(r),		\
     55 	TX39_MEMCONFIG ## s ## _ ##m, #m)
     56 
     57 int	tx39biu_match(struct device *, struct cfdata *, void *);
     58 void	tx39biu_attach(struct device *, struct device *, void *);
     59 void	tx39biu_callback(struct device *);
     60 int	tx39biu_print(void *, const char *);
     61 int	tx39biu_intr(void *);
     62 
     63 static void *__sc; /* XXX */
     64 #ifdef TX39BIU_DEBUG
     65 void	tx39biu_dump(tx_chipset_tag_t);
     66 #endif
     67 
     68 struct tx39biu_softc {
     69 	struct	device sc_dev;
     70 	tx_chipset_tag_t sc_tc;
     71 };
     72 
     73 CFATTACH_DECL(tx39biu, sizeof(struct tx39biu_softc),
     74     tx39biu_match, tx39biu_attach, NULL, NULL);
     75 
     76 int
     77 tx39biu_match(parent, cf, aux)
     78 	struct device *parent;
     79 	struct cfdata *cf;
     80 	void *aux;
     81 {
     82 	return (ATTACH_NORMAL);
     83 }
     84 
     85 void
     86 tx39biu_attach(parent, self, aux)
     87 	struct device *parent;
     88 	struct device *self;
     89 	void *aux;
     90 {
     91 	struct txsim_attach_args *ta = aux;
     92 	struct tx39biu_softc *sc = (void*)self;
     93 	tx_chipset_tag_t tc;
     94 #ifdef TX39_WATCHDOGTIMER
     95 	txreg_t reg;
     96 #endif
     97 
     98 	sc->sc_tc = tc = ta->ta_tc;
     99 	printf("\n");
    100 #ifdef TX39BIU_DEBUG
    101 	tx39biu_dump(tc);
    102 #endif
    103 
    104 #ifdef TX39_WATCHDOGTIMER
    105 	/*
    106 	 * CLRWRBUSERRINT Bus error connected CPU HwInt0
    107 	 */
    108 	reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG);
    109 	reg |= TX39_MEMCONFIG4_ENWATCH;
    110 	reg = TX39_MEMCONFIG4_WATCHTIMEVAL_SET(reg, 0xf);
    111 	tx_conf_write(tc, TX39_MEMCONFIG4_REG, reg);
    112 
    113 	reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG);
    114 	if (reg & TX39_MEMCONFIG4_ENWATCH) {
    115 		int i;
    116 		i = TX39_MEMCONFIG4_WATCHTIMEVAL(reg);
    117 		i = (1000 * (i + 1) * 64) / 36864;
    118 		printf("WatchDogTimerRate: %dus\n", i);
    119 	}
    120 #endif
    121 	__sc = sc;
    122 
    123 	/*	Clear watch dog timer interrupt */
    124 	tx39biu_intr(sc);
    125 
    126 	/*
    127 	 *	Chip select virtual bridge
    128 	 */
    129 	config_defer(self, tx39biu_callback);
    130 }
    131 
    132 void
    133 tx39biu_callback(self)
    134 	struct device *self;
    135 {
    136 	struct tx39biu_softc *sc = (void*)self;
    137 	struct csbus_attach_args cba;
    138 
    139 	cba.cba_busname = "txcsbus";
    140 	cba.cba_tc = sc->sc_tc;
    141 	config_found(self, &cba, tx39biu_print);
    142 }
    143 
    144 int
    145 tx39biu_print(aux, pnp)
    146 	void *aux;
    147 	const char *pnp;
    148 {
    149 	return (pnp ? QUIET : UNCONF);
    150 }
    151 
    152 int
    153 tx39biu_intr(arg)
    154 	void *arg;
    155 {
    156 	struct tx39biu_softc *sc = __sc;
    157 	tx_chipset_tag_t tc;
    158 	txreg_t reg;
    159 
    160 	if (!sc) {
    161 		return (0);
    162 	}
    163 	tc = sc->sc_tc;
    164 	/* Clear interrupt */
    165 	reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG);
    166 	reg |= TX39_MEMCONFIG4_CLRWRBUSERRINT;
    167 	tx_conf_write(tc, TX39_MEMCONFIG4_REG, reg);
    168 	reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG);
    169 	reg &= ~TX39_MEMCONFIG4_CLRWRBUSERRINT;
    170 	tx_conf_write(tc, TX39_MEMCONFIG4_REG, reg);
    171 
    172 	return (0);
    173 }
    174 
    175 #ifdef TX39BIU_DEBUG
    176 void
    177 tx39biu_dump(tc)
    178 	tx_chipset_tag_t tc;
    179 {
    180 	char *rowsel[] = {"18,17:9", "22,18,20,19,17:9", "20,22,21,19,17:9",
    181 			  "22,23,21,19,17:9"};
    182 	char *colsel[] = {"22,20,18,8:1", "19,18,8:2", "21,20,18,8:2",
    183 			  "23,22,20,18,8:2", "24,22,20,18,8:2",
    184 			  "18,p,X,8:0","22,p,X,21,8:0", "18,p,X,21,8:1",
    185 			  "22,p,X,23,21,8:1", "24,23,21,8:2"};
    186 	txreg_t reg;
    187 	int i;
    188 	/*
    189 	 *	Memory config 0 register
    190 	 */
    191 	reg = tx_conf_read(tc, TX39_MEMCONFIG0_REG);
    192 	printf(" config0:");
    193 	ISSETPRINT(reg, 0, ENDCLKOUTTRI);
    194 	ISSETPRINT(reg, 0, DISDQMINIT);
    195 	ISSETPRINT(reg, 0, ENSDRAMPD);
    196 	ISSETPRINT(reg, 0, SHOWDINO);
    197 	ISSETPRINT(reg, 0, ENRMAP2);
    198 	ISSETPRINT(reg, 0, ENRMAP1);
    199 	ISSETPRINT(reg, 0, ENWRINPAGE);
    200 	ISSETPRINT(reg, 0, ENCS3USER);
    201 	ISSETPRINT(reg, 0, ENCS2USER);
    202 	ISSETPRINT(reg, 0, ENCS1USER);
    203 	ISSETPRINT(reg, 0, ENCS1DRAM);
    204 	ISSETPRINT(reg, 0, CS3SIZE);
    205 	ISSETPRINT(reg, 0, CS2SIZE);
    206 	ISSETPRINT(reg, 0, CS1SIZE);
    207 	ISSETPRINT(reg, 0, CS0SIZE);
    208 	printf("\n");
    209 	for (i = 0; i < 2; i++) {
    210 		int r, c;
    211 		printf(" BANK%d: ", i);
    212 		switch (i ? TX39_MEMCONFIG0_BANK1CONF(reg)
    213 		    : TX39_MEMCONFIG0_BANK0CONF(reg)) {
    214 		case TX39_MEMCONFIG0_BANKCONF_16BITSDRAM:
    215 			printf("16bit SDRAM");
    216 			break;
    217 		case TX39_MEMCONFIG0_BANKCONF_8BITSDRAM:
    218 			printf("8bit SDRAM");
    219 			break;
    220 		case TX39_MEMCONFIG0_BANKCONF_32BITSDHDRAM:
    221 			printf("32bit DRAM/HDRAM");
    222 			break;
    223 		case TX39_MEMCONFIG0_BANKCONF_16BITSDHDRAM:
    224 			printf("16bit DRAM/HDRAM");
    225 			break;
    226 		}
    227 		if (i == 1) {
    228 			r = TX39_MEMCONFIG0_ROWSEL1(reg);
    229 			c = TX39_MEMCONFIG0_COLSEL1(reg);
    230 		} else {
    231 			r = TX39_MEMCONFIG0_ROWSEL0(reg);
    232 			c = TX39_MEMCONFIG0_COLSEL0(reg);
    233 		}
    234 		printf(" ROW %s COL %s\n", rowsel[r], colsel[c]);
    235 	}
    236 
    237 	/*
    238 	 *	Memory config 3 register
    239 	 */
    240 	printf(" config3:");
    241 	reg = tx_conf_read(tc, TX39_MEMCONFIG3_REG);
    242 #ifdef TX391X
    243 	ISSETPRINT(reg, 3, ENMCS3PAGE);
    244 	ISSETPRINT(reg, 3, ENMCS2PAGE);
    245 	ISSETPRINT(reg, 3, ENMCS1PAGE);
    246 	ISSETPRINT(reg, 3, ENMCS0PAGE);
    247 #endif /* TX391X */
    248 	ISSETPRINT(reg, 3, ENCS3PAGE);
    249 	ISSETPRINT(reg, 3, ENCS2PAGE);
    250 	ISSETPRINT(reg, 3, ENCS1PAGE);
    251 	ISSETPRINT(reg, 3, ENCS0PAGE);
    252 	ISSETPRINT(reg, 3, CARD2WAITEN);
    253 	ISSETPRINT(reg, 3, CARD1WAITEN);
    254 	ISSETPRINT(reg, 3, CARD2IOEN);
    255 	ISSETPRINT(reg, 3, CARD1IOEN);
    256 #ifdef TX391X
    257 	ISSETPRINT(reg, 3, PORT8SEL);
    258 #endif /* TX391X */
    259 #ifdef TX392X
    260 	ISSETPRINT(reg, 3, CARD2_8SEL);
    261 	ISSETPRINT(reg, 3, CARD1_8SEL);
    262 #endif /* TX392X */
    263 
    264 	printf("\n");
    265 
    266 	/*
    267 	 *	Memory config 4 register
    268 	 */
    269 	reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG);
    270 	printf(" config4:");
    271 	ISSETPRINT(reg, 4, ENBANK1HDRAM);
    272 	ISSETPRINT(reg, 4, ENBANK0HDRAM);
    273 	ISSETPRINT(reg, 4, ENARB);
    274 	ISSETPRINT(reg, 4, DISSNOOP);
    275 	ISSETPRINT(reg, 4, CLRWRBUSERRINT);
    276 	ISSETPRINT(reg, 4, ENBANK1OPT);
    277 	ISSETPRINT(reg, 4, ENBANK0OPT);
    278 	ISSETPRINT(reg, 4, ENWATCH);
    279 	ISSETPRINT(reg, 4, MEMPOWERDOWN);
    280 	ISSETPRINT(reg, 4, ENRFSH1);
    281 	ISSETPRINT(reg, 4, ENRFSH0);
    282 	if (reg & TX39_MEMCONFIG4_ENWATCH) {
    283 		i = TX39_MEMCONFIG4_WATCHTIMEVAL(reg);
    284 		i = (1000 * (i + 1) * 64) / 36864;
    285 		printf("WatchDogTimerRate: %dus", i);
    286 	}
    287 	printf("\n");
    288 }
    289 #endif /* TX39BIU_DEBUG */
    290