tx39biu.c revision 1.9
1 /* $NetBSD: tx39biu.c,v 1.9 2003/07/15 02:29:33 lukem Exp $ */ 2 3 /*- 4 * Copyright (c) 1999-2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: tx39biu.c,v 1.9 2003/07/15 02:29:33 lukem Exp $"); 41 42 #include "opt_tx39_watchdogtimer.h" 43 #include "opt_tx39biu_debug.h" 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/device.h> 48 49 #include <machine/bus.h> 50 #include <machine/debug.h> 51 52 #include <hpcmips/tx/tx39var.h> 53 #include <hpcmips/tx/tx39biureg.h> 54 #include <hpcmips/tx/txcsbusvar.h> 55 56 #ifdef TX39BIU_DEBUG 57 #define DPRINTF_ENABLE 58 #define DPRINTF_DEBUG tx39biu_debug 59 #endif 60 #include <machine/debug.h> 61 62 #define ISSET(x, s) ((x) & (1 << (s))) 63 #define ISSETPRINT(r, s, m) dbg_bitmask_print((u_int32_t)(r), \ 64 TX39_MEMCONFIG ## s ## _ ##m, #m) 65 66 int tx39biu_match(struct device *, struct cfdata *, void *); 67 void tx39biu_attach(struct device *, struct device *, void *); 68 void tx39biu_callback(struct device *); 69 int tx39biu_print(void *, const char *); 70 int tx39biu_intr(void *); 71 72 static void *__sc; /* XXX */ 73 #ifdef TX39BIU_DEBUG 74 void tx39biu_dump(tx_chipset_tag_t); 75 #endif 76 77 struct tx39biu_softc { 78 struct device sc_dev; 79 tx_chipset_tag_t sc_tc; 80 }; 81 82 CFATTACH_DECL(tx39biu, sizeof(struct tx39biu_softc), 83 tx39biu_match, tx39biu_attach, NULL, NULL); 84 85 int 86 tx39biu_match(parent, cf, aux) 87 struct device *parent; 88 struct cfdata *cf; 89 void *aux; 90 { 91 return (ATTACH_NORMAL); 92 } 93 94 void 95 tx39biu_attach(parent, self, aux) 96 struct device *parent; 97 struct device *self; 98 void *aux; 99 { 100 struct txsim_attach_args *ta = aux; 101 struct tx39biu_softc *sc = (void*)self; 102 tx_chipset_tag_t tc; 103 #ifdef TX39_WATCHDOGTIMER 104 txreg_t reg; 105 #endif 106 107 sc->sc_tc = tc = ta->ta_tc; 108 printf("\n"); 109 #ifdef TX39BIU_DEBUG 110 tx39biu_dump(tc); 111 #endif 112 113 #ifdef TX39_WATCHDOGTIMER 114 /* 115 * CLRWRBUSERRINT Bus error connected CPU HwInt0 116 */ 117 reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG); 118 reg |= TX39_MEMCONFIG4_ENWATCH; 119 reg = TX39_MEMCONFIG4_WATCHTIMEVAL_SET(reg, 0xf); 120 tx_conf_write(tc, TX39_MEMCONFIG4_REG, reg); 121 122 reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG); 123 if (reg & TX39_MEMCONFIG4_ENWATCH) { 124 int i; 125 i = TX39_MEMCONFIG4_WATCHTIMEVAL(reg); 126 i = (1000 * (i + 1) * 64) / 36864; 127 printf("WatchDogTimerRate: %dus\n", i); 128 } 129 #endif 130 __sc = sc; 131 132 /* Clear watch dog timer interrupt */ 133 tx39biu_intr(sc); 134 135 /* 136 * Chip select virtual bridge 137 */ 138 config_defer(self, tx39biu_callback); 139 } 140 141 void 142 tx39biu_callback(self) 143 struct device *self; 144 { 145 struct tx39biu_softc *sc = (void*)self; 146 struct csbus_attach_args cba; 147 148 cba.cba_busname = "txcsbus"; 149 cba.cba_tc = sc->sc_tc; 150 config_found(self, &cba, tx39biu_print); 151 } 152 153 int 154 tx39biu_print(aux, pnp) 155 void *aux; 156 const char *pnp; 157 { 158 return (pnp ? QUIET : UNCONF); 159 } 160 161 int 162 tx39biu_intr(arg) 163 void *arg; 164 { 165 struct tx39biu_softc *sc = __sc; 166 tx_chipset_tag_t tc; 167 txreg_t reg; 168 169 if (!sc) { 170 return (0); 171 } 172 tc = sc->sc_tc; 173 /* Clear interrupt */ 174 reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG); 175 reg |= TX39_MEMCONFIG4_CLRWRBUSERRINT; 176 tx_conf_write(tc, TX39_MEMCONFIG4_REG, reg); 177 reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG); 178 reg &= ~TX39_MEMCONFIG4_CLRWRBUSERRINT; 179 tx_conf_write(tc, TX39_MEMCONFIG4_REG, reg); 180 181 return (0); 182 } 183 184 #ifdef TX39BIU_DEBUG 185 void 186 tx39biu_dump(tc) 187 tx_chipset_tag_t tc; 188 { 189 char *rowsel[] = {"18,17:9", "22,18,20,19,17:9", "20,22,21,19,17:9", 190 "22,23,21,19,17:9"}; 191 char *colsel[] = {"22,20,18,8:1", "19,18,8:2", "21,20,18,8:2", 192 "23,22,20,18,8:2", "24,22,20,18,8:2", 193 "18,p,X,8:0","22,p,X,21,8:0", "18,p,X,21,8:1", 194 "22,p,X,23,21,8:1", "24,23,21,8:2"}; 195 txreg_t reg; 196 int i; 197 /* 198 * Memory config 0 register 199 */ 200 reg = tx_conf_read(tc, TX39_MEMCONFIG0_REG); 201 printf(" config0:"); 202 ISSETPRINT(reg, 0, ENDCLKOUTTRI); 203 ISSETPRINT(reg, 0, DISDQMINIT); 204 ISSETPRINT(reg, 0, ENSDRAMPD); 205 ISSETPRINT(reg, 0, SHOWDINO); 206 ISSETPRINT(reg, 0, ENRMAP2); 207 ISSETPRINT(reg, 0, ENRMAP1); 208 ISSETPRINT(reg, 0, ENWRINPAGE); 209 ISSETPRINT(reg, 0, ENCS3USER); 210 ISSETPRINT(reg, 0, ENCS2USER); 211 ISSETPRINT(reg, 0, ENCS1USER); 212 ISSETPRINT(reg, 0, ENCS1DRAM); 213 ISSETPRINT(reg, 0, CS3SIZE); 214 ISSETPRINT(reg, 0, CS2SIZE); 215 ISSETPRINT(reg, 0, CS1SIZE); 216 ISSETPRINT(reg, 0, CS0SIZE); 217 printf("\n"); 218 for (i = 0; i < 2; i++) { 219 int r, c; 220 printf(" BANK%d: ", i); 221 switch (i ? TX39_MEMCONFIG0_BANK1CONF(reg) 222 : TX39_MEMCONFIG0_BANK0CONF(reg)) { 223 case TX39_MEMCONFIG0_BANKCONF_16BITSDRAM: 224 printf("16bit SDRAM"); 225 break; 226 case TX39_MEMCONFIG0_BANKCONF_8BITSDRAM: 227 printf("8bit SDRAM"); 228 break; 229 case TX39_MEMCONFIG0_BANKCONF_32BITSDHDRAM: 230 printf("32bit DRAM/HDRAM"); 231 break; 232 case TX39_MEMCONFIG0_BANKCONF_16BITSDHDRAM: 233 printf("16bit DRAM/HDRAM"); 234 break; 235 } 236 if (i == 1) { 237 r = TX39_MEMCONFIG0_ROWSEL1(reg); 238 c = TX39_MEMCONFIG0_COLSEL1(reg); 239 } else { 240 r = TX39_MEMCONFIG0_ROWSEL0(reg); 241 c = TX39_MEMCONFIG0_COLSEL0(reg); 242 } 243 printf(" ROW %s COL %s\n", rowsel[r], colsel[c]); 244 } 245 246 /* 247 * Memory config 3 register 248 */ 249 printf(" config3:"); 250 reg = tx_conf_read(tc, TX39_MEMCONFIG3_REG); 251 #ifdef TX391X 252 ISSETPRINT(reg, 3, ENMCS3PAGE); 253 ISSETPRINT(reg, 3, ENMCS2PAGE); 254 ISSETPRINT(reg, 3, ENMCS1PAGE); 255 ISSETPRINT(reg, 3, ENMCS0PAGE); 256 #endif /* TX391X */ 257 ISSETPRINT(reg, 3, ENCS3PAGE); 258 ISSETPRINT(reg, 3, ENCS2PAGE); 259 ISSETPRINT(reg, 3, ENCS1PAGE); 260 ISSETPRINT(reg, 3, ENCS0PAGE); 261 ISSETPRINT(reg, 3, CARD2WAITEN); 262 ISSETPRINT(reg, 3, CARD1WAITEN); 263 ISSETPRINT(reg, 3, CARD2IOEN); 264 ISSETPRINT(reg, 3, CARD1IOEN); 265 #ifdef TX391X 266 ISSETPRINT(reg, 3, PORT8SEL); 267 #endif /* TX391X */ 268 #ifdef TX392X 269 ISSETPRINT(reg, 3, CARD2_8SEL); 270 ISSETPRINT(reg, 3, CARD1_8SEL); 271 #endif /* TX392X */ 272 273 printf("\n"); 274 275 /* 276 * Memory config 4 register 277 */ 278 reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG); 279 printf(" config4:"); 280 ISSETPRINT(reg, 4, ENBANK1HDRAM); 281 ISSETPRINT(reg, 4, ENBANK0HDRAM); 282 ISSETPRINT(reg, 4, ENARB); 283 ISSETPRINT(reg, 4, DISSNOOP); 284 ISSETPRINT(reg, 4, CLRWRBUSERRINT); 285 ISSETPRINT(reg, 4, ENBANK1OPT); 286 ISSETPRINT(reg, 4, ENBANK0OPT); 287 ISSETPRINT(reg, 4, ENWATCH); 288 ISSETPRINT(reg, 4, MEMPOWERDOWN); 289 ISSETPRINT(reg, 4, ENRFSH1); 290 ISSETPRINT(reg, 4, ENRFSH0); 291 if (reg & TX39_MEMCONFIG4_ENWATCH) { 292 i = TX39_MEMCONFIG4_WATCHTIMEVAL(reg); 293 i = (1000 * (i + 1) * 64) / 36864; 294 printf("WatchDogTimerRate: %dus", i); 295 } 296 printf("\n"); 297 } 298 #endif /* TX39BIU_DEBUG */ 299
Indexes created Fri Oct 31 11:10:07 GMT 2025