tx39clock.c revision 1.14
1 /* $NetBSD: tx39clock.c,v 1.14 2003/07/15 02:29:33 lukem Exp $ */ 2 3 /*- 4 * Copyright (c) 1999-2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: tx39clock.c,v 1.14 2003/07/15 02:29:33 lukem Exp $"); 41 42 #include "opt_tx39clock_debug.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 47 #include <dev/clock_subr.h> 48 49 #include <machine/bus.h> 50 #include <machine/sysconf.h> 51 52 #include <hpcmips/tx/tx39var.h> 53 #include <hpcmips/tx/tx39icureg.h> 54 #include <hpcmips/tx/tx39clockvar.h> 55 #include <hpcmips/tx/tx39clockreg.h> 56 #include <hpcmips/tx/tx39timerreg.h> 57 58 #ifdef TX39CLOCK_DEBUG 59 #define DPRINTF_ENABLE 60 #define DPRINTF_DEBUG tx39clock_debug 61 #endif 62 #include <machine/debug.h> 63 64 #define ISSETPRINT(r, m) \ 65 dbg_bitmask_print(r, TX39_CLOCK_EN ## m ## CLK, #m) 66 67 void tx39clock_init(struct device *); 68 void tx39clock_get(struct device *, time_t, struct clock_ymdhms *); 69 void tx39clock_set(struct device *, struct clock_ymdhms *); 70 71 struct platform_clock tx39_clock = { 72 #define CLOCK_RATE 100 73 CLOCK_RATE, tx39clock_init, tx39clock_get, tx39clock_set, 74 }; 75 76 struct txtime { 77 u_int32_t t_hi; 78 u_int32_t t_lo; 79 }; 80 81 struct tx39clock_softc { 82 struct device sc_dev; 83 tx_chipset_tag_t sc_tc; 84 85 int sc_alarm; 86 int sc_enabled; 87 int sc_year; 88 struct clock_ymdhms sc_epoch; 89 }; 90 91 int tx39clock_match(struct device *, struct cfdata *, void *); 92 void tx39clock_attach(struct device *, struct device *, void *); 93 #ifdef TX39CLOCK_DEBUG 94 void tx39clock_dump(tx_chipset_tag_t); 95 #endif 96 97 void tx39clock_cpuspeed(int *, int *); 98 99 void __tx39timer_rtcfreeze(tx_chipset_tag_t); 100 void __tx39timer_rtcreset(tx_chipset_tag_t); 101 __inline__ void __tx39timer_rtcget(struct txtime *); 102 __inline__ time_t __tx39timer_rtc2sec(struct txtime *); 103 104 CFATTACH_DECL(tx39clock, sizeof(struct tx39clock_softc), 105 tx39clock_match, tx39clock_attach, NULL, NULL); 106 107 int 108 tx39clock_match(struct device *parent, struct cfdata *cf, void *aux) 109 { 110 111 return (ATTACH_FIRST); 112 } 113 114 void 115 tx39clock_attach(struct device *parent, struct device *self, void *aux) 116 { 117 struct txsim_attach_args *ta = aux; 118 struct tx39clock_softc *sc = (void*)self; 119 tx_chipset_tag_t tc; 120 txreg_t reg; 121 122 tc = sc->sc_tc = ta->ta_tc; 123 tx_conf_register_clock(tc, self); 124 125 /* Reset timer module */ 126 tx_conf_write(tc, TX39_TIMERCONTROL_REG, 0); 127 128 /* Enable periodic timer */ 129 reg = tx_conf_read(tc, TX39_TIMERCONTROL_REG); 130 reg |= TX39_TIMERCONTROL_ENPERTIMER; 131 tx_conf_write(tc, TX39_TIMERCONTROL_REG, reg); 132 133 sc->sc_enabled = 0; 134 /* 135 * RTC and ALARM 136 * RTCINT ... INTR5 bit 31 (roll over) 137 * ALARMINT ... INTR5 bit 30 138 * PERINT ... INTR5 bit 29 139 */ 140 141 platform_clock_attach(self, &tx39_clock); 142 143 #ifdef TX39CLOCK_DEBUG 144 tx39clock_dump(tc); 145 #endif /* TX39CLOCK_DEBUG */ 146 } 147 148 /* 149 * cpuclock ... CPU clock (Hz) 150 * cpuspeed ... instructions-per-microsecond 151 */ 152 void 153 tx39clock_cpuspeed(int *cpuclock, int *cpuspeed) 154 { 155 struct txtime t0, t1; 156 int elapsed; 157 158 __tx39timer_rtcget(&t0); 159 __asm__ __volatile__(" 160 .set noreorder; 161 li $8, 10000000; 162 1: nop; 163 nop; 164 nop; 165 nop; 166 nop; 167 nop; 168 nop; 169 add $8, $8, -1; 170 bnez $8, 1b; 171 nop; 172 .set reorder; 173 "); 174 __tx39timer_rtcget(&t1); 175 176 elapsed = t1.t_lo - t0.t_lo; 177 178 *cpuclock = (100000000 / elapsed) * TX39_RTCLOCK; 179 *cpuspeed = *cpuclock / 1000000; 180 } 181 182 void 183 __tx39timer_rtcfreeze(tx_chipset_tag_t tc) 184 { 185 txreg_t reg; 186 187 reg = tx_conf_read(tc, TX39_TIMERCONTROL_REG); 188 189 /* Freeze RTC */ 190 reg |= TX39_TIMERCONTROL_FREEZEPRE; /* Upper 8bit */ 191 reg |= TX39_TIMERCONTROL_FREEZERTC; /* Lower 32bit */ 192 193 /* Freeze periodic timer */ 194 reg |= TX39_TIMERCONTROL_FREEZETIMER; 195 reg &= ~TX39_TIMERCONTROL_ENPERTIMER; 196 tx_conf_write(tc, TX39_TIMERCONTROL_REG, reg); 197 } 198 199 __inline__ time_t 200 __tx39timer_rtc2sec(struct txtime *t) 201 { 202 /* This rely on RTC is 32.768kHz */ 203 return ((t->t_lo >> 15) | (t->t_hi << 17)); 204 } 205 206 __inline__ void 207 __tx39timer_rtcget(struct txtime *t) 208 { 209 tx_chipset_tag_t tc; 210 txreg_t reghi, reglo, oreghi, oreglo; 211 int retry; 212 213 tc = tx_conf_get_tag(); 214 215 retry = 10; 216 217 do { 218 oreglo = tx_conf_read(tc, TX39_TIMERRTCLO_REG); 219 reglo = tx_conf_read(tc, TX39_TIMERRTCLO_REG); 220 221 oreghi = tx_conf_read(tc, TX39_TIMERRTCHI_REG); 222 reghi = tx_conf_read(tc, TX39_TIMERRTCHI_REG); 223 } while ((reghi != oreghi || reglo != oreglo) && (--retry > 0)); 224 225 if (retry < 0) { 226 printf("RTC timer read error.\n"); 227 } 228 229 t->t_hi = TX39_TIMERRTCHI(reghi); 230 t->t_lo = reglo; 231 } 232 233 void 234 __tx39timer_rtcreset(tx_chipset_tag_t tc) 235 { 236 txreg_t reg; 237 238 reg = tx_conf_read(tc, TX39_TIMERCONTROL_REG); 239 240 /* Reset counter and stop */ 241 reg |= TX39_TIMERCONTROL_RTCCLR; 242 tx_conf_write(tc, TX39_TIMERCONTROL_REG, reg); 243 244 /* Count again */ 245 reg &= ~TX39_TIMERCONTROL_RTCCLR; 246 tx_conf_write(tc, TX39_TIMERCONTROL_REG, reg); 247 } 248 249 void 250 tx39clock_init(struct device *dev) 251 { 252 struct tx39clock_softc *sc = (void*)dev; 253 tx_chipset_tag_t tc = sc->sc_tc; 254 txreg_t reg; 255 int pcnt; 256 257 /* 258 * Setup periodic timer (interrupting hz times per second.) 259 */ 260 pcnt = TX39_TIMERCLK / CLOCK_RATE - 1; 261 reg = tx_conf_read(tc, TX39_TIMERPERIODIC_REG); 262 TX39_TIMERPERIODIC_PERVAL_CLR(reg); 263 reg = TX39_TIMERPERIODIC_PERVAL_SET(reg, pcnt); 264 tx_conf_write(tc, TX39_TIMERPERIODIC_REG, reg); 265 266 /* 267 * Enable periodic timer 268 */ 269 reg = tx_conf_read(tc, TX39_INTRENABLE6_REG); 270 reg |= TX39_INTRPRI13_TIMER_PERIODIC_BIT; 271 tx_conf_write(tc, TX39_INTRENABLE6_REG, reg); 272 } 273 274 void 275 tx39clock_get(struct device *dev, time_t base, struct clock_ymdhms *t) 276 { 277 struct tx39clock_softc *sc = (void *)dev; 278 struct clock_ymdhms dt; 279 struct txtime tt; 280 time_t sec; 281 282 __tx39timer_rtcget(&tt); 283 sec = __tx39timer_rtc2sec(&tt); 284 285 if (!sc->sc_enabled) { 286 DPRINTF(("bootstrap: %d sec from previous reboot\n", 287 (int)sec)); 288 289 sc->sc_enabled = 1; 290 base += sec; 291 } else { 292 dt.dt_year = sc->sc_year; 293 dt.dt_mon = sc->sc_epoch.dt_mon; 294 dt.dt_day = sc->sc_epoch.dt_day; 295 dt.dt_hour = sc->sc_epoch.dt_hour; 296 dt.dt_min = sc->sc_epoch.dt_min; 297 dt.dt_sec = sc->sc_epoch.dt_sec; 298 dt.dt_wday = sc->sc_epoch.dt_wday; 299 base = sec + clock_ymdhms_to_secs(&dt); 300 } 301 302 clock_secs_to_ymdhms(base, &dt); 303 304 t->dt_year = dt.dt_year % 100; 305 t->dt_mon = dt.dt_mon; 306 t->dt_day = dt.dt_day; 307 t->dt_hour = dt.dt_hour; 308 t->dt_min = dt.dt_min; 309 t->dt_sec = dt.dt_sec; 310 t->dt_wday = dt.dt_wday; 311 312 sc->sc_year = dt.dt_year; 313 } 314 315 void 316 tx39clock_set(struct device *dev, struct clock_ymdhms *dt) 317 { 318 struct tx39clock_softc *sc = (void *)dev; 319 320 if (sc->sc_enabled) { 321 sc->sc_epoch = *dt; 322 } 323 } 324 325 int 326 tx39clock_alarm_set(tx_chipset_tag_t tc, int msec) 327 { 328 struct tx39clock_softc *sc = tc->tc_clockt; 329 330 sc->sc_alarm = TX39_MSEC2RTC(msec); 331 tx39clock_alarm_refill(tc); 332 333 return (0); 334 } 335 336 void 337 tx39clock_alarm_refill(tx_chipset_tag_t tc) 338 { 339 struct tx39clock_softc *sc = tc->tc_clockt; 340 struct txtime t; 341 u_int64_t time; 342 343 __tx39timer_rtcget(&t); 344 345 time = ((u_int64_t)t.t_hi << 32) | (u_int64_t)t.t_lo; 346 time += (u_int64_t)sc->sc_alarm; 347 348 t.t_hi = (u_int32_t)((time >> 32) & TX39_TIMERALARMHI_MASK); 349 t.t_lo = (u_int32_t)(time & 0xffffffff); 350 351 tx_conf_write(tc, TX39_TIMERALARMHI_REG, t.t_hi); 352 tx_conf_write(tc, TX39_TIMERALARMLO_REG, t.t_lo); 353 } 354 355 #ifdef TX39CLOCK_DEBUG 356 void 357 tx39clock_dump(tx_chipset_tag_t tc) 358 { 359 txreg_t reg; 360 361 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 362 363 printf(" "); 364 ISSETPRINT(reg, CHIM); 365 #ifdef TX391X 366 ISSETPRINT(reg, VID); 367 ISSETPRINT(reg, MBUS); 368 #endif /* TX391X */ 369 #ifdef TX392X 370 ISSETPRINT(reg, IRDA); 371 #endif /* TX392X */ 372 ISSETPRINT(reg, SPI); 373 ISSETPRINT(reg, TIMER); 374 ISSETPRINT(reg, FASTTIMER); 375 #ifdef TX392X 376 ISSETPRINT(reg, C48MOUT); 377 #endif /* TX392X */ 378 ISSETPRINT(reg, SIBM); 379 ISSETPRINT(reg, CSER); 380 ISSETPRINT(reg, IR); 381 ISSETPRINT(reg, UARTA); 382 ISSETPRINT(reg, UARTB); 383 printf("\n"); 384 } 385 #endif /* TX39CLOCK_DEBUG */ 386
Indexes created Sun Nov 02 23:10:09 GMT 2025