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tx39clock.c revision 1.9 
      1 /*	$NetBSD: tx39clock.c,v 1.9 2001/06/14 11:09:55 uch Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by UCHIYAMA Yasushi.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *        This product includes software developed by the NetBSD
     21  *        Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 #include "opt_tx39_debug.h"
     40 
     41 #include <sys/param.h>
     42 #include <sys/kernel.h>
     43 #include <sys/systm.h>
     44 #include <sys/device.h>
     45 
     46 #include <dev/clock_subr.h>
     47 
     48 #include <machine/bus.h>
     49 #include <machine/clock_machdep.h>
     50 #include <machine/cpu.h>
     51 
     52 #include <hpcmips/tx/tx39var.h>
     53 #include <hpcmips/tx/tx39icureg.h>
     54 #include <hpcmips/tx/tx39clockvar.h>
     55 #include <hpcmips/tx/tx39clockreg.h>
     56 #include <hpcmips/tx/tx39timerreg.h>
     57 
     58 #include <dev/dec/clockvar.h>
     59 
     60 #ifdef TX39CLKDEBUG
     61 #define	DPRINTF(arg)	printf arg
     62 #else
     63 #define	DPRINTF(arg)	((void)0)
     64 #endif
     65 
     66 #define ISSETPRINT(r, m) __is_set_print(r, TX39_CLOCK_EN##m##CLK, #m)
     67 
     68 void	tx39clock_init(struct device *);
     69 void	tx39clock_get(struct device *, time_t, struct clocktime *);
     70 void	tx39clock_set(struct device *, struct clocktime *);
     71 
     72 const struct clockfns tx39clockfns = {
     73 	tx39clock_init, tx39clock_get, tx39clock_set,
     74 };
     75 
     76 struct txtime {
     77 	u_int32_t t_hi;
     78 	u_int32_t t_lo;
     79 };
     80 
     81 struct tx39clock_softc {
     82 	struct	device sc_dev;
     83 	tx_chipset_tag_t sc_tc;
     84 
     85 	int sc_alarm;
     86 	int sc_enabled;
     87 	int sc_year;
     88 	struct clocktime sc_epoch;
     89 };
     90 
     91 int	tx39clock_match(struct device *, struct cfdata *, void *);
     92 void	tx39clock_attach(struct device *, struct device *, void *);
     93 void	tx39clock_dump(tx_chipset_tag_t);
     94 
     95 void	tx39clock_cpuspeed(int *, int *);
     96 
     97 void	__tx39timer_rtcfreeze(tx_chipset_tag_t);
     98 void	__tx39timer_rtcreset(tx_chipset_tag_t);
     99 __inline__ void	__tx39timer_rtcget(struct txtime *);
    100 __inline__ time_t __tx39timer_rtc2sec(struct txtime *);
    101 
    102 struct cfattach tx39clock_ca = {
    103 	sizeof(struct tx39clock_softc), tx39clock_match, tx39clock_attach
    104 };
    105 
    106 int
    107 tx39clock_match(struct device *parent, struct cfdata *cf, void *aux)
    108 {
    109 	return (ATTACH_FIRST);
    110 }
    111 
    112 void
    113 tx39clock_attach(struct device *parent, struct device *self, void *aux)
    114 {
    115 	struct txsim_attach_args *ta = aux;
    116 	struct tx39clock_softc *sc = (void*)self;
    117 	tx_chipset_tag_t tc;
    118 	txreg_t reg;
    119 
    120 	tc = sc->sc_tc = ta->ta_tc;
    121 	tx_conf_register_clock(tc, self);
    122 
    123 	/* Reset timer module */
    124 	tx_conf_write(tc, TX39_TIMERCONTROL_REG, 0);
    125 
    126 	/* Enable periodic timer */
    127 	reg = tx_conf_read(tc, TX39_TIMERCONTROL_REG);
    128 	reg |= TX39_TIMERCONTROL_ENPERTIMER;
    129 	tx_conf_write(tc, TX39_TIMERCONTROL_REG, reg);
    130 
    131 	sc->sc_enabled = 0;
    132 	/*
    133 	 * RTC and ALARM
    134 	 *    RTCINT    ... INTR5 bit 31  (roll over)
    135 	 *    ALARMINT  ... INTR5 bit 30
    136 	 *    PERINT    ... INTR5 bit 29
    137 	 */
    138 
    139 	clockattach(self, &tx39clockfns);
    140 
    141 #ifdef TX39CLKDEBUG
    142 	tx39clock_dump(tc);
    143 #endif /* TX39CLKDEBUG */
    144 }
    145 
    146 /*
    147  * cpuclock ... CPU clock (Hz)
    148  * cpuspeed ... instructions-per-microsecond
    149  */
    150 void
    151 tx39clock_cpuspeed(int *cpuclock, int *cpuspeed)
    152 {
    153 	struct txtime t0, t1;
    154 	int elapsed;
    155 
    156 	__tx39timer_rtcget(&t0);
    157 	__asm__ __volatile__("
    158 		.set	noreorder;
    159 		li	$8, 10000000;
    160 	1:	nop;
    161 		nop;
    162 		nop;
    163 		nop;
    164 		nop;
    165 		nop;
    166 		nop;
    167 		add	$8, $8, -1;
    168 		bnez	$8, 1b;
    169 		nop;
    170 		.set	reorder;
    171 	");
    172 	__tx39timer_rtcget(&t1);
    173 
    174 	elapsed = t1.t_lo - t0.t_lo;
    175 
    176 	*cpuclock = (100000000 / elapsed) * TX39_RTCLOCK;
    177 	*cpuspeed = *cpuclock / 1000000;
    178 }
    179 
    180 void
    181 __tx39timer_rtcfreeze(tx_chipset_tag_t tc)
    182 {
    183 	txreg_t reg;
    184 
    185 	reg = tx_conf_read(tc, TX39_TIMERCONTROL_REG);
    186 
    187 	/* Freeze RTC */
    188 	reg |= TX39_TIMERCONTROL_FREEZEPRE; /* Upper 8bit */
    189 	reg |= TX39_TIMERCONTROL_FREEZERTC; /* Lower 32bit */
    190 
    191 	/* Freeze periodic timer */
    192 	reg |= TX39_TIMERCONTROL_FREEZETIMER;
    193 	reg &= ~TX39_TIMERCONTROL_ENPERTIMER;
    194 	tx_conf_write(tc, TX39_TIMERCONTROL_REG, reg);
    195 }
    196 
    197 __inline__ time_t
    198 __tx39timer_rtc2sec(struct txtime *t)
    199 {
    200 	/* This rely on RTC is 32.768kHz */
    201 	return ((t->t_lo >> 15) | (t->t_hi << 17));
    202 }
    203 
    204 __inline__ void
    205 __tx39timer_rtcget(struct txtime *t)
    206 {
    207 	tx_chipset_tag_t tc;
    208 	txreg_t reghi, reglo, oreghi, oreglo;
    209 	int retry;
    210 
    211 	tc = tx_conf_get_tag();
    212 
    213 	retry = 10;
    214 
    215 	do {
    216 		oreglo = tx_conf_read(tc, TX39_TIMERRTCLO_REG);
    217 		reglo = tx_conf_read(tc, TX39_TIMERRTCLO_REG);
    218 
    219 		oreghi = tx_conf_read(tc, TX39_TIMERRTCHI_REG);
    220 		reghi = tx_conf_read(tc, TX39_TIMERRTCHI_REG);
    221 	} while ((reghi != oreghi || reglo != oreglo) && (--retry > 0));
    222 
    223 	if (retry < 0) {
    224 		printf("RTC timer read error.\n");
    225 	}
    226 
    227 	t->t_hi = TX39_TIMERRTCHI(reghi);
    228 	t->t_lo = reglo;
    229 }
    230 
    231 void
    232 __tx39timer_rtcreset(tx_chipset_tag_t tc)
    233 {
    234 	txreg_t reg;
    235 
    236 	reg = tx_conf_read(tc, TX39_TIMERCONTROL_REG);
    237 
    238 	/* Reset counter and stop */
    239 	reg |= TX39_TIMERCONTROL_RTCCLR;
    240 	tx_conf_write(tc, TX39_TIMERCONTROL_REG, reg);
    241 
    242 	/* Count again */
    243 	reg &= ~TX39_TIMERCONTROL_RTCCLR;
    244 	tx_conf_write(tc, TX39_TIMERCONTROL_REG, reg);
    245 }
    246 
    247 void
    248 tx39clock_init(struct device *dev)
    249 {
    250 	struct tx39clock_softc *sc = (void*)dev;
    251 	tx_chipset_tag_t tc = sc->sc_tc;
    252 	txreg_t reg;
    253 	int pcnt;
    254 
    255 	/*
    256 	 * Setup periodic timer (interrupting hz times per second.)
    257 	 */
    258 	pcnt = TX39_TIMERCLK / hz - 1;
    259 	reg = tx_conf_read(tc, TX39_TIMERPERIODIC_REG);
    260 	TX39_TIMERPERIODIC_PERVAL_CLR(reg);
    261 	reg = TX39_TIMERPERIODIC_PERVAL_SET(reg, pcnt);
    262 	tx_conf_write(tc, TX39_TIMERPERIODIC_REG, reg);
    263 
    264 	/*
    265 	 * Enable periodic timer
    266 	 */
    267 	reg = tx_conf_read(tc, TX39_INTRENABLE6_REG);
    268 	reg |= TX39_INTRPRI13_TIMER_PERIODIC_BIT;
    269 	tx_conf_write(tc, TX39_INTRENABLE6_REG, reg);
    270 
    271 	/*
    272 	 * number of microseconds between interrupts
    273 	 */
    274 	tick = 1000000 / hz;
    275 }
    276 
    277 void
    278 tx39clock_get(struct device *dev, time_t base, struct clocktime *ct)
    279 {
    280 	struct clock_ymdhms dt;
    281 	struct tx39clock_softc *sc = (void*)dev;
    282 	struct txtime tt;
    283 	time_t sec;
    284 
    285 	__tx39timer_rtcget(&tt);
    286 	sec = __tx39timer_rtc2sec(&tt);
    287 
    288 	if (!sc->sc_enabled) {
    289 		DPRINTF(("bootstrap: %d sec from previous reboot\n",
    290 		    (int)sec));
    291 
    292 		sc->sc_enabled = 1;
    293 		base += sec;
    294 	} else {
    295 		dt.dt_year = sc->sc_year;
    296 		dt.dt_mon = sc->sc_epoch.mon;
    297 		dt.dt_day = sc->sc_epoch.day;
    298 		dt.dt_hour = sc->sc_epoch.hour;
    299 		dt.dt_min = sc->sc_epoch.min;
    300 		dt.dt_sec = sc->sc_epoch.sec;
    301 		dt.dt_wday = sc->sc_epoch.dow;
    302 		base = sec + clock_ymdhms_to_secs(&dt);
    303 	}
    304 
    305 	clock_secs_to_ymdhms(base, &dt);
    306 
    307 	ct->year = dt.dt_year % 100;
    308 	ct->mon = dt.dt_mon;
    309 	ct->day = dt.dt_day;
    310 	ct->hour = dt.dt_hour;
    311 	ct->min = dt.dt_min;
    312 	ct->sec = dt.dt_sec;
    313 	ct->dow = dt.dt_wday;
    314 
    315 	sc->sc_year = dt.dt_year;
    316 }
    317 
    318 void
    319 tx39clock_set(struct device *dev, struct clocktime *ct)
    320 {
    321 	struct tx39clock_softc *sc = (void*)dev;
    322 
    323 	if (sc->sc_enabled) {
    324 		sc->sc_epoch = *ct;
    325 	}
    326 }
    327 
    328 int
    329 tx39clock_alarm_set(tx_chipset_tag_t tc, int msec)
    330 {
    331 	struct tx39clock_softc *sc = tc->tc_clockt;
    332 
    333 	sc->sc_alarm = TX39_MSEC2RTC(msec);
    334 	tx39clock_alarm_refill(tc);
    335 
    336 	return (0);
    337 }
    338 
    339 void
    340 tx39clock_alarm_refill(tx_chipset_tag_t tc)
    341 {
    342 	struct tx39clock_softc *sc = tc->tc_clockt;
    343 	struct txtime t;
    344 	u_int64_t time;
    345 
    346 	__tx39timer_rtcget(&t);
    347 
    348 	time = ((u_int64_t)t.t_hi << 32) | (u_int64_t)t.t_lo;
    349 	time += (u_int64_t)sc->sc_alarm;
    350 
    351 	t.t_hi = (u_int32_t)((time >> 32) & TX39_TIMERALARMHI_MASK);
    352 	t.t_lo = (u_int32_t)(time & 0xffffffff);
    353 
    354 	tx_conf_write(tc, TX39_TIMERALARMHI_REG, t.t_hi);
    355 	tx_conf_write(tc, TX39_TIMERALARMLO_REG, t.t_lo);
    356 }
    357 
    358 void
    359 tx39clock_dump(tx_chipset_tag_t tc)
    360 {
    361 	txreg_t reg;
    362 
    363 	reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
    364 
    365 	printf(" ");
    366 	ISSETPRINT(reg, CHIM);
    367 #ifdef TX391X
    368 	ISSETPRINT(reg, VID);
    369 	ISSETPRINT(reg, MBUS);
    370 #endif /* TX391X */
    371 #ifdef TX392X
    372 	ISSETPRINT(reg, IRDA);
    373 #endif /* TX392X */
    374 	ISSETPRINT(reg, SPI);
    375 	ISSETPRINT(reg, TIMER);
    376 	ISSETPRINT(reg, FASTTIMER);
    377 #ifdef TX392X
    378 	ISSETPRINT(reg, C48MOUT);
    379 #endif /* TX392X */
    380 	ISSETPRINT(reg, SIBM);
    381 	ISSETPRINT(reg, CSER);
    382 	ISSETPRINT(reg, IR);
    383 	ISSETPRINT(reg, UARTA);
    384 	ISSETPRINT(reg, UARTB);
    385 	printf("\n");
    386 }
    387