tx39io.c revision 1.14 1 1.14 thorpej /* $NetBSD: tx39io.c,v 1.14 2002/09/27 20:32:24 thorpej Exp $ */
2 1.1 uch
3 1.6 uch /*-
4 1.11 uch * Copyright (c) 1999-2001 The NetBSD Foundation, Inc.
5 1.1 uch * All rights reserved.
6 1.1 uch *
7 1.6 uch * This code is derived from software contributed to The NetBSD Foundation
8 1.6 uch * by UCHIYAMA Yasushi.
9 1.6 uch *
10 1.1 uch * Redistribution and use in source and binary forms, with or without
11 1.1 uch * modification, are permitted provided that the following conditions
12 1.1 uch * are met:
13 1.1 uch * 1. Redistributions of source code must retain the above copyright
14 1.1 uch * notice, this list of conditions and the following disclaimer.
15 1.6 uch * 2. Redistributions in binary form must reproduce the above copyright
16 1.6 uch * notice, this list of conditions and the following disclaimer in the
17 1.6 uch * documentation and/or other materials provided with the distribution.
18 1.6 uch * 3. All advertising materials mentioning features or use of this software
19 1.6 uch * must display the following acknowledgement:
20 1.6 uch * This product includes software developed by the NetBSD
21 1.6 uch * Foundation, Inc. and its contributors.
22 1.6 uch * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.6 uch * contributors may be used to endorse or promote products derived
24 1.6 uch * from this software without specific prior written permission.
25 1.1 uch *
26 1.6 uch * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.6 uch * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.6 uch * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.6 uch * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.6 uch * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.6 uch * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.6 uch * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.6 uch * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.6 uch * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.6 uch * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.6 uch * POSSIBILITY OF SUCH DAMAGE.
37 1.1 uch */
38 1.1 uch
39 1.1 uch #include <sys/param.h>
40 1.1 uch #include <sys/systm.h>
41 1.1 uch #include <sys/device.h>
42 1.1 uch
43 1.1 uch #include <machine/bus.h>
44 1.1 uch
45 1.1 uch #include <hpcmips/tx/tx39var.h>
46 1.7 uch #include <hpcmips/tx/tx39icureg.h>
47 1.7 uch #define __TX39IO_PRIVATE
48 1.5 uch #include <hpcmips/tx/tx39iovar.h>
49 1.1 uch #include <hpcmips/tx/tx39ioreg.h>
50 1.1 uch
51 1.11 uch #ifdef TX39IO_DEBUG
52 1.11 uch #define DPRINTF_ENABLE
53 1.11 uch #define DPRINTF_DEBUG tx39io_debug
54 1.7 uch #endif
55 1.11 uch #include <machine/debug.h>
56 1.5 uch
57 1.7 uch #define ISSET(x, s) ((x) & (1 << (s)))
58 1.1 uch
59 1.6 uch int tx39io_match(struct device *, struct cfdata *, void *);
60 1.6 uch void tx39io_attach(struct device *, struct device *, void *);
61 1.1 uch
62 1.14 thorpej const struct cfattach tx39io_ca = {
63 1.1 uch sizeof(struct tx39io_softc), tx39io_match, tx39io_attach
64 1.1 uch };
65 1.1 uch
66 1.7 uch /* IO/MFIO common */
67 1.8 uch static void port_intr_disestablish(hpcio_chip_t, hpcio_intr_handle_t);
68 1.8 uch static void port_intr_clear(hpcio_chip_t, hpcio_intr_handle_t);
69 1.7 uch /* MFIO */
70 1.8 uch static void *mfio_intr_establish(hpcio_chip_t, int, int, int (*)(void *),
71 1.8 uch void *);
72 1.8 uch static int mfio_in(hpcio_chip_t, int);
73 1.8 uch static void mfio_out(hpcio_chip_t, int, int);
74 1.8 uch static int mfio_intr_map(int *, int, int);
75 1.8 uch static void mfio_dump(hpcio_chip_t);
76 1.8 uch static void mfio_update(hpcio_chip_t);
77 1.7 uch /* IO */
78 1.8 uch static void *io_intr_establish(hpcio_chip_t, int, int, int (*)(void *),
79 1.8 uch void *);
80 1.1 uch #ifdef TX391X
81 1.8 uch static int tx391x_io_in(hpcio_chip_t, int);
82 1.8 uch static void tx391x_io_out(hpcio_chip_t, int, int);
83 1.8 uch static void tx391x_io_update(hpcio_chip_t);
84 1.8 uch static int tx391x_io_intr_map(int *, int, int);
85 1.7 uch #endif
86 1.1 uch #ifdef TX392X
87 1.8 uch static int tx392x_io_in(hpcio_chip_t, int);
88 1.8 uch static void tx392x_io_out(hpcio_chip_t, int, int);
89 1.8 uch static void tx392x_io_update(hpcio_chip_t);
90 1.8 uch static int tx392x_io_intr_map(int *, int, int);
91 1.8 uch #endif
92 1.8 uch #if defined TX391X && defined TX392X
93 1.8 uch #define tx39_io_intr_map(t, s, p, m) \
94 1.8 uch (IS_TX391X(t)
95 1.8 uch ? tx391x_io_intr_map(s, p, m) : tx392x_io_intr_map(s, p, m))
96 1.8 uch #elif defined TX391X
97 1.8 uch #define tx39io_intr_map(t, s, p, m) tx391x_io_intr_map(s, p, m)
98 1.8 uch #elif defined TX392X
99 1.8 uch #define tx39io_intr_map(t, s, p, m) tx392x_io_intr_map(s, p, m)
100 1.7 uch #endif
101 1.8 uch static void io_dump(hpcio_chip_t);
102 1.7 uch
103 1.7 uch static void __print_port_status(struct tx39io_port_status *, int);
104 1.1 uch
105 1.1 uch int
106 1.6 uch tx39io_match(struct device *parent, struct cfdata *cf, void *aux)
107 1.1 uch {
108 1.9 uch return (ATTACH_FIRST); /* 1st attach group of txsim */
109 1.5 uch }
110 1.5 uch
111 1.5 uch void
112 1.6 uch tx39io_attach(struct device *parent, struct device *self, void *aux)
113 1.5 uch {
114 1.5 uch struct txsim_attach_args *ta = aux;
115 1.7 uch struct tx39io_softc *sc = (void *)self;
116 1.7 uch tx_chipset_tag_t tc;
117 1.8 uch struct hpcio_chip *io_hc = &sc->sc_io_ops;
118 1.8 uch struct hpcio_chip *mfio_hc = &sc->sc_mfio_ops;
119 1.5 uch
120 1.7 uch tc = sc->sc_tc = ta->ta_tc;
121 1.1 uch
122 1.5 uch printf("\n");
123 1.7 uch sc->sc_stat_io_mask = ~(1 << 5); /* exclude Plum2 INT */
124 1.7 uch sc->sc_stat_mfio_mask = ~(0x3|(0x3 << 23));
125 1.7 uch
126 1.7 uch /* IO */
127 1.8 uch io_hc->hc_chipid = IO;
128 1.8 uch io_hc->hc_name = "IO";
129 1.8 uch io_hc->hc_sc = sc;
130 1.8 uch io_hc->hc_intr_establish = io_intr_establish;
131 1.8 uch io_hc->hc_intr_disestablish = port_intr_disestablish;
132 1.8 uch io_hc->hc_intr_clear = port_intr_clear;
133 1.8 uch io_hc->hc_dump = io_dump;
134 1.7 uch if (IS_TX391X(tc)) {
135 1.7 uch #ifdef TX391X
136 1.8 uch io_hc->hc_portread = tx391x_io_in;
137 1.8 uch io_hc->hc_portwrite = tx391x_io_out;
138 1.8 uch io_hc->hc_update = tx391x_io_update;
139 1.7 uch #endif
140 1.7 uch } else if (IS_TX392X(tc)) {
141 1.7 uch #ifdef TX392X
142 1.8 uch io_hc->hc_portread = tx392x_io_in;
143 1.8 uch io_hc->hc_portwrite = tx392x_io_out;
144 1.8 uch io_hc->hc_update = tx392x_io_update;
145 1.7 uch #endif
146 1.7 uch }
147 1.8 uch tx_conf_register_ioman(tc, io_hc);
148 1.7 uch
149 1.7 uch /* MFIO */
150 1.8 uch mfio_hc->hc_chipid = MFIO;
151 1.8 uch mfio_hc->hc_name = "MFIO";
152 1.8 uch mfio_hc->hc_sc = sc;
153 1.8 uch mfio_hc->hc_portread = mfio_in;
154 1.8 uch mfio_hc->hc_portwrite = mfio_out;
155 1.8 uch mfio_hc->hc_intr_establish = mfio_intr_establish;
156 1.8 uch mfio_hc->hc_intr_disestablish = port_intr_disestablish;
157 1.8 uch mfio_hc->hc_update = mfio_update;
158 1.8 uch mfio_hc->hc_dump = mfio_dump;
159 1.7 uch
160 1.8 uch tx_conf_register_ioman(tc, mfio_hc);
161 1.7 uch
162 1.8 uch hpcio_update(io_hc);
163 1.8 uch hpcio_update(mfio_hc);
164 1.7 uch
165 1.11 uch #ifdef TX39IO_DEBUG
166 1.8 uch hpcio_dump(io_hc);
167 1.8 uch hpcio_dump(mfio_hc);
168 1.7 uch printf("IO i0x%08x o0x%08x MFIO i0x%08x o0x%08x\n",
169 1.7 uch sc->sc_stat_io.in, sc->sc_stat_io.out,
170 1.7 uch sc->sc_stat_mfio.in, sc->sc_stat_mfio.out);
171 1.11 uch #endif /* TX39IO_DEBUG */
172 1.1 uch }
173 1.1 uch
174 1.7 uch /*
175 1.7 uch * TX391X, TX392X common
176 1.7 uch */
177 1.7 uch static void *
178 1.8 uch io_intr_establish(hpcio_chip_t arg, int port, int mode, int (*func)(void *),
179 1.8 uch void *func_arg)
180 1.5 uch {
181 1.8 uch struct tx39io_softc *sc = arg->hc_sc;
182 1.8 uch int src;
183 1.8 uch
184 1.8 uch if (tx39io_intr_map(sc->sc_tc, &src, port, mode) != 0)
185 1.8 uch return (0);
186 1.8 uch
187 1.8 uch return (tx_intr_establish(sc->sc_tc, src, IST_EDGE, IPL_CLOCK, func,
188 1.8 uch func_arg));
189 1.8 uch }
190 1.8 uch
191 1.8 uch static void *
192 1.8 uch mfio_intr_establish(hpcio_chip_t arg, int port, int mode, int (*func)(void *),
193 1.8 uch void *func_arg)
194 1.8 uch {
195 1.8 uch struct tx39io_softc *sc = arg->hc_sc;
196 1.8 uch int src;
197 1.8 uch
198 1.8 uch if (mfio_intr_map(&src, port, mode) != 0)
199 1.8 uch return (0);
200 1.8 uch
201 1.8 uch return (tx_intr_establish(sc->sc_tc, src, IST_EDGE, IPL_CLOCK, func,
202 1.8 uch func_arg));
203 1.5 uch }
204 1.5 uch
205 1.7 uch static void
206 1.8 uch port_intr_disestablish(hpcio_chip_t arg, void *ih)
207 1.5 uch {
208 1.8 uch struct tx39io_softc *sc = arg->hc_sc;
209 1.7 uch tx_intr_disestablish(sc->sc_tc, ih);
210 1.7 uch }
211 1.5 uch
212 1.7 uch static void
213 1.8 uch port_intr_clear(hpcio_chip_t arg, void *ih)
214 1.7 uch {
215 1.8 uch }
216 1.8 uch
217 1.8 uch static void
218 1.8 uch mfio_out(hpcio_chip_t arg, int port, int onoff)
219 1.8 uch {
220 1.8 uch struct tx39io_softc *sc = arg->hc_sc;
221 1.7 uch tx_chipset_tag_t tc;
222 1.7 uch txreg_t reg, pos;
223 1.5 uch
224 1.11 uch DPRINTF("port #%d\n", port);
225 1.7 uch tc = sc->sc_tc;
226 1.7 uch /* MFIO */
227 1.7 uch pos = 1 << port;
228 1.7 uch #ifdef DIAGNOSTIC
229 1.7 uch if (!(sc->sc_stat_mfio.dir & pos)) {
230 1.13 provos panic("%s: MFIO%d is not output port.",
231 1.7 uch sc->sc_dev.dv_xname, port);
232 1.5 uch }
233 1.7 uch #endif
234 1.7 uch reg = tx_conf_read(tc, TX39_IOMFIODATAOUT_REG);
235 1.7 uch if (onoff)
236 1.7 uch reg |= pos;
237 1.7 uch else
238 1.7 uch reg &= ~pos;
239 1.7 uch tx_conf_write(tc, TX39_IOMFIODATAOUT_REG, reg);
240 1.7 uch }
241 1.7 uch
242 1.7 uch static int
243 1.8 uch mfio_in(hpcio_chip_t arg, int port)
244 1.7 uch {
245 1.8 uch struct tx39io_softc *sc __attribute__((__unused__)) = arg->hc_sc ;
246 1.8 uch
247 1.11 uch DPRINTF("port #%d\n", port);
248 1.9 uch return (tx_conf_read(sc->sc_tc, TX39_IOMFIODATAIN_REG) & (1 << port));
249 1.5 uch }
250 1.5 uch
251 1.8 uch static int
252 1.8 uch mfio_intr_map(int *src, int port, int mode)
253 1.1 uch {
254 1.8 uch
255 1.8 uch if (mode & HPCIO_INTR_POSEDGE) {
256 1.8 uch *src = MAKEINTR(3, (1 << port));
257 1.8 uch return (0);
258 1.8 uch } else if (mode & HPCIO_INTR_NEGEDGE) {
259 1.8 uch *src = MAKEINTR(4, (1 << port));
260 1.8 uch return (0);
261 1.8 uch }
262 1.8 uch
263 1.11 uch DPRINTF("invalid interrupt mode.\n");
264 1.8 uch
265 1.8 uch return (1);
266 1.7 uch }
267 1.5 uch
268 1.7 uch static void
269 1.8 uch mfio_update(hpcio_chip_t arg)
270 1.7 uch {
271 1.8 uch struct tx39io_softc *sc = arg->hc_sc;
272 1.7 uch tx_chipset_tag_t tc = sc->sc_tc;
273 1.7 uch struct tx39io_port_status *stat_mfio = &sc->sc_stat_mfio;
274 1.7 uch
275 1.7 uch sc->sc_ostat_mfio = *stat_mfio; /* save old status */
276 1.7 uch stat_mfio->dir = tx_conf_read(tc, TX39_IOMFIODATADIR_REG);
277 1.7 uch stat_mfio->in = tx_conf_read(tc, TX39_IOMFIODATAIN_REG);
278 1.7 uch stat_mfio->out = tx_conf_read(tc, TX39_IOMFIODATAOUT_REG);
279 1.7 uch stat_mfio->power = tx_conf_read(tc, TX39_IOMFIOPOWERDWN_REG);
280 1.7 uch stat_mfio->u.select = tx_conf_read(tc, TX39_IOMFIODATASEL_REG);
281 1.1 uch }
282 1.1 uch
283 1.7 uch #ifdef TX391X
284 1.7 uch /*
285 1.7 uch * TMPR3912 specific
286 1.7 uch */
287 1.1 uch int
288 1.8 uch tx391x_io_in(hpcio_chip_t arg, int port)
289 1.1 uch {
290 1.8 uch struct tx39io_softc *sc __attribute__((__unused__)) = arg->hc_sc;
291 1.7 uch txreg_t reg = tx_conf_read(sc->sc_tc, TX39_IOCTRL_REG);
292 1.5 uch
293 1.11 uch DPRINTF("port #%d\n", port);
294 1.9 uch return (TX391X_IOCTRL_IODIN(reg) & (1 << port));
295 1.1 uch }
296 1.1 uch
297 1.1 uch void
298 1.8 uch tx391x_io_out(hpcio_chip_t arg, int port, int onoff)
299 1.1 uch {
300 1.8 uch struct tx39io_softc *sc = arg->hc_sc;
301 1.7 uch tx_chipset_tag_t tc;
302 1.7 uch txreg_t reg, pos, iostat;
303 1.7 uch
304 1.7 uch KASSERT(sc);
305 1.11 uch DPRINTF("port #%d\n", port);
306 1.7 uch
307 1.7 uch tc = sc->sc_tc;
308 1.7 uch
309 1.7 uch /* IO [0:6] */
310 1.7 uch pos = 1 << port;
311 1.7 uch #ifdef DIAGNOSTIC
312 1.7 uch if (!(sc->sc_stat_io.dir & pos))
313 1.13 provos panic("%s: IO%d is not output port.", sc->sc_dev.dv_xname,
314 1.10 uch port);
315 1.1 uch #endif
316 1.7 uch reg = tx_conf_read(tc, TX39_IOCTRL_REG);
317 1.7 uch iostat = TX391X_IOCTRL_IODOUT(reg);
318 1.7 uch if (onoff)
319 1.7 uch iostat |= pos;
320 1.7 uch else
321 1.7 uch iostat &= ~pos;
322 1.7 uch TX391X_IOCTRL_IODOUT_CLR(reg);
323 1.7 uch reg = TX391X_IOCTRL_IODOUT_SET(reg, iostat);
324 1.7 uch tx_conf_write(tc, TX39_IOCTRL_REG, reg);
325 1.7 uch }
326 1.1 uch
327 1.7 uch void
328 1.8 uch tx391x_io_update(hpcio_chip_t arg)
329 1.7 uch {
330 1.8 uch struct tx39io_softc *sc = arg->hc_sc;
331 1.7 uch struct tx39io_port_status *stat_io = &sc->sc_stat_io;
332 1.7 uch tx_chipset_tag_t tc = sc->sc_tc;
333 1.7 uch txreg_t reg;
334 1.7 uch
335 1.7 uch /* IO [0:6] */
336 1.7 uch sc->sc_ostat_io = *stat_io; /* save old status */
337 1.1 uch reg = tx_conf_read(tc, TX39_IOCTRL_REG);
338 1.7 uch stat_io->dir = TX391X_IOCTRL_IODIREC(reg);
339 1.7 uch stat_io->in = TX391X_IOCTRL_IODIN(reg);
340 1.7 uch stat_io->out = TX391X_IOCTRL_IODOUT(reg);
341 1.7 uch stat_io->u.debounce = TX391X_IOCTRL_IODEBSEL(reg);
342 1.7 uch reg = tx_conf_read(tc, TX39_IOIOPOWERDWN_REG);
343 1.7 uch stat_io->power = TX391X_IOIOPOWERDWN_IOPD(reg);
344 1.7 uch }
345 1.8 uch
346 1.8 uch int
347 1.8 uch tx391x_io_intr_map(int *src, int port, int mode)
348 1.8 uch {
349 1.8 uch
350 1.8 uch if (mode & HPCIO_INTR_POSEDGE) {
351 1.8 uch *src = MAKEINTR(5, (1 << (port + 7)));
352 1.8 uch return (0);
353 1.8 uch } else if (mode & HPCIO_INTR_NEGEDGE) {
354 1.8 uch *src = MAKEINTR(5, (1 << port));
355 1.8 uch return (0);
356 1.8 uch }
357 1.8 uch
358 1.11 uch DPRINTF("invalid interrupt mode.\n");
359 1.8 uch
360 1.8 uch return (1);
361 1.8 uch }
362 1.1 uch #endif /* TX391X */
363 1.7 uch
364 1.1 uch #ifdef TX392X
365 1.7 uch /*
366 1.7 uch * TMPR3922 specific
367 1.7 uch */
368 1.7 uch int
369 1.8 uch tx392x_io_in(hpcio_chip_t arg, int port)
370 1.7 uch {
371 1.8 uch struct tx39io_softc *sc __attribute__((__unused__)) = arg->hc_sc;
372 1.7 uch txreg_t reg = tx_conf_read(sc->sc_tc, TX392X_IODATAINOUT_REG);
373 1.8 uch
374 1.11 uch DPRINTF("port #%d\n", port);
375 1.7 uch
376 1.9 uch return (TX392X_IODATAINOUT_DIN(reg) & (1 << port));
377 1.7 uch }
378 1.7 uch
379 1.7 uch void
380 1.8 uch tx392x_io_out(hpcio_chip_t arg, int port, int onoff)
381 1.7 uch {
382 1.8 uch struct tx39io_softc *sc = arg->hc_sc;
383 1.7 uch #ifdef DIAGNOSTIC
384 1.7 uch const char *devname = sc->sc_dev.dv_xname;
385 1.7 uch #endif
386 1.7 uch tx_chipset_tag_t tc = sc->sc_tc;
387 1.7 uch txreg_t reg, pos, iostat;
388 1.7 uch
389 1.11 uch DPRINTF("port #%d\n", port);
390 1.7 uch /* IO [0:15] */
391 1.7 uch pos = 1 << port;
392 1.7 uch #ifdef DIAGNOSTIC
393 1.12 uch if (!(sc->sc_stat_io.dir & pos))
394 1.13 provos panic("%s: IO%d is not output port.", devname, port);
395 1.7 uch #endif
396 1.7 uch reg = tx_conf_read(tc, TX392X_IODATAINOUT_REG);
397 1.7 uch iostat = TX392X_IODATAINOUT_DOUT(reg);
398 1.7 uch if (onoff)
399 1.7 uch iostat |= pos;
400 1.7 uch else
401 1.7 uch iostat &= ~pos;
402 1.7 uch TX392X_IODATAINOUT_DOUT_CLR(reg);
403 1.7 uch reg = TX392X_IODATAINOUT_DOUT_SET(reg, iostat);
404 1.7 uch tx_conf_write(tc, TX392X_IODATAINOUT_REG, reg);
405 1.7 uch }
406 1.7 uch
407 1.8 uch int
408 1.8 uch tx392x_io_intr_map(int *src, int port, int mode)
409 1.7 uch {
410 1.8 uch
411 1.8 uch if (mode & HPCIO_INTR_POSEDGE) {
412 1.8 uch *src = MAKEINTR(8, (1 << (port + 16)));
413 1.8 uch return (0);
414 1.8 uch } else if (mode & HPCIO_INTR_NEGEDGE) {
415 1.8 uch *src = MAKEINTR(8, (1 << port));
416 1.8 uch return (0);
417 1.8 uch }
418 1.8 uch
419 1.11 uch DPRINTF("invalid interrupt mode.\n");
420 1.8 uch
421 1.8 uch return (1);
422 1.7 uch }
423 1.7 uch
424 1.7 uch void
425 1.8 uch tx392x_io_update(hpcio_chip_t arg)
426 1.7 uch {
427 1.8 uch struct tx39io_softc *sc = arg->hc_sc;
428 1.7 uch struct tx39io_port_status *stat_io = &sc->sc_stat_io;
429 1.7 uch tx_chipset_tag_t tc = sc->sc_tc;
430 1.7 uch txreg_t reg;
431 1.7 uch
432 1.7 uch sc->sc_ostat_io = *stat_io; /* save old status */
433 1.7 uch /* IO [0:15] */
434 1.7 uch reg = tx_conf_read(tc, TX39_IOCTRL_REG);
435 1.7 uch stat_io->dir = TX392X_IOCTRL_IODIREC(reg);
436 1.7 uch stat_io->u.debounce = TX392X_IOCTRL_IODEBSEL(reg);
437 1.7 uch reg = tx_conf_read(tc, TX392X_IODATAINOUT_REG);
438 1.7 uch stat_io->in = TX392X_IODATAINOUT_DIN(reg);
439 1.7 uch stat_io->out = TX392X_IODATAINOUT_DOUT(reg);
440 1.7 uch reg = tx_conf_read(tc, TX39_IOIOPOWERDWN_REG);
441 1.7 uch stat_io->power = TX392X_IOIOPOWERDWN_IOPD(reg);
442 1.7 uch }
443 1.7 uch
444 1.1 uch #endif /* TX392X */
445 1.7 uch
446 1.7 uch static const char *line = "--------------------------------------------------"
447 1.7 uch "------------\n";
448 1.7 uch static void
449 1.8 uch mfio_dump(hpcio_chip_t arg)
450 1.7 uch {
451 1.8 uch struct tx39io_softc *sc = arg->hc_sc;
452 1.7 uch const struct tx39io_mfio_map *map = tx39io_get_mfio_map(tc);
453 1.7 uch struct tx39io_port_status *stat;
454 1.7 uch int i;
455 1.7 uch
456 1.7 uch printf("%s", line);
457 1.7 uch stat = &sc->sc_stat_mfio;
458 1.1 uch for (i = TX39_IO_MFIO_MAX - 1; i >= 0 ; i--) {
459 1.7 uch /* MFIO port has power down state */
460 1.1 uch printf("MFIO %2d: - ", i);
461 1.7 uch __print_port_status(stat, i);
462 1.7 uch printf(ISSET(stat->u.select, i) ? " MFIO(%s)\n" : " %s\n",
463 1.7 uch map[i].std_pin_name);
464 1.1 uch }
465 1.7 uch printf("%s", line);
466 1.1 uch }
467 1.1 uch
468 1.7 uch static void
469 1.8 uch io_dump(hpcio_chip_t arg)
470 1.1 uch {
471 1.8 uch struct tx39io_softc *sc = arg->hc_sc;
472 1.7 uch struct tx39io_port_status *stat;
473 1.7 uch int i;
474 1.7 uch
475 1.7 uch printf("%s Debounce Direction DataOut DataIn PowerDown Select"
476 1.7 uch "\n%s", line, line);
477 1.7 uch stat = &sc->sc_stat_io;
478 1.7 uch for (i = tx39io_get_io_max(tc) - 1; i >= 0 ; i--) {
479 1.7 uch /* IO port has debouncer */
480 1.7 uch printf("IO %2d: %s ", i,
481 1.7 uch ISSET(stat->u.debounce, i) ? "On " : "Off");
482 1.7 uch __print_port_status(stat, i);
483 1.7 uch printf(" -\n");
484 1.1 uch }
485 1.7 uch }
486 1.6 uch
487 1.7 uch static void
488 1.7 uch __print_port_status(struct tx39io_port_status *stat, int i)
489 1.7 uch {
490 1.7 uch printf("%s %d %d %s",
491 1.7 uch ISSET(stat->dir, i) ? "Out" : "In ",
492 1.7 uch ISSET(stat->out, i) ? 1 : 0,
493 1.7 uch ISSET(stat->in, i) ? 1 : 0,
494 1.7 uch ISSET(stat->power, i) ? "Down ": "Active");
495 1.7 uch }
496