tx39ir.c revision 1.3.6.2 1 1.3.6.2 nathanw /* $NetBSD: tx39ir.c,v 1.3.6.2 2002/02/28 04:10:02 nathanw Exp $ */
2 1.3.6.2 nathanw
3 1.3.6.2 nathanw /*-
4 1.3.6.2 nathanw * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 1.3.6.2 nathanw * All rights reserved.
6 1.3.6.2 nathanw *
7 1.3.6.2 nathanw * This code is derived from software contributed to The NetBSD Foundation
8 1.3.6.2 nathanw * by UCHIYAMA Yasushi.
9 1.3.6.2 nathanw *
10 1.3.6.2 nathanw * Redistribution and use in source and binary forms, with or without
11 1.3.6.2 nathanw * modification, are permitted provided that the following conditions
12 1.3.6.2 nathanw * are met:
13 1.3.6.2 nathanw * 1. Redistributions of source code must retain the above copyright
14 1.3.6.2 nathanw * notice, this list of conditions and the following disclaimer.
15 1.3.6.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
16 1.3.6.2 nathanw * notice, this list of conditions and the following disclaimer in the
17 1.3.6.2 nathanw * documentation and/or other materials provided with the distribution.
18 1.3.6.2 nathanw * 3. All advertising materials mentioning features or use of this software
19 1.3.6.2 nathanw * must display the following acknowledgement:
20 1.3.6.2 nathanw * This product includes software developed by the NetBSD
21 1.3.6.2 nathanw * Foundation, Inc. and its contributors.
22 1.3.6.2 nathanw * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.3.6.2 nathanw * contributors may be used to endorse or promote products derived
24 1.3.6.2 nathanw * from this software without specific prior written permission.
25 1.3.6.2 nathanw *
26 1.3.6.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.3.6.2 nathanw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.3.6.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.3.6.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.3.6.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.3.6.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.3.6.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.3.6.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.3.6.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.3.6.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.3.6.2 nathanw * POSSIBILITY OF SUCH DAMAGE.
37 1.3.6.2 nathanw */
38 1.3.6.2 nathanw
39 1.3.6.2 nathanw /*
40 1.3.6.2 nathanw * TX39 IR module (connected to UARTB)
41 1.3.6.2 nathanw */
42 1.3.6.2 nathanw #undef TX39IRDEBUG
43 1.3.6.2 nathanw
44 1.3.6.2 nathanw #include <sys/param.h>
45 1.3.6.2 nathanw #include <sys/systm.h>
46 1.3.6.2 nathanw #include <sys/device.h>
47 1.3.6.2 nathanw
48 1.3.6.2 nathanw #include <machine/bus.h>
49 1.3.6.2 nathanw #include <machine/intr.h>
50 1.3.6.2 nathanw
51 1.3.6.2 nathanw #include <hpcmips/tx/tx39var.h>
52 1.3.6.2 nathanw #include <hpcmips/tx/tx39icureg.h>
53 1.3.6.2 nathanw #include <hpcmips/tx/tx39irvar.h>
54 1.3.6.2 nathanw #include <hpcmips/tx/tx39irreg.h>
55 1.3.6.2 nathanw
56 1.3.6.2 nathanw #include <hpcmips/tx/tx39clockreg.h> /* XXX */
57 1.3.6.2 nathanw
58 1.3.6.2 nathanw #ifdef TX39IRDEBUG
59 1.3.6.2 nathanw int tx39ir_debug = 1;
60 1.3.6.2 nathanw #define DPRINTF(arg) if (vrpiu_debug) printf arg;
61 1.3.6.2 nathanw #else
62 1.3.6.2 nathanw #define DPRINTF(arg)
63 1.3.6.2 nathanw #endif
64 1.3.6.2 nathanw
65 1.3.6.2 nathanw int tx39ir_match(struct device *, struct cfdata *, void *);
66 1.3.6.2 nathanw void tx39ir_attach(struct device *, struct device *, void *);
67 1.3.6.2 nathanw
68 1.3.6.2 nathanw struct tx39ir_softc {
69 1.3.6.2 nathanw struct device sc_dev;
70 1.3.6.2 nathanw struct device *sc_parent;
71 1.3.6.2 nathanw tx_chipset_tag_t sc_tc;
72 1.3.6.2 nathanw };
73 1.3.6.2 nathanw
74 1.3.6.2 nathanw #ifdef TX39IRDEBUG
75 1.3.6.2 nathanw static void tx39ir_dump(struct tx39ir_softc *);
76 1.3.6.2 nathanw #endif
77 1.3.6.2 nathanw #if not_required_yet
78 1.3.6.2 nathanw static int tx39ir_intr(void *);
79 1.3.6.2 nathanw #endif
80 1.3.6.2 nathanw
81 1.3.6.2 nathanw struct cfattach tx39ir_ca = {
82 1.3.6.2 nathanw sizeof(struct tx39ir_softc), tx39ir_match, tx39ir_attach
83 1.3.6.2 nathanw };
84 1.3.6.2 nathanw
85 1.3.6.2 nathanw int
86 1.3.6.2 nathanw tx39ir_match(struct device *parent, struct cfdata *cf, void *aux)
87 1.3.6.2 nathanw {
88 1.3.6.2 nathanw return (ATTACH_NORMAL);
89 1.3.6.2 nathanw }
90 1.3.6.2 nathanw
91 1.3.6.2 nathanw void
92 1.3.6.2 nathanw tx39ir_attach(struct device *parent, struct device *self, void *aux)
93 1.3.6.2 nathanw {
94 1.3.6.2 nathanw struct txcom_attach_args *tca = aux;
95 1.3.6.2 nathanw struct tx39ir_softc *sc = (void*)self;
96 1.3.6.2 nathanw tx_chipset_tag_t tc;
97 1.3.6.2 nathanw txreg_t reg;
98 1.3.6.2 nathanw
99 1.3.6.2 nathanw sc->sc_tc = tc = tca->tca_tc;
100 1.3.6.2 nathanw sc->sc_parent = tca->tca_parent;
101 1.3.6.2 nathanw
102 1.3.6.2 nathanw printf("\n");
103 1.3.6.2 nathanw
104 1.3.6.2 nathanw /* setup IR module */
105 1.3.6.2 nathanw reg = tx_conf_read(tc, TX39_IRCTRL1_REG);
106 1.3.6.2 nathanw reg |= TX39_IRCTRL1_RXPWR;
107 1.3.6.2 nathanw tx_conf_write(tc, TX39_IRCTRL1_REG, reg);
108 1.3.6.2 nathanw
109 1.3.6.2 nathanw /* power up IR module */
110 1.3.6.2 nathanw reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
111 1.3.6.2 nathanw reg |= TX39_CLOCK_ENIRCLK | TX39_CLOCK_ENUARTBCLK;
112 1.3.6.2 nathanw tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
113 1.3.6.2 nathanw
114 1.3.6.2 nathanw /* turn to pulse mode UARTB */
115 1.3.6.2 nathanw txcom_pulse_mode(sc->sc_parent);
116 1.3.6.2 nathanw
117 1.3.6.2 nathanw #if not_required_yet
118 1.3.6.2 nathanw tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_CARSTINT),
119 1.3.6.2 nathanw IST_EDGE, IPL_TTY, tx39ir_intr, sc);
120 1.3.6.2 nathanw tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_POSCARINT),
121 1.3.6.2 nathanw IST_EDGE, IPL_TTY, tx39ir_intr, sc);
122 1.3.6.2 nathanw tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_NEGCARINT),
123 1.3.6.2 nathanw IST_EDGE, IPL_TTY, tx39ir_intr, sc);
124 1.3.6.2 nathanw #endif
125 1.3.6.2 nathanw
126 1.3.6.2 nathanw #ifdef TX39IRDEBUG
127 1.3.6.2 nathanw tx39ir_dump(sc);
128 1.3.6.2 nathanw #endif
129 1.3.6.2 nathanw }
130 1.3.6.2 nathanw
131 1.3.6.2 nathanw #ifdef TX39IRDEBUG
132 1.3.6.2 nathanw void
133 1.3.6.2 nathanw tx39ir_dump(struct tx39ir_softc *sc)
134 1.3.6.2 nathanw {
135 1.3.6.2 nathanw tx_chipset_tag_t tc = sc->sc_tc;
136 1.3.6.2 nathanw txreg_t reg;
137 1.3.6.2 nathanw
138 1.3.6.2 nathanw reg = tx_conf_read(tc, TX39_IRCTRL1_REG);
139 1.3.6.2 nathanw #define ISSETPRINT(r, m) dbg_bitmask_print((u_int32_t)(r), \
140 1.3.6.2 nathanw TX39_IRCTRL1_##m, #m)
141 1.3.6.2 nathanw ISSETPRINT(reg, CARDET);
142 1.3.6.2 nathanw ISSETPRINT(reg, TESTIR);
143 1.3.6.2 nathanw ISSETPRINT(reg, DTINVERT);
144 1.3.6.2 nathanw ISSETPRINT(reg, RXPWR);
145 1.3.6.2 nathanw ISSETPRINT(reg, ENSTATE);
146 1.3.6.2 nathanw ISSETPRINT(reg, ENCOMSM);
147 1.3.6.2 nathanw #undef ISSETPRINT
148 1.3.6.2 nathanw printf("baudval %d\n", TX39_IRCTRL1_BAUDVAL(reg));
149 1.3.6.2 nathanw }
150 1.3.6.2 nathanw #endif
151 1.3.6.2 nathanw
152 1.3.6.2 nathanw #if not_required_yet
153 1.3.6.2 nathanw int
154 1.3.6.2 nathanw tx39ir_intr(void *arg)
155 1.3.6.2 nathanw {
156 1.3.6.2 nathanw return (0);
157 1.3.6.2 nathanw }
158 1.3.6.2 nathanw #endif
159