tx39power.c revision 1.7
1 /* $NetBSD: tx39power.c,v 1.7 2000/10/04 13:53:56 uch Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include "opt_tx39_debug.h" 40 #include "opt_tx39powerdebug.h" 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/device.h> 45 46 #include <machine/bus.h> 47 #include <machine/intr.h> 48 #include <machine/config_hook.h> 49 50 #include <hpcmips/tx/tx39var.h> 51 #include <hpcmips/tx/tx39icureg.h> 52 #include <hpcmips/tx/tx39powerreg.h> 53 #include <hpcmips/tx/tx39spireg.h> 54 55 #define ISSET(x, v) ((x) & (v)) 56 #define ISSETPRINT(r, m) __is_set_print(r, TX39_POWERCTRL_##m, #m) 57 58 int tx39power_match(struct device *, struct cfdata *, void *); 59 void tx39power_attach(struct device *, struct device *, void *); 60 61 struct tx39power_softc { 62 struct device sc_dev; 63 tx_chipset_tag_t sc_tc; 64 65 /* save interrupt status for resume */ 66 txreg_t sc_icu_state[TX39_INTRSET_MAX + 1]; 67 }; 68 69 struct cfattach tx39power_ca = { 70 sizeof(struct tx39power_softc), tx39power_match, tx39power_attach 71 }; 72 73 void tx39power_suspend_cpu(void); /* automatic hardware resume */ 74 75 static int tx39power_intr_p(void *); 76 static int tx39power_intr_n(void *); 77 static int tx39power_ok_intr_p(void *); 78 static int tx39power_ok_intr_n(void *); 79 static int tx39power_button_intr_p(void *); 80 static int tx39power_button_intr_n(void *); 81 #ifdef TX39POWERDEBUG 82 static void tx39power_dump(struct tx39power_softc *); 83 #endif 84 85 int 86 tx39power_match(struct device *parent, struct cfdata *cf, void *aux) 87 { 88 return 2; /* 1st attach group of txsim */ 89 } 90 91 void 92 tx39power_attach(struct device *parent, struct device *self, void *aux) 93 { 94 struct txsim_attach_args *ta = aux; 95 struct tx39power_softc *sc = (void*)self; 96 tx_chipset_tag_t tc; 97 txreg_t reg; 98 99 tc = sc->sc_tc = ta->ta_tc; 100 tx_conf_register_power(tc, self); 101 102 printf("\n"); 103 #ifdef TX39POWERDEBUG 104 __tx39power_dump (sc); 105 #endif 106 /* 107 * Disable SPI module 108 */ 109 reg = tx_conf_read(tc, TX39_SPICTRL_REG); 110 if (ISSET(reg, TX39_SPICTRL_ENSPI)) { 111 reg &= ~TX39_SPICTRL_ENSPI; 112 } 113 printf("SPI module disabled\n"); 114 115 /* 116 * enable stop timer 117 */ 118 reg = tx_conf_read(tc, TX39_POWERCTRL_REG); 119 120 reg &= ~(TX39_POWERCTRL_STPTIMERVAL_MASK << 121 TX39_POWERCTRL_STPTIMERVAL_SHIFT); 122 reg = TX39_POWERCTRL_STPTIMERVAL_SET(reg, 1); 123 124 reg |= TX39_POWERCTRL_ENSTPTIMER; 125 tx_conf_write(tc, TX39_POWERCTRL_REG, reg); 126 127 tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_POSPWRINT), 128 IST_EDGE, IPL_CLOCK, 129 tx39power_intr_p, sc); 130 tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_NEGPWRINT), 131 IST_EDGE, IPL_CLOCK, 132 tx39power_intr_n, sc); 133 tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_POSPWROKINT), 134 IST_EDGE, IPL_CLOCK, 135 tx39power_ok_intr_p, sc); 136 tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_NEGPWROKINT), 137 IST_EDGE, IPL_CLOCK, 138 tx39power_ok_intr_n, sc); 139 tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_POSONBUTNINT), 140 IST_EDGE, IPL_CLOCK, 141 tx39power_button_intr_p, sc); 142 tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_NEGONBUTNINT), 143 IST_EDGE, IPL_CLOCK, 144 tx39power_button_intr_n, sc); 145 } 146 147 void 148 tx39power_suspend_cpu() /* I assume already splhigh */ 149 { 150 tx_chipset_tag_t tc = tx_conf_get_tag(); 151 struct tx39power_softc *sc = tc->tc_powert; 152 txreg_t reg, *iregs = sc->sc_icu_state; 153 154 printf ("%s: CPU sleep\n", sc->sc_dev.dv_xname); 155 __asm__ __volatile__(".set noreorder"); 156 reg = tx_conf_read(tc, TX39_POWERCTRL_REG); 157 reg |= TX39_POWERCTRL_STOPCPU; 158 #ifdef TX392X 159 reg |= TX39_POWERCTRL_WARMSTART; 160 #endif 161 /* save interrupt state */ 162 iregs[0] = tx_conf_read(tc, TX39_INTRENABLE6_REG); 163 iregs[1] = tx_conf_read(tc, TX39_INTRENABLE1_REG); 164 iregs[2] = tx_conf_read(tc, TX39_INTRENABLE2_REG); 165 iregs[3] = tx_conf_read(tc, TX39_INTRENABLE3_REG); 166 iregs[4] = tx_conf_read(tc, TX39_INTRENABLE4_REG); 167 iregs[5] = tx_conf_read(tc, TX39_INTRENABLE5_REG); 168 #ifdef TX392X 169 iregs[7] = tx_conf_read(tc, TX39_INTRENABLE7_REG); 170 iregs[8] = tx_conf_read(tc, TX39_INTRENABLE8_REG); 171 #endif 172 /* disable all interrupt (don't disable GLOBALEN) */ 173 tx_conf_write(tc, TX39_INTRENABLE6_REG, TX39_INTRENABLE6_GLOBALEN); 174 tx_conf_write(tc, TX39_INTRENABLE1_REG, 0); 175 tx_conf_write(tc, TX39_INTRENABLE2_REG, 0); 176 tx_conf_write(tc, TX39_INTRENABLE3_REG, 0); 177 tx_conf_write(tc, TX39_INTRENABLE4_REG, 0); 178 tx_conf_write(tc, TX39_INTRENABLE5_REG, 0); 179 #ifdef TX392X 180 tx_conf_write(tc, TX39_INTRENABLE7_REG, 0); 181 tx_conf_write(tc, TX39_INTRENABLE8_REG, 0); 182 #endif 183 /* enable power button interrupt only */ 184 tx_conf_write(tc, TX39_INTRCLEAR5_REG, TX39_INTRSTATUS5_NEGONBUTNINT); 185 tx_conf_write(tc, TX39_INTRENABLE5_REG, TX39_INTRSTATUS5_NEGONBUTNINT); 186 __asm__ __volatile__("sync"); 187 188 /* stop CPU clock */ 189 tx_conf_write(tc, TX39_POWERCTRL_REG, reg); 190 __asm__ __volatile__("sync"); 191 /* wait until power button pressed */ 192 /* clear interrupt */ 193 tx_conf_write(tc, TX39_INTRCLEAR5_REG, TX39_INTRSTATUS5_NEGONBUTNINT); 194 195 /* restore interrupt state */ 196 tx_conf_write(tc, TX39_INTRENABLE6_REG, iregs[0]); 197 tx_conf_write(tc, TX39_INTRENABLE1_REG, iregs[1]); 198 tx_conf_write(tc, TX39_INTRENABLE2_REG, iregs[2]); 199 tx_conf_write(tc, TX39_INTRENABLE3_REG, iregs[3]); 200 tx_conf_write(tc, TX39_INTRENABLE4_REG, iregs[4]); 201 tx_conf_write(tc, TX39_INTRENABLE5_REG, iregs[5]); 202 #ifdef TX392X 203 tx_conf_write(tc, TX39_INTRENABLE7_REG, iregs[7]); 204 tx_conf_write(tc, TX39_INTRENABLE8_REG, iregs[8]); 205 #endif 206 __asm__ __volatile__(".set reorder"); 207 208 printf ("%s: CPU wakeup\n", sc->sc_dev.dv_xname); 209 } 210 211 static int 212 tx39power_button_intr_p(void *arg) 213 { 214 config_hook_call(CONFIG_HOOK_BUTTONEVENT, 215 CONFIG_HOOK_BUTTONEVENT_POWER, 216 (void *)1 /* on */); 217 return 0; 218 } 219 220 static int 221 tx39power_button_intr_n(void *arg) 222 { 223 config_hook_call(CONFIG_HOOK_BUTTONEVENT, 224 CONFIG_HOOK_BUTTONEVENT_POWER, 225 (void *)0 /* off */); 226 return 0; 227 } 228 229 int 230 tx39power_intr_p(void *arg) 231 { 232 printf("power_p\n"); 233 return 0; 234 } 235 236 static int 237 tx39power_intr_n(void *arg) 238 { 239 printf("power_n\n"); 240 return 0; 241 } 242 243 static int 244 tx39power_ok_intr_p(void *arg) 245 { 246 printf("power NG\n"); 247 config_hook_call(CONFIG_HOOK_PMEVENT, 248 CONFIG_HOOK_PMEVENT_SUSPENDREQ, NULL); 249 return 0; 250 } 251 252 static int 253 tx39power_ok_intr_n(void *arg) 254 { 255 printf("power OK\n"); 256 return 0; 257 } 258 259 #ifdef TX39POWERDEBUG 260 static void 261 __tx39power_dump (struct tx39power_softc *sc) 262 { 263 tx_chipset_tag_t tc = sc->sc_tc; 264 265 reg = tx_conf_read(tc, TX39_POWERCTRL_REG); 266 ISSETPRINT(reg, ONBUTN); 267 ISSETPRINT(reg, PWRINT); 268 ISSETPRINT(reg, PWROK); 269 #ifdef TX392X 270 ISSETPRINT(reg, PWROKNMI); 271 #endif /* TX392X */ 272 ISSETPRINT(reg, SLOWBUS); 273 #ifdef TX391X 274 ISSETPRINT(reg, DIVMOD); 275 #endif /* TX391X */ 276 ISSETPRINT(reg, ENSTPTIMER); 277 ISSETPRINT(reg, ENFORCESHUTDWN); 278 ISSETPRINT(reg, FORCESHUTDWN); 279 ISSETPRINT(reg, FORCESHUTDWNOCC); 280 ISSETPRINT(reg, SELC2MS); 281 #ifdef TX392X 282 ISSETPRINT(reg, WARMSTART); 283 #endif /* TX392X */ 284 ISSETPRINT(reg, BPDBVCC3); 285 ISSETPRINT(reg, STOPCPU); 286 ISSETPRINT(reg, DBNCONBUTN); 287 ISSETPRINT(reg, COLDSTART); 288 ISSETPRINT(reg, PWRCS); 289 ISSETPRINT(reg, VCCON); 290 #ifdef TX391X 291 printf("VIDRF=%d ", TX39_POWERCTRL_VIDRF(reg)); 292 #endif /* TX391X */ 293 printf("STPTIMERVAL=%d ", TX39_POWERCTRL_STPTIMERVAL(reg)); 294 printf("\n"); 295 } 296 #endif /* TX39POWERDEBUG */ 297 298
Indexes created Fri Oct 31 09:09:54 GMT 2025