Home | History | Annotate | Line # | Download | only in tx
tx39sib.c revision 1.8.8.2
      1  1.8.8.2  nathanw /*	$NetBSD: tx39sib.c,v 1.8.8.2 2002/02/28 04:10:02 nathanw Exp $ */
      2  1.8.8.2  nathanw 
      3  1.8.8.2  nathanw /*-
      4  1.8.8.2  nathanw  * Copyright (c) 2000 The NetBSD Foundation, Inc.
      5  1.8.8.2  nathanw  * All rights reserved.
      6  1.8.8.2  nathanw  *
      7  1.8.8.2  nathanw  * This code is derived from software contributed to The NetBSD Foundation
      8  1.8.8.2  nathanw  * by UCHIYAMA Yasushi.
      9  1.8.8.2  nathanw  *
     10  1.8.8.2  nathanw  * Redistribution and use in source and binary forms, with or without
     11  1.8.8.2  nathanw  * modification, are permitted provided that the following conditions
     12  1.8.8.2  nathanw  * are met:
     13  1.8.8.2  nathanw  * 1. Redistributions of source code must retain the above copyright
     14  1.8.8.2  nathanw  *    notice, this list of conditions and the following disclaimer.
     15  1.8.8.2  nathanw  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.8.8.2  nathanw  *    notice, this list of conditions and the following disclaimer in the
     17  1.8.8.2  nathanw  *    documentation and/or other materials provided with the distribution.
     18  1.8.8.2  nathanw  * 3. All advertising materials mentioning features or use of this software
     19  1.8.8.2  nathanw  *    must display the following acknowledgement:
     20  1.8.8.2  nathanw  *        This product includes software developed by the NetBSD
     21  1.8.8.2  nathanw  *        Foundation, Inc. and its contributors.
     22  1.8.8.2  nathanw  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  1.8.8.2  nathanw  *    contributors may be used to endorse or promote products derived
     24  1.8.8.2  nathanw  *    from this software without specific prior written permission.
     25  1.8.8.2  nathanw  *
     26  1.8.8.2  nathanw  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  1.8.8.2  nathanw  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  1.8.8.2  nathanw  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  1.8.8.2  nathanw  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  1.8.8.2  nathanw  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  1.8.8.2  nathanw  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  1.8.8.2  nathanw  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  1.8.8.2  nathanw  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  1.8.8.2  nathanw  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  1.8.8.2  nathanw  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  1.8.8.2  nathanw  * POSSIBILITY OF SUCH DAMAGE.
     37  1.8.8.2  nathanw  */
     38  1.8.8.2  nathanw 
     39  1.8.8.2  nathanw /*
     40  1.8.8.2  nathanw  * TX39 SIB (Serial Interface Bus) module.
     41  1.8.8.2  nathanw  */
     42  1.8.8.2  nathanw #undef TX39SIBDEBUG
     43  1.8.8.2  nathanw 
     44  1.8.8.2  nathanw #include <sys/param.h>
     45  1.8.8.2  nathanw #include <sys/systm.h>
     46  1.8.8.2  nathanw #include <sys/device.h>
     47  1.8.8.2  nathanw 
     48  1.8.8.2  nathanw #include <machine/bus.h>
     49  1.8.8.2  nathanw #include <machine/intr.h>
     50  1.8.8.2  nathanw 
     51  1.8.8.2  nathanw #include <hpcmips/tx/tx39var.h>
     52  1.8.8.2  nathanw #include <hpcmips/tx/tx39icureg.h>
     53  1.8.8.2  nathanw #include <hpcmips/tx/tx39sibvar.h>
     54  1.8.8.2  nathanw #include <hpcmips/tx/tx39sibreg.h>
     55  1.8.8.2  nathanw 
     56  1.8.8.2  nathanw #include "locators.h"
     57  1.8.8.2  nathanw 
     58  1.8.8.2  nathanw #ifdef TX39SIBDEBUG
     59  1.8.8.2  nathanw int	tx39sibdebug = 0;
     60  1.8.8.2  nathanw #define	DPRINTF(arg) if (tx39sibdebug) printf arg;
     61  1.8.8.2  nathanw #else
     62  1.8.8.2  nathanw #define	DPRINTF(arg)
     63  1.8.8.2  nathanw #endif
     64  1.8.8.2  nathanw 
     65  1.8.8.2  nathanw int	tx39sib_match(struct device *, struct cfdata *, void *);
     66  1.8.8.2  nathanw void	tx39sib_attach(struct device *, struct device *, void *);
     67  1.8.8.2  nathanw int	tx39sib_print(void *, const char *);
     68  1.8.8.2  nathanw int	tx39sib_search(struct device *, struct cfdata *, void *);
     69  1.8.8.2  nathanw 
     70  1.8.8.2  nathanw #define TX39_CLK2X	18432000
     71  1.8.8.2  nathanw const int sibsclk_divide_table[8] = {
     72  1.8.8.2  nathanw 	2, 3, 4, 5, 6, 8, 10, 12
     73  1.8.8.2  nathanw };
     74  1.8.8.2  nathanw 
     75  1.8.8.2  nathanw struct tx39sib_param {
     76  1.8.8.2  nathanw 	/* SIB clock rate */
     77  1.8.8.2  nathanw 	int sp_clock;
     78  1.8.8.2  nathanw /*
     79  1.8.8.2  nathanw  *	SIBMCLK = 18.432MHz = (CLK2X /4)
     80  1.8.8.2  nathanw  *	SIBSCLK = SIBMCLK / sp_clock
     81  1.8.8.2  nathanw  *	sp_clock	start	end	divide module
     82  1.8.8.2  nathanw  *	0		7	8	2
     83  1.8.8.2  nathanw  *	1		6	8	3
     84  1.8.8.2  nathanw  *	2		6	9	4
     85  1.8.8.2  nathanw  *	3		5	9	5
     86  1.8.8.2  nathanw  *	4		5	10	6
     87  1.8.8.2  nathanw  *	5		4	11	8
     88  1.8.8.2  nathanw  *	6		3	12	10
     89  1.8.8.2  nathanw  *	7		2	13	12
     90  1.8.8.2  nathanw  */
     91  1.8.8.2  nathanw 	/* sampling rate */
     92  1.8.8.2  nathanw 	int sp_snd_rate; /* SNDFSDIV + 1 */
     93  1.8.8.2  nathanw 	int sp_tel_rate; /* TELFSDIV + 1 */
     94  1.8.8.2  nathanw /*
     95  1.8.8.2  nathanw  *	Fs = (SIBSCLK * 2) / ((FSDIV + 1) * 64)
     96  1.8.8.2  nathanw  *	FSDIV + 1	sampling rate
     97  1.8.8.2  nathanw  *	15		19.2k		(1.6% error vs. CD-XA)
     98  1.8.8.2  nathanw  *	13		22.154k		(0.47% error vs. CD-Audio)
     99  1.8.8.2  nathanw  *	22		7.85k		(1.8% error vs. 8k)
    100  1.8.8.2  nathanw  */
    101  1.8.8.2  nathanw 	/* data format 16/8bit */
    102  1.8.8.2  nathanw 	int sp_sf0sndmode;
    103  1.8.8.2  nathanw 	int sp_sf0telmode;
    104  1.8.8.2  nathanw };
    105  1.8.8.2  nathanw 
    106  1.8.8.2  nathanw struct tx39sib_param tx39sib_param_default_3912 = {
    107  1.8.8.2  nathanw 	0,			/* SIBSCLK = 9.216MHz (div2) */
    108  1.8.8.2  nathanw #if 0 /* setting sample */
    109  1.8.8.2  nathanw 	40,			/* audio: 7.2kHz */
    110  1.8.8.2  nathanw 	26,			/* audio: CD-Audio(/4) 11.077kHz*/
    111  1.8.8.2  nathanw 	6,			/* audio: 48kHz */
    112  1.8.8.2  nathanw #endif
    113  1.8.8.2  nathanw 	13,			/* audio: CD-Audio(/2 = 22.050) 22.154kHz*/
    114  1.8.8.2  nathanw 	40,			/* telecom: 7.2kHz */
    115  1.8.8.2  nathanw 	TX39_SIBCTRL_SND16,	/* Audio 16bit mono */
    116  1.8.8.2  nathanw 	TX39_SIBCTRL_TEL16	/* Telecom 16bit mono */
    117  1.8.8.2  nathanw };
    118  1.8.8.2  nathanw 
    119  1.8.8.2  nathanw struct tx39sib_param tx39sib_param_default_3922 = {
    120  1.8.8.2  nathanw 	7,			/* SIBSCLK = 9.216MHz (div1) */
    121  1.8.8.2  nathanw 	13,			/* audio: CD-Audio(/2 = 22.050) 22.154kHz*/
    122  1.8.8.2  nathanw 	40,			/* telecom: 7.2kHz */
    123  1.8.8.2  nathanw 	TX39_SIBCTRL_SND16,	/* Audio 16bit mono */
    124  1.8.8.2  nathanw 	TX39_SIBCTRL_TEL16	/* Telecom 16bit mono */
    125  1.8.8.2  nathanw };
    126  1.8.8.2  nathanw 
    127  1.8.8.2  nathanw struct tx39sib_softc {
    128  1.8.8.2  nathanw 	struct	device sc_dev;
    129  1.8.8.2  nathanw 	tx_chipset_tag_t sc_tc;
    130  1.8.8.2  nathanw 
    131  1.8.8.2  nathanw 	struct tx39sib_param sc_param;
    132  1.8.8.2  nathanw 	int sc_attached;
    133  1.8.8.2  nathanw };
    134  1.8.8.2  nathanw 
    135  1.8.8.2  nathanw __inline int	__txsibsf0_ready(tx_chipset_tag_t);
    136  1.8.8.2  nathanw #ifdef TX39SIBDEBUG
    137  1.8.8.2  nathanw void	tx39sib_dump(struct tx39sib_softc *);
    138  1.8.8.2  nathanw #endif
    139  1.8.8.2  nathanw 
    140  1.8.8.2  nathanw struct cfattach tx39sib_ca = {
    141  1.8.8.2  nathanw 	sizeof(struct tx39sib_softc), tx39sib_match, tx39sib_attach
    142  1.8.8.2  nathanw };
    143  1.8.8.2  nathanw 
    144  1.8.8.2  nathanw int
    145  1.8.8.2  nathanw tx39sib_match(struct device *parent, struct cfdata *cf, void *aux)
    146  1.8.8.2  nathanw {
    147  1.8.8.2  nathanw 	return (ATTACH_FIRST);
    148  1.8.8.2  nathanw }
    149  1.8.8.2  nathanw 
    150  1.8.8.2  nathanw void
    151  1.8.8.2  nathanw tx39sib_attach(struct device *parent, struct device *self, void *aux)
    152  1.8.8.2  nathanw {
    153  1.8.8.2  nathanw 	struct txsim_attach_args *ta = aux;
    154  1.8.8.2  nathanw 	struct tx39sib_softc *sc = (void*)self;
    155  1.8.8.2  nathanw 	tx_chipset_tag_t tc;
    156  1.8.8.2  nathanw 
    157  1.8.8.2  nathanw 	sc->sc_tc = tc = ta->ta_tc;
    158  1.8.8.2  nathanw 
    159  1.8.8.2  nathanw 	/* set default param */
    160  1.8.8.2  nathanw #ifdef TX391X
    161  1.8.8.2  nathanw 	sc->sc_param = tx39sib_param_default_3912;
    162  1.8.8.2  nathanw #endif /* TX391X */
    163  1.8.8.2  nathanw #ifdef TX392X
    164  1.8.8.2  nathanw 	sc->sc_param = tx39sib_param_default_3922;
    165  1.8.8.2  nathanw #endif /* TX392X */
    166  1.8.8.2  nathanw 
    167  1.8.8.2  nathanw #define MHZ(a) ((a) / 1000000), (((a) % 1000000) / 1000)
    168  1.8.8.2  nathanw 	printf(": %d.%03d MHz", MHZ(tx39sib_clock(self)));
    169  1.8.8.2  nathanw 
    170  1.8.8.2  nathanw 	printf("\n");
    171  1.8.8.2  nathanw #ifdef TX39SIBDEBUG
    172  1.8.8.2  nathanw 	if (tx39sibdebug)
    173  1.8.8.2  nathanw 		tx39sib_dump(sc);
    174  1.8.8.2  nathanw #endif
    175  1.8.8.2  nathanw 	/* enable subframe0 */
    176  1.8.8.2  nathanw 	tx39sib_enable1(self);
    177  1.8.8.2  nathanw 	/* enable SIB */
    178  1.8.8.2  nathanw 	tx39sib_enable2(self);
    179  1.8.8.2  nathanw 
    180  1.8.8.2  nathanw #ifdef TX39SIBDEBUG
    181  1.8.8.2  nathanw 	if (tx39sibdebug)
    182  1.8.8.2  nathanw 		tx39sib_dump(sc);
    183  1.8.8.2  nathanw #endif
    184  1.8.8.2  nathanw 
    185  1.8.8.2  nathanw 	config_search(tx39sib_search, self, tx39sib_print);
    186  1.8.8.2  nathanw }
    187  1.8.8.2  nathanw 
    188  1.8.8.2  nathanw void
    189  1.8.8.2  nathanw tx39sib_enable1(struct device *dev)
    190  1.8.8.2  nathanw {
    191  1.8.8.2  nathanw 	struct tx39sib_softc *sc = (void*)dev;
    192  1.8.8.2  nathanw 	struct tx39sib_param *param = &sc->sc_param;
    193  1.8.8.2  nathanw 	tx_chipset_tag_t tc = sc->sc_tc;
    194  1.8.8.2  nathanw 
    195  1.8.8.2  nathanw 	txreg_t reg;
    196  1.8.8.2  nathanw 
    197  1.8.8.2  nathanw 	/* disable SIB */
    198  1.8.8.2  nathanw 	tx39sib_disable(dev);
    199  1.8.8.2  nathanw 
    200  1.8.8.2  nathanw 	/* setup */
    201  1.8.8.2  nathanw 	reg = 0;
    202  1.8.8.2  nathanw 	/*  SIB clock rate */
    203  1.8.8.2  nathanw 	reg = TX39_SIBCTRL_SCLKDIV_SET(reg, param->sp_clock);
    204  1.8.8.2  nathanw 	/*  sampling rate (sound) */
    205  1.8.8.2  nathanw 	reg = TX39_SIBCTRL_SNDFSDIV_SET(reg, param->sp_snd_rate - 1);
    206  1.8.8.2  nathanw 	/*  sampling rate (telecom) */
    207  1.8.8.2  nathanw 	reg = TX39_SIBCTRL_TELFSDIV_SET(reg, param->sp_tel_rate - 1);
    208  1.8.8.2  nathanw 	/*  data format (8/16bit) */
    209  1.8.8.2  nathanw 	reg |= param->sp_sf0sndmode;
    210  1.8.8.2  nathanw 	reg |= param->sp_sf0telmode;
    211  1.8.8.2  nathanw 	tx_conf_write(tc, TX39_SIBCTRL_REG, reg);
    212  1.8.8.2  nathanw 
    213  1.8.8.2  nathanw 	/* DMA */
    214  1.8.8.2  nathanw 	reg = tx_conf_read(tc, TX39_SIBDMACTRL_REG);
    215  1.8.8.2  nathanw 	reg &= ~(TX39_SIBDMACTRL_ENDMARXSND |
    216  1.8.8.2  nathanw 	    TX39_SIBDMACTRL_ENDMATXSND |
    217  1.8.8.2  nathanw 	    TX39_SIBDMACTRL_ENDMARXTEL |
    218  1.8.8.2  nathanw 	    TX39_SIBDMACTRL_ENDMATXTEL);
    219  1.8.8.2  nathanw 	tx_conf_write(tc, TX39_SIBDMACTRL_REG, reg);
    220  1.8.8.2  nathanw 
    221  1.8.8.2  nathanw 	/*
    222  1.8.8.2  nathanw 	 * Enable subframe0 (BETTY)
    223  1.8.8.2  nathanw 	 */
    224  1.8.8.2  nathanw 	reg = tx_conf_read(tc, TX39_SIBCTRL_REG);
    225  1.8.8.2  nathanw 	reg |= TX39_SIBCTRL_ENSF0;
    226  1.8.8.2  nathanw 	tx_conf_write(tc, TX39_SIBCTRL_REG, reg);
    227  1.8.8.2  nathanw }
    228  1.8.8.2  nathanw 
    229  1.8.8.2  nathanw void
    230  1.8.8.2  nathanw tx39sib_enable2(struct device *dev)
    231  1.8.8.2  nathanw {
    232  1.8.8.2  nathanw 	struct tx39sib_softc *sc = (void*)dev;
    233  1.8.8.2  nathanw 	tx_chipset_tag_t tc = sc->sc_tc;
    234  1.8.8.2  nathanw 	txreg_t reg;
    235  1.8.8.2  nathanw 
    236  1.8.8.2  nathanw 	reg = tx_conf_read(tc, TX39_SIBCTRL_REG);
    237  1.8.8.2  nathanw 	reg |= TX39_SIBCTRL_ENSIB;
    238  1.8.8.2  nathanw 	tx_conf_write(tc, TX39_SIBCTRL_REG, reg);
    239  1.8.8.2  nathanw }
    240  1.8.8.2  nathanw 
    241  1.8.8.2  nathanw void
    242  1.8.8.2  nathanw tx39sib_disable(struct device *dev)
    243  1.8.8.2  nathanw {
    244  1.8.8.2  nathanw 	struct tx39sib_softc *sc = (void*)dev;
    245  1.8.8.2  nathanw 	tx_chipset_tag_t tc = sc->sc_tc;
    246  1.8.8.2  nathanw 	txreg_t reg;
    247  1.8.8.2  nathanw 	/* disable codec side */
    248  1.8.8.2  nathanw 	/* notyet */
    249  1.8.8.2  nathanw 
    250  1.8.8.2  nathanw 	/* disable TX39 side */
    251  1.8.8.2  nathanw 	reg = tx_conf_read(tc, TX39_SIBCTRL_REG);
    252  1.8.8.2  nathanw 	reg &= ~(TX39_SIBCTRL_ENTEL | TX39_SIBCTRL_ENSND);
    253  1.8.8.2  nathanw 	tx_conf_write(tc, TX39_SIBCTRL_REG, reg);
    254  1.8.8.2  nathanw 
    255  1.8.8.2  nathanw 	/*
    256  1.8.8.2  nathanw 	 * Disable subframe0/1 (BETTY/external codec)
    257  1.8.8.2  nathanw 	 */
    258  1.8.8.2  nathanw 	reg = tx_conf_read(tc, TX39_SIBCTRL_REG);
    259  1.8.8.2  nathanw 	reg &= ~TX39_SIBCTRL_ENSF0;
    260  1.8.8.2  nathanw 	reg &= ~(TX39_SIBCTRL_ENSF1 | TX39_SIBCTRL_SELTELSF1 |
    261  1.8.8.2  nathanw 	    TX39_SIBCTRL_SELSNDSF1);
    262  1.8.8.2  nathanw 	tx_conf_write(tc, TX39_SIBCTRL_REG, reg);
    263  1.8.8.2  nathanw 
    264  1.8.8.2  nathanw 	/* disable TX39SIB module */
    265  1.8.8.2  nathanw 	reg &= ~TX39_SIBCTRL_ENSIB;
    266  1.8.8.2  nathanw 	tx_conf_write(tc, TX39_SIBCTRL_REG, reg);
    267  1.8.8.2  nathanw }
    268  1.8.8.2  nathanw 
    269  1.8.8.2  nathanw int
    270  1.8.8.2  nathanw tx39sib_clock(struct device *dev)
    271  1.8.8.2  nathanw {
    272  1.8.8.2  nathanw 	struct tx39sib_softc *sc = (void*)dev;
    273  1.8.8.2  nathanw 
    274  1.8.8.2  nathanw 	return (TX39_CLK2X / sibsclk_divide_table[sc->sc_param.sp_clock]);
    275  1.8.8.2  nathanw }
    276  1.8.8.2  nathanw 
    277  1.8.8.2  nathanw int
    278  1.8.8.2  nathanw tx39sib_search(struct device *parent, struct cfdata *cf, void *aux)
    279  1.8.8.2  nathanw {
    280  1.8.8.2  nathanw 	struct tx39sib_softc *sc = (void*)parent;
    281  1.8.8.2  nathanw 	struct txsib_attach_args sa;
    282  1.8.8.2  nathanw 
    283  1.8.8.2  nathanw 	sa.sa_tc	= sc->sc_tc;
    284  1.8.8.2  nathanw 	sa.sa_slot	= cf->cf_loc[TXSIBIFCF_SLOT];
    285  1.8.8.2  nathanw 	sa.sa_snd_rate	= sc->sc_param.sp_snd_rate;
    286  1.8.8.2  nathanw 	sa.sa_tel_rate	= sc->sc_param.sp_tel_rate;
    287  1.8.8.2  nathanw 
    288  1.8.8.2  nathanw 	if (sa.sa_slot == TXSIBIFCF_SLOT_DEFAULT) {
    289  1.8.8.2  nathanw 		printf("tx39sib_search: wildcarded slot, skipping\n");
    290  1.8.8.2  nathanw 		return (0);
    291  1.8.8.2  nathanw 	}
    292  1.8.8.2  nathanw 
    293  1.8.8.2  nathanw 	if (!(sc->sc_attached & (1 << sa.sa_slot)) &&/* not attached slot */
    294  1.8.8.2  nathanw 	    (*cf->cf_attach->ca_match)(parent, cf, &sa)) {
    295  1.8.8.2  nathanw 		config_attach(parent, cf, &sa, tx39sib_print);
    296  1.8.8.2  nathanw 		sc->sc_attached |= (1 << sa.sa_slot);
    297  1.8.8.2  nathanw 	}
    298  1.8.8.2  nathanw 
    299  1.8.8.2  nathanw 	return (0);
    300  1.8.8.2  nathanw }
    301  1.8.8.2  nathanw 
    302  1.8.8.2  nathanw int
    303  1.8.8.2  nathanw tx39sib_print(void *aux, const char *pnp)
    304  1.8.8.2  nathanw {
    305  1.8.8.2  nathanw 	struct txsib_attach_args *sa = aux;
    306  1.8.8.2  nathanw 
    307  1.8.8.2  nathanw 	printf(" slot %d", sa->sa_slot);
    308  1.8.8.2  nathanw 
    309  1.8.8.2  nathanw 	return (QUIET);
    310  1.8.8.2  nathanw }
    311  1.8.8.2  nathanw 
    312  1.8.8.2  nathanw /*
    313  1.8.8.2  nathanw  * sync access method. don't use runtime.
    314  1.8.8.2  nathanw  */
    315  1.8.8.2  nathanw 
    316  1.8.8.2  nathanw __inline__ int
    317  1.8.8.2  nathanw __txsibsf0_ready(tx_chipset_tag_t tc)
    318  1.8.8.2  nathanw {
    319  1.8.8.2  nathanw 	int i;
    320  1.8.8.2  nathanw 
    321  1.8.8.2  nathanw 	tx_conf_write(tc, TX39_INTRSTATUS1_REG, TX39_INTRSTATUS1_SIBSF0INT);
    322  1.8.8.2  nathanw 	for (i = 0; (!(tx_conf_read(tc, TX39_INTRSTATUS1_REG) &
    323  1.8.8.2  nathanw 	    TX39_INTRSTATUS1_SIBSF0INT)) && i < 1000; i++) {
    324  1.8.8.2  nathanw 		if (i > 100 && !(i % 100)) {
    325  1.8.8.2  nathanw 			printf("sf0 busy loop: retry count %d\n", i);
    326  1.8.8.2  nathanw 		}
    327  1.8.8.2  nathanw 	}
    328  1.8.8.2  nathanw 
    329  1.8.8.2  nathanw 	if (i >= 1000) {
    330  1.8.8.2  nathanw 		printf("sf0 busy\n");
    331  1.8.8.2  nathanw 		return (0);
    332  1.8.8.2  nathanw 	}
    333  1.8.8.2  nathanw 
    334  1.8.8.2  nathanw 	return (1);
    335  1.8.8.2  nathanw }
    336  1.8.8.2  nathanw 
    337  1.8.8.2  nathanw void
    338  1.8.8.2  nathanw txsibsf0_reg_write(tx_chipset_tag_t tc, int addr, u_int16_t val)
    339  1.8.8.2  nathanw {
    340  1.8.8.2  nathanw 	txreg_t reg;
    341  1.8.8.2  nathanw 
    342  1.8.8.2  nathanw 	reg = txsibsf0_read(tc, addr);
    343  1.8.8.2  nathanw 	reg |= TX39_SIBSF0_WRITE;
    344  1.8.8.2  nathanw 	TX39_SIBSF0_REGDATA_CLR(reg);
    345  1.8.8.2  nathanw 	reg = TX39_SIBSF0_REGDATA_SET(reg, val);
    346  1.8.8.2  nathanw 
    347  1.8.8.2  nathanw 	__txsibsf0_ready(tc);
    348  1.8.8.2  nathanw 	tx_conf_write(tc, TX39_SIBSF0CTRL_REG, reg);
    349  1.8.8.2  nathanw }
    350  1.8.8.2  nathanw 
    351  1.8.8.2  nathanw u_int16_t
    352  1.8.8.2  nathanw txsibsf0_reg_read(tx_chipset_tag_t tc, int addr)
    353  1.8.8.2  nathanw {
    354  1.8.8.2  nathanw 	return (TX39_SIBSF0_REGDATA(txsibsf0_read(tc, addr)));
    355  1.8.8.2  nathanw }
    356  1.8.8.2  nathanw 
    357  1.8.8.2  nathanw u_int32_t
    358  1.8.8.2  nathanw txsibsf0_read(tx_chipset_tag_t tc, int addr)
    359  1.8.8.2  nathanw {
    360  1.8.8.2  nathanw 	txreg_t reg;
    361  1.8.8.2  nathanw 	int retry = 3;
    362  1.8.8.2  nathanw 
    363  1.8.8.2  nathanw 	do {
    364  1.8.8.2  nathanw 		reg = TX39_SIBSF0_REGADDR_SET(0, addr);
    365  1.8.8.2  nathanw 		__txsibsf0_ready(tc);
    366  1.8.8.2  nathanw 		tx_conf_write(tc, TX39_SIBSF0CTRL_REG, reg);
    367  1.8.8.2  nathanw 
    368  1.8.8.2  nathanw 		__txsibsf0_ready(tc);
    369  1.8.8.2  nathanw 		reg = tx_conf_read(tc, TX39_SIBSF0STAT_REG);
    370  1.8.8.2  nathanw 
    371  1.8.8.2  nathanw 	} while ((TX39_SIBSF0_REGADDR(reg) != addr) && --retry > 0);
    372  1.8.8.2  nathanw 
    373  1.8.8.2  nathanw 	if (retry <= 0)
    374  1.8.8.2  nathanw 		printf("txsibsf0_read: command failed\n");
    375  1.8.8.2  nathanw 
    376  1.8.8.2  nathanw 	return (reg);
    377  1.8.8.2  nathanw }
    378  1.8.8.2  nathanw 
    379  1.8.8.2  nathanw #ifdef TX39SIBDEBUG
    380  1.8.8.2  nathanw #define ISSETPRINT_CTRL(r, m)						\
    381  1.8.8.2  nathanw 	dbg_bitmask_print(r, TX39_SIBCTRL_##m, #m)
    382  1.8.8.2  nathanw #define ISSETPRINT_DMACTRL(r, m)					\
    383  1.8.8.2  nathanw 	dbg_bitmask_print(r, TX39_SIBDMACTRL_##m, #m)
    384  1.8.8.2  nathanw 
    385  1.8.8.2  nathanw void
    386  1.8.8.2  nathanw tx39sib_dump(struct tx39sib_softc *sc)
    387  1.8.8.2  nathanw {
    388  1.8.8.2  nathanw 	tx_chipset_tag_t tc = sc->sc_tc;
    389  1.8.8.2  nathanw 	txreg_t reg;
    390  1.8.8.2  nathanw 
    391  1.8.8.2  nathanw 	reg = tx_conf_read(tc, TX39_SIBCTRL_REG);
    392  1.8.8.2  nathanw 	ISSETPRINT_CTRL(reg, SIBIRQ);
    393  1.8.8.2  nathanw 	ISSETPRINT_CTRL(reg, ENCNTTEST);
    394  1.8.8.2  nathanw 	ISSETPRINT_CTRL(reg, ENDMATEST);
    395  1.8.8.2  nathanw 	ISSETPRINT_CTRL(reg, SNDMONO);
    396  1.8.8.2  nathanw 	ISSETPRINT_CTRL(reg, RMONOSNDIN);
    397  1.8.8.2  nathanw 	ISSETPRINT_CTRL(reg, TEL16);
    398  1.8.8.2  nathanw 	ISSETPRINT_CTRL(reg, SND16);
    399  1.8.8.2  nathanw 	ISSETPRINT_CTRL(reg, SELTELSF1);
    400  1.8.8.2  nathanw 	ISSETPRINT_CTRL(reg, SELSNDSF1);
    401  1.8.8.2  nathanw 	ISSETPRINT_CTRL(reg, ENTEL);
    402  1.8.8.2  nathanw 	ISSETPRINT_CTRL(reg, ENSND);
    403  1.8.8.2  nathanw 	ISSETPRINT_CTRL(reg, SIBLOOP);
    404  1.8.8.2  nathanw 	ISSETPRINT_CTRL(reg, ENSF1);
    405  1.8.8.2  nathanw 	ISSETPRINT_CTRL(reg, ENSF0);
    406  1.8.8.2  nathanw 	ISSETPRINT_CTRL(reg, ENSIB);
    407  1.8.8.2  nathanw 	printf("\n");
    408  1.8.8.2  nathanw 	printf("SCLKDIV %d\n", TX39_SIBCTRL_SCLKDIV(reg));
    409  1.8.8.2  nathanw 	printf("TELFSDIV %d\n", TX39_SIBCTRL_TELFSDIV(reg));
    410  1.8.8.2  nathanw 	printf("SNDFSDIV %d\n", TX39_SIBCTRL_SNDFSDIV(reg));
    411  1.8.8.2  nathanw 
    412  1.8.8.2  nathanw 	reg = tx_conf_read(tc, TX39_SIBDMACTRL_REG);
    413  1.8.8.2  nathanw 	ISSETPRINT_DMACTRL(reg, SNDBUFF1TIME);
    414  1.8.8.2  nathanw 	ISSETPRINT_DMACTRL(reg, SNDDMALOOP);
    415  1.8.8.2  nathanw 	ISSETPRINT_DMACTRL(reg, ENDMARXSND);
    416  1.8.8.2  nathanw 	ISSETPRINT_DMACTRL(reg, ENDMATXSND);
    417  1.8.8.2  nathanw 	ISSETPRINT_DMACTRL(reg, TELBUFF1TIME);
    418  1.8.8.2  nathanw 	ISSETPRINT_DMACTRL(reg, TELDMALOOP);
    419  1.8.8.2  nathanw 	ISSETPRINT_DMACTRL(reg, ENDMARXTEL);
    420  1.8.8.2  nathanw 	ISSETPRINT_DMACTRL(reg, ENDMATXTEL);
    421  1.8.8.2  nathanw 	printf("\n");
    422  1.8.8.2  nathanw 	printf("SNDDMAPTR %d\n", TX39_SIBDMACTRL_TELDMAPTR(reg));
    423  1.8.8.2  nathanw 	printf("TELDMAPTR %d\n", TX39_SIBDMACTRL_SNDDMAPTR(reg));
    424  1.8.8.2  nathanw 
    425  1.8.8.2  nathanw }
    426  1.8.8.2  nathanw #endif /* TX39SIBDEBUG */
    427