tx39timerreg.h revision 1.2.2.2
1 1.2.2.2 wrstuden /* $NetBSD: tx39timerreg.h,v 1.2.2.2 1999/12/27 18:32:13 wrstuden Exp $ */ 2 1.2.2.2 wrstuden 3 1.2.2.2 wrstuden /* 4 1.2.2.2 wrstuden * Copyright (c) 1999, by UCHIYAMA Yasushi 5 1.2.2.2 wrstuden * All rights reserved. 6 1.2.2.2 wrstuden * 7 1.2.2.2 wrstuden * Redistribution and use in source and binary forms, with or without 8 1.2.2.2 wrstuden * modification, are permitted provided that the following conditions 9 1.2.2.2 wrstuden * are met: 10 1.2.2.2 wrstuden * 1. Redistributions of source code must retain the above copyright 11 1.2.2.2 wrstuden * notice, this list of conditions and the following disclaimer. 12 1.2.2.2 wrstuden * 2. The name of the developer may NOT be used to endorse or promote products 13 1.2.2.2 wrstuden * derived from this software without specific prior written permission. 14 1.2.2.2 wrstuden * 15 1.2.2.2 wrstuden * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 1.2.2.2 wrstuden * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 1.2.2.2 wrstuden * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 1.2.2.2 wrstuden * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 1.2.2.2 wrstuden * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 1.2.2.2 wrstuden * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 1.2.2.2 wrstuden * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 1.2.2.2 wrstuden * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 1.2.2.2 wrstuden * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 1.2.2.2 wrstuden * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 1.2.2.2 wrstuden * SUCH DAMAGE. 26 1.2.2.2 wrstuden * 27 1.2.2.2 wrstuden */ 28 1.2.2.2 wrstuden /* 29 1.2.2.2 wrstuden * Toshiba TX3912/3922 Timer module 30 1.2.2.2 wrstuden */ 31 1.2.2.2 wrstuden 32 1.2.2.2 wrstuden #define TX39_TIMERRTCHI_REG 0x140 33 1.2.2.2 wrstuden #define TX39_TIMERRTCLO_REG 0x140 34 1.2.2.2 wrstuden #define TX39_TIMERALARMHI_REG 0x148 35 1.2.2.2 wrstuden #define TX39_TIMERALARMLO_REG 0x14C 36 1.2.2.2 wrstuden #define TX39_TIMERCONTROL_REG 0x150 37 1.2.2.2 wrstuden #define TX39_TIMERPERIODIC_REG 0x154 38 1.2.2.2 wrstuden 39 1.2.2.2 wrstuden /* 40 1.2.2.2 wrstuden * RTC Register High/Low 41 1.2.2.2 wrstuden */ 42 1.2.2.2 wrstuden /* R */ 43 1.2.2.2 wrstuden #define TX39_TIMERRTCHI_SHIFT 0 44 1.2.2.2 wrstuden #ifdef TX391X 45 1.2.2.2 wrstuden #define TX39_TIMERRTCHI_MASK 0xff 46 1.2.2.2 wrstuden #endif /* TX391X */ 47 1.2.2.2 wrstuden #ifdef TX392X 48 1.2.2.2 wrstuden #define TX39_TIMERRTCHI_MASK 0x7ff 49 1.2.2.2 wrstuden #endif /* TX392X */ 50 1.2.2.2 wrstuden 51 1.2.2.2 wrstuden #define TX39_TIMERRTCHI(cr) \ 52 1.2.2.2 wrstuden (((cr) >> TX39_TIMERRTCHI_SHIFT) & \ 53 1.2.2.2 wrstuden TX39_TIMERRTCLO_MASK) 54 1.2.2.2 wrstuden 55 1.2.2.2 wrstuden /* 56 1.2.2.2 wrstuden * Alarm Register High/Low 57 1.2.2.2 wrstuden */ 58 1.2.2.2 wrstuden /* R/W */ 59 1.2.2.2 wrstuden #ifdef TX391X 60 1.2.2.2 wrstuden #define TX39_TIMERALARMHI_SHIFT 0 61 1.2.2.2 wrstuden #define TX39_TIMERALARMHI_MASK 0xff 62 1.2.2.2 wrstuden #define TX39_TIMERALARMHI(cr) \ 63 1.2.2.2 wrstuden (((cr) >> TX39_TIMERALARMHI_SHIFT) & \ 64 1.2.2.2 wrstuden TX39_TIMERALARMHI_MASK) 65 1.2.2.2 wrstuden #define TX39_TIMERALARMHI_SET(cr, val) \ 66 1.2.2.2 wrstuden ((cr) | (((val) << TX39_TIMERALARMHI_SHIFT) & \ 67 1.2.2.2 wrstuden (TX39_TIMERALARMHI_MASK << TX39_TIMERALARMHI_SHIFT))) 68 1.2.2.2 wrstuden #endif /* TX391X */ 69 1.2.2.2 wrstuden #ifdef TX392X 70 1.2.2.2 wrstuden #define TX39_TIMERALARMHI_SHIFT 0 71 1.2.2.2 wrstuden #define TX39_TIMERALARMHI_MASK 0x7ff 72 1.2.2.2 wrstuden #define TX39_TIMERALARMHI(cr) \ 73 1.2.2.2 wrstuden (((cr) >> TX39_TIMERALARMHI_SHIFT) & \ 74 1.2.2.2 wrstuden TX39_TIMERALARMHI_MASK) 75 1.2.2.2 wrstuden #define TX39_TIMERALARMHI_SET(cr, val) \ 76 1.2.2.2 wrstuden ((cr) | (((val) << TX39_TIMERALARMHI_SHIFT) & \ 77 1.2.2.2 wrstuden (TX39_TIMERALARMHI_MASK << TX39_TIMERALARMHI_SHIFT))) 78 1.2.2.2 wrstuden #endif /* TX392X */ 79 1.2.2.2 wrstuden /* 80 1.2.2.2 wrstuden * Timer Control Register 81 1.2.2.2 wrstuden */ 82 1.2.2.2 wrstuden #define TX39_TIMERCONTROL_FREEZEPRE 0x00000080 83 1.2.2.2 wrstuden #define TX39_TIMERCONTROL_FREEZERTC 0x00000040 84 1.2.2.2 wrstuden #define TX39_TIMERCONTROL_FREEZETIMER 0x00000020 85 1.2.2.2 wrstuden #define TX39_TIMERCONTROL_ENPERTIMER 0x00000010 86 1.2.2.2 wrstuden #define TX39_TIMERCONTROL_RTCCLR 0x00000008 /* Don't set */ 87 1.2.2.2 wrstuden #define TX39_TIMERCONTROL_TESTCMS 0x00000004 /* Don't set */ 88 1.2.2.2 wrstuden #define TX39_TIMERCONTROL_ENTESTCLK 0x00000002 89 1.2.2.2 wrstuden #define TX39_TIMERCONTROL_ENRTCTST 0x00000001 90 1.2.2.2 wrstuden 91 1.2.2.2 wrstuden /* 92 1.2.2.2 wrstuden * Periodic Timer Register 93 1.2.2.2 wrstuden */ 94 1.2.2.2 wrstuden /* R */ 95 1.2.2.2 wrstuden #define TX39_TIMERPERIODIC_PERCNT_SHIFT 15 96 1.2.2.2 wrstuden #define TX39_TIMERPERIODIC_PERCNT_MASK 0xffff 97 1.2.2.2 wrstuden #define TX39_TIMERPERIODIC_PERCNT(cr) \ 98 1.2.2.2 wrstuden (((cr) >> TX39_TIMERPERIODIC_PERCNT_SHIFT) & \ 99 1.2.2.2 wrstuden TX39_TIMERPERIODIC_PERCNT_MASK) 100 1.2.2.2 wrstuden /* R/W */ 101 1.2.2.2 wrstuden #define TX39_TIMERPERIODIC_PERVAL_SHIFT 0 102 1.2.2.2 wrstuden #define TX39_TIMERPERIODIC_PERVAL_MASK 0xffff 103 1.2.2.2 wrstuden #define TX39_TIMERPERIODIC_PERVAL(cr) \ 104 1.2.2.2 wrstuden (((cr) >> TX39_TIMERPERIODIC_PERVAL_SHIFT) & \ 105 1.2.2.2 wrstuden TX39_TIMERPERIODIC_PERVAL_MASK) 106 1.2.2.2 wrstuden #define TX39_TIMERPERIODIC_PERVAL_SET(cr, val) \ 107 1.2.2.2 wrstuden ((cr) | (((val) << TX39_TIMERPERIODIC_PERVAL_SHIFT) & \ 108 1.2.2.2 wrstuden (TX39_TIMERPERIODIC_PERVAL_MASK << TX39_TIMERPERIODIC_PERVAL_SHIFT))) 109 1.2.2.2 wrstuden #define TX39_TIMERPERIODIC_INTRRATE(val) \ 110 1.2.2.2 wrstuden ((val) + 1)/1150000 /* unit:Hz */ 111
Indexes created Tue Nov 04 21:09:52 GMT 2025