tx39timerreg.h revision 1.1 1 /* $NetBSD: tx39timerreg.h,v 1.1 1999/11/20 19:56:37 uch Exp $ */
2
3 /*
4 * Copyright (c) 1999, by UCHIYAMA Yasushi
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. The name of the developer may NOT be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 */
28 /*
29 * Toshiba TX3912/3922 Timer module
30 */
31
32 #define TX39_TIMERRTCHI_REG 0x140
33 #define TX39_TIMERRTCLO_REG 0x140
34 #define TX39_TIMERALARMHI_REG 0x148
35 #define TX39_TIMERALARMLO_REG 0x14C
36 #define TX39_TIMERCONTROL_REG 0x150
37 #define TX39_TIMERPERIODIC_REG 0x154
38
39 /*
40 * RTC Register High/Low
41 */
42 /* R */
43 #define TX39_TIMERRTCHI_SHIFT 0
44 #ifdef TX391X
45 #define TX39_TIMERRTCHI_MASK 0xff
46 #endif /* TX391X */
47 #ifdef TX392X
48 #define TX39_TIMERRTCHI_MASK 0x7ff
49 #endif /* TX392X */
50
51 #define TX39_TIMERRTCHI(cr) \
52 (((cr) >> TX39_TIMERRTCHI_SHIFT) & \
53 TX39_TIMERRTCLO_MASK)
54
55 /*
56 * Alarm Register High/Low
57 */
58 /* R/W */
59 #ifdef TX391X
60 #define TX39_TIMERALARMHI_SHIFT 0
61 #define TX39_TIMERALARMHI_MASK 0xff
62 #define TX39_TIMERALARMHI(cr) \
63 (((cr) >> TX39_TIMERALARMHI_SHIFT) & \
64 TX39_TIMERALARMHI_MASK)
65 #define TX39_TIMERALARMHI_SET(cr, val) \
66 ((cr) | (((val) << TX39_TIMERALARMHI_SHIFT) & \
67 (TX39_TIMERALARMHI_MASK << TX39_TIMERALARMHI_SHIFT)))
68 #endif /* TX391X */
69 #ifdef TX392X
70 #define TX39_TIMERALARMHI_SHIFT 0
71 #define TX39_TIMERALARMHI_MASK 0x7ff
72 #define TX39_TIMERALARMHI(cr) \
73 (((cr) >> TX39_TIMERALARMHI_SHIFT) & \
74 TX39_TIMERALARMHI_MASK)
75 #define TX39_TIMERALARMHI_SET(cr, val) \
76 ((cr) | (((val) << TX39_TIMERALARMHI_SHIFT) & \
77 (TX39_TIMERALARMHI_MASK << TX39_TIMERALARMHI_SHIFT)))
78 #endif /* TX392X */
79 /*
80 * Timer Control Register
81 */
82 #define TX39_TIMERCONTROL_FREEZEPRE 0x00000080
83 #define TX39_TIMERCONTROL_FREEZERTC 0x00000040
84 #define TX39_TIMERCONTROL_FREEZETIMER 0x00000020
85 #define TX39_TIMERCONTROL_ENPERTIMER 0x00000010
86 #define TX39_TIMERCONTROL_RTCCLR 0x00000008 /* Don't set */
87 #define TX39_TIMERCONTROL_TESTCMS 0x00000004 /* Don't set */
88 #define TX39_TIMERCONTROL_ENTESTCLK 0x00000002
89 #define TX39_TIMERCONTROL_ENRTCTST 0x00000001
90
91 /*
92 * Periodic Timer Register
93 */
94 /* R */
95 #define TX39_TIMERPERIODIC_PERCNT_SHIFT 15
96 #define TX39_TIMERPERIODIC_PERCNT_MASK 0xffff
97 #define TX39_TIMERPERIODIC_PERCNT(cr) \
98 (((cr) >> TX39_TIMERPERIODIC_PERCNT_SHIFT) & \
99 TX39_TIMERPERIODIC_PERCNT_MASK)
100 /* R/W */
101 #define TX39_TIMERPERIODIC_PERVAL_SHIFT 0
102 #define TX39_TIMERPERIODIC_PERVAL_MASK 0xffff
103 #define TX39_TIMERPERIODIC_PERVAL(cr) \
104 (((cr) >> TX39_TIMERPERIODIC_PERVAL_SHIFT) & \
105 TX39_TIMERPERIODIC_PERVAL_MASK)
106 #define TX39_TIMERPERIODIC_PERVAL_SET(cr, val) \
107 ((cr) | (((val) << TX39_TIMERPERIODIC_PERVAL_SHIFT) & \
108 (TX39_TIMERPERIODIC_PERVAL_MASK << TX39_TIMERPERIODIC_PERVAL_SHIFT)))
109 #define TX39_TIMERPERIODIC_INTRRATE(val) \
110 ((val) + 1)/1150000 /* unit:Hz */
111