txcom.c revision 1.10.2.2
1 1.10.2.2 bouyer /* $NetBSD: txcom.c,v 1.10.2.2 2000/11/20 20:47:38 bouyer Exp $ */ 2 1.10.2.2 bouyer 3 1.10.2.2 bouyer /*- 4 1.10.2.2 bouyer * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 5 1.10.2.2 bouyer * All rights reserved. 6 1.10.2.2 bouyer * 7 1.10.2.2 bouyer * This code is derived from software contributed to The NetBSD Foundation 8 1.10.2.2 bouyer * by UCHIYAMA Yasushi. 9 1.10.2.2 bouyer * 10 1.10.2.2 bouyer * Redistribution and use in source and binary forms, with or without 11 1.10.2.2 bouyer * modification, are permitted provided that the following conditions 12 1.10.2.2 bouyer * are met: 13 1.10.2.2 bouyer * 1. Redistributions of source code must retain the above copyright 14 1.10.2.2 bouyer * notice, this list of conditions and the following disclaimer. 15 1.10.2.2 bouyer * 2. Redistributions in binary form must reproduce the above copyright 16 1.10.2.2 bouyer * notice, this list of conditions and the following disclaimer in the 17 1.10.2.2 bouyer * documentation and/or other materials provided with the distribution. 18 1.10.2.2 bouyer * 3. All advertising materials mentioning features or use of this software 19 1.10.2.2 bouyer * must display the following acknowledgement: 20 1.10.2.2 bouyer * This product includes software developed by the NetBSD 21 1.10.2.2 bouyer * Foundation, Inc. and its contributors. 22 1.10.2.2 bouyer * 4. Neither the name of The NetBSD Foundation nor the names of its 23 1.10.2.2 bouyer * contributors may be used to endorse or promote products derived 24 1.10.2.2 bouyer * from this software without specific prior written permission. 25 1.10.2.2 bouyer * 26 1.10.2.2 bouyer * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 1.10.2.2 bouyer * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 1.10.2.2 bouyer * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 1.10.2.2 bouyer * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 1.10.2.2 bouyer * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 1.10.2.2 bouyer * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 1.10.2.2 bouyer * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 1.10.2.2 bouyer * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 1.10.2.2 bouyer * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 1.10.2.2 bouyer * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 1.10.2.2 bouyer * POSSIBILITY OF SUCH DAMAGE. 37 1.10.2.2 bouyer */ 38 1.10.2.2 bouyer #include "opt_tx39_debug.h" 39 1.10.2.2 bouyer #include "opt_tx39uartdebug.h" 40 1.10.2.2 bouyer 41 1.10.2.2 bouyer #include <sys/param.h> 42 1.10.2.2 bouyer #include <sys/systm.h> 43 1.10.2.2 bouyer #include <sys/kernel.h> 44 1.10.2.2 bouyer #include <sys/device.h> 45 1.10.2.2 bouyer #include <sys/malloc.h> 46 1.10.2.2 bouyer 47 1.10.2.2 bouyer #include <sys/proc.h> /* tsleep/wakeup */ 48 1.10.2.2 bouyer 49 1.10.2.2 bouyer #include <sys/ioctl.h> 50 1.10.2.2 bouyer #include <sys/select.h> 51 1.10.2.2 bouyer #include <sys/file.h> 52 1.10.2.2 bouyer 53 1.10.2.2 bouyer #include <sys/tty.h> 54 1.10.2.2 bouyer #include <sys/conf.h> 55 1.10.2.2 bouyer #include <dev/cons.h> /* consdev */ 56 1.10.2.2 bouyer 57 1.10.2.2 bouyer #include <machine/bus.h> 58 1.10.2.2 bouyer #include <machine/config_hook.h> 59 1.10.2.2 bouyer 60 1.10.2.2 bouyer #include <hpcmips/tx/tx39var.h> 61 1.10.2.2 bouyer #include <hpcmips/tx/tx39icureg.h> 62 1.10.2.2 bouyer #include <hpcmips/tx/tx39uartvar.h> 63 1.10.2.2 bouyer #include <hpcmips/tx/tx39uartreg.h> 64 1.10.2.2 bouyer 65 1.10.2.2 bouyer #include <hpcmips/tx/tx39irvar.h> 66 1.10.2.2 bouyer 67 1.10.2.2 bouyer #include <hpcmips/tx/tx39clockreg.h> /* XXX */ 68 1.10.2.2 bouyer 69 1.10.2.2 bouyer #include <hpcmips/tx/txiomanvar.h> 70 1.10.2.2 bouyer 71 1.10.2.2 bouyer #define SET(t, f) (t) |= (f) 72 1.10.2.2 bouyer #define CLR(t, f) (t) &= ~(f) 73 1.10.2.2 bouyer #define ISSET(t, f) ((t) & (f)) 74 1.10.2.2 bouyer /* 75 1.10.2.2 bouyer * UARTA channel has DTR, DSR, RTS, CTS lines. and they wired to MFIO/IO port. 76 1.10.2.2 bouyer */ 77 1.10.2.2 bouyer #define IS_COM0(s) ((s) == 0) 78 1.10.2.2 bouyer #define IS_COM1(s) ((s) == 1) 79 1.10.2.2 bouyer #define ON ((void *)1) 80 1.10.2.2 bouyer #define OFF ((void *)0) 81 1.10.2.2 bouyer 82 1.10.2.2 bouyer #ifdef TX39UARTDEBUG 83 1.10.2.2 bouyer #define DPRINTF(arg) printf arg 84 1.10.2.2 bouyer #else 85 1.10.2.2 bouyer #define DPRINTF(arg) 86 1.10.2.2 bouyer #endif 87 1.10.2.2 bouyer 88 1.10.2.2 bouyer #define TXCOM_HW_CONSOLE 0x40 89 1.10.2.2 bouyer #define TXCOM_RING_SIZE 256 /* must be a power of two! */ 90 1.10.2.2 bouyer #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1) 91 1.10.2.2 bouyer 92 1.10.2.2 bouyer struct txcom_chip { 93 1.10.2.2 bouyer tx_chipset_tag_t sc_tc; 94 1.10.2.2 bouyer int sc_slot; /* UARTA or UARTB */ 95 1.10.2.2 bouyer int sc_cflag; 96 1.10.2.2 bouyer int sc_speed; 97 1.10.2.2 bouyer int sc_swflags; 98 1.10.2.2 bouyer int sc_hwflags; 99 1.10.2.2 bouyer 100 1.10.2.2 bouyer int sc_dcd; 101 1.10.2.2 bouyer int sc_msr_cts; 102 1.10.2.2 bouyer int sc_tx_stopped; 103 1.10.2.2 bouyer }; 104 1.10.2.2 bouyer 105 1.10.2.2 bouyer struct txcom_softc { 106 1.10.2.2 bouyer struct device sc_dev; 107 1.10.2.2 bouyer struct tty *sc_tty; 108 1.10.2.2 bouyer struct txcom_chip *sc_chip; 109 1.10.2.2 bouyer 110 1.10.2.2 bouyer struct callout sc_txsoft_ch; 111 1.10.2.2 bouyer struct callout sc_rxsoft_ch; 112 1.10.2.2 bouyer 113 1.10.2.2 bouyer u_int8_t *sc_tba; /* transmit buffer address */ 114 1.10.2.2 bouyer int sc_tbc; /* transmit byte count */ 115 1.10.2.2 bouyer int sc_heldtbc; 116 1.10.2.2 bouyer u_int8_t *sc_rbuf; /* receive buffer address */ 117 1.10.2.2 bouyer int sc_rbput; /* receive byte count */ 118 1.10.2.2 bouyer int sc_rbget; 119 1.10.2.2 bouyer }; 120 1.10.2.2 bouyer 121 1.10.2.2 bouyer extern struct cfdriver txcom_cd; 122 1.10.2.2 bouyer 123 1.10.2.2 bouyer int txcom_match(struct device *, struct cfdata *, void *); 124 1.10.2.2 bouyer void txcom_attach(struct device *, struct device *, void *); 125 1.10.2.2 bouyer int txcom_print(void*, const char *); 126 1.10.2.2 bouyer 127 1.10.2.2 bouyer int txcom_txintr(void *); 128 1.10.2.2 bouyer int txcom_rxintr(void *); 129 1.10.2.2 bouyer int txcom_frameerr_intr(void *); 130 1.10.2.2 bouyer int txcom_parityerr_intr(void *); 131 1.10.2.2 bouyer int txcom_break_intr(void *); 132 1.10.2.2 bouyer 133 1.10.2.2 bouyer void txcom_rxsoft(void *); 134 1.10.2.2 bouyer void txcom_txsoft(void *); 135 1.10.2.2 bouyer 136 1.10.2.2 bouyer int txcom_stsoft(void *); 137 1.10.2.2 bouyer int txcom_stsoft2(void *); 138 1.10.2.2 bouyer int txcom_stsoft3(void *); 139 1.10.2.2 bouyer int txcom_stsoft4(void *); 140 1.10.2.2 bouyer 141 1.10.2.2 bouyer 142 1.10.2.2 bouyer void txcom_shutdown(struct txcom_softc *); 143 1.10.2.2 bouyer void txcom_break(struct txcom_softc *, int); 144 1.10.2.2 bouyer void txcom_modem(struct txcom_softc *, int); 145 1.10.2.2 bouyer void txcomstart(struct tty *); 146 1.10.2.2 bouyer int txcomparam(struct tty *, struct termios *); 147 1.10.2.2 bouyer 148 1.10.2.2 bouyer void txcom_reset (struct txcom_chip *); 149 1.10.2.2 bouyer int txcom_enable (struct txcom_chip *); 150 1.10.2.2 bouyer void txcom_disable (struct txcom_chip *); 151 1.10.2.2 bouyer void txcom_setmode (struct txcom_chip *); 152 1.10.2.2 bouyer void txcom_setbaudrate(struct txcom_chip *); 153 1.10.2.2 bouyer int txcom_cngetc (dev_t); 154 1.10.2.2 bouyer void txcom_cnputc (dev_t, int); 155 1.10.2.2 bouyer void txcom_cnpollc (dev_t, int); 156 1.10.2.2 bouyer 157 1.10.2.2 bouyer int txcom_dcd_hook(void *, int, long, void *); 158 1.10.2.2 bouyer int txcom_cts_hook(void *, int, long, void *); 159 1.10.2.2 bouyer 160 1.10.2.2 bouyer 161 1.10.2.2 bouyer __inline__ int __txcom_txbufready(struct txcom_chip *, int); 162 1.10.2.2 bouyer const char *__txcom_slotname(int); 163 1.10.2.2 bouyer 164 1.10.2.2 bouyer #ifdef TX39UARTDEBUG 165 1.10.2.2 bouyer void txcom_dump(struct txcom_chip *); 166 1.10.2.2 bouyer #endif 167 1.10.2.2 bouyer 168 1.10.2.2 bouyer cdev_decl(txcom); 169 1.10.2.2 bouyer 170 1.10.2.2 bouyer struct consdev txcomcons = { 171 1.10.2.2 bouyer NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc, 172 1.10.2.2 bouyer NULL, NODEV, CN_NORMAL 173 1.10.2.2 bouyer }; 174 1.10.2.2 bouyer 175 1.10.2.2 bouyer /* Serial console */ 176 1.10.2.2 bouyer struct txcom_chip txcom_chip; 177 1.10.2.2 bouyer 178 1.10.2.2 bouyer struct cfattach txcom_ca = { 179 1.10.2.2 bouyer sizeof(struct txcom_softc), txcom_match, txcom_attach 180 1.10.2.2 bouyer }; 181 1.10.2.2 bouyer 182 1.10.2.2 bouyer int 183 1.10.2.2 bouyer txcom_match(parent, cf, aux) 184 1.10.2.2 bouyer struct device *parent; 185 1.10.2.2 bouyer struct cfdata *cf; 186 1.10.2.2 bouyer void *aux; 187 1.10.2.2 bouyer { 188 1.10.2.2 bouyer /* if the autoconfiguration got this far, there's a slot here */ 189 1.10.2.2 bouyer return 1; 190 1.10.2.2 bouyer } 191 1.10.2.2 bouyer 192 1.10.2.2 bouyer void 193 1.10.2.2 bouyer txcom_attach(struct device *parent, struct device *self, void *aux) 194 1.10.2.2 bouyer { 195 1.10.2.2 bouyer struct tx39uart_attach_args *ua = aux; 196 1.10.2.2 bouyer struct txcom_softc *sc = (void*)self; 197 1.10.2.2 bouyer tx_chipset_tag_t tc; 198 1.10.2.2 bouyer struct tty *tp; 199 1.10.2.2 bouyer struct txcom_chip *chip; 200 1.10.2.2 bouyer int slot, console; 201 1.10.2.2 bouyer 202 1.10.2.2 bouyer /* Check this slot used as serial console */ 203 1.10.2.2 bouyer console = (ua->ua_slot == txcom_chip.sc_slot) && 204 1.10.2.2 bouyer (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE); 205 1.10.2.2 bouyer 206 1.10.2.2 bouyer if (console) { 207 1.10.2.2 bouyer sc->sc_chip = &txcom_chip; 208 1.10.2.2 bouyer } else { 209 1.10.2.2 bouyer if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip), 210 1.10.2.2 bouyer M_DEVBUF, M_WAITOK))) { 211 1.10.2.2 bouyer printf(": can't allocate chip\n"); 212 1.10.2.2 bouyer return; 213 1.10.2.2 bouyer } 214 1.10.2.2 bouyer memset(sc->sc_chip, 0, sizeof(struct txcom_chip)); 215 1.10.2.2 bouyer } 216 1.10.2.2 bouyer 217 1.10.2.2 bouyer chip = sc->sc_chip; 218 1.10.2.2 bouyer tc = chip->sc_tc = ua->ua_tc; 219 1.10.2.2 bouyer slot = chip->sc_slot = ua->ua_slot; 220 1.10.2.2 bouyer 221 1.10.2.2 bouyer #ifdef TX39UARTDEBUG 222 1.10.2.2 bouyer txcom_dump(chip); 223 1.10.2.2 bouyer #endif 224 1.10.2.2 bouyer if (!console) 225 1.10.2.2 bouyer txcom_reset(chip); 226 1.10.2.2 bouyer 227 1.10.2.2 bouyer if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) { 228 1.10.2.2 bouyer printf(": can't allocate buffer.\n"); 229 1.10.2.2 bouyer return; 230 1.10.2.2 bouyer } 231 1.10.2.2 bouyer memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE); 232 1.10.2.2 bouyer 233 1.10.2.2 bouyer tp = ttymalloc(); 234 1.10.2.2 bouyer tp->t_oproc = txcomstart; 235 1.10.2.2 bouyer tp->t_param = txcomparam; 236 1.10.2.2 bouyer tp->t_hwiflow = NULL; 237 1.10.2.2 bouyer sc->sc_tty = tp; 238 1.10.2.2 bouyer tty_attach(tp); 239 1.10.2.2 bouyer 240 1.10.2.2 bouyer if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 241 1.10.2.2 bouyer int maj; 242 1.10.2.2 bouyer /* locate the major number */ 243 1.10.2.2 bouyer for (maj = 0; maj < nchrdev; maj++) 244 1.10.2.2 bouyer if (cdevsw[maj].d_open == txcomopen) 245 1.10.2.2 bouyer break; 246 1.10.2.2 bouyer 247 1.10.2.2 bouyer cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 248 1.10.2.2 bouyer 249 1.10.2.2 bouyer printf(": console"); 250 1.10.2.2 bouyer } 251 1.10.2.2 bouyer 252 1.10.2.2 bouyer printf("\n"); 253 1.10.2.2 bouyer 254 1.10.2.2 bouyer /* 255 1.10.2.2 bouyer * Enable interrupt 256 1.10.2.2 bouyer */ 257 1.10.2.2 bouyer #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s)) 258 1.10.2.2 bouyer 259 1.10.2.2 bouyer tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY, 260 1.10.2.2 bouyer txcom_rxintr, sc); 261 1.10.2.2 bouyer tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY, 262 1.10.2.2 bouyer txcom_txintr, sc); 263 1.10.2.2 bouyer tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY, 264 1.10.2.2 bouyer txcom_rxintr, sc); 265 1.10.2.2 bouyer tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY, 266 1.10.2.2 bouyer txcom_txintr, sc); 267 1.10.2.2 bouyer tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY, 268 1.10.2.2 bouyer txcom_frameerr_intr, sc); 269 1.10.2.2 bouyer tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY, 270 1.10.2.2 bouyer txcom_parityerr_intr, sc); 271 1.10.2.2 bouyer tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY, 272 1.10.2.2 bouyer txcom_break_intr, sc); 273 1.10.2.2 bouyer 274 1.10.2.2 bouyer /* 275 1.10.2.2 bouyer * UARTA has external signal line. (its wiring is platform dependent) 276 1.10.2.2 bouyer */ 277 1.10.2.2 bouyer if (IS_COM0(slot)) { 278 1.10.2.2 bouyer /* install DCD, CTS hooks. */ 279 1.10.2.2 bouyer config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_EVENT_COM0_DCD, 280 1.10.2.2 bouyer CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc); 281 1.10.2.2 bouyer config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_EVENT_COM0_CTS, 282 1.10.2.2 bouyer CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc); 283 1.10.2.2 bouyer } 284 1.10.2.2 bouyer 285 1.10.2.2 bouyer /* 286 1.10.2.2 bouyer * UARTB can connect IR module 287 1.10.2.2 bouyer */ 288 1.10.2.2 bouyer if (IS_COM1(slot)) { 289 1.10.2.2 bouyer struct txcom_attach_args tca; 290 1.10.2.2 bouyer tca.tca_tc = tc; 291 1.10.2.2 bouyer tca.tca_parent = self; 292 1.10.2.2 bouyer config_found(self, &tca, txcom_print); 293 1.10.2.2 bouyer } 294 1.10.2.2 bouyer } 295 1.10.2.2 bouyer 296 1.10.2.2 bouyer int 297 1.10.2.2 bouyer txcom_print(void *aux, const char *pnp) 298 1.10.2.2 bouyer { 299 1.10.2.2 bouyer return pnp ? QUIET : UNCONF; 300 1.10.2.2 bouyer } 301 1.10.2.2 bouyer 302 1.10.2.2 bouyer void 303 1.10.2.2 bouyer txcom_reset(struct txcom_chip *chip) 304 1.10.2.2 bouyer { 305 1.10.2.2 bouyer tx_chipset_tag_t tc; 306 1.10.2.2 bouyer int slot, ofs; 307 1.10.2.2 bouyer txreg_t reg; 308 1.10.2.2 bouyer 309 1.10.2.2 bouyer tc = chip->sc_tc; 310 1.10.2.2 bouyer slot = chip->sc_slot; 311 1.10.2.2 bouyer ofs = TX39_UARTCTRL1_REG(slot); 312 1.10.2.2 bouyer 313 1.10.2.2 bouyer /* Supply clock */ 314 1.10.2.2 bouyer reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 315 1.10.2.2 bouyer reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 316 1.10.2.2 bouyer tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 317 1.10.2.2 bouyer 318 1.10.2.2 bouyer /* reset UART module */ 319 1.10.2.2 bouyer tx_conf_write(tc, ofs, 0); 320 1.10.2.2 bouyer } 321 1.10.2.2 bouyer 322 1.10.2.2 bouyer int 323 1.10.2.2 bouyer txcom_enable(struct txcom_chip *chip) 324 1.10.2.2 bouyer { 325 1.10.2.2 bouyer tx_chipset_tag_t tc; 326 1.10.2.2 bouyer txreg_t reg; 327 1.10.2.2 bouyer int slot, ofs, timeout; 328 1.10.2.2 bouyer 329 1.10.2.2 bouyer tc = chip->sc_tc; 330 1.10.2.2 bouyer slot = chip->sc_slot; 331 1.10.2.2 bouyer ofs = TX39_UARTCTRL1_REG(slot); 332 1.10.2.2 bouyer 333 1.10.2.2 bouyer /* External power supply (if any) */ 334 1.10.2.2 bouyer config_hook_call(CONFIG_HOOK_POWERCONTROL, 335 1.10.2.2 bouyer CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON); 336 1.10.2.2 bouyer delay(3); 337 1.10.2.2 bouyer 338 1.10.2.2 bouyer /* Supply clock */ 339 1.10.2.2 bouyer reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 340 1.10.2.2 bouyer reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 341 1.10.2.2 bouyer tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 342 1.10.2.2 bouyer 343 1.10.2.2 bouyer /* 344 1.10.2.2 bouyer * XXX Disable DMA (DMA not coded yet) 345 1.10.2.2 bouyer */ 346 1.10.2.2 bouyer reg = tx_conf_read(tc, ofs); 347 1.10.2.2 bouyer reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 348 1.10.2.2 bouyer tx_conf_write(tc, ofs, reg); 349 1.10.2.2 bouyer 350 1.10.2.2 bouyer /* enable */ 351 1.10.2.2 bouyer reg = tx_conf_read(tc, ofs); 352 1.10.2.2 bouyer reg |= TX39_UARTCTRL1_ENUART; 353 1.10.2.2 bouyer reg &= ~TX39_UARTCTRL1_ENBREAHALT; 354 1.10.2.2 bouyer tx_conf_write(tc, ofs, reg); 355 1.10.2.2 bouyer 356 1.10.2.2 bouyer timeout = 100000; 357 1.10.2.2 bouyer 358 1.10.2.2 bouyer while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) && 359 1.10.2.2 bouyer --timeout > 0) 360 1.10.2.2 bouyer ; 361 1.10.2.2 bouyer 362 1.10.2.2 bouyer if (timeout == 0 && !cold) { 363 1.10.2.2 bouyer printf("%s never power up\n", __txcom_slotname(slot)); 364 1.10.2.2 bouyer return 1; 365 1.10.2.2 bouyer } 366 1.10.2.2 bouyer 367 1.10.2.2 bouyer return 0; 368 1.10.2.2 bouyer } 369 1.10.2.2 bouyer 370 1.10.2.2 bouyer void 371 1.10.2.2 bouyer txcom_disable(struct txcom_chip *chip) 372 1.10.2.2 bouyer { 373 1.10.2.2 bouyer tx_chipset_tag_t tc; 374 1.10.2.2 bouyer txreg_t reg; 375 1.10.2.2 bouyer int slot; 376 1.10.2.2 bouyer 377 1.10.2.2 bouyer tc = chip->sc_tc; 378 1.10.2.2 bouyer slot = chip->sc_slot; 379 1.10.2.2 bouyer 380 1.10.2.2 bouyer reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 381 1.10.2.2 bouyer /* DMA */ 382 1.10.2.2 bouyer reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 383 1.10.2.2 bouyer 384 1.10.2.2 bouyer /* disable module */ 385 1.10.2.2 bouyer reg &= ~TX39_UARTCTRL1_ENUART; 386 1.10.2.2 bouyer tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 387 1.10.2.2 bouyer 388 1.10.2.2 bouyer /* Clock */ 389 1.10.2.2 bouyer reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 390 1.10.2.2 bouyer reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 391 1.10.2.2 bouyer tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 392 1.10.2.2 bouyer 393 1.10.2.2 bouyer } 394 1.10.2.2 bouyer 395 1.10.2.2 bouyer __inline__ int 396 1.10.2.2 bouyer __txcom_txbufready(struct txcom_chip *chip, int retry) 397 1.10.2.2 bouyer { 398 1.10.2.2 bouyer tx_chipset_tag_t tc = chip->sc_tc; 399 1.10.2.2 bouyer int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 400 1.10.2.2 bouyer 401 1.10.2.2 bouyer do { 402 1.10.2.2 bouyer if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY) 403 1.10.2.2 bouyer return 1; 404 1.10.2.2 bouyer } while(--retry != 0); 405 1.10.2.2 bouyer 406 1.10.2.2 bouyer return 0; 407 1.10.2.2 bouyer } 408 1.10.2.2 bouyer 409 1.10.2.2 bouyer void 410 1.10.2.2 bouyer txcom_pulse_mode(struct device *dev) 411 1.10.2.2 bouyer { 412 1.10.2.2 bouyer struct txcom_softc *sc = (void*)dev; 413 1.10.2.2 bouyer struct txcom_chip *chip = sc->sc_chip; 414 1.10.2.2 bouyer tx_chipset_tag_t tc = chip->sc_tc; 415 1.10.2.2 bouyer int ofs; 416 1.10.2.2 bouyer txreg_t reg; 417 1.10.2.2 bouyer 418 1.10.2.2 bouyer ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 419 1.10.2.2 bouyer 420 1.10.2.2 bouyer reg = tx_conf_read(tc, ofs); 421 1.10.2.2 bouyer /* WindowsCE use this setting */ 422 1.10.2.2 bouyer reg |= TX39_UARTCTRL1_PULSEOPT1; 423 1.10.2.2 bouyer reg &= ~TX39_UARTCTRL1_PULSEOPT2; 424 1.10.2.2 bouyer reg |= TX39_UARTCTRL1_DTINVERT; 425 1.10.2.2 bouyer 426 1.10.2.2 bouyer tx_conf_write(tc, ofs, reg); 427 1.10.2.2 bouyer } 428 1.10.2.2 bouyer 429 1.10.2.2 bouyer /* 430 1.10.2.2 bouyer * console 431 1.10.2.2 bouyer */ 432 1.10.2.2 bouyer int 433 1.10.2.2 bouyer txcom_cngetc(dev_t dev) 434 1.10.2.2 bouyer { 435 1.10.2.2 bouyer tx_chipset_tag_t tc; 436 1.10.2.2 bouyer int ofs, c, s; 437 1.10.2.2 bouyer 438 1.10.2.2 bouyer s = spltty(); 439 1.10.2.2 bouyer 440 1.10.2.2 bouyer tc = txcom_chip.sc_tc; 441 1.10.2.2 bouyer ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot); 442 1.10.2.2 bouyer 443 1.10.2.2 bouyer while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs))) 444 1.10.2.2 bouyer ; 445 1.10.2.2 bouyer 446 1.10.2.2 bouyer c = TX39_UARTRXHOLD_RXDATA( 447 1.10.2.2 bouyer tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot))); 448 1.10.2.2 bouyer 449 1.10.2.2 bouyer if (c == '\r') 450 1.10.2.2 bouyer c = '\n'; 451 1.10.2.2 bouyer 452 1.10.2.2 bouyer splx(s); 453 1.10.2.2 bouyer 454 1.10.2.2 bouyer return c; 455 1.10.2.2 bouyer } 456 1.10.2.2 bouyer 457 1.10.2.2 bouyer void 458 1.10.2.2 bouyer txcom_cnputc(dev_t dev, int c) 459 1.10.2.2 bouyer { 460 1.10.2.2 bouyer struct txcom_chip *chip = &txcom_chip; 461 1.10.2.2 bouyer tx_chipset_tag_t tc = chip->sc_tc; 462 1.10.2.2 bouyer int s; 463 1.10.2.2 bouyer 464 1.10.2.2 bouyer s = spltty(); 465 1.10.2.2 bouyer 466 1.10.2.2 bouyer /* Wait for transmitter to empty */ 467 1.10.2.2 bouyer __txcom_txbufready(chip, -1); 468 1.10.2.2 bouyer 469 1.10.2.2 bouyer tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 470 1.10.2.2 bouyer (c & TX39_UARTTXHOLD_TXDATA_MASK)); 471 1.10.2.2 bouyer 472 1.10.2.2 bouyer __txcom_txbufready(chip, -1); 473 1.10.2.2 bouyer 474 1.10.2.2 bouyer splx(s); 475 1.10.2.2 bouyer } 476 1.10.2.2 bouyer 477 1.10.2.2 bouyer void 478 1.10.2.2 bouyer txcom_cnpollc(dev_t dev, int on) 479 1.10.2.2 bouyer { 480 1.10.2.2 bouyer } 481 1.10.2.2 bouyer 482 1.10.2.2 bouyer void 483 1.10.2.2 bouyer txcom_setmode(struct txcom_chip *chip) 484 1.10.2.2 bouyer { 485 1.10.2.2 bouyer tcflag_t cflag = chip->sc_cflag; 486 1.10.2.2 bouyer int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 487 1.10.2.2 bouyer txreg_t reg; 488 1.10.2.2 bouyer 489 1.10.2.2 bouyer reg = tx_conf_read(chip->sc_tc, ofs); 490 1.10.2.2 bouyer reg &= ~TX39_UARTCTRL1_ENUART; 491 1.10.2.2 bouyer tx_conf_write(chip->sc_tc, ofs, reg); 492 1.10.2.2 bouyer 493 1.10.2.2 bouyer switch (ISSET(cflag, CSIZE)) { 494 1.10.2.2 bouyer default: 495 1.10.2.2 bouyer printf("txcom_setmode: CS7, CS8 only. use CS7"); 496 1.10.2.2 bouyer /* FALL THROUGH */ 497 1.10.2.2 bouyer case CS7: 498 1.10.2.2 bouyer reg |= TX39_UARTCTRL1_BIT7; 499 1.10.2.2 bouyer break; 500 1.10.2.2 bouyer case CS8: 501 1.10.2.2 bouyer reg &= ~TX39_UARTCTRL1_BIT7; 502 1.10.2.2 bouyer break; 503 1.10.2.2 bouyer } 504 1.10.2.2 bouyer 505 1.10.2.2 bouyer if (ISSET(cflag, PARENB)) { 506 1.10.2.2 bouyer reg |= TX39_UARTCTRL1_ENPARITY; 507 1.10.2.2 bouyer if (ISSET(cflag, PARODD)) { 508 1.10.2.2 bouyer reg &= ~TX39_UARTCTRL1_EVENPARITY; 509 1.10.2.2 bouyer } else { 510 1.10.2.2 bouyer reg |= TX39_UARTCTRL1_EVENPARITY; 511 1.10.2.2 bouyer } 512 1.10.2.2 bouyer } else { 513 1.10.2.2 bouyer reg &= ~TX39_UARTCTRL1_ENPARITY; 514 1.10.2.2 bouyer } 515 1.10.2.2 bouyer 516 1.10.2.2 bouyer if (ISSET(cflag, CSTOPB)) 517 1.10.2.2 bouyer reg |= TX39_UARTCTRL1_TWOSTOP; 518 1.10.2.2 bouyer else 519 1.10.2.2 bouyer reg &= ~TX39_UARTCTRL1_TWOSTOP; 520 1.10.2.2 bouyer 521 1.10.2.2 bouyer reg |= TX39_UARTCTRL1_ENUART; 522 1.10.2.2 bouyer tx_conf_write(chip->sc_tc, ofs, reg); 523 1.10.2.2 bouyer } 524 1.10.2.2 bouyer 525 1.10.2.2 bouyer void 526 1.10.2.2 bouyer txcom_setbaudrate(struct txcom_chip *chip) 527 1.10.2.2 bouyer { 528 1.10.2.2 bouyer int baudrate; 529 1.10.2.2 bouyer int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 530 1.10.2.2 bouyer txreg_t reg, reg1; 531 1.10.2.2 bouyer 532 1.10.2.2 bouyer if (chip->sc_speed == 0) 533 1.10.2.2 bouyer return; 534 1.10.2.2 bouyer 535 1.10.2.2 bouyer if (!cold) 536 1.10.2.2 bouyer DPRINTF(("txcom_setbaudrate: %d\n", chip->sc_speed)); 537 1.10.2.2 bouyer 538 1.10.2.2 bouyer reg1 = tx_conf_read(chip->sc_tc, ofs); 539 1.10.2.2 bouyer reg1 &= ~TX39_UARTCTRL1_ENUART; 540 1.10.2.2 bouyer tx_conf_write(chip->sc_tc, ofs, reg1); 541 1.10.2.2 bouyer 542 1.10.2.2 bouyer baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1; 543 1.10.2.2 bouyer reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate); 544 1.10.2.2 bouyer 545 1.10.2.2 bouyer tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg); 546 1.10.2.2 bouyer 547 1.10.2.2 bouyer reg1 |= TX39_UARTCTRL1_ENUART; 548 1.10.2.2 bouyer tx_conf_write(chip->sc_tc, ofs, reg1); 549 1.10.2.2 bouyer } 550 1.10.2.2 bouyer 551 1.10.2.2 bouyer int 552 1.10.2.2 bouyer txcom_cnattach(int slot, int speed, int cflag) 553 1.10.2.2 bouyer { 554 1.10.2.2 bouyer cn_tab = &txcomcons; 555 1.10.2.2 bouyer 556 1.10.2.2 bouyer txcom_chip.sc_tc = tx_conf_get_tag(); 557 1.10.2.2 bouyer txcom_chip.sc_slot = slot; 558 1.10.2.2 bouyer txcom_chip.sc_cflag = cflag; 559 1.10.2.2 bouyer txcom_chip.sc_speed = speed; 560 1.10.2.2 bouyer txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE; 561 1.10.2.2 bouyer #if notyet 562 1.10.2.2 bouyer txcom_reset(&txcom_chip); 563 1.10.2.2 bouyer #endif 564 1.10.2.2 bouyer txcom_setmode(&txcom_chip); 565 1.10.2.2 bouyer txcom_setbaudrate(&txcom_chip); 566 1.10.2.2 bouyer 567 1.10.2.2 bouyer if (txcom_enable(&txcom_chip)) 568 1.10.2.2 bouyer return 1; 569 1.10.2.2 bouyer 570 1.10.2.2 bouyer return 0; 571 1.10.2.2 bouyer } 572 1.10.2.2 bouyer 573 1.10.2.2 bouyer /* 574 1.10.2.2 bouyer * tty 575 1.10.2.2 bouyer */ 576 1.10.2.2 bouyer void 577 1.10.2.2 bouyer txcom_break(struct txcom_softc *sc, int on) 578 1.10.2.2 bouyer { 579 1.10.2.2 bouyer struct txcom_chip *chip = sc->sc_chip; 580 1.10.2.2 bouyer 581 1.10.2.2 bouyer tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 582 1.10.2.2 bouyer on ? TX39_UARTTXHOLD_BREAK : 0); 583 1.10.2.2 bouyer } 584 1.10.2.2 bouyer 585 1.10.2.2 bouyer void 586 1.10.2.2 bouyer txcom_modem(struct txcom_softc *sc, int on) 587 1.10.2.2 bouyer { 588 1.10.2.2 bouyer struct txcom_chip *chip = sc->sc_chip; 589 1.10.2.2 bouyer tx_chipset_tag_t tc = chip->sc_tc; 590 1.10.2.2 bouyer int slot = chip->sc_slot; 591 1.10.2.2 bouyer txreg_t reg; 592 1.10.2.2 bouyer 593 1.10.2.2 bouyer /* assert DTR */ 594 1.10.2.2 bouyer if (IS_COM0(slot)) { 595 1.10.2.2 bouyer config_hook_call(CONFIG_HOOK_OUT, 596 1.10.2.2 bouyer CONFIG_HOOK_OUT_COM0_DTR, 597 1.10.2.2 bouyer (void *)on); 598 1.10.2.2 bouyer } 599 1.10.2.2 bouyer 600 1.10.2.2 bouyer reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 601 1.10.2.2 bouyer reg &= ~TX39_UARTCTRL1_ENUART; 602 1.10.2.2 bouyer tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 603 1.10.2.2 bouyer 604 1.10.2.2 bouyer if (on) { 605 1.10.2.2 bouyer reg &= ~TX39_UARTCTRL1_DISTXD; 606 1.10.2.2 bouyer } else { 607 1.10.2.2 bouyer reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */ 608 1.10.2.2 bouyer } 609 1.10.2.2 bouyer 610 1.10.2.2 bouyer reg |= TX39_UARTCTRL1_ENUART; 611 1.10.2.2 bouyer tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 612 1.10.2.2 bouyer } 613 1.10.2.2 bouyer 614 1.10.2.2 bouyer void 615 1.10.2.2 bouyer txcom_shutdown(struct txcom_softc *sc) 616 1.10.2.2 bouyer { 617 1.10.2.2 bouyer struct tty *tp = sc->sc_tty; 618 1.10.2.2 bouyer int s = spltty(); 619 1.10.2.2 bouyer 620 1.10.2.2 bouyer /* Clear any break condition set with TIOCSBRK. */ 621 1.10.2.2 bouyer txcom_break(sc, 0); 622 1.10.2.2 bouyer 623 1.10.2.2 bouyer /* 624 1.10.2.2 bouyer * Hang up if necessary. Wait a bit, so the other side has time to 625 1.10.2.2 bouyer * notice even if we immediately open the port again. 626 1.10.2.2 bouyer */ 627 1.10.2.2 bouyer if (ISSET(tp->t_cflag, HUPCL)) { 628 1.10.2.2 bouyer txcom_modem(sc, 0); 629 1.10.2.2 bouyer (void) tsleep(sc, TTIPRI, ttclos, hz); 630 1.10.2.2 bouyer } 631 1.10.2.2 bouyer 632 1.10.2.2 bouyer 633 1.10.2.2 bouyer /* Turn off interrupts if not the console. */ 634 1.10.2.2 bouyer if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 635 1.10.2.2 bouyer txcom_disable(sc->sc_chip); 636 1.10.2.2 bouyer } 637 1.10.2.2 bouyer 638 1.10.2.2 bouyer splx(s); 639 1.10.2.2 bouyer } 640 1.10.2.2 bouyer 641 1.10.2.2 bouyer const char * 642 1.10.2.2 bouyer __txcom_slotname(int slot) 643 1.10.2.2 bouyer { 644 1.10.2.2 bouyer static const char *slotname[] = {"UARTA", "UARTB", "unknown"}; 645 1.10.2.2 bouyer 646 1.10.2.2 bouyer if (slot != 0 && slot != 1) 647 1.10.2.2 bouyer return slotname[2]; 648 1.10.2.2 bouyer 649 1.10.2.2 bouyer return slotname[slot]; 650 1.10.2.2 bouyer } 651 1.10.2.2 bouyer 652 1.10.2.2 bouyer int 653 1.10.2.2 bouyer txcom_frameerr_intr(void *arg) 654 1.10.2.2 bouyer { 655 1.10.2.2 bouyer struct txcom_softc *sc = arg; 656 1.10.2.2 bouyer 657 1.10.2.2 bouyer printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 658 1.10.2.2 bouyer 659 1.10.2.2 bouyer return 0; 660 1.10.2.2 bouyer } 661 1.10.2.2 bouyer 662 1.10.2.2 bouyer int 663 1.10.2.2 bouyer txcom_parityerr_intr(void *arg) 664 1.10.2.2 bouyer { 665 1.10.2.2 bouyer struct txcom_softc *sc = arg; 666 1.10.2.2 bouyer 667 1.10.2.2 bouyer printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 668 1.10.2.2 bouyer 669 1.10.2.2 bouyer return 0; 670 1.10.2.2 bouyer } 671 1.10.2.2 bouyer 672 1.10.2.2 bouyer int 673 1.10.2.2 bouyer txcom_break_intr(void *arg) 674 1.10.2.2 bouyer { 675 1.10.2.2 bouyer struct txcom_softc *sc = arg; 676 1.10.2.2 bouyer 677 1.10.2.2 bouyer printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot)); 678 1.10.2.2 bouyer 679 1.10.2.2 bouyer return 0; 680 1.10.2.2 bouyer } 681 1.10.2.2 bouyer 682 1.10.2.2 bouyer int 683 1.10.2.2 bouyer txcom_rxintr(void *arg) 684 1.10.2.2 bouyer { 685 1.10.2.2 bouyer struct txcom_softc *sc = arg; 686 1.10.2.2 bouyer struct txcom_chip *chip = sc->sc_chip; 687 1.10.2.2 bouyer u_int8_t c; 688 1.10.2.2 bouyer 689 1.10.2.2 bouyer c = TX39_UARTRXHOLD_RXDATA( 690 1.10.2.2 bouyer tx_conf_read(chip->sc_tc, 691 1.10.2.2 bouyer TX39_UARTRXHOLD_REG(chip->sc_slot))); 692 1.10.2.2 bouyer 693 1.10.2.2 bouyer sc->sc_rbuf[sc->sc_rbput] = c; 694 1.10.2.2 bouyer sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK; 695 1.10.2.2 bouyer 696 1.10.2.2 bouyer callout_reset(&sc->sc_rxsoft_ch, 1, txcom_rxsoft, sc); 697 1.10.2.2 bouyer 698 1.10.2.2 bouyer return 0; 699 1.10.2.2 bouyer } 700 1.10.2.2 bouyer 701 1.10.2.2 bouyer void 702 1.10.2.2 bouyer txcom_rxsoft(void *arg) 703 1.10.2.2 bouyer { 704 1.10.2.2 bouyer struct txcom_softc *sc = arg; 705 1.10.2.2 bouyer struct tty *tp = sc->sc_tty; 706 1.10.2.2 bouyer int (*rint) __P((int c, struct tty *tp)); 707 1.10.2.2 bouyer int code; 708 1.10.2.2 bouyer int s, end, get; 709 1.10.2.2 bouyer 710 1.10.2.2 bouyer rint = linesw[tp->t_line].l_rint; 711 1.10.2.2 bouyer 712 1.10.2.2 bouyer s = spltty(); 713 1.10.2.2 bouyer end = sc->sc_rbput; 714 1.10.2.2 bouyer get = sc->sc_rbget; 715 1.10.2.2 bouyer 716 1.10.2.2 bouyer while (get != end) { 717 1.10.2.2 bouyer code = sc->sc_rbuf[get]; 718 1.10.2.2 bouyer 719 1.10.2.2 bouyer if ((*rint)(code, tp) == -1) { 720 1.10.2.2 bouyer /* 721 1.10.2.2 bouyer * The line discipline's buffer is out of space. 722 1.10.2.2 bouyer */ 723 1.10.2.2 bouyer } 724 1.10.2.2 bouyer get = (get + 1) % TXCOM_RING_MASK; 725 1.10.2.2 bouyer } 726 1.10.2.2 bouyer sc->sc_rbget = get; 727 1.10.2.2 bouyer 728 1.10.2.2 bouyer splx(s); 729 1.10.2.2 bouyer } 730 1.10.2.2 bouyer 731 1.10.2.2 bouyer int 732 1.10.2.2 bouyer txcom_txintr(void *arg) 733 1.10.2.2 bouyer { 734 1.10.2.2 bouyer struct txcom_softc *sc = arg; 735 1.10.2.2 bouyer struct txcom_chip *chip = sc->sc_chip; 736 1.10.2.2 bouyer tx_chipset_tag_t tc = chip->sc_tc; 737 1.10.2.2 bouyer 738 1.10.2.2 bouyer if (sc->sc_tbc > 0) { 739 1.10.2.2 bouyer tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 740 1.10.2.2 bouyer (*sc->sc_tba & 741 1.10.2.2 bouyer TX39_UARTTXHOLD_TXDATA_MASK)); 742 1.10.2.2 bouyer sc->sc_tbc--; 743 1.10.2.2 bouyer sc->sc_tba++; 744 1.10.2.2 bouyer } else { 745 1.10.2.2 bouyer callout_reset(&sc->sc_rxsoft_ch, 1, txcom_txsoft, sc); 746 1.10.2.2 bouyer } 747 1.10.2.2 bouyer 748 1.10.2.2 bouyer return 0; 749 1.10.2.2 bouyer } 750 1.10.2.2 bouyer 751 1.10.2.2 bouyer void 752 1.10.2.2 bouyer txcom_txsoft(void *arg) 753 1.10.2.2 bouyer { 754 1.10.2.2 bouyer struct txcom_softc *sc = arg; 755 1.10.2.2 bouyer struct tty *tp = sc->sc_tty; 756 1.10.2.2 bouyer int s = spltty(); 757 1.10.2.2 bouyer 758 1.10.2.2 bouyer CLR(tp->t_state, TS_BUSY); 759 1.10.2.2 bouyer if (ISSET(tp->t_state, TS_FLUSH)) { 760 1.10.2.2 bouyer CLR(tp->t_state, TS_FLUSH); 761 1.10.2.2 bouyer } else { 762 1.10.2.2 bouyer ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 763 1.10.2.2 bouyer } 764 1.10.2.2 bouyer 765 1.10.2.2 bouyer (*linesw[tp->t_line].l_start)(tp); 766 1.10.2.2 bouyer 767 1.10.2.2 bouyer splx(s); 768 1.10.2.2 bouyer } 769 1.10.2.2 bouyer 770 1.10.2.2 bouyer int 771 1.10.2.2 bouyer txcomopen(dev_t dev, int flag, int mode, struct proc *p) 772 1.10.2.2 bouyer { 773 1.10.2.2 bouyer struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 774 1.10.2.2 bouyer struct txcom_chip *chip; 775 1.10.2.2 bouyer struct tty *tp; 776 1.10.2.2 bouyer int s, err; 777 1.10.2.2 bouyer 778 1.10.2.2 bouyer if (!sc) 779 1.10.2.2 bouyer return ENXIO; 780 1.10.2.2 bouyer 781 1.10.2.2 bouyer chip = sc->sc_chip; 782 1.10.2.2 bouyer tp = sc->sc_tty; 783 1.10.2.2 bouyer 784 1.10.2.2 bouyer if (ISSET(tp->t_state, TS_ISOPEN) && 785 1.10.2.2 bouyer ISSET(tp->t_state, TS_XCLUDE) && 786 1.10.2.2 bouyer p->p_ucred->cr_uid != 0) 787 1.10.2.2 bouyer return (EBUSY); 788 1.10.2.2 bouyer 789 1.10.2.2 bouyer s = spltty(); 790 1.10.2.2 bouyer 791 1.10.2.2 bouyer if (txcom_enable(sc->sc_chip)) { 792 1.10.2.2 bouyer splx(s); 793 1.10.2.2 bouyer goto out; 794 1.10.2.2 bouyer } 795 1.10.2.2 bouyer /* 796 1.10.2.2 bouyer * Do the following iff this is a first open. 797 1.10.2.2 bouyer */ 798 1.10.2.2 bouyer if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 799 1.10.2.2 bouyer struct termios t; 800 1.10.2.2 bouyer 801 1.10.2.2 bouyer tp->t_dev = dev; 802 1.10.2.2 bouyer 803 1.10.2.2 bouyer t.c_ispeed = 0; 804 1.10.2.2 bouyer if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 805 1.10.2.2 bouyer t.c_ospeed = chip->sc_speed; 806 1.10.2.2 bouyer t.c_cflag = chip->sc_cflag; 807 1.10.2.2 bouyer } else { 808 1.10.2.2 bouyer t.c_ospeed = TTYDEF_SPEED; 809 1.10.2.2 bouyer t.c_cflag = TTYDEF_CFLAG; 810 1.10.2.2 bouyer } 811 1.10.2.2 bouyer 812 1.10.2.2 bouyer if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL)) 813 1.10.2.2 bouyer SET(t.c_cflag, CLOCAL); 814 1.10.2.2 bouyer if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS)) 815 1.10.2.2 bouyer SET(t.c_cflag, CRTSCTS); 816 1.10.2.2 bouyer if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF)) 817 1.10.2.2 bouyer SET(t.c_cflag, MDMBUF); 818 1.10.2.2 bouyer 819 1.10.2.2 bouyer /* Make sure txcomparam() will do something. */ 820 1.10.2.2 bouyer tp->t_ospeed = 0; 821 1.10.2.2 bouyer txcomparam(tp, &t); 822 1.10.2.2 bouyer 823 1.10.2.2 bouyer tp->t_iflag = TTYDEF_IFLAG; 824 1.10.2.2 bouyer tp->t_oflag = TTYDEF_OFLAG; 825 1.10.2.2 bouyer tp->t_lflag = TTYDEF_LFLAG; 826 1.10.2.2 bouyer 827 1.10.2.2 bouyer ttychars(tp); 828 1.10.2.2 bouyer ttsetwater(tp); 829 1.10.2.2 bouyer 830 1.10.2.2 bouyer /* 831 1.10.2.2 bouyer * Turn on DTR. We must always do this, even if carrier is not 832 1.10.2.2 bouyer * present, because otherwise we'd have to use TIOCSDTR 833 1.10.2.2 bouyer * immediately after setting CLOCAL, which applications do not 834 1.10.2.2 bouyer * expect. We always assert DTR while the device is open 835 1.10.2.2 bouyer * unless explicitly requested to deassert it. 836 1.10.2.2 bouyer */ 837 1.10.2.2 bouyer txcom_modem(sc, 1); 838 1.10.2.2 bouyer 839 1.10.2.2 bouyer /* Clear the input ring, and unblock. */ 840 1.10.2.2 bouyer sc->sc_rbget = sc->sc_rbput = 0; 841 1.10.2.2 bouyer } 842 1.10.2.2 bouyer 843 1.10.2.2 bouyer splx(s); 844 1.10.2.2 bouyer #define TXCOMDIALOUT(x) (minor(x) & 0x80000) 845 1.10.2.2 bouyer if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) { 846 1.10.2.2 bouyer DPRINTF(("txcomopen: ttyopen failed\n")); 847 1.10.2.2 bouyer goto out; 848 1.10.2.2 bouyer } 849 1.10.2.2 bouyer if ((err = (*linesw[tp->t_line].l_open)(dev, tp))) { 850 1.10.2.2 bouyer DPRINTF(("txcomopen: line dicipline open failed\n")); 851 1.10.2.2 bouyer goto out; 852 1.10.2.2 bouyer } 853 1.10.2.2 bouyer 854 1.10.2.2 bouyer return err; 855 1.10.2.2 bouyer 856 1.10.2.2 bouyer out: 857 1.10.2.2 bouyer if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 858 1.10.2.2 bouyer /* 859 1.10.2.2 bouyer * We failed to open the device, and nobody else had it opened. 860 1.10.2.2 bouyer * Clean up the state as appropriate. 861 1.10.2.2 bouyer */ 862 1.10.2.2 bouyer txcom_shutdown(sc); 863 1.10.2.2 bouyer } 864 1.10.2.2 bouyer 865 1.10.2.2 bouyer return err; 866 1.10.2.2 bouyer 867 1.10.2.2 bouyer } 868 1.10.2.2 bouyer 869 1.10.2.2 bouyer int 870 1.10.2.2 bouyer txcomclose(dev_t dev, int flag, int mode, struct proc *p) 871 1.10.2.2 bouyer { 872 1.10.2.2 bouyer struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 873 1.10.2.2 bouyer struct tty *tp = sc->sc_tty; 874 1.10.2.2 bouyer 875 1.10.2.2 bouyer /* XXX This is for cons.c. */ 876 1.10.2.2 bouyer if (!ISSET(tp->t_state, TS_ISOPEN)) 877 1.10.2.2 bouyer return 0; 878 1.10.2.2 bouyer 879 1.10.2.2 bouyer (*linesw[tp->t_line].l_close)(tp, flag); 880 1.10.2.2 bouyer ttyclose(tp); 881 1.10.2.2 bouyer 882 1.10.2.2 bouyer if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 883 1.10.2.2 bouyer /* 884 1.10.2.2 bouyer * Although we got a last close, the device may still be in 885 1.10.2.2 bouyer * use; e.g. if this was the dialout node, and there are still 886 1.10.2.2 bouyer * processes waiting for carrier on the non-dialout node. 887 1.10.2.2 bouyer */ 888 1.10.2.2 bouyer txcom_shutdown(sc); 889 1.10.2.2 bouyer } 890 1.10.2.2 bouyer 891 1.10.2.2 bouyer return 0; 892 1.10.2.2 bouyer } 893 1.10.2.2 bouyer 894 1.10.2.2 bouyer int 895 1.10.2.2 bouyer txcomread(dev_t dev, struct uio *uio, int flag) 896 1.10.2.2 bouyer { 897 1.10.2.2 bouyer struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 898 1.10.2.2 bouyer struct tty *tp = sc->sc_tty; 899 1.10.2.2 bouyer 900 1.10.2.2 bouyer return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 901 1.10.2.2 bouyer } 902 1.10.2.2 bouyer 903 1.10.2.2 bouyer int 904 1.10.2.2 bouyer txcomwrite(dev_t dev, struct uio *uio, int flag) 905 1.10.2.2 bouyer { 906 1.10.2.2 bouyer struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 907 1.10.2.2 bouyer struct tty *tp = sc->sc_tty; 908 1.10.2.2 bouyer 909 1.10.2.2 bouyer return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 910 1.10.2.2 bouyer } 911 1.10.2.2 bouyer 912 1.10.2.2 bouyer struct tty * 913 1.10.2.2 bouyer txcomtty(dev_t dev) 914 1.10.2.2 bouyer { 915 1.10.2.2 bouyer struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 916 1.10.2.2 bouyer 917 1.10.2.2 bouyer return sc->sc_tty; 918 1.10.2.2 bouyer } 919 1.10.2.2 bouyer 920 1.10.2.2 bouyer int 921 1.10.2.2 bouyer txcomioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p) 922 1.10.2.2 bouyer { 923 1.10.2.2 bouyer struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 924 1.10.2.2 bouyer struct tty *tp = sc->sc_tty; 925 1.10.2.2 bouyer int s, err; 926 1.10.2.2 bouyer 927 1.10.2.2 bouyer err = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 928 1.10.2.2 bouyer if (err >= 0) { 929 1.10.2.2 bouyer return err; 930 1.10.2.2 bouyer } 931 1.10.2.2 bouyer 932 1.10.2.2 bouyer err = ttioctl(tp, cmd, data, flag, p); 933 1.10.2.2 bouyer if (err >= 0) { 934 1.10.2.2 bouyer return err; 935 1.10.2.2 bouyer } 936 1.10.2.2 bouyer 937 1.10.2.2 bouyer err = 0; 938 1.10.2.2 bouyer 939 1.10.2.2 bouyer s = spltty(); 940 1.10.2.2 bouyer 941 1.10.2.2 bouyer switch (cmd) { 942 1.10.2.2 bouyer default: 943 1.10.2.2 bouyer err = ENOTTY; 944 1.10.2.2 bouyer break; 945 1.10.2.2 bouyer 946 1.10.2.2 bouyer case TIOCSBRK: 947 1.10.2.2 bouyer txcom_break(sc, 1); 948 1.10.2.2 bouyer break; 949 1.10.2.2 bouyer 950 1.10.2.2 bouyer case TIOCCBRK: 951 1.10.2.2 bouyer txcom_break(sc, 0); 952 1.10.2.2 bouyer break; 953 1.10.2.2 bouyer 954 1.10.2.2 bouyer case TIOCSDTR: 955 1.10.2.2 bouyer txcom_modem(sc, 1); 956 1.10.2.2 bouyer break; 957 1.10.2.2 bouyer 958 1.10.2.2 bouyer case TIOCCDTR: 959 1.10.2.2 bouyer txcom_modem(sc, 0); 960 1.10.2.2 bouyer break; 961 1.10.2.2 bouyer 962 1.10.2.2 bouyer case TIOCGFLAGS: 963 1.10.2.2 bouyer *(int *)data = sc->sc_chip->sc_swflags; 964 1.10.2.2 bouyer break; 965 1.10.2.2 bouyer 966 1.10.2.2 bouyer case TIOCSFLAGS: 967 1.10.2.2 bouyer err = suser(p->p_ucred, &p->p_acflag); 968 1.10.2.2 bouyer if (err) { 969 1.10.2.2 bouyer break; 970 1.10.2.2 bouyer } 971 1.10.2.2 bouyer sc->sc_chip->sc_swflags = *(int *)data; 972 1.10.2.2 bouyer break; 973 1.10.2.2 bouyer 974 1.10.2.2 bouyer } 975 1.10.2.2 bouyer 976 1.10.2.2 bouyer splx(s); 977 1.10.2.2 bouyer 978 1.10.2.2 bouyer return err; 979 1.10.2.2 bouyer } 980 1.10.2.2 bouyer 981 1.10.2.2 bouyer void 982 1.10.2.2 bouyer txcomstop(struct tty *tp, int flag) 983 1.10.2.2 bouyer { 984 1.10.2.2 bouyer struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 985 1.10.2.2 bouyer int s; 986 1.10.2.2 bouyer 987 1.10.2.2 bouyer s = spltty(); 988 1.10.2.2 bouyer 989 1.10.2.2 bouyer if (ISSET(tp->t_state, TS_BUSY)) { 990 1.10.2.2 bouyer /* Stop transmitting at the next chunk. */ 991 1.10.2.2 bouyer sc->sc_tbc = 0; 992 1.10.2.2 bouyer sc->sc_heldtbc = 0; 993 1.10.2.2 bouyer if (!ISSET(tp->t_state, TS_TTSTOP)) 994 1.10.2.2 bouyer SET(tp->t_state, TS_FLUSH); 995 1.10.2.2 bouyer } 996 1.10.2.2 bouyer 997 1.10.2.2 bouyer splx(s); 998 1.10.2.2 bouyer } 999 1.10.2.2 bouyer 1000 1.10.2.2 bouyer void 1001 1.10.2.2 bouyer txcomstart(struct tty *tp) 1002 1.10.2.2 bouyer { 1003 1.10.2.2 bouyer struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 1004 1.10.2.2 bouyer struct txcom_chip *chip = sc->sc_chip; 1005 1.10.2.2 bouyer tx_chipset_tag_t tc = chip->sc_tc; 1006 1.10.2.2 bouyer int slot = chip->sc_slot; 1007 1.10.2.2 bouyer int s; 1008 1.10.2.2 bouyer 1009 1.10.2.2 bouyer s = spltty(); 1010 1.10.2.2 bouyer 1011 1.10.2.2 bouyer if (!__txcom_txbufready(chip, 0) || 1012 1.10.2.2 bouyer ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1013 1.10.2.2 bouyer goto out; 1014 1.10.2.2 bouyer 1015 1.10.2.2 bouyer if (tp->t_outq.c_cc <= tp->t_lowat) { 1016 1.10.2.2 bouyer if (ISSET(tp->t_state, TS_ASLEEP)) { 1017 1.10.2.2 bouyer CLR(tp->t_state, TS_ASLEEP); 1018 1.10.2.2 bouyer wakeup(&tp->t_outq); 1019 1.10.2.2 bouyer } 1020 1.10.2.2 bouyer selwakeup(&tp->t_wsel); 1021 1.10.2.2 bouyer if (tp->t_outq.c_cc == 0) 1022 1.10.2.2 bouyer goto out; 1023 1.10.2.2 bouyer } 1024 1.10.2.2 bouyer 1025 1.10.2.2 bouyer sc->sc_tba = tp->t_outq.c_cf; 1026 1.10.2.2 bouyer sc->sc_tbc = ndqb(&tp->t_outq, 0); 1027 1.10.2.2 bouyer SET(tp->t_state, TS_BUSY); 1028 1.10.2.2 bouyer 1029 1.10.2.2 bouyer /* Output the first character of the contiguous buffer. */ 1030 1.10.2.2 bouyer tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot), 1031 1.10.2.2 bouyer (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK)); 1032 1.10.2.2 bouyer 1033 1.10.2.2 bouyer sc->sc_tbc--; 1034 1.10.2.2 bouyer sc->sc_tba++; 1035 1.10.2.2 bouyer 1036 1.10.2.2 bouyer out: 1037 1.10.2.2 bouyer splx(s); 1038 1.10.2.2 bouyer } 1039 1.10.2.2 bouyer 1040 1.10.2.2 bouyer /* 1041 1.10.2.2 bouyer * Set TXcom tty parameters from termios. 1042 1.10.2.2 bouyer */ 1043 1.10.2.2 bouyer int 1044 1.10.2.2 bouyer txcomparam(struct tty *tp, struct termios *t) 1045 1.10.2.2 bouyer { 1046 1.10.2.2 bouyer struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 1047 1.10.2.2 bouyer struct txcom_chip *chip; 1048 1.10.2.2 bouyer int ospeed; 1049 1.10.2.2 bouyer int s; 1050 1.10.2.2 bouyer 1051 1.10.2.2 bouyer if (!sc) 1052 1.10.2.2 bouyer return ENXIO; 1053 1.10.2.2 bouyer 1054 1.10.2.2 bouyer ospeed = t->c_ospeed; 1055 1.10.2.2 bouyer 1056 1.10.2.2 bouyer /* Check requested parameters. */ 1057 1.10.2.2 bouyer if (ospeed < 0) { 1058 1.10.2.2 bouyer return EINVAL; 1059 1.10.2.2 bouyer } 1060 1.10.2.2 bouyer if (t->c_ispeed && t->c_ispeed != ospeed) { 1061 1.10.2.2 bouyer return EINVAL; 1062 1.10.2.2 bouyer } 1063 1.10.2.2 bouyer 1064 1.10.2.2 bouyer s = spltty(); 1065 1.10.2.2 bouyer chip = sc->sc_chip; 1066 1.10.2.2 bouyer /* 1067 1.10.2.2 bouyer * For the console, always force CLOCAL and !HUPCL, so that the port 1068 1.10.2.2 bouyer * is always active. 1069 1.10.2.2 bouyer */ 1070 1.10.2.2 bouyer if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) || 1071 1.10.2.2 bouyer ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 1072 1.10.2.2 bouyer SET(t->c_cflag, CLOCAL); 1073 1.10.2.2 bouyer CLR(t->c_cflag, HUPCL); 1074 1.10.2.2 bouyer } 1075 1.10.2.2 bouyer splx(s); 1076 1.10.2.2 bouyer 1077 1.10.2.2 bouyer /* 1078 1.10.2.2 bouyer * If we're not in a mode that assumes a connection is present, then 1079 1.10.2.2 bouyer * ignore carrier changes. 1080 1.10.2.2 bouyer */ 1081 1.10.2.2 bouyer if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1082 1.10.2.2 bouyer chip->sc_dcd = 0; 1083 1.10.2.2 bouyer else 1084 1.10.2.2 bouyer chip->sc_dcd = 1; 1085 1.10.2.2 bouyer 1086 1.10.2.2 bouyer /* 1087 1.10.2.2 bouyer * Only whack the UART when params change. 1088 1.10.2.2 bouyer * Some callers need to clear tp->t_ospeed 1089 1.10.2.2 bouyer * to make sure initialization gets done. 1090 1.10.2.2 bouyer */ 1091 1.10.2.2 bouyer if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) { 1092 1.10.2.2 bouyer return 0; 1093 1.10.2.2 bouyer } 1094 1.10.2.2 bouyer 1095 1.10.2.2 bouyer s = spltty(); 1096 1.10.2.2 bouyer chip = sc->sc_chip; 1097 1.10.2.2 bouyer chip->sc_speed = ospeed; 1098 1.10.2.2 bouyer chip->sc_cflag = t->c_cflag; 1099 1.10.2.2 bouyer 1100 1.10.2.2 bouyer txcom_setmode(chip); 1101 1.10.2.2 bouyer txcom_setbaudrate(chip); 1102 1.10.2.2 bouyer 1103 1.10.2.2 bouyer /* And copy to tty. */ 1104 1.10.2.2 bouyer tp->t_ispeed = 0; 1105 1.10.2.2 bouyer tp->t_ospeed = chip->sc_speed; 1106 1.10.2.2 bouyer tp->t_cflag = chip->sc_cflag; 1107 1.10.2.2 bouyer 1108 1.10.2.2 bouyer /* 1109 1.10.2.2 bouyer * Update the tty layer's idea of the carrier bit, in case we changed 1110 1.10.2.2 bouyer * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1111 1.10.2.2 bouyer * explicit request. 1112 1.10.2.2 bouyer */ 1113 1.10.2.2 bouyer (void) (*linesw[tp->t_line].l_modem)(tp, chip->sc_dcd); 1114 1.10.2.2 bouyer 1115 1.10.2.2 bouyer /* 1116 1.10.2.2 bouyer * If hardware flow control is disabled, unblock any hard flow 1117 1.10.2.2 bouyer * control state. 1118 1.10.2.2 bouyer */ 1119 1.10.2.2 bouyer if (!ISSET(chip->sc_cflag, CHWFLOW)) { 1120 1.10.2.2 bouyer txcomstart(tp); 1121 1.10.2.2 bouyer } 1122 1.10.2.2 bouyer 1123 1.10.2.2 bouyer splx(s); 1124 1.10.2.2 bouyer 1125 1.10.2.2 bouyer return 0; 1126 1.10.2.2 bouyer } 1127 1.10.2.2 bouyer 1128 1.10.2.2 bouyer int 1129 1.10.2.2 bouyer txcom_dcd_hook(void *arg, int type, long id, void *msg) 1130 1.10.2.2 bouyer { 1131 1.10.2.2 bouyer struct txcom_softc *sc = arg; 1132 1.10.2.2 bouyer struct tty *tp = sc->sc_tty; 1133 1.10.2.2 bouyer struct txcom_chip *chip = sc->sc_chip; 1134 1.10.2.2 bouyer int modem = !(int)msg; /* p-edge 1, n-edge 0 */ 1135 1.10.2.2 bouyer 1136 1.10.2.2 bouyer DPRINTF(("%s: DCD %s\n", __FUNCTION__, modem ? "ON" : "OFF")); 1137 1.10.2.2 bouyer 1138 1.10.2.2 bouyer if (modem && chip->sc_dcd) 1139 1.10.2.2 bouyer (void) (*linesw[tp->t_line].l_modem)(tp, chip->sc_dcd); 1140 1.10.2.2 bouyer 1141 1.10.2.2 bouyer return 0; 1142 1.10.2.2 bouyer } 1143 1.10.2.2 bouyer 1144 1.10.2.2 bouyer int 1145 1.10.2.2 bouyer txcom_cts_hook(void *arg, int type, long id, void *msg) 1146 1.10.2.2 bouyer { 1147 1.10.2.2 bouyer struct txcom_softc *sc = arg; 1148 1.10.2.2 bouyer struct tty *tp = sc->sc_tty; 1149 1.10.2.2 bouyer struct txcom_chip *chip = sc->sc_chip; 1150 1.10.2.2 bouyer int clear = !(int)msg; /* p-edge 1, n-edge 0 */ 1151 1.10.2.2 bouyer 1152 1.10.2.2 bouyer DPRINTF(("%s: CTS %s\n", __FUNCTION__, clear ? "ON" : "OFF")); 1153 1.10.2.2 bouyer 1154 1.10.2.2 bouyer if (chip->sc_msr_cts) { 1155 1.10.2.2 bouyer if (!clear) { 1156 1.10.2.2 bouyer chip->sc_tx_stopped = 1; 1157 1.10.2.2 bouyer } else { 1158 1.10.2.2 bouyer chip->sc_tx_stopped = 0; 1159 1.10.2.2 bouyer (*linesw[tp->t_line].l_start)(tp); 1160 1.10.2.2 bouyer } 1161 1.10.2.2 bouyer } 1162 1.10.2.2 bouyer 1163 1.10.2.2 bouyer return 0; 1164 1.10.2.2 bouyer } 1165 1.10.2.2 bouyer 1166 1.10.2.2 bouyer #ifdef TX39UARTDEBUG 1167 1.10.2.2 bouyer void 1168 1.10.2.2 bouyer txcom_dump(struct txcom_chip *chip) 1169 1.10.2.2 bouyer { 1170 1.10.2.2 bouyer tx_chipset_tag_t tc = chip->sc_tc; 1171 1.10.2.2 bouyer int slot = chip->sc_slot; 1172 1.10.2.2 bouyer txreg_t reg; 1173 1.10.2.2 bouyer 1174 1.10.2.2 bouyer reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 1175 1.10.2.2 bouyer #define ISSETPRINT(r, m) \ 1176 1.10.2.2 bouyer __is_set_print(r, TX39_UARTCTRL1_##m, #m) 1177 1.10.2.2 bouyer ISSETPRINT(reg, UARTON); 1178 1.10.2.2 bouyer ISSETPRINT(reg, EMPTY); 1179 1.10.2.2 bouyer ISSETPRINT(reg, PRXHOLDFULL); 1180 1.10.2.2 bouyer ISSETPRINT(reg, RXHOLDFULL); 1181 1.10.2.2 bouyer ISSETPRINT(reg, ENDMARX); 1182 1.10.2.2 bouyer ISSETPRINT(reg, ENDMATX); 1183 1.10.2.2 bouyer ISSETPRINT(reg, TESTMODE); 1184 1.10.2.2 bouyer ISSETPRINT(reg, ENBREAHALT); 1185 1.10.2.2 bouyer ISSETPRINT(reg, ENDMATEST); 1186 1.10.2.2 bouyer ISSETPRINT(reg, ENDMALOOP); 1187 1.10.2.2 bouyer ISSETPRINT(reg, PULSEOPT2); 1188 1.10.2.2 bouyer ISSETPRINT(reg, PULSEOPT1); 1189 1.10.2.2 bouyer ISSETPRINT(reg, DTINVERT); 1190 1.10.2.2 bouyer ISSETPRINT(reg, DISTXD); 1191 1.10.2.2 bouyer ISSETPRINT(reg, TWOSTOP); 1192 1.10.2.2 bouyer ISSETPRINT(reg, LOOPBACK); 1193 1.10.2.2 bouyer ISSETPRINT(reg, BIT7); 1194 1.10.2.2 bouyer ISSETPRINT(reg, EVENPARITY); 1195 1.10.2.2 bouyer ISSETPRINT(reg, ENPARITY); 1196 1.10.2.2 bouyer ISSETPRINT(reg, ENUART); 1197 1.10.2.2 bouyer } 1198 1.10.2.2 bouyer #endif /* TX39UARTDEBUG */ 1199
Indexes created Tue Nov 04 09:09:57 GMT 2025