txcom.c revision 1.11 1 1.11 sato /* $NetBSD: txcom.c,v 1.11 2001/01/04 05:01:59 sato Exp $ */
2 1.1 uch
3 1.9 uch /*-
4 1.9 uch * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5 1.1 uch * All rights reserved.
6 1.1 uch *
7 1.9 uch * This code is derived from software contributed to The NetBSD Foundation
8 1.9 uch * by UCHIYAMA Yasushi.
9 1.9 uch *
10 1.1 uch * Redistribution and use in source and binary forms, with or without
11 1.1 uch * modification, are permitted provided that the following conditions
12 1.1 uch * are met:
13 1.1 uch * 1. Redistributions of source code must retain the above copyright
14 1.1 uch * notice, this list of conditions and the following disclaimer.
15 1.9 uch * 2. Redistributions in binary form must reproduce the above copyright
16 1.9 uch * notice, this list of conditions and the following disclaimer in the
17 1.9 uch * documentation and/or other materials provided with the distribution.
18 1.9 uch * 3. All advertising materials mentioning features or use of this software
19 1.9 uch * must display the following acknowledgement:
20 1.9 uch * This product includes software developed by the NetBSD
21 1.9 uch * Foundation, Inc. and its contributors.
22 1.9 uch * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.9 uch * contributors may be used to endorse or promote products derived
24 1.9 uch * from this software without specific prior written permission.
25 1.1 uch *
26 1.9 uch * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.9 uch * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.9 uch * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.9 uch * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.9 uch * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.9 uch * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.9 uch * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.9 uch * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.9 uch * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.9 uch * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.9 uch * POSSIBILITY OF SUCH DAMAGE.
37 1.1 uch */
38 1.1 uch #include "opt_tx39_debug.h"
39 1.1 uch #include "opt_tx39uartdebug.h"
40 1.1 uch
41 1.1 uch #include <sys/param.h>
42 1.1 uch #include <sys/systm.h>
43 1.3 uch #include <sys/kernel.h>
44 1.1 uch #include <sys/device.h>
45 1.3 uch #include <sys/malloc.h>
46 1.1 uch
47 1.1 uch #include <sys/proc.h> /* tsleep/wakeup */
48 1.1 uch
49 1.1 uch #include <sys/ioctl.h>
50 1.1 uch #include <sys/select.h>
51 1.1 uch #include <sys/file.h>
52 1.1 uch
53 1.1 uch #include <sys/tty.h>
54 1.1 uch #include <sys/conf.h>
55 1.1 uch #include <dev/cons.h> /* consdev */
56 1.1 uch
57 1.1 uch #include <machine/bus.h>
58 1.9 uch #include <machine/config_hook.h>
59 1.1 uch
60 1.1 uch #include <hpcmips/tx/tx39var.h>
61 1.1 uch #include <hpcmips/tx/tx39icureg.h>
62 1.1 uch #include <hpcmips/tx/tx39uartvar.h>
63 1.1 uch #include <hpcmips/tx/tx39uartreg.h>
64 1.1 uch
65 1.5 uch #include <hpcmips/tx/tx39irvar.h>
66 1.5 uch
67 1.1 uch #include <hpcmips/tx/tx39clockreg.h> /* XXX */
68 1.1 uch
69 1.6 uch #include <hpcmips/tx/txiomanvar.h>
70 1.6 uch
71 1.1 uch #define SET(t, f) (t) |= (f)
72 1.1 uch #define CLR(t, f) (t) &= ~(f)
73 1.1 uch #define ISSET(t, f) ((t) & (f))
74 1.9 uch /*
75 1.9 uch * UARTA channel has DTR, DSR, RTS, CTS lines. and they wired to MFIO/IO port.
76 1.9 uch */
77 1.9 uch #define IS_COM0(s) ((s) == 0)
78 1.9 uch #define IS_COM1(s) ((s) == 1)
79 1.9 uch #define ON ((void *)1)
80 1.9 uch #define OFF ((void *)0)
81 1.1 uch
82 1.1 uch #ifdef TX39UARTDEBUG
83 1.1 uch #define DPRINTF(arg) printf arg
84 1.1 uch #else
85 1.1 uch #define DPRINTF(arg)
86 1.1 uch #endif
87 1.1 uch
88 1.3 uch #define TXCOM_HW_CONSOLE 0x40
89 1.3 uch #define TXCOM_RING_SIZE 256 /* must be a power of two! */
90 1.3 uch #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1)
91 1.1 uch
92 1.3 uch struct txcom_chip {
93 1.1 uch tx_chipset_tag_t sc_tc;
94 1.1 uch int sc_slot; /* UARTA or UARTB */
95 1.1 uch int sc_cflag;
96 1.1 uch int sc_speed;
97 1.3 uch int sc_swflags;
98 1.1 uch int sc_hwflags;
99 1.6 uch
100 1.6 uch int sc_dcd;
101 1.9 uch int sc_msr_cts;
102 1.9 uch int sc_tx_stopped;
103 1.3 uch };
104 1.1 uch
105 1.3 uch struct txcom_softc {
106 1.3 uch struct device sc_dev;
107 1.3 uch struct tty *sc_tty;
108 1.3 uch struct txcom_chip *sc_chip;
109 1.3 uch
110 1.8 thorpej struct callout sc_txsoft_ch;
111 1.8 thorpej struct callout sc_rxsoft_ch;
112 1.8 thorpej
113 1.3 uch u_int8_t *sc_tba; /* transmit buffer address */
114 1.3 uch int sc_tbc; /* transmit byte count */
115 1.3 uch int sc_heldtbc;
116 1.3 uch u_int8_t *sc_rbuf; /* receive buffer address */
117 1.3 uch int sc_rbput; /* receive byte count */
118 1.3 uch int sc_rbget;
119 1.1 uch };
120 1.1 uch
121 1.1 uch extern struct cfdriver txcom_cd;
122 1.1 uch
123 1.9 uch int txcom_match(struct device *, struct cfdata *, void *);
124 1.9 uch void txcom_attach(struct device *, struct device *, void *);
125 1.9 uch int txcom_print(void*, const char *);
126 1.9 uch
127 1.9 uch int txcom_txintr(void *);
128 1.9 uch int txcom_rxintr(void *);
129 1.9 uch int txcom_frameerr_intr(void *);
130 1.9 uch int txcom_parityerr_intr(void *);
131 1.9 uch int txcom_break_intr(void *);
132 1.3 uch
133 1.9 uch void txcom_rxsoft(void *);
134 1.9 uch void txcom_txsoft(void *);
135 1.3 uch
136 1.9 uch int txcom_stsoft(void *);
137 1.9 uch int txcom_stsoft2(void *);
138 1.9 uch int txcom_stsoft3(void *);
139 1.9 uch int txcom_stsoft4(void *);
140 1.9 uch
141 1.9 uch
142 1.9 uch void txcom_shutdown(struct txcom_softc *);
143 1.9 uch void txcom_break(struct txcom_softc *, int);
144 1.9 uch void txcom_modem(struct txcom_softc *, int);
145 1.9 uch void txcomstart(struct tty *);
146 1.9 uch int txcomparam(struct tty *, struct termios *);
147 1.9 uch
148 1.9 uch void txcom_reset (struct txcom_chip *);
149 1.9 uch int txcom_enable (struct txcom_chip *);
150 1.9 uch void txcom_disable (struct txcom_chip *);
151 1.9 uch void txcom_setmode (struct txcom_chip *);
152 1.9 uch void txcom_setbaudrate(struct txcom_chip *);
153 1.9 uch int txcom_cngetc (dev_t);
154 1.9 uch void txcom_cnputc (dev_t, int);
155 1.9 uch void txcom_cnpollc (dev_t, int);
156 1.3 uch
157 1.9 uch int txcom_dcd_hook(void *, int, long, void *);
158 1.9 uch int txcom_cts_hook(void *, int, long, void *);
159 1.1 uch
160 1.9 uch
161 1.9 uch __inline__ int __txcom_txbufready(struct txcom_chip *, int);
162 1.9 uch const char *__txcom_slotname(int);
163 1.9 uch
164 1.9 uch #ifdef TX39UARTDEBUG
165 1.9 uch void txcom_dump(struct txcom_chip *);
166 1.9 uch #endif
167 1.6 uch
168 1.1 uch cdev_decl(txcom);
169 1.1 uch
170 1.3 uch struct consdev txcomcons = {
171 1.3 uch NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc,
172 1.7 thorpej NULL, NODEV, CN_NORMAL
173 1.3 uch };
174 1.3 uch
175 1.1 uch /* Serial console */
176 1.3 uch struct txcom_chip txcom_chip;
177 1.1 uch
178 1.1 uch struct cfattach txcom_ca = {
179 1.1 uch sizeof(struct txcom_softc), txcom_match, txcom_attach
180 1.1 uch };
181 1.1 uch
182 1.1 uch int
183 1.1 uch txcom_match(parent, cf, aux)
184 1.1 uch struct device *parent;
185 1.1 uch struct cfdata *cf;
186 1.1 uch void *aux;
187 1.1 uch {
188 1.1 uch /* if the autoconfiguration got this far, there's a slot here */
189 1.1 uch return 1;
190 1.1 uch }
191 1.1 uch
192 1.1 uch void
193 1.9 uch txcom_attach(struct device *parent, struct device *self, void *aux)
194 1.1 uch {
195 1.1 uch struct tx39uart_attach_args *ua = aux;
196 1.1 uch struct txcom_softc *sc = (void*)self;
197 1.1 uch tx_chipset_tag_t tc;
198 1.1 uch struct tty *tp;
199 1.3 uch struct txcom_chip *chip;
200 1.6 uch int slot, console;
201 1.1 uch
202 1.1 uch /* Check this slot used as serial console */
203 1.6 uch console = (ua->ua_slot == txcom_chip.sc_slot) &&
204 1.6 uch (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE);
205 1.6 uch
206 1.6 uch if (console) {
207 1.3 uch sc->sc_chip = &txcom_chip;
208 1.3 uch } else {
209 1.3 uch if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip),
210 1.3 uch M_DEVBUF, M_WAITOK))) {
211 1.3 uch printf(": can't allocate chip\n");
212 1.3 uch return;
213 1.3 uch }
214 1.3 uch memset(sc->sc_chip, 0, sizeof(struct txcom_chip));
215 1.1 uch }
216 1.1 uch
217 1.3 uch chip = sc->sc_chip;
218 1.3 uch tc = chip->sc_tc = ua->ua_tc;
219 1.3 uch slot = chip->sc_slot = ua->ua_slot;
220 1.3 uch
221 1.6 uch #ifdef TX39UARTDEBUG
222 1.6 uch txcom_dump(chip);
223 1.6 uch #endif
224 1.6 uch if (!console)
225 1.6 uch txcom_reset(chip);
226 1.6 uch
227 1.3 uch if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) {
228 1.3 uch printf(": can't allocate buffer.\n");
229 1.3 uch return;
230 1.3 uch }
231 1.3 uch memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE);
232 1.1 uch
233 1.1 uch tp = ttymalloc();
234 1.1 uch tp->t_oproc = txcomstart;
235 1.1 uch tp->t_param = txcomparam;
236 1.1 uch tp->t_hwiflow = NULL;
237 1.1 uch sc->sc_tty = tp;
238 1.1 uch tty_attach(tp);
239 1.1 uch
240 1.3 uch if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
241 1.1 uch int maj;
242 1.1 uch /* locate the major number */
243 1.1 uch for (maj = 0; maj < nchrdev; maj++)
244 1.1 uch if (cdevsw[maj].d_open == txcomopen)
245 1.1 uch break;
246 1.1 uch
247 1.1 uch cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit);
248 1.1 uch
249 1.3 uch printf(": console");
250 1.1 uch }
251 1.1 uch
252 1.3 uch printf("\n");
253 1.1 uch
254 1.1 uch /*
255 1.1 uch * Enable interrupt
256 1.1 uch */
257 1.3 uch #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s))
258 1.3 uch
259 1.3 uch tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY,
260 1.3 uch txcom_rxintr, sc);
261 1.3 uch tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY,
262 1.3 uch txcom_txintr, sc);
263 1.3 uch tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY,
264 1.4 uch txcom_rxintr, sc);
265 1.3 uch tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY,
266 1.4 uch txcom_txintr, sc);
267 1.3 uch tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY,
268 1.3 uch txcom_frameerr_intr, sc);
269 1.3 uch tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY,
270 1.3 uch txcom_parityerr_intr, sc);
271 1.3 uch tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY,
272 1.3 uch txcom_break_intr, sc);
273 1.5 uch
274 1.9 uch /*
275 1.9 uch * UARTA has external signal line. (its wiring is platform dependent)
276 1.9 uch */
277 1.9 uch if (IS_COM0(slot)) {
278 1.9 uch /* install DCD, CTS hooks. */
279 1.11 sato config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_DCD,
280 1.9 uch CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc);
281 1.11 sato config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_CTS,
282 1.9 uch CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc);
283 1.9 uch }
284 1.6 uch
285 1.5 uch /*
286 1.5 uch * UARTB can connect IR module
287 1.5 uch */
288 1.9 uch if (IS_COM1(slot)) {
289 1.5 uch struct txcom_attach_args tca;
290 1.5 uch tca.tca_tc = tc;
291 1.5 uch tca.tca_parent = self;
292 1.5 uch config_found(self, &tca, txcom_print);
293 1.5 uch }
294 1.5 uch }
295 1.5 uch
296 1.5 uch int
297 1.9 uch txcom_print(void *aux, const char *pnp)
298 1.5 uch {
299 1.5 uch return pnp ? QUIET : UNCONF;
300 1.1 uch }
301 1.1 uch
302 1.6 uch void
303 1.9 uch txcom_reset(struct txcom_chip *chip)
304 1.6 uch {
305 1.6 uch tx_chipset_tag_t tc;
306 1.6 uch int slot, ofs;
307 1.6 uch txreg_t reg;
308 1.6 uch
309 1.6 uch tc = chip->sc_tc;
310 1.6 uch slot = chip->sc_slot;
311 1.6 uch ofs = TX39_UARTCTRL1_REG(slot);
312 1.6 uch
313 1.6 uch /* Supply clock */
314 1.6 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
315 1.6 uch reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
316 1.6 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
317 1.6 uch
318 1.6 uch /* reset UART module */
319 1.6 uch tx_conf_write(tc, ofs, 0);
320 1.6 uch }
321 1.6 uch
322 1.1 uch int
323 1.9 uch txcom_enable(struct txcom_chip *chip)
324 1.1 uch {
325 1.1 uch tx_chipset_tag_t tc;
326 1.1 uch txreg_t reg;
327 1.3 uch int slot, ofs, timeout;
328 1.1 uch
329 1.3 uch tc = chip->sc_tc;
330 1.3 uch slot = chip->sc_slot;
331 1.3 uch ofs = TX39_UARTCTRL1_REG(slot);
332 1.1 uch
333 1.9 uch /* External power supply (if any) */
334 1.9 uch config_hook_call(CONFIG_HOOK_POWERCONTROL,
335 1.9 uch CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON);
336 1.9 uch delay(3);
337 1.9 uch
338 1.6 uch /* Supply clock */
339 1.5 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
340 1.5 uch reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
341 1.5 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
342 1.5 uch
343 1.6 uch /*
344 1.6 uch * XXX Disable DMA (DMA not coded yet)
345 1.6 uch */
346 1.6 uch reg = tx_conf_read(tc, ofs);
347 1.6 uch reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
348 1.6 uch tx_conf_write(tc, ofs, reg);
349 1.6 uch
350 1.6 uch /* enable */
351 1.3 uch reg = tx_conf_read(tc, ofs);
352 1.1 uch reg |= TX39_UARTCTRL1_ENUART;
353 1.1 uch reg &= ~TX39_UARTCTRL1_ENBREAHALT;
354 1.3 uch tx_conf_write(tc, ofs, reg);
355 1.3 uch
356 1.9 uch timeout = 100000;
357 1.3 uch
358 1.3 uch while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) &&
359 1.3 uch --timeout > 0)
360 1.3 uch ;
361 1.3 uch
362 1.5 uch if (timeout == 0 && !cold) {
363 1.6 uch printf("%s never power up\n", __txcom_slotname(slot));
364 1.3 uch return 1;
365 1.3 uch }
366 1.3 uch
367 1.1 uch return 0;
368 1.1 uch }
369 1.1 uch
370 1.1 uch void
371 1.9 uch txcom_disable(struct txcom_chip *chip)
372 1.1 uch {
373 1.1 uch tx_chipset_tag_t tc;
374 1.1 uch txreg_t reg;
375 1.1 uch int slot;
376 1.1 uch
377 1.3 uch tc = chip->sc_tc;
378 1.3 uch slot = chip->sc_slot;
379 1.1 uch
380 1.1 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
381 1.1 uch /* DMA */
382 1.1 uch reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
383 1.3 uch
384 1.6 uch /* disable module */
385 1.1 uch reg &= ~TX39_UARTCTRL1_ENUART;
386 1.1 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
387 1.3 uch
388 1.1 uch /* Clock */
389 1.1 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
390 1.1 uch reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
391 1.1 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
392 1.1 uch
393 1.1 uch }
394 1.1 uch
395 1.9 uch __inline__ int
396 1.9 uch __txcom_txbufready(struct txcom_chip *chip, int retry)
397 1.3 uch {
398 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
399 1.3 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
400 1.3 uch
401 1.3 uch do {
402 1.3 uch if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY)
403 1.3 uch return 1;
404 1.3 uch } while(--retry != 0);
405 1.3 uch
406 1.1 uch return 0;
407 1.1 uch }
408 1.1 uch
409 1.5 uch void
410 1.9 uch txcom_pulse_mode(struct device *dev)
411 1.5 uch {
412 1.5 uch struct txcom_softc *sc = (void*)dev;
413 1.5 uch struct txcom_chip *chip = sc->sc_chip;
414 1.5 uch tx_chipset_tag_t tc = chip->sc_tc;
415 1.5 uch int ofs;
416 1.5 uch txreg_t reg;
417 1.5 uch
418 1.5 uch ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
419 1.5 uch
420 1.5 uch reg = tx_conf_read(tc, ofs);
421 1.6 uch /* WindowsCE use this setting */
422 1.6 uch reg |= TX39_UARTCTRL1_PULSEOPT1;
423 1.6 uch reg &= ~TX39_UARTCTRL1_PULSEOPT2;
424 1.6 uch reg |= TX39_UARTCTRL1_DTINVERT;
425 1.6 uch
426 1.5 uch tx_conf_write(tc, ofs, reg);
427 1.5 uch }
428 1.5 uch
429 1.3 uch /*
430 1.3 uch * console
431 1.3 uch */
432 1.1 uch int
433 1.9 uch txcom_cngetc(dev_t dev)
434 1.1 uch {
435 1.1 uch tx_chipset_tag_t tc;
436 1.2 uch int ofs, c, s;
437 1.2 uch
438 1.3 uch s = spltty();
439 1.2 uch
440 1.3 uch tc = txcom_chip.sc_tc;
441 1.3 uch ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot);
442 1.1 uch
443 1.1 uch while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs)))
444 1.1 uch ;
445 1.2 uch
446 1.3 uch c = TX39_UARTRXHOLD_RXDATA(
447 1.3 uch tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot)));
448 1.2 uch
449 1.3 uch if (c == '\r')
450 1.1 uch c = '\n';
451 1.1 uch
452 1.2 uch splx(s);
453 1.2 uch
454 1.1 uch return c;
455 1.1 uch }
456 1.1 uch
457 1.1 uch void
458 1.9 uch txcom_cnputc(dev_t dev, int c)
459 1.1 uch {
460 1.3 uch struct txcom_chip *chip = &txcom_chip;
461 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
462 1.3 uch int s;
463 1.2 uch
464 1.3 uch s = spltty();
465 1.1 uch
466 1.3 uch /* Wait for transmitter to empty */
467 1.3 uch __txcom_txbufready(chip, -1);
468 1.1 uch
469 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
470 1.1 uch (c & TX39_UARTTXHOLD_TXDATA_MASK));
471 1.1 uch
472 1.3 uch __txcom_txbufready(chip, -1);
473 1.3 uch
474 1.2 uch splx(s);
475 1.1 uch }
476 1.1 uch
477 1.1 uch void
478 1.9 uch txcom_cnpollc(dev_t dev, int on)
479 1.1 uch {
480 1.1 uch }
481 1.1 uch
482 1.1 uch void
483 1.9 uch txcom_setmode(struct txcom_chip *chip)
484 1.1 uch {
485 1.3 uch tcflag_t cflag = chip->sc_cflag;
486 1.3 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
487 1.1 uch txreg_t reg;
488 1.1 uch
489 1.3 uch reg = tx_conf_read(chip->sc_tc, ofs);
490 1.6 uch reg &= ~TX39_UARTCTRL1_ENUART;
491 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg);
492 1.6 uch
493 1.1 uch switch (ISSET(cflag, CSIZE)) {
494 1.1 uch default:
495 1.1 uch printf("txcom_setmode: CS7, CS8 only. use CS7");
496 1.1 uch /* FALL THROUGH */
497 1.1 uch case CS7:
498 1.1 uch reg |= TX39_UARTCTRL1_BIT7;
499 1.1 uch break;
500 1.1 uch case CS8:
501 1.1 uch reg &= ~TX39_UARTCTRL1_BIT7;
502 1.1 uch break;
503 1.1 uch }
504 1.3 uch
505 1.1 uch if (ISSET(cflag, PARENB)) {
506 1.1 uch reg |= TX39_UARTCTRL1_ENPARITY;
507 1.1 uch if (ISSET(cflag, PARODD)) {
508 1.1 uch reg &= ~TX39_UARTCTRL1_EVENPARITY;
509 1.1 uch } else {
510 1.1 uch reg |= TX39_UARTCTRL1_EVENPARITY;
511 1.1 uch }
512 1.1 uch } else {
513 1.1 uch reg &= ~TX39_UARTCTRL1_ENPARITY;
514 1.1 uch }
515 1.3 uch
516 1.6 uch if (ISSET(cflag, CSTOPB))
517 1.1 uch reg |= TX39_UARTCTRL1_TWOSTOP;
518 1.6 uch else
519 1.6 uch reg &= ~TX39_UARTCTRL1_TWOSTOP;
520 1.6 uch
521 1.6 uch reg |= TX39_UARTCTRL1_ENUART;
522 1.3 uch tx_conf_write(chip->sc_tc, ofs, reg);
523 1.3 uch }
524 1.3 uch
525 1.3 uch void
526 1.9 uch txcom_setbaudrate(struct txcom_chip *chip)
527 1.3 uch {
528 1.3 uch int baudrate;
529 1.6 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
530 1.6 uch txreg_t reg, reg1;
531 1.3 uch
532 1.3 uch if (chip->sc_speed == 0)
533 1.3 uch return;
534 1.3 uch
535 1.5 uch if (!cold)
536 1.5 uch DPRINTF(("txcom_setbaudrate: %d\n", chip->sc_speed));
537 1.5 uch
538 1.6 uch reg1 = tx_conf_read(chip->sc_tc, ofs);
539 1.6 uch reg1 &= ~TX39_UARTCTRL1_ENUART;
540 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg1);
541 1.6 uch
542 1.3 uch baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1;
543 1.3 uch reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate);
544 1.3 uch
545 1.3 uch tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg);
546 1.6 uch
547 1.6 uch reg1 |= TX39_UARTCTRL1_ENUART;
548 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg1);
549 1.3 uch }
550 1.3 uch
551 1.3 uch int
552 1.9 uch txcom_cnattach(int slot, int speed, int cflag)
553 1.3 uch {
554 1.3 uch cn_tab = &txcomcons;
555 1.3 uch
556 1.3 uch txcom_chip.sc_tc = tx_conf_get_tag();
557 1.3 uch txcom_chip.sc_slot = slot;
558 1.3 uch txcom_chip.sc_cflag = cflag;
559 1.3 uch txcom_chip.sc_speed = speed;
560 1.3 uch txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE;
561 1.6 uch #if notyet
562 1.6 uch txcom_reset(&txcom_chip);
563 1.6 uch #endif
564 1.6 uch txcom_setmode(&txcom_chip);
565 1.6 uch txcom_setbaudrate(&txcom_chip);
566 1.3 uch
567 1.5 uch if (txcom_enable(&txcom_chip))
568 1.5 uch return 1;
569 1.5 uch
570 1.3 uch return 0;
571 1.3 uch }
572 1.3 uch
573 1.3 uch /*
574 1.3 uch * tty
575 1.3 uch */
576 1.3 uch void
577 1.9 uch txcom_break(struct txcom_softc *sc, int on)
578 1.3 uch {
579 1.3 uch struct txcom_chip *chip = sc->sc_chip;
580 1.1 uch
581 1.3 uch tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
582 1.3 uch on ? TX39_UARTTXHOLD_BREAK : 0);
583 1.1 uch }
584 1.1 uch
585 1.1 uch void
586 1.9 uch txcom_modem(struct txcom_softc *sc, int on)
587 1.1 uch {
588 1.3 uch struct txcom_chip *chip = sc->sc_chip;
589 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
590 1.3 uch int slot = chip->sc_slot;
591 1.1 uch txreg_t reg;
592 1.1 uch
593 1.9 uch /* assert DTR */
594 1.9 uch if (IS_COM0(slot)) {
595 1.11 sato config_hook_call(CONFIG_HOOK_SET,
596 1.11 sato CONFIG_HOOK_COM0_DTR,
597 1.9 uch (void *)on);
598 1.9 uch }
599 1.9 uch
600 1.3 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
601 1.6 uch reg &= ~TX39_UARTCTRL1_ENUART;
602 1.6 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
603 1.3 uch
604 1.3 uch if (on) {
605 1.3 uch reg &= ~TX39_UARTCTRL1_DISTXD;
606 1.3 uch } else {
607 1.6 uch reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */
608 1.3 uch }
609 1.6 uch
610 1.6 uch reg |= TX39_UARTCTRL1_ENUART;
611 1.6 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
612 1.1 uch }
613 1.1 uch
614 1.1 uch void
615 1.9 uch txcom_shutdown(struct txcom_softc *sc)
616 1.1 uch {
617 1.1 uch struct tty *tp = sc->sc_tty;
618 1.3 uch int s = spltty();
619 1.1 uch
620 1.3 uch /* Clear any break condition set with TIOCSBRK. */
621 1.3 uch txcom_break(sc, 0);
622 1.3 uch
623 1.3 uch /*
624 1.3 uch * Hang up if necessary. Wait a bit, so the other side has time to
625 1.3 uch * notice even if we immediately open the port again.
626 1.3 uch */
627 1.3 uch if (ISSET(tp->t_cflag, HUPCL)) {
628 1.3 uch txcom_modem(sc, 0);
629 1.3 uch (void) tsleep(sc, TTIPRI, ttclos, hz);
630 1.3 uch }
631 1.3 uch
632 1.3 uch
633 1.3 uch /* Turn off interrupts if not the console. */
634 1.3 uch if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
635 1.3 uch txcom_disable(sc->sc_chip);
636 1.3 uch }
637 1.1 uch
638 1.3 uch splx(s);
639 1.3 uch }
640 1.1 uch
641 1.9 uch const char *
642 1.9 uch __txcom_slotname(int slot)
643 1.3 uch {
644 1.9 uch static const char *slotname[] = {"UARTA", "UARTB", "unknown"};
645 1.9 uch
646 1.9 uch if (slot != 0 && slot != 1)
647 1.9 uch return slotname[2];
648 1.9 uch
649 1.9 uch return slotname[slot];
650 1.2 uch }
651 1.2 uch
652 1.2 uch int
653 1.9 uch txcom_frameerr_intr(void *arg)
654 1.3 uch {
655 1.3 uch struct txcom_softc *sc = arg;
656 1.3 uch
657 1.3 uch printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot));
658 1.3 uch
659 1.3 uch return 0;
660 1.3 uch }
661 1.3 uch
662 1.3 uch int
663 1.9 uch txcom_parityerr_intr(void *arg)
664 1.3 uch {
665 1.3 uch struct txcom_softc *sc = arg;
666 1.3 uch
667 1.3 uch printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot));
668 1.2 uch
669 1.2 uch return 0;
670 1.1 uch }
671 1.1 uch
672 1.1 uch int
673 1.9 uch txcom_break_intr(void *arg)
674 1.1 uch {
675 1.1 uch struct txcom_softc *sc = arg;
676 1.3 uch
677 1.3 uch printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot));
678 1.3 uch
679 1.3 uch return 0;
680 1.3 uch }
681 1.3 uch
682 1.3 uch int
683 1.9 uch txcom_rxintr(void *arg)
684 1.3 uch {
685 1.3 uch struct txcom_softc *sc = arg;
686 1.3 uch struct txcom_chip *chip = sc->sc_chip;
687 1.1 uch u_int8_t c;
688 1.1 uch
689 1.3 uch c = TX39_UARTRXHOLD_RXDATA(
690 1.3 uch tx_conf_read(chip->sc_tc,
691 1.3 uch TX39_UARTRXHOLD_REG(chip->sc_slot)));
692 1.3 uch
693 1.3 uch sc->sc_rbuf[sc->sc_rbput] = c;
694 1.3 uch sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK;
695 1.3 uch
696 1.8 thorpej callout_reset(&sc->sc_rxsoft_ch, 1, txcom_rxsoft, sc);
697 1.1 uch
698 1.1 uch return 0;
699 1.1 uch }
700 1.1 uch
701 1.3 uch void
702 1.9 uch txcom_rxsoft(void *arg)
703 1.3 uch {
704 1.3 uch struct txcom_softc *sc = arg;
705 1.3 uch struct tty *tp = sc->sc_tty;
706 1.3 uch int (*rint) __P((int c, struct tty *tp));
707 1.3 uch int code;
708 1.3 uch int s, end, get;
709 1.3 uch
710 1.10 eeh rint = tp->t_linesw->l_rint;
711 1.3 uch
712 1.3 uch s = spltty();
713 1.3 uch end = sc->sc_rbput;
714 1.3 uch get = sc->sc_rbget;
715 1.3 uch
716 1.3 uch while (get != end) {
717 1.3 uch code = sc->sc_rbuf[get];
718 1.3 uch
719 1.3 uch if ((*rint)(code, tp) == -1) {
720 1.3 uch /*
721 1.3 uch * The line discipline's buffer is out of space.
722 1.3 uch */
723 1.3 uch }
724 1.3 uch get = (get + 1) % TXCOM_RING_MASK;
725 1.3 uch }
726 1.3 uch sc->sc_rbget = get;
727 1.3 uch
728 1.3 uch splx(s);
729 1.3 uch }
730 1.3 uch
731 1.1 uch int
732 1.9 uch txcom_txintr(void *arg)
733 1.1 uch {
734 1.1 uch struct txcom_softc *sc = arg;
735 1.3 uch struct txcom_chip *chip = sc->sc_chip;
736 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
737 1.1 uch
738 1.3 uch if (sc->sc_tbc > 0) {
739 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
740 1.3 uch (*sc->sc_tba &
741 1.3 uch TX39_UARTTXHOLD_TXDATA_MASK));
742 1.3 uch sc->sc_tbc--;
743 1.3 uch sc->sc_tba++;
744 1.3 uch } else {
745 1.8 thorpej callout_reset(&sc->sc_rxsoft_ch, 1, txcom_txsoft, sc);
746 1.3 uch }
747 1.1 uch
748 1.1 uch return 0;
749 1.1 uch }
750 1.1 uch
751 1.3 uch void
752 1.9 uch txcom_txsoft(void *arg)
753 1.3 uch {
754 1.3 uch struct txcom_softc *sc = arg;
755 1.3 uch struct tty *tp = sc->sc_tty;
756 1.3 uch int s = spltty();
757 1.3 uch
758 1.3 uch CLR(tp->t_state, TS_BUSY);
759 1.3 uch if (ISSET(tp->t_state, TS_FLUSH)) {
760 1.3 uch CLR(tp->t_state, TS_FLUSH);
761 1.3 uch } else {
762 1.3 uch ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
763 1.3 uch }
764 1.3 uch
765 1.10 eeh (*tp->t_linesw->l_start)(tp);
766 1.3 uch
767 1.3 uch splx(s);
768 1.3 uch }
769 1.1 uch
770 1.1 uch int
771 1.9 uch txcomopen(dev_t dev, int flag, int mode, struct proc *p)
772 1.1 uch {
773 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
774 1.3 uch struct txcom_chip *chip;
775 1.3 uch struct tty *tp;
776 1.3 uch int s, err;
777 1.1 uch
778 1.3 uch if (!sc)
779 1.3 uch return ENXIO;
780 1.3 uch
781 1.3 uch chip = sc->sc_chip;
782 1.3 uch tp = sc->sc_tty;
783 1.3 uch
784 1.3 uch if (ISSET(tp->t_state, TS_ISOPEN) &&
785 1.3 uch ISSET(tp->t_state, TS_XCLUDE) &&
786 1.3 uch p->p_ucred->cr_uid != 0)
787 1.3 uch return (EBUSY);
788 1.3 uch
789 1.3 uch s = spltty();
790 1.3 uch
791 1.6 uch if (txcom_enable(sc->sc_chip)) {
792 1.6 uch splx(s);
793 1.5 uch goto out;
794 1.6 uch }
795 1.5 uch /*
796 1.5 uch * Do the following iff this is a first open.
797 1.5 uch */
798 1.5 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
799 1.5 uch struct termios t;
800 1.5 uch
801 1.5 uch tp->t_dev = dev;
802 1.1 uch
803 1.5 uch t.c_ispeed = 0;
804 1.5 uch if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
805 1.5 uch t.c_ospeed = chip->sc_speed;
806 1.5 uch t.c_cflag = chip->sc_cflag;
807 1.5 uch } else {
808 1.5 uch t.c_ospeed = TTYDEF_SPEED;
809 1.5 uch t.c_cflag = TTYDEF_CFLAG;
810 1.5 uch }
811 1.3 uch
812 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL))
813 1.5 uch SET(t.c_cflag, CLOCAL);
814 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS))
815 1.5 uch SET(t.c_cflag, CRTSCTS);
816 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF))
817 1.5 uch SET(t.c_cflag, MDMBUF);
818 1.5 uch
819 1.5 uch /* Make sure txcomparam() will do something. */
820 1.5 uch tp->t_ospeed = 0;
821 1.5 uch txcomparam(tp, &t);
822 1.5 uch
823 1.5 uch tp->t_iflag = TTYDEF_IFLAG;
824 1.5 uch tp->t_oflag = TTYDEF_OFLAG;
825 1.5 uch tp->t_lflag = TTYDEF_LFLAG;
826 1.1 uch
827 1.5 uch ttychars(tp);
828 1.5 uch ttsetwater(tp);
829 1.3 uch
830 1.5 uch /*
831 1.5 uch * Turn on DTR. We must always do this, even if carrier is not
832 1.5 uch * present, because otherwise we'd have to use TIOCSDTR
833 1.5 uch * immediately after setting CLOCAL, which applications do not
834 1.5 uch * expect. We always assert DTR while the device is open
835 1.5 uch * unless explicitly requested to deassert it.
836 1.5 uch */
837 1.5 uch txcom_modem(sc, 1);
838 1.3 uch
839 1.5 uch /* Clear the input ring, and unblock. */
840 1.5 uch sc->sc_rbget = sc->sc_rbput = 0;
841 1.5 uch }
842 1.3 uch
843 1.3 uch splx(s);
844 1.6 uch #define TXCOMDIALOUT(x) (minor(x) & 0x80000)
845 1.6 uch if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) {
846 1.1 uch DPRINTF(("txcomopen: ttyopen failed\n"));
847 1.3 uch goto out;
848 1.1 uch }
849 1.10 eeh if ((err = (*tp->t_linesw->l_open)(dev, tp))) {
850 1.1 uch DPRINTF(("txcomopen: line dicipline open failed\n"));
851 1.3 uch goto out;
852 1.3 uch }
853 1.3 uch
854 1.3 uch return err;
855 1.3 uch
856 1.3 uch out:
857 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
858 1.3 uch /*
859 1.3 uch * We failed to open the device, and nobody else had it opened.
860 1.3 uch * Clean up the state as appropriate.
861 1.3 uch */
862 1.3 uch txcom_shutdown(sc);
863 1.1 uch }
864 1.1 uch
865 1.1 uch return err;
866 1.3 uch
867 1.1 uch }
868 1.1 uch
869 1.1 uch int
870 1.9 uch txcomclose(dev_t dev, int flag, int mode, struct proc *p)
871 1.1 uch {
872 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
873 1.1 uch struct tty *tp = sc->sc_tty;
874 1.1 uch
875 1.3 uch /* XXX This is for cons.c. */
876 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN))
877 1.3 uch return 0;
878 1.3 uch
879 1.10 eeh (*tp->t_linesw->l_close)(tp, flag);
880 1.1 uch ttyclose(tp);
881 1.1 uch
882 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
883 1.3 uch /*
884 1.3 uch * Although we got a last close, the device may still be in
885 1.3 uch * use; e.g. if this was the dialout node, and there are still
886 1.3 uch * processes waiting for carrier on the non-dialout node.
887 1.3 uch */
888 1.3 uch txcom_shutdown(sc);
889 1.3 uch }
890 1.3 uch
891 1.1 uch return 0;
892 1.1 uch }
893 1.1 uch
894 1.1 uch int
895 1.9 uch txcomread(dev_t dev, struct uio *uio, int flag)
896 1.1 uch {
897 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
898 1.1 uch struct tty *tp = sc->sc_tty;
899 1.3 uch
900 1.10 eeh return ((*tp->t_linesw->l_read)(tp, uio, flag));
901 1.1 uch }
902 1.1 uch
903 1.1 uch int
904 1.9 uch txcomwrite(dev_t dev, struct uio *uio, int flag)
905 1.1 uch {
906 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
907 1.1 uch struct tty *tp = sc->sc_tty;
908 1.1 uch
909 1.10 eeh return ((*tp->t_linesw->l_write)(tp, uio, flag));
910 1.1 uch }
911 1.1 uch
912 1.1 uch struct tty *
913 1.9 uch txcomtty(dev_t dev)
914 1.1 uch {
915 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
916 1.3 uch
917 1.3 uch return sc->sc_tty;
918 1.1 uch }
919 1.1 uch
920 1.1 uch int
921 1.9 uch txcomioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
922 1.1 uch {
923 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
924 1.1 uch struct tty *tp = sc->sc_tty;
925 1.3 uch int s, err;
926 1.3 uch
927 1.10 eeh err = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
928 1.3 uch if (err >= 0) {
929 1.3 uch return err;
930 1.3 uch }
931 1.3 uch
932 1.3 uch err = ttioctl(tp, cmd, data, flag, p);
933 1.3 uch if (err >= 0) {
934 1.3 uch return err;
935 1.3 uch }
936 1.3 uch
937 1.3 uch err = 0;
938 1.3 uch
939 1.3 uch s = spltty();
940 1.3 uch
941 1.3 uch switch (cmd) {
942 1.5 uch default:
943 1.5 uch err = ENOTTY;
944 1.5 uch break;
945 1.5 uch
946 1.3 uch case TIOCSBRK:
947 1.3 uch txcom_break(sc, 1);
948 1.3 uch break;
949 1.3 uch
950 1.3 uch case TIOCCBRK:
951 1.3 uch txcom_break(sc, 0);
952 1.3 uch break;
953 1.3 uch
954 1.3 uch case TIOCSDTR:
955 1.3 uch txcom_modem(sc, 1);
956 1.3 uch break;
957 1.3 uch
958 1.3 uch case TIOCCDTR:
959 1.3 uch txcom_modem(sc, 0);
960 1.3 uch break;
961 1.3 uch
962 1.3 uch case TIOCGFLAGS:
963 1.3 uch *(int *)data = sc->sc_chip->sc_swflags;
964 1.3 uch break;
965 1.3 uch
966 1.3 uch case TIOCSFLAGS:
967 1.3 uch err = suser(p->p_ucred, &p->p_acflag);
968 1.3 uch if (err) {
969 1.3 uch break;
970 1.3 uch }
971 1.3 uch sc->sc_chip->sc_swflags = *(int *)data;
972 1.3 uch break;
973 1.3 uch
974 1.3 uch }
975 1.1 uch
976 1.3 uch splx(s);
977 1.1 uch
978 1.3 uch return err;
979 1.1 uch }
980 1.1 uch
981 1.1 uch void
982 1.9 uch txcomstop(struct tty *tp, int flag)
983 1.1 uch {
984 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
985 1.1 uch int s;
986 1.1 uch
987 1.1 uch s = spltty();
988 1.1 uch
989 1.1 uch if (ISSET(tp->t_state, TS_BUSY)) {
990 1.1 uch /* Stop transmitting at the next chunk. */
991 1.1 uch sc->sc_tbc = 0;
992 1.1 uch sc->sc_heldtbc = 0;
993 1.1 uch if (!ISSET(tp->t_state, TS_TTSTOP))
994 1.1 uch SET(tp->t_state, TS_FLUSH);
995 1.1 uch }
996 1.3 uch
997 1.1 uch splx(s);
998 1.1 uch }
999 1.1 uch
1000 1.1 uch void
1001 1.9 uch txcomstart(struct tty *tp)
1002 1.1 uch {
1003 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
1004 1.3 uch struct txcom_chip *chip = sc->sc_chip;
1005 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
1006 1.3 uch int slot = chip->sc_slot;
1007 1.1 uch int s;
1008 1.1 uch
1009 1.1 uch s = spltty();
1010 1.3 uch
1011 1.3 uch if (!__txcom_txbufready(chip, 0) ||
1012 1.3 uch ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
1013 1.3 uch goto out;
1014 1.1 uch
1015 1.1 uch if (tp->t_outq.c_cc <= tp->t_lowat) {
1016 1.1 uch if (ISSET(tp->t_state, TS_ASLEEP)) {
1017 1.1 uch CLR(tp->t_state, TS_ASLEEP);
1018 1.1 uch wakeup(&tp->t_outq);
1019 1.1 uch }
1020 1.1 uch selwakeup(&tp->t_wsel);
1021 1.1 uch if (tp->t_outq.c_cc == 0)
1022 1.3 uch goto out;
1023 1.1 uch }
1024 1.3 uch
1025 1.1 uch sc->sc_tba = tp->t_outq.c_cf;
1026 1.1 uch sc->sc_tbc = ndqb(&tp->t_outq, 0);
1027 1.3 uch SET(tp->t_state, TS_BUSY);
1028 1.3 uch
1029 1.3 uch /* Output the first character of the contiguous buffer. */
1030 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot),
1031 1.3 uch (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK));
1032 1.3 uch
1033 1.3 uch sc->sc_tbc--;
1034 1.3 uch sc->sc_tba++;
1035 1.1 uch
1036 1.3 uch out:
1037 1.1 uch splx(s);
1038 1.1 uch }
1039 1.1 uch
1040 1.3 uch /*
1041 1.3 uch * Set TXcom tty parameters from termios.
1042 1.3 uch */
1043 1.1 uch int
1044 1.9 uch txcomparam(struct tty *tp, struct termios *t)
1045 1.1 uch {
1046 1.3 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
1047 1.3 uch struct txcom_chip *chip;
1048 1.5 uch int ospeed;
1049 1.3 uch int s;
1050 1.3 uch
1051 1.3 uch if (!sc)
1052 1.3 uch return ENXIO;
1053 1.3 uch
1054 1.3 uch ospeed = t->c_ospeed;
1055 1.3 uch
1056 1.3 uch /* Check requested parameters. */
1057 1.3 uch if (ospeed < 0) {
1058 1.3 uch return EINVAL;
1059 1.3 uch }
1060 1.3 uch if (t->c_ispeed && t->c_ispeed != ospeed) {
1061 1.3 uch return EINVAL;
1062 1.3 uch }
1063 1.3 uch
1064 1.3 uch s = spltty();
1065 1.3 uch chip = sc->sc_chip;
1066 1.3 uch /*
1067 1.3 uch * For the console, always force CLOCAL and !HUPCL, so that the port
1068 1.3 uch * is always active.
1069 1.3 uch */
1070 1.3 uch if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) ||
1071 1.3 uch ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
1072 1.5 uch SET(t->c_cflag, CLOCAL);
1073 1.5 uch CLR(t->c_cflag, HUPCL);
1074 1.3 uch }
1075 1.3 uch splx(s);
1076 1.3 uch
1077 1.3 uch /*
1078 1.6 uch * If we're not in a mode that assumes a connection is present, then
1079 1.6 uch * ignore carrier changes.
1080 1.6 uch */
1081 1.6 uch if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
1082 1.6 uch chip->sc_dcd = 0;
1083 1.6 uch else
1084 1.6 uch chip->sc_dcd = 1;
1085 1.6 uch
1086 1.6 uch /*
1087 1.3 uch * Only whack the UART when params change.
1088 1.3 uch * Some callers need to clear tp->t_ospeed
1089 1.3 uch * to make sure initialization gets done.
1090 1.3 uch */
1091 1.5 uch if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) {
1092 1.3 uch return 0;
1093 1.3 uch }
1094 1.3 uch
1095 1.3 uch s = spltty();
1096 1.3 uch chip = sc->sc_chip;
1097 1.3 uch chip->sc_speed = ospeed;
1098 1.5 uch chip->sc_cflag = t->c_cflag;
1099 1.3 uch
1100 1.3 uch txcom_setmode(chip);
1101 1.3 uch txcom_setbaudrate(chip);
1102 1.6 uch
1103 1.3 uch /* And copy to tty. */
1104 1.3 uch tp->t_ispeed = 0;
1105 1.3 uch tp->t_ospeed = chip->sc_speed;
1106 1.3 uch tp->t_cflag = chip->sc_cflag;
1107 1.3 uch
1108 1.3 uch /*
1109 1.6 uch * Update the tty layer's idea of the carrier bit, in case we changed
1110 1.6 uch * CLOCAL or MDMBUF. We don't hang up here; we only do that by
1111 1.6 uch * explicit request.
1112 1.6 uch */
1113 1.10 eeh (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd);
1114 1.6 uch
1115 1.6 uch /*
1116 1.3 uch * If hardware flow control is disabled, unblock any hard flow
1117 1.3 uch * control state.
1118 1.3 uch */
1119 1.3 uch if (!ISSET(chip->sc_cflag, CHWFLOW)) {
1120 1.3 uch txcomstart(tp);
1121 1.3 uch }
1122 1.3 uch
1123 1.3 uch splx(s);
1124 1.6 uch
1125 1.6 uch return 0;
1126 1.6 uch }
1127 1.6 uch
1128 1.9 uch int
1129 1.9 uch txcom_dcd_hook(void *arg, int type, long id, void *msg)
1130 1.9 uch {
1131 1.9 uch struct txcom_softc *sc = arg;
1132 1.9 uch struct tty *tp = sc->sc_tty;
1133 1.9 uch struct txcom_chip *chip = sc->sc_chip;
1134 1.9 uch int modem = !(int)msg; /* p-edge 1, n-edge 0 */
1135 1.9 uch
1136 1.9 uch DPRINTF(("%s: DCD %s\n", __FUNCTION__, modem ? "ON" : "OFF"));
1137 1.9 uch
1138 1.9 uch if (modem && chip->sc_dcd)
1139 1.10 eeh (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd);
1140 1.9 uch
1141 1.9 uch return 0;
1142 1.9 uch }
1143 1.9 uch
1144 1.9 uch int
1145 1.9 uch txcom_cts_hook(void *arg, int type, long id, void *msg)
1146 1.9 uch {
1147 1.9 uch struct txcom_softc *sc = arg;
1148 1.9 uch struct tty *tp = sc->sc_tty;
1149 1.9 uch struct txcom_chip *chip = sc->sc_chip;
1150 1.9 uch int clear = !(int)msg; /* p-edge 1, n-edge 0 */
1151 1.9 uch
1152 1.9 uch DPRINTF(("%s: CTS %s\n", __FUNCTION__, clear ? "ON" : "OFF"));
1153 1.9 uch
1154 1.9 uch if (chip->sc_msr_cts) {
1155 1.9 uch if (!clear) {
1156 1.9 uch chip->sc_tx_stopped = 1;
1157 1.9 uch } else {
1158 1.9 uch chip->sc_tx_stopped = 0;
1159 1.10 eeh (*tp->t_linesw->l_start)(tp);
1160 1.9 uch }
1161 1.9 uch }
1162 1.9 uch
1163 1.9 uch return 0;
1164 1.9 uch }
1165 1.9 uch
1166 1.9 uch #ifdef TX39UARTDEBUG
1167 1.6 uch void
1168 1.9 uch txcom_dump(struct txcom_chip *chip)
1169 1.6 uch {
1170 1.6 uch tx_chipset_tag_t tc = chip->sc_tc;
1171 1.6 uch int slot = chip->sc_slot;
1172 1.6 uch txreg_t reg;
1173 1.6 uch
1174 1.6 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
1175 1.6 uch #define ISSETPRINT(r, m) \
1176 1.6 uch __is_set_print(r, TX39_UARTCTRL1_##m, #m)
1177 1.6 uch ISSETPRINT(reg, UARTON);
1178 1.6 uch ISSETPRINT(reg, EMPTY);
1179 1.6 uch ISSETPRINT(reg, PRXHOLDFULL);
1180 1.6 uch ISSETPRINT(reg, RXHOLDFULL);
1181 1.6 uch ISSETPRINT(reg, ENDMARX);
1182 1.6 uch ISSETPRINT(reg, ENDMATX);
1183 1.6 uch ISSETPRINT(reg, TESTMODE);
1184 1.6 uch ISSETPRINT(reg, ENBREAHALT);
1185 1.6 uch ISSETPRINT(reg, ENDMATEST);
1186 1.6 uch ISSETPRINT(reg, ENDMALOOP);
1187 1.6 uch ISSETPRINT(reg, PULSEOPT2);
1188 1.6 uch ISSETPRINT(reg, PULSEOPT1);
1189 1.6 uch ISSETPRINT(reg, DTINVERT);
1190 1.6 uch ISSETPRINT(reg, DISTXD);
1191 1.6 uch ISSETPRINT(reg, TWOSTOP);
1192 1.6 uch ISSETPRINT(reg, LOOPBACK);
1193 1.6 uch ISSETPRINT(reg, BIT7);
1194 1.6 uch ISSETPRINT(reg, EVENPARITY);
1195 1.6 uch ISSETPRINT(reg, ENPARITY);
1196 1.6 uch ISSETPRINT(reg, ENUART);
1197 1.6 uch }
1198 1.9 uch #endif /* TX39UARTDEBUG */
1199