txcom.c revision 1.14.4.2 1 1.14.4.2 fvdl /* $NetBSD: txcom.c,v 1.14.4.2 2001/10/13 17:42:38 fvdl Exp $ */
2 1.1 uch
3 1.9 uch /*-
4 1.9 uch * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5 1.1 uch * All rights reserved.
6 1.1 uch *
7 1.9 uch * This code is derived from software contributed to The NetBSD Foundation
8 1.9 uch * by UCHIYAMA Yasushi.
9 1.9 uch *
10 1.1 uch * Redistribution and use in source and binary forms, with or without
11 1.1 uch * modification, are permitted provided that the following conditions
12 1.1 uch * are met:
13 1.1 uch * 1. Redistributions of source code must retain the above copyright
14 1.1 uch * notice, this list of conditions and the following disclaimer.
15 1.9 uch * 2. Redistributions in binary form must reproduce the above copyright
16 1.9 uch * notice, this list of conditions and the following disclaimer in the
17 1.9 uch * documentation and/or other materials provided with the distribution.
18 1.9 uch * 3. All advertising materials mentioning features or use of this software
19 1.9 uch * must display the following acknowledgement:
20 1.9 uch * This product includes software developed by the NetBSD
21 1.9 uch * Foundation, Inc. and its contributors.
22 1.9 uch * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.9 uch * contributors may be used to endorse or promote products derived
24 1.9 uch * from this software without specific prior written permission.
25 1.1 uch *
26 1.9 uch * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.9 uch * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.9 uch * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.9 uch * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.9 uch * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.9 uch * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.9 uch * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.9 uch * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.9 uch * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.9 uch * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.9 uch * POSSIBILITY OF SUCH DAMAGE.
37 1.1 uch */
38 1.1 uch #include "opt_tx39_debug.h"
39 1.1 uch #include "opt_tx39uartdebug.h"
40 1.1 uch
41 1.1 uch #include <sys/param.h>
42 1.1 uch #include <sys/systm.h>
43 1.3 uch #include <sys/kernel.h>
44 1.1 uch #include <sys/device.h>
45 1.3 uch #include <sys/malloc.h>
46 1.1 uch
47 1.1 uch #include <sys/proc.h> /* tsleep/wakeup */
48 1.1 uch
49 1.1 uch #include <sys/ioctl.h>
50 1.1 uch #include <sys/select.h>
51 1.1 uch #include <sys/file.h>
52 1.1 uch
53 1.1 uch #include <sys/tty.h>
54 1.1 uch #include <sys/conf.h>
55 1.1 uch #include <dev/cons.h> /* consdev */
56 1.14.4.1 fvdl #include <sys/vnode.h>
57 1.1 uch
58 1.1 uch #include <machine/bus.h>
59 1.9 uch #include <machine/config_hook.h>
60 1.1 uch
61 1.1 uch #include <hpcmips/tx/tx39var.h>
62 1.1 uch #include <hpcmips/tx/tx39icureg.h>
63 1.1 uch #include <hpcmips/tx/tx39uartvar.h>
64 1.1 uch #include <hpcmips/tx/tx39uartreg.h>
65 1.1 uch
66 1.5 uch #include <hpcmips/tx/tx39irvar.h>
67 1.5 uch
68 1.1 uch #include <hpcmips/tx/tx39clockreg.h> /* XXX */
69 1.6 uch
70 1.1 uch #define SET(t, f) (t) |= (f)
71 1.1 uch #define CLR(t, f) (t) &= ~(f)
72 1.1 uch #define ISSET(t, f) ((t) & (f))
73 1.9 uch /*
74 1.9 uch * UARTA channel has DTR, DSR, RTS, CTS lines. and they wired to MFIO/IO port.
75 1.9 uch */
76 1.9 uch #define IS_COM0(s) ((s) == 0)
77 1.9 uch #define IS_COM1(s) ((s) == 1)
78 1.9 uch #define ON ((void *)1)
79 1.9 uch #define OFF ((void *)0)
80 1.1 uch
81 1.1 uch #ifdef TX39UARTDEBUG
82 1.1 uch #define DPRINTF(arg) printf arg
83 1.1 uch #else
84 1.1 uch #define DPRINTF(arg)
85 1.1 uch #endif
86 1.1 uch
87 1.3 uch #define TXCOM_HW_CONSOLE 0x40
88 1.3 uch #define TXCOM_RING_SIZE 256 /* must be a power of two! */
89 1.3 uch #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1)
90 1.1 uch
91 1.3 uch struct txcom_chip {
92 1.1 uch tx_chipset_tag_t sc_tc;
93 1.1 uch int sc_slot; /* UARTA or UARTB */
94 1.1 uch int sc_cflag;
95 1.1 uch int sc_speed;
96 1.3 uch int sc_swflags;
97 1.1 uch int sc_hwflags;
98 1.6 uch
99 1.6 uch int sc_dcd;
100 1.9 uch int sc_msr_cts;
101 1.9 uch int sc_tx_stopped;
102 1.3 uch };
103 1.1 uch
104 1.3 uch struct txcom_softc {
105 1.3 uch struct device sc_dev;
106 1.3 uch struct tty *sc_tty;
107 1.3 uch struct txcom_chip *sc_chip;
108 1.3 uch
109 1.8 thorpej struct callout sc_txsoft_ch;
110 1.8 thorpej struct callout sc_rxsoft_ch;
111 1.8 thorpej
112 1.3 uch u_int8_t *sc_tba; /* transmit buffer address */
113 1.3 uch int sc_tbc; /* transmit byte count */
114 1.3 uch int sc_heldtbc;
115 1.3 uch u_int8_t *sc_rbuf; /* receive buffer address */
116 1.3 uch int sc_rbput; /* receive byte count */
117 1.3 uch int sc_rbget;
118 1.1 uch };
119 1.1 uch
120 1.1 uch extern struct cfdriver txcom_cd;
121 1.1 uch
122 1.9 uch int txcom_match(struct device *, struct cfdata *, void *);
123 1.9 uch void txcom_attach(struct device *, struct device *, void *);
124 1.9 uch int txcom_print(void*, const char *);
125 1.9 uch
126 1.9 uch int txcom_txintr(void *);
127 1.9 uch int txcom_rxintr(void *);
128 1.9 uch int txcom_frameerr_intr(void *);
129 1.9 uch int txcom_parityerr_intr(void *);
130 1.9 uch int txcom_break_intr(void *);
131 1.3 uch
132 1.9 uch void txcom_rxsoft(void *);
133 1.9 uch void txcom_txsoft(void *);
134 1.3 uch
135 1.9 uch int txcom_stsoft(void *);
136 1.9 uch int txcom_stsoft2(void *);
137 1.9 uch int txcom_stsoft3(void *);
138 1.9 uch int txcom_stsoft4(void *);
139 1.9 uch
140 1.9 uch
141 1.9 uch void txcom_shutdown(struct txcom_softc *);
142 1.9 uch void txcom_break(struct txcom_softc *, int);
143 1.9 uch void txcom_modem(struct txcom_softc *, int);
144 1.9 uch void txcomstart(struct tty *);
145 1.9 uch int txcomparam(struct tty *, struct termios *);
146 1.9 uch
147 1.9 uch void txcom_reset (struct txcom_chip *);
148 1.9 uch int txcom_enable (struct txcom_chip *);
149 1.9 uch void txcom_disable (struct txcom_chip *);
150 1.9 uch void txcom_setmode (struct txcom_chip *);
151 1.9 uch void txcom_setbaudrate(struct txcom_chip *);
152 1.9 uch int txcom_cngetc (dev_t);
153 1.9 uch void txcom_cnputc (dev_t, int);
154 1.9 uch void txcom_cnpollc (dev_t, int);
155 1.3 uch
156 1.9 uch int txcom_dcd_hook(void *, int, long, void *);
157 1.9 uch int txcom_cts_hook(void *, int, long, void *);
158 1.1 uch
159 1.9 uch
160 1.9 uch __inline__ int __txcom_txbufready(struct txcom_chip *, int);
161 1.9 uch const char *__txcom_slotname(int);
162 1.9 uch
163 1.9 uch #ifdef TX39UARTDEBUG
164 1.9 uch void txcom_dump(struct txcom_chip *);
165 1.9 uch #endif
166 1.6 uch
167 1.1 uch cdev_decl(txcom);
168 1.1 uch
169 1.3 uch struct consdev txcomcons = {
170 1.3 uch NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc,
171 1.14 uch NULL, NODEV, CN_NORMAL
172 1.3 uch };
173 1.3 uch
174 1.1 uch /* Serial console */
175 1.3 uch struct txcom_chip txcom_chip;
176 1.1 uch
177 1.1 uch struct cfattach txcom_ca = {
178 1.1 uch sizeof(struct txcom_softc), txcom_match, txcom_attach
179 1.1 uch };
180 1.1 uch
181 1.1 uch int
182 1.1 uch txcom_match(parent, cf, aux)
183 1.1 uch struct device *parent;
184 1.1 uch struct cfdata *cf;
185 1.1 uch void *aux;
186 1.1 uch {
187 1.1 uch /* if the autoconfiguration got this far, there's a slot here */
188 1.1 uch return 1;
189 1.1 uch }
190 1.1 uch
191 1.1 uch void
192 1.9 uch txcom_attach(struct device *parent, struct device *self, void *aux)
193 1.1 uch {
194 1.1 uch struct tx39uart_attach_args *ua = aux;
195 1.1 uch struct txcom_softc *sc = (void*)self;
196 1.1 uch tx_chipset_tag_t tc;
197 1.1 uch struct tty *tp;
198 1.3 uch struct txcom_chip *chip;
199 1.6 uch int slot, console;
200 1.1 uch
201 1.1 uch /* Check this slot used as serial console */
202 1.6 uch console = (ua->ua_slot == txcom_chip.sc_slot) &&
203 1.14 uch (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE);
204 1.6 uch
205 1.6 uch if (console) {
206 1.3 uch sc->sc_chip = &txcom_chip;
207 1.3 uch } else {
208 1.3 uch if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip),
209 1.14 uch M_DEVBUF, M_WAITOK))) {
210 1.3 uch printf(": can't allocate chip\n");
211 1.3 uch return;
212 1.3 uch }
213 1.3 uch memset(sc->sc_chip, 0, sizeof(struct txcom_chip));
214 1.1 uch }
215 1.1 uch
216 1.3 uch chip = sc->sc_chip;
217 1.3 uch tc = chip->sc_tc = ua->ua_tc;
218 1.3 uch slot = chip->sc_slot = ua->ua_slot;
219 1.3 uch
220 1.6 uch #ifdef TX39UARTDEBUG
221 1.6 uch txcom_dump(chip);
222 1.6 uch #endif
223 1.6 uch if (!console)
224 1.6 uch txcom_reset(chip);
225 1.6 uch
226 1.3 uch if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) {
227 1.3 uch printf(": can't allocate buffer.\n");
228 1.3 uch return;
229 1.3 uch }
230 1.3 uch memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE);
231 1.1 uch
232 1.1 uch tp = ttymalloc();
233 1.1 uch tp->t_oproc = txcomstart;
234 1.1 uch tp->t_param = txcomparam;
235 1.1 uch tp->t_hwiflow = NULL;
236 1.1 uch sc->sc_tty = tp;
237 1.1 uch tty_attach(tp);
238 1.1 uch
239 1.3 uch if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
240 1.1 uch int maj;
241 1.1 uch /* locate the major number */
242 1.1 uch for (maj = 0; maj < nchrdev; maj++)
243 1.1 uch if (cdevsw[maj].d_open == txcomopen)
244 1.1 uch break;
245 1.1 uch
246 1.1 uch cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit);
247 1.1 uch
248 1.3 uch printf(": console");
249 1.1 uch }
250 1.1 uch
251 1.3 uch printf("\n");
252 1.1 uch
253 1.1 uch /*
254 1.1 uch * Enable interrupt
255 1.1 uch */
256 1.3 uch #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s))
257 1.3 uch
258 1.3 uch tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY,
259 1.14 uch txcom_rxintr, sc);
260 1.3 uch tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY,
261 1.14 uch txcom_txintr, sc);
262 1.3 uch tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY,
263 1.14 uch txcom_rxintr, sc);
264 1.3 uch tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY,
265 1.14 uch txcom_txintr, sc);
266 1.3 uch tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY,
267 1.14 uch txcom_frameerr_intr, sc);
268 1.3 uch tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY,
269 1.14 uch txcom_parityerr_intr, sc);
270 1.3 uch tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY,
271 1.14 uch txcom_break_intr, sc);
272 1.5 uch
273 1.9 uch /*
274 1.9 uch * UARTA has external signal line. (its wiring is platform dependent)
275 1.9 uch */
276 1.9 uch if (IS_COM0(slot)) {
277 1.9 uch /* install DCD, CTS hooks. */
278 1.11 sato config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_DCD,
279 1.14 uch CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc);
280 1.11 sato config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_CTS,
281 1.14 uch CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc);
282 1.9 uch }
283 1.6 uch
284 1.5 uch /*
285 1.5 uch * UARTB can connect IR module
286 1.5 uch */
287 1.9 uch if (IS_COM1(slot)) {
288 1.5 uch struct txcom_attach_args tca;
289 1.5 uch tca.tca_tc = tc;
290 1.5 uch tca.tca_parent = self;
291 1.5 uch config_found(self, &tca, txcom_print);
292 1.5 uch }
293 1.5 uch }
294 1.5 uch
295 1.5 uch int
296 1.9 uch txcom_print(void *aux, const char *pnp)
297 1.5 uch {
298 1.5 uch return pnp ? QUIET : UNCONF;
299 1.1 uch }
300 1.1 uch
301 1.6 uch void
302 1.9 uch txcom_reset(struct txcom_chip *chip)
303 1.6 uch {
304 1.6 uch tx_chipset_tag_t tc;
305 1.6 uch int slot, ofs;
306 1.6 uch txreg_t reg;
307 1.6 uch
308 1.6 uch tc = chip->sc_tc;
309 1.6 uch slot = chip->sc_slot;
310 1.6 uch ofs = TX39_UARTCTRL1_REG(slot);
311 1.6 uch
312 1.6 uch /* Supply clock */
313 1.6 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
314 1.6 uch reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
315 1.6 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
316 1.6 uch
317 1.6 uch /* reset UART module */
318 1.6 uch tx_conf_write(tc, ofs, 0);
319 1.6 uch }
320 1.6 uch
321 1.1 uch int
322 1.9 uch txcom_enable(struct txcom_chip *chip)
323 1.1 uch {
324 1.1 uch tx_chipset_tag_t tc;
325 1.1 uch txreg_t reg;
326 1.3 uch int slot, ofs, timeout;
327 1.1 uch
328 1.3 uch tc = chip->sc_tc;
329 1.3 uch slot = chip->sc_slot;
330 1.3 uch ofs = TX39_UARTCTRL1_REG(slot);
331 1.1 uch
332 1.9 uch /* External power supply (if any) */
333 1.9 uch config_hook_call(CONFIG_HOOK_POWERCONTROL,
334 1.14 uch CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON);
335 1.9 uch delay(3);
336 1.9 uch
337 1.6 uch /* Supply clock */
338 1.5 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
339 1.5 uch reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
340 1.5 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
341 1.5 uch
342 1.6 uch /*
343 1.6 uch * XXX Disable DMA (DMA not coded yet)
344 1.6 uch */
345 1.6 uch reg = tx_conf_read(tc, ofs);
346 1.6 uch reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
347 1.6 uch tx_conf_write(tc, ofs, reg);
348 1.6 uch
349 1.6 uch /* enable */
350 1.3 uch reg = tx_conf_read(tc, ofs);
351 1.1 uch reg |= TX39_UARTCTRL1_ENUART;
352 1.1 uch reg &= ~TX39_UARTCTRL1_ENBREAHALT;
353 1.3 uch tx_conf_write(tc, ofs, reg);
354 1.3 uch
355 1.9 uch timeout = 100000;
356 1.3 uch
357 1.3 uch while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) &&
358 1.14 uch --timeout > 0)
359 1.3 uch ;
360 1.3 uch
361 1.5 uch if (timeout == 0 && !cold) {
362 1.6 uch printf("%s never power up\n", __txcom_slotname(slot));
363 1.3 uch return 1;
364 1.3 uch }
365 1.3 uch
366 1.1 uch return 0;
367 1.1 uch }
368 1.1 uch
369 1.1 uch void
370 1.9 uch txcom_disable(struct txcom_chip *chip)
371 1.1 uch {
372 1.1 uch tx_chipset_tag_t tc;
373 1.1 uch txreg_t reg;
374 1.1 uch int slot;
375 1.1 uch
376 1.3 uch tc = chip->sc_tc;
377 1.3 uch slot = chip->sc_slot;
378 1.1 uch
379 1.1 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
380 1.1 uch /* DMA */
381 1.1 uch reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
382 1.3 uch
383 1.6 uch /* disable module */
384 1.1 uch reg &= ~TX39_UARTCTRL1_ENUART;
385 1.1 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
386 1.3 uch
387 1.1 uch /* Clock */
388 1.1 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
389 1.1 uch reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
390 1.1 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
391 1.1 uch
392 1.1 uch }
393 1.1 uch
394 1.9 uch __inline__ int
395 1.9 uch __txcom_txbufready(struct txcom_chip *chip, int retry)
396 1.3 uch {
397 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
398 1.3 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
399 1.3 uch
400 1.3 uch do {
401 1.3 uch if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY)
402 1.3 uch return 1;
403 1.3 uch } while(--retry != 0);
404 1.3 uch
405 1.1 uch return 0;
406 1.1 uch }
407 1.1 uch
408 1.5 uch void
409 1.9 uch txcom_pulse_mode(struct device *dev)
410 1.5 uch {
411 1.5 uch struct txcom_softc *sc = (void*)dev;
412 1.5 uch struct txcom_chip *chip = sc->sc_chip;
413 1.5 uch tx_chipset_tag_t tc = chip->sc_tc;
414 1.5 uch int ofs;
415 1.5 uch txreg_t reg;
416 1.5 uch
417 1.5 uch ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
418 1.5 uch
419 1.5 uch reg = tx_conf_read(tc, ofs);
420 1.6 uch /* WindowsCE use this setting */
421 1.6 uch reg |= TX39_UARTCTRL1_PULSEOPT1;
422 1.6 uch reg &= ~TX39_UARTCTRL1_PULSEOPT2;
423 1.6 uch reg |= TX39_UARTCTRL1_DTINVERT;
424 1.6 uch
425 1.5 uch tx_conf_write(tc, ofs, reg);
426 1.5 uch }
427 1.5 uch
428 1.3 uch /*
429 1.3 uch * console
430 1.3 uch */
431 1.1 uch int
432 1.9 uch txcom_cngetc(dev_t dev)
433 1.1 uch {
434 1.1 uch tx_chipset_tag_t tc;
435 1.2 uch int ofs, c, s;
436 1.2 uch
437 1.3 uch s = spltty();
438 1.2 uch
439 1.3 uch tc = txcom_chip.sc_tc;
440 1.3 uch ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot);
441 1.1 uch
442 1.1 uch while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs)))
443 1.1 uch ;
444 1.2 uch
445 1.3 uch c = TX39_UARTRXHOLD_RXDATA(
446 1.3 uch tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot)));
447 1.2 uch
448 1.3 uch if (c == '\r')
449 1.1 uch c = '\n';
450 1.1 uch
451 1.2 uch splx(s);
452 1.2 uch
453 1.1 uch return c;
454 1.1 uch }
455 1.1 uch
456 1.1 uch void
457 1.9 uch txcom_cnputc(dev_t dev, int c)
458 1.1 uch {
459 1.3 uch struct txcom_chip *chip = &txcom_chip;
460 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
461 1.3 uch int s;
462 1.2 uch
463 1.3 uch s = spltty();
464 1.1 uch
465 1.3 uch /* Wait for transmitter to empty */
466 1.3 uch __txcom_txbufready(chip, -1);
467 1.1 uch
468 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
469 1.14 uch (c & TX39_UARTTXHOLD_TXDATA_MASK));
470 1.1 uch
471 1.3 uch __txcom_txbufready(chip, -1);
472 1.3 uch
473 1.2 uch splx(s);
474 1.1 uch }
475 1.1 uch
476 1.1 uch void
477 1.9 uch txcom_cnpollc(dev_t dev, int on)
478 1.1 uch {
479 1.1 uch }
480 1.1 uch
481 1.1 uch void
482 1.9 uch txcom_setmode(struct txcom_chip *chip)
483 1.1 uch {
484 1.3 uch tcflag_t cflag = chip->sc_cflag;
485 1.3 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
486 1.1 uch txreg_t reg;
487 1.1 uch
488 1.3 uch reg = tx_conf_read(chip->sc_tc, ofs);
489 1.6 uch reg &= ~TX39_UARTCTRL1_ENUART;
490 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg);
491 1.6 uch
492 1.1 uch switch (ISSET(cflag, CSIZE)) {
493 1.1 uch default:
494 1.1 uch printf("txcom_setmode: CS7, CS8 only. use CS7");
495 1.1 uch /* FALL THROUGH */
496 1.1 uch case CS7:
497 1.1 uch reg |= TX39_UARTCTRL1_BIT7;
498 1.1 uch break;
499 1.1 uch case CS8:
500 1.1 uch reg &= ~TX39_UARTCTRL1_BIT7;
501 1.1 uch break;
502 1.1 uch }
503 1.3 uch
504 1.1 uch if (ISSET(cflag, PARENB)) {
505 1.1 uch reg |= TX39_UARTCTRL1_ENPARITY;
506 1.1 uch if (ISSET(cflag, PARODD)) {
507 1.1 uch reg &= ~TX39_UARTCTRL1_EVENPARITY;
508 1.1 uch } else {
509 1.1 uch reg |= TX39_UARTCTRL1_EVENPARITY;
510 1.1 uch }
511 1.1 uch } else {
512 1.1 uch reg &= ~TX39_UARTCTRL1_ENPARITY;
513 1.1 uch }
514 1.3 uch
515 1.6 uch if (ISSET(cflag, CSTOPB))
516 1.1 uch reg |= TX39_UARTCTRL1_TWOSTOP;
517 1.6 uch else
518 1.6 uch reg &= ~TX39_UARTCTRL1_TWOSTOP;
519 1.6 uch
520 1.6 uch reg |= TX39_UARTCTRL1_ENUART;
521 1.3 uch tx_conf_write(chip->sc_tc, ofs, reg);
522 1.3 uch }
523 1.3 uch
524 1.3 uch void
525 1.9 uch txcom_setbaudrate(struct txcom_chip *chip)
526 1.3 uch {
527 1.3 uch int baudrate;
528 1.6 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
529 1.6 uch txreg_t reg, reg1;
530 1.3 uch
531 1.3 uch if (chip->sc_speed == 0)
532 1.3 uch return;
533 1.3 uch
534 1.5 uch if (!cold)
535 1.5 uch DPRINTF(("txcom_setbaudrate: %d\n", chip->sc_speed));
536 1.5 uch
537 1.6 uch reg1 = tx_conf_read(chip->sc_tc, ofs);
538 1.6 uch reg1 &= ~TX39_UARTCTRL1_ENUART;
539 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg1);
540 1.6 uch
541 1.3 uch baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1;
542 1.3 uch reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate);
543 1.3 uch
544 1.3 uch tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg);
545 1.6 uch
546 1.6 uch reg1 |= TX39_UARTCTRL1_ENUART;
547 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg1);
548 1.3 uch }
549 1.3 uch
550 1.3 uch int
551 1.9 uch txcom_cnattach(int slot, int speed, int cflag)
552 1.3 uch {
553 1.3 uch cn_tab = &txcomcons;
554 1.3 uch
555 1.3 uch txcom_chip.sc_tc = tx_conf_get_tag();
556 1.3 uch txcom_chip.sc_slot = slot;
557 1.3 uch txcom_chip.sc_cflag = cflag;
558 1.3 uch txcom_chip.sc_speed = speed;
559 1.3 uch txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE;
560 1.6 uch #if notyet
561 1.6 uch txcom_reset(&txcom_chip);
562 1.6 uch #endif
563 1.6 uch txcom_setmode(&txcom_chip);
564 1.6 uch txcom_setbaudrate(&txcom_chip);
565 1.3 uch
566 1.5 uch if (txcom_enable(&txcom_chip))
567 1.5 uch return 1;
568 1.5 uch
569 1.3 uch return 0;
570 1.3 uch }
571 1.3 uch
572 1.3 uch /*
573 1.3 uch * tty
574 1.3 uch */
575 1.3 uch void
576 1.9 uch txcom_break(struct txcom_softc *sc, int on)
577 1.3 uch {
578 1.3 uch struct txcom_chip *chip = sc->sc_chip;
579 1.1 uch
580 1.3 uch tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
581 1.14 uch on ? TX39_UARTTXHOLD_BREAK : 0);
582 1.1 uch }
583 1.1 uch
584 1.1 uch void
585 1.9 uch txcom_modem(struct txcom_softc *sc, int on)
586 1.1 uch {
587 1.3 uch struct txcom_chip *chip = sc->sc_chip;
588 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
589 1.3 uch int slot = chip->sc_slot;
590 1.1 uch txreg_t reg;
591 1.1 uch
592 1.9 uch /* assert DTR */
593 1.9 uch if (IS_COM0(slot)) {
594 1.11 sato config_hook_call(CONFIG_HOOK_SET,
595 1.14 uch CONFIG_HOOK_COM0_DTR,
596 1.14 uch (void *)on);
597 1.9 uch }
598 1.9 uch
599 1.3 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
600 1.6 uch reg &= ~TX39_UARTCTRL1_ENUART;
601 1.6 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
602 1.3 uch
603 1.3 uch if (on) {
604 1.3 uch reg &= ~TX39_UARTCTRL1_DISTXD;
605 1.3 uch } else {
606 1.6 uch reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */
607 1.3 uch }
608 1.6 uch
609 1.6 uch reg |= TX39_UARTCTRL1_ENUART;
610 1.6 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
611 1.1 uch }
612 1.1 uch
613 1.1 uch void
614 1.9 uch txcom_shutdown(struct txcom_softc *sc)
615 1.1 uch {
616 1.1 uch struct tty *tp = sc->sc_tty;
617 1.3 uch int s = spltty();
618 1.1 uch
619 1.3 uch /* Clear any break condition set with TIOCSBRK. */
620 1.3 uch txcom_break(sc, 0);
621 1.3 uch
622 1.3 uch /*
623 1.3 uch * Hang up if necessary. Wait a bit, so the other side has time to
624 1.3 uch * notice even if we immediately open the port again.
625 1.3 uch */
626 1.3 uch if (ISSET(tp->t_cflag, HUPCL)) {
627 1.3 uch txcom_modem(sc, 0);
628 1.3 uch (void) tsleep(sc, TTIPRI, ttclos, hz);
629 1.3 uch }
630 1.3 uch
631 1.3 uch
632 1.3 uch /* Turn off interrupts if not the console. */
633 1.3 uch if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
634 1.3 uch txcom_disable(sc->sc_chip);
635 1.3 uch }
636 1.1 uch
637 1.3 uch splx(s);
638 1.3 uch }
639 1.1 uch
640 1.9 uch const char *
641 1.9 uch __txcom_slotname(int slot)
642 1.3 uch {
643 1.9 uch static const char *slotname[] = {"UARTA", "UARTB", "unknown"};
644 1.9 uch
645 1.9 uch if (slot != 0 && slot != 1)
646 1.9 uch return slotname[2];
647 1.9 uch
648 1.9 uch return slotname[slot];
649 1.2 uch }
650 1.2 uch
651 1.2 uch int
652 1.9 uch txcom_frameerr_intr(void *arg)
653 1.3 uch {
654 1.3 uch struct txcom_softc *sc = arg;
655 1.3 uch
656 1.3 uch printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot));
657 1.3 uch
658 1.3 uch return 0;
659 1.3 uch }
660 1.3 uch
661 1.3 uch int
662 1.9 uch txcom_parityerr_intr(void *arg)
663 1.3 uch {
664 1.3 uch struct txcom_softc *sc = arg;
665 1.3 uch
666 1.3 uch printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot));
667 1.2 uch
668 1.2 uch return 0;
669 1.1 uch }
670 1.1 uch
671 1.1 uch int
672 1.9 uch txcom_break_intr(void *arg)
673 1.1 uch {
674 1.1 uch struct txcom_softc *sc = arg;
675 1.3 uch
676 1.3 uch printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot));
677 1.3 uch
678 1.3 uch return 0;
679 1.3 uch }
680 1.3 uch
681 1.3 uch int
682 1.9 uch txcom_rxintr(void *arg)
683 1.3 uch {
684 1.3 uch struct txcom_softc *sc = arg;
685 1.3 uch struct txcom_chip *chip = sc->sc_chip;
686 1.1 uch u_int8_t c;
687 1.1 uch
688 1.3 uch c = TX39_UARTRXHOLD_RXDATA(
689 1.3 uch tx_conf_read(chip->sc_tc,
690 1.14 uch TX39_UARTRXHOLD_REG(chip->sc_slot)));
691 1.3 uch
692 1.3 uch sc->sc_rbuf[sc->sc_rbput] = c;
693 1.3 uch sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK;
694 1.3 uch
695 1.8 thorpej callout_reset(&sc->sc_rxsoft_ch, 1, txcom_rxsoft, sc);
696 1.1 uch
697 1.1 uch return 0;
698 1.1 uch }
699 1.1 uch
700 1.3 uch void
701 1.9 uch txcom_rxsoft(void *arg)
702 1.3 uch {
703 1.3 uch struct txcom_softc *sc = arg;
704 1.3 uch struct tty *tp = sc->sc_tty;
705 1.14 uch int (*rint)(int, struct tty *);
706 1.3 uch int code;
707 1.3 uch int s, end, get;
708 1.3 uch
709 1.10 eeh rint = tp->t_linesw->l_rint;
710 1.3 uch
711 1.3 uch s = spltty();
712 1.3 uch end = sc->sc_rbput;
713 1.3 uch get = sc->sc_rbget;
714 1.3 uch
715 1.3 uch while (get != end) {
716 1.3 uch code = sc->sc_rbuf[get];
717 1.3 uch
718 1.3 uch if ((*rint)(code, tp) == -1) {
719 1.3 uch /*
720 1.3 uch * The line discipline's buffer is out of space.
721 1.3 uch */
722 1.3 uch }
723 1.3 uch get = (get + 1) % TXCOM_RING_MASK;
724 1.3 uch }
725 1.3 uch sc->sc_rbget = get;
726 1.3 uch
727 1.3 uch splx(s);
728 1.3 uch }
729 1.3 uch
730 1.1 uch int
731 1.9 uch txcom_txintr(void *arg)
732 1.1 uch {
733 1.1 uch struct txcom_softc *sc = arg;
734 1.3 uch struct txcom_chip *chip = sc->sc_chip;
735 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
736 1.1 uch
737 1.3 uch if (sc->sc_tbc > 0) {
738 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
739 1.14 uch (*sc->sc_tba &
740 1.14 uch TX39_UARTTXHOLD_TXDATA_MASK));
741 1.3 uch sc->sc_tbc--;
742 1.3 uch sc->sc_tba++;
743 1.3 uch } else {
744 1.8 thorpej callout_reset(&sc->sc_rxsoft_ch, 1, txcom_txsoft, sc);
745 1.3 uch }
746 1.1 uch
747 1.1 uch return 0;
748 1.1 uch }
749 1.1 uch
750 1.3 uch void
751 1.9 uch txcom_txsoft(void *arg)
752 1.3 uch {
753 1.3 uch struct txcom_softc *sc = arg;
754 1.3 uch struct tty *tp = sc->sc_tty;
755 1.3 uch int s = spltty();
756 1.3 uch
757 1.3 uch CLR(tp->t_state, TS_BUSY);
758 1.3 uch if (ISSET(tp->t_state, TS_FLUSH)) {
759 1.3 uch CLR(tp->t_state, TS_FLUSH);
760 1.3 uch } else {
761 1.3 uch ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
762 1.3 uch }
763 1.3 uch
764 1.10 eeh (*tp->t_linesw->l_start)(tp);
765 1.3 uch
766 1.3 uch splx(s);
767 1.3 uch }
768 1.1 uch
769 1.1 uch int
770 1.14.4.1 fvdl txcomopen(struct vnode *devvp, int flag, int mode, struct proc *p)
771 1.1 uch {
772 1.14.4.1 fvdl dev_t dev = vdev_rdev(devvp);
773 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
774 1.3 uch struct txcom_chip *chip;
775 1.3 uch struct tty *tp;
776 1.3 uch int s, err;
777 1.1 uch
778 1.3 uch if (!sc)
779 1.3 uch return ENXIO;
780 1.3 uch
781 1.3 uch chip = sc->sc_chip;
782 1.3 uch tp = sc->sc_tty;
783 1.3 uch
784 1.3 uch if (ISSET(tp->t_state, TS_ISOPEN) &&
785 1.3 uch ISSET(tp->t_state, TS_XCLUDE) &&
786 1.3 uch p->p_ucred->cr_uid != 0)
787 1.3 uch return (EBUSY);
788 1.3 uch
789 1.14.4.1 fvdl vdev_setprivdata(devvp, sc);
790 1.14.4.1 fvdl
791 1.3 uch s = spltty();
792 1.3 uch
793 1.6 uch if (txcom_enable(sc->sc_chip)) {
794 1.6 uch splx(s);
795 1.5 uch goto out;
796 1.6 uch }
797 1.14.4.1 fvdl
798 1.5 uch /*
799 1.5 uch * Do the following iff this is a first open.
800 1.5 uch */
801 1.5 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
802 1.5 uch struct termios t;
803 1.5 uch
804 1.14.4.2 fvdl tp->t_dev = dev;
805 1.1 uch
806 1.5 uch t.c_ispeed = 0;
807 1.5 uch if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
808 1.5 uch t.c_ospeed = chip->sc_speed;
809 1.5 uch t.c_cflag = chip->sc_cflag;
810 1.5 uch } else {
811 1.5 uch t.c_ospeed = TTYDEF_SPEED;
812 1.5 uch t.c_cflag = TTYDEF_CFLAG;
813 1.5 uch }
814 1.3 uch
815 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL))
816 1.5 uch SET(t.c_cflag, CLOCAL);
817 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS))
818 1.5 uch SET(t.c_cflag, CRTSCTS);
819 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF))
820 1.5 uch SET(t.c_cflag, MDMBUF);
821 1.5 uch
822 1.5 uch /* Make sure txcomparam() will do something. */
823 1.5 uch tp->t_ospeed = 0;
824 1.5 uch txcomparam(tp, &t);
825 1.5 uch
826 1.5 uch tp->t_iflag = TTYDEF_IFLAG;
827 1.5 uch tp->t_oflag = TTYDEF_OFLAG;
828 1.5 uch tp->t_lflag = TTYDEF_LFLAG;
829 1.1 uch
830 1.5 uch ttychars(tp);
831 1.5 uch ttsetwater(tp);
832 1.3 uch
833 1.5 uch /*
834 1.5 uch * Turn on DTR. We must always do this, even if carrier is not
835 1.5 uch * present, because otherwise we'd have to use TIOCSDTR
836 1.5 uch * immediately after setting CLOCAL, which applications do not
837 1.5 uch * expect. We always assert DTR while the device is open
838 1.5 uch * unless explicitly requested to deassert it.
839 1.5 uch */
840 1.5 uch txcom_modem(sc, 1);
841 1.3 uch
842 1.5 uch /* Clear the input ring, and unblock. */
843 1.5 uch sc->sc_rbget = sc->sc_rbput = 0;
844 1.5 uch }
845 1.3 uch
846 1.3 uch splx(s);
847 1.6 uch #define TXCOMDIALOUT(x) (minor(x) & 0x80000)
848 1.6 uch if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) {
849 1.1 uch DPRINTF(("txcomopen: ttyopen failed\n"));
850 1.3 uch goto out;
851 1.1 uch }
852 1.14.4.1 fvdl if ((err = (*tp->t_linesw->l_open)(devvp, tp))) {
853 1.1 uch DPRINTF(("txcomopen: line dicipline open failed\n"));
854 1.3 uch goto out;
855 1.3 uch }
856 1.3 uch
857 1.3 uch return err;
858 1.3 uch
859 1.3 uch out:
860 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
861 1.3 uch /*
862 1.3 uch * We failed to open the device, and nobody else had it opened.
863 1.3 uch * Clean up the state as appropriate.
864 1.3 uch */
865 1.3 uch txcom_shutdown(sc);
866 1.1 uch }
867 1.1 uch
868 1.1 uch return err;
869 1.3 uch
870 1.1 uch }
871 1.1 uch
872 1.1 uch int
873 1.14.4.1 fvdl txcomclose(struct vnode *devvp, int flag, int mode, struct proc *p)
874 1.1 uch {
875 1.14.4.1 fvdl struct txcom_softc *sc = vdev_privdata(devvp);
876 1.1 uch struct tty *tp = sc->sc_tty;
877 1.1 uch
878 1.3 uch /* XXX This is for cons.c. */
879 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN))
880 1.3 uch return 0;
881 1.3 uch
882 1.10 eeh (*tp->t_linesw->l_close)(tp, flag);
883 1.1 uch ttyclose(tp);
884 1.1 uch
885 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
886 1.3 uch /*
887 1.3 uch * Although we got a last close, the device may still be in
888 1.3 uch * use; e.g. if this was the dialout node, and there are still
889 1.3 uch * processes waiting for carrier on the non-dialout node.
890 1.3 uch */
891 1.3 uch txcom_shutdown(sc);
892 1.3 uch }
893 1.3 uch
894 1.1 uch return 0;
895 1.1 uch }
896 1.1 uch
897 1.1 uch int
898 1.14.4.1 fvdl txcomread(struct vnode *devvp, struct uio *uio, int flag)
899 1.1 uch {
900 1.14.4.1 fvdl struct txcom_softc *sc = vdev_privdata(devvp);
901 1.1 uch struct tty *tp = sc->sc_tty;
902 1.3 uch
903 1.10 eeh return ((*tp->t_linesw->l_read)(tp, uio, flag));
904 1.1 uch }
905 1.1 uch
906 1.1 uch int
907 1.14.4.1 fvdl txcomwrite(struct vnode *devvp, struct uio *uio, int flag)
908 1.1 uch {
909 1.14.4.1 fvdl struct txcom_softc *sc = vdev_privdata(devvp);
910 1.1 uch struct tty *tp = sc->sc_tty;
911 1.1 uch
912 1.10 eeh return ((*tp->t_linesw->l_write)(tp, uio, flag));
913 1.12 scw }
914 1.12 scw
915 1.12 scw int
916 1.14.4.1 fvdl txcompoll(struct vnode *devvp, int events, struct proc *p)
917 1.12 scw {
918 1.14.4.1 fvdl struct txcom_softc *sc = vdev_privdata(devvp);
919 1.12 scw struct tty *tp = sc->sc_tty;
920 1.12 scw
921 1.12 scw return ((*tp->t_linesw->l_poll)(tp, events, p));
922 1.1 uch }
923 1.1 uch
924 1.1 uch struct tty *
925 1.14.4.1 fvdl txcomtty(struct vnode *devvp)
926 1.1 uch {
927 1.14.4.1 fvdl struct txcom_softc *sc = vdev_privdata(devvp);
928 1.3 uch
929 1.3 uch return sc->sc_tty;
930 1.1 uch }
931 1.1 uch
932 1.1 uch int
933 1.14.4.1 fvdl txcomioctl(struct vnode *devvp, u_long cmd, caddr_t data, int flag, struct proc *p)
934 1.1 uch {
935 1.14.4.1 fvdl struct txcom_softc *sc = vdev_privdata(devvp);
936 1.1 uch struct tty *tp = sc->sc_tty;
937 1.3 uch int s, err;
938 1.3 uch
939 1.10 eeh err = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
940 1.3 uch if (err >= 0) {
941 1.3 uch return err;
942 1.3 uch }
943 1.3 uch
944 1.14.4.2 fvdl err = ttioctl(tp, devvp, cmd, data, flag, p);
945 1.3 uch if (err >= 0) {
946 1.3 uch return err;
947 1.3 uch }
948 1.3 uch
949 1.3 uch err = 0;
950 1.3 uch
951 1.3 uch s = spltty();
952 1.3 uch
953 1.3 uch switch (cmd) {
954 1.5 uch default:
955 1.5 uch err = ENOTTY;
956 1.5 uch break;
957 1.5 uch
958 1.3 uch case TIOCSBRK:
959 1.3 uch txcom_break(sc, 1);
960 1.3 uch break;
961 1.3 uch
962 1.3 uch case TIOCCBRK:
963 1.3 uch txcom_break(sc, 0);
964 1.3 uch break;
965 1.3 uch
966 1.3 uch case TIOCSDTR:
967 1.3 uch txcom_modem(sc, 1);
968 1.3 uch break;
969 1.3 uch
970 1.3 uch case TIOCCDTR:
971 1.3 uch txcom_modem(sc, 0);
972 1.3 uch break;
973 1.3 uch
974 1.3 uch case TIOCGFLAGS:
975 1.3 uch *(int *)data = sc->sc_chip->sc_swflags;
976 1.3 uch break;
977 1.3 uch
978 1.3 uch case TIOCSFLAGS:
979 1.3 uch err = suser(p->p_ucred, &p->p_acflag);
980 1.3 uch if (err) {
981 1.3 uch break;
982 1.3 uch }
983 1.3 uch sc->sc_chip->sc_swflags = *(int *)data;
984 1.3 uch break;
985 1.3 uch
986 1.3 uch }
987 1.1 uch
988 1.3 uch splx(s);
989 1.1 uch
990 1.3 uch return err;
991 1.1 uch }
992 1.1 uch
993 1.1 uch void
994 1.9 uch txcomstop(struct tty *tp, int flag)
995 1.1 uch {
996 1.14.4.1 fvdl struct txcom_softc *sc;
997 1.1 uch int s;
998 1.1 uch
999 1.14.4.2 fvdl sc = txcom_cd.cd_devs[minor(tp->t_dev)];
1000 1.14.4.1 fvdl
1001 1.1 uch s = spltty();
1002 1.1 uch
1003 1.1 uch if (ISSET(tp->t_state, TS_BUSY)) {
1004 1.1 uch /* Stop transmitting at the next chunk. */
1005 1.1 uch sc->sc_tbc = 0;
1006 1.1 uch sc->sc_heldtbc = 0;
1007 1.1 uch if (!ISSET(tp->t_state, TS_TTSTOP))
1008 1.1 uch SET(tp->t_state, TS_FLUSH);
1009 1.1 uch }
1010 1.3 uch
1011 1.1 uch splx(s);
1012 1.1 uch }
1013 1.1 uch
1014 1.1 uch void
1015 1.9 uch txcomstart(struct tty *tp)
1016 1.1 uch {
1017 1.14.4.2 fvdl struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
1018 1.3 uch struct txcom_chip *chip = sc->sc_chip;
1019 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
1020 1.3 uch int slot = chip->sc_slot;
1021 1.1 uch int s;
1022 1.1 uch
1023 1.1 uch s = spltty();
1024 1.3 uch
1025 1.3 uch if (!__txcom_txbufready(chip, 0) ||
1026 1.3 uch ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
1027 1.3 uch goto out;
1028 1.1 uch
1029 1.1 uch if (tp->t_outq.c_cc <= tp->t_lowat) {
1030 1.1 uch if (ISSET(tp->t_state, TS_ASLEEP)) {
1031 1.1 uch CLR(tp->t_state, TS_ASLEEP);
1032 1.1 uch wakeup(&tp->t_outq);
1033 1.1 uch }
1034 1.1 uch selwakeup(&tp->t_wsel);
1035 1.1 uch if (tp->t_outq.c_cc == 0)
1036 1.3 uch goto out;
1037 1.1 uch }
1038 1.3 uch
1039 1.1 uch sc->sc_tba = tp->t_outq.c_cf;
1040 1.1 uch sc->sc_tbc = ndqb(&tp->t_outq, 0);
1041 1.3 uch SET(tp->t_state, TS_BUSY);
1042 1.3 uch
1043 1.3 uch /* Output the first character of the contiguous buffer. */
1044 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot),
1045 1.14 uch (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK));
1046 1.3 uch
1047 1.3 uch sc->sc_tbc--;
1048 1.3 uch sc->sc_tba++;
1049 1.1 uch
1050 1.3 uch out:
1051 1.1 uch splx(s);
1052 1.1 uch }
1053 1.1 uch
1054 1.3 uch /*
1055 1.3 uch * Set TXcom tty parameters from termios.
1056 1.3 uch */
1057 1.1 uch int
1058 1.9 uch txcomparam(struct tty *tp, struct termios *t)
1059 1.1 uch {
1060 1.14.4.1 fvdl struct txcom_softc *sc = vdev_privdata(tp->d_devvp);
1061 1.3 uch struct txcom_chip *chip;
1062 1.5 uch int ospeed;
1063 1.3 uch int s;
1064 1.3 uch
1065 1.3 uch if (!sc)
1066 1.3 uch return ENXIO;
1067 1.3 uch
1068 1.3 uch ospeed = t->c_ospeed;
1069 1.3 uch
1070 1.3 uch /* Check requested parameters. */
1071 1.3 uch if (ospeed < 0) {
1072 1.3 uch return EINVAL;
1073 1.3 uch }
1074 1.3 uch if (t->c_ispeed && t->c_ispeed != ospeed) {
1075 1.3 uch return EINVAL;
1076 1.3 uch }
1077 1.3 uch
1078 1.3 uch s = spltty();
1079 1.3 uch chip = sc->sc_chip;
1080 1.3 uch /*
1081 1.3 uch * For the console, always force CLOCAL and !HUPCL, so that the port
1082 1.3 uch * is always active.
1083 1.3 uch */
1084 1.3 uch if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) ||
1085 1.3 uch ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
1086 1.5 uch SET(t->c_cflag, CLOCAL);
1087 1.5 uch CLR(t->c_cflag, HUPCL);
1088 1.3 uch }
1089 1.3 uch splx(s);
1090 1.3 uch
1091 1.3 uch /*
1092 1.6 uch * If we're not in a mode that assumes a connection is present, then
1093 1.6 uch * ignore carrier changes.
1094 1.6 uch */
1095 1.6 uch if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
1096 1.6 uch chip->sc_dcd = 0;
1097 1.6 uch else
1098 1.6 uch chip->sc_dcd = 1;
1099 1.6 uch
1100 1.6 uch /*
1101 1.3 uch * Only whack the UART when params change.
1102 1.3 uch * Some callers need to clear tp->t_ospeed
1103 1.3 uch * to make sure initialization gets done.
1104 1.3 uch */
1105 1.5 uch if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) {
1106 1.3 uch return 0;
1107 1.3 uch }
1108 1.3 uch
1109 1.3 uch s = spltty();
1110 1.3 uch chip = sc->sc_chip;
1111 1.3 uch chip->sc_speed = ospeed;
1112 1.5 uch chip->sc_cflag = t->c_cflag;
1113 1.3 uch
1114 1.3 uch txcom_setmode(chip);
1115 1.3 uch txcom_setbaudrate(chip);
1116 1.6 uch
1117 1.3 uch /* And copy to tty. */
1118 1.3 uch tp->t_ispeed = 0;
1119 1.3 uch tp->t_ospeed = chip->sc_speed;
1120 1.3 uch tp->t_cflag = chip->sc_cflag;
1121 1.3 uch
1122 1.3 uch /*
1123 1.6 uch * Update the tty layer's idea of the carrier bit, in case we changed
1124 1.6 uch * CLOCAL or MDMBUF. We don't hang up here; we only do that by
1125 1.6 uch * explicit request.
1126 1.6 uch */
1127 1.10 eeh (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd);
1128 1.6 uch
1129 1.6 uch /*
1130 1.3 uch * If hardware flow control is disabled, unblock any hard flow
1131 1.3 uch * control state.
1132 1.3 uch */
1133 1.3 uch if (!ISSET(chip->sc_cflag, CHWFLOW)) {
1134 1.3 uch txcomstart(tp);
1135 1.3 uch }
1136 1.3 uch
1137 1.3 uch splx(s);
1138 1.6 uch
1139 1.6 uch return 0;
1140 1.6 uch }
1141 1.6 uch
1142 1.9 uch int
1143 1.9 uch txcom_dcd_hook(void *arg, int type, long id, void *msg)
1144 1.9 uch {
1145 1.9 uch struct txcom_softc *sc = arg;
1146 1.9 uch struct tty *tp = sc->sc_tty;
1147 1.9 uch struct txcom_chip *chip = sc->sc_chip;
1148 1.9 uch int modem = !(int)msg; /* p-edge 1, n-edge 0 */
1149 1.9 uch
1150 1.9 uch DPRINTF(("%s: DCD %s\n", __FUNCTION__, modem ? "ON" : "OFF"));
1151 1.9 uch
1152 1.9 uch if (modem && chip->sc_dcd)
1153 1.10 eeh (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd);
1154 1.9 uch
1155 1.9 uch return 0;
1156 1.9 uch }
1157 1.9 uch
1158 1.9 uch int
1159 1.9 uch txcom_cts_hook(void *arg, int type, long id, void *msg)
1160 1.9 uch {
1161 1.9 uch struct txcom_softc *sc = arg;
1162 1.9 uch struct tty *tp = sc->sc_tty;
1163 1.9 uch struct txcom_chip *chip = sc->sc_chip;
1164 1.9 uch int clear = !(int)msg; /* p-edge 1, n-edge 0 */
1165 1.9 uch
1166 1.9 uch DPRINTF(("%s: CTS %s\n", __FUNCTION__, clear ? "ON" : "OFF"));
1167 1.9 uch
1168 1.9 uch if (chip->sc_msr_cts) {
1169 1.9 uch if (!clear) {
1170 1.9 uch chip->sc_tx_stopped = 1;
1171 1.9 uch } else {
1172 1.9 uch chip->sc_tx_stopped = 0;
1173 1.10 eeh (*tp->t_linesw->l_start)(tp);
1174 1.9 uch }
1175 1.9 uch }
1176 1.9 uch
1177 1.9 uch return 0;
1178 1.9 uch }
1179 1.9 uch
1180 1.9 uch #ifdef TX39UARTDEBUG
1181 1.6 uch void
1182 1.9 uch txcom_dump(struct txcom_chip *chip)
1183 1.6 uch {
1184 1.6 uch tx_chipset_tag_t tc = chip->sc_tc;
1185 1.6 uch int slot = chip->sc_slot;
1186 1.6 uch txreg_t reg;
1187 1.6 uch
1188 1.6 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
1189 1.6 uch #define ISSETPRINT(r, m) \
1190 1.6 uch __is_set_print(r, TX39_UARTCTRL1_##m, #m)
1191 1.6 uch ISSETPRINT(reg, UARTON);
1192 1.6 uch ISSETPRINT(reg, EMPTY);
1193 1.6 uch ISSETPRINT(reg, PRXHOLDFULL);
1194 1.6 uch ISSETPRINT(reg, RXHOLDFULL);
1195 1.6 uch ISSETPRINT(reg, ENDMARX);
1196 1.6 uch ISSETPRINT(reg, ENDMATX);
1197 1.6 uch ISSETPRINT(reg, TESTMODE);
1198 1.6 uch ISSETPRINT(reg, ENBREAHALT);
1199 1.6 uch ISSETPRINT(reg, ENDMATEST);
1200 1.6 uch ISSETPRINT(reg, ENDMALOOP);
1201 1.6 uch ISSETPRINT(reg, PULSEOPT2);
1202 1.6 uch ISSETPRINT(reg, PULSEOPT1);
1203 1.6 uch ISSETPRINT(reg, DTINVERT);
1204 1.6 uch ISSETPRINT(reg, DISTXD);
1205 1.6 uch ISSETPRINT(reg, TWOSTOP);
1206 1.6 uch ISSETPRINT(reg, LOOPBACK);
1207 1.6 uch ISSETPRINT(reg, BIT7);
1208 1.6 uch ISSETPRINT(reg, EVENPARITY);
1209 1.6 uch ISSETPRINT(reg, ENPARITY);
1210 1.6 uch ISSETPRINT(reg, ENUART);
1211 1.6 uch }
1212 1.9 uch #endif /* TX39UARTDEBUG */
1213