txcom.c revision 1.15 1 1.15 uch /* $NetBSD: txcom.c,v 1.15 2002/01/29 18:53:19 uch Exp $ */
2 1.1 uch
3 1.9 uch /*-
4 1.9 uch * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5 1.1 uch * All rights reserved.
6 1.1 uch *
7 1.9 uch * This code is derived from software contributed to The NetBSD Foundation
8 1.9 uch * by UCHIYAMA Yasushi.
9 1.9 uch *
10 1.1 uch * Redistribution and use in source and binary forms, with or without
11 1.1 uch * modification, are permitted provided that the following conditions
12 1.1 uch * are met:
13 1.1 uch * 1. Redistributions of source code must retain the above copyright
14 1.1 uch * notice, this list of conditions and the following disclaimer.
15 1.9 uch * 2. Redistributions in binary form must reproduce the above copyright
16 1.9 uch * notice, this list of conditions and the following disclaimer in the
17 1.9 uch * documentation and/or other materials provided with the distribution.
18 1.9 uch * 3. All advertising materials mentioning features or use of this software
19 1.9 uch * must display the following acknowledgement:
20 1.9 uch * This product includes software developed by the NetBSD
21 1.9 uch * Foundation, Inc. and its contributors.
22 1.9 uch * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.9 uch * contributors may be used to endorse or promote products derived
24 1.9 uch * from this software without specific prior written permission.
25 1.1 uch *
26 1.9 uch * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.9 uch * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.9 uch * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.9 uch * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.9 uch * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.9 uch * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.9 uch * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.9 uch * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.9 uch * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.9 uch * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.9 uch * POSSIBILITY OF SUCH DAMAGE.
37 1.1 uch */
38 1.15 uch
39 1.15 uch #include "opt_tx39uart_debug.h"
40 1.1 uch
41 1.1 uch #include <sys/param.h>
42 1.1 uch #include <sys/systm.h>
43 1.3 uch #include <sys/kernel.h>
44 1.1 uch #include <sys/device.h>
45 1.3 uch #include <sys/malloc.h>
46 1.1 uch
47 1.1 uch #include <sys/proc.h> /* tsleep/wakeup */
48 1.1 uch
49 1.1 uch #include <sys/ioctl.h>
50 1.1 uch #include <sys/select.h>
51 1.1 uch #include <sys/file.h>
52 1.1 uch
53 1.1 uch #include <sys/tty.h>
54 1.1 uch #include <sys/conf.h>
55 1.1 uch #include <dev/cons.h> /* consdev */
56 1.1 uch
57 1.1 uch #include <machine/bus.h>
58 1.9 uch #include <machine/config_hook.h>
59 1.1 uch
60 1.1 uch #include <hpcmips/tx/tx39var.h>
61 1.1 uch #include <hpcmips/tx/tx39icureg.h>
62 1.1 uch #include <hpcmips/tx/tx39uartvar.h>
63 1.1 uch #include <hpcmips/tx/tx39uartreg.h>
64 1.1 uch
65 1.5 uch #include <hpcmips/tx/tx39irvar.h>
66 1.5 uch
67 1.1 uch #include <hpcmips/tx/tx39clockreg.h> /* XXX */
68 1.6 uch
69 1.1 uch #define SET(t, f) (t) |= (f)
70 1.1 uch #define CLR(t, f) (t) &= ~(f)
71 1.1 uch #define ISSET(t, f) ((t) & (f))
72 1.9 uch /*
73 1.9 uch * UARTA channel has DTR, DSR, RTS, CTS lines. and they wired to MFIO/IO port.
74 1.9 uch */
75 1.9 uch #define IS_COM0(s) ((s) == 0)
76 1.9 uch #define IS_COM1(s) ((s) == 1)
77 1.9 uch #define ON ((void *)1)
78 1.9 uch #define OFF ((void *)0)
79 1.1 uch
80 1.15 uch #ifdef TX39UART_DEBUG
81 1.15 uch #define DPRINTF_ENABLE
82 1.15 uch #define DPRINTF_DEBUG tx39uart_debug
83 1.1 uch #endif
84 1.15 uch #include <machine/debug.h>
85 1.1 uch
86 1.3 uch #define TXCOM_HW_CONSOLE 0x40
87 1.3 uch #define TXCOM_RING_SIZE 256 /* must be a power of two! */
88 1.3 uch #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1)
89 1.1 uch
90 1.3 uch struct txcom_chip {
91 1.1 uch tx_chipset_tag_t sc_tc;
92 1.1 uch int sc_slot; /* UARTA or UARTB */
93 1.1 uch int sc_cflag;
94 1.1 uch int sc_speed;
95 1.3 uch int sc_swflags;
96 1.1 uch int sc_hwflags;
97 1.6 uch
98 1.6 uch int sc_dcd;
99 1.9 uch int sc_msr_cts;
100 1.9 uch int sc_tx_stopped;
101 1.3 uch };
102 1.1 uch
103 1.3 uch struct txcom_softc {
104 1.3 uch struct device sc_dev;
105 1.3 uch struct tty *sc_tty;
106 1.3 uch struct txcom_chip *sc_chip;
107 1.3 uch
108 1.8 thorpej struct callout sc_txsoft_ch;
109 1.8 thorpej struct callout sc_rxsoft_ch;
110 1.8 thorpej
111 1.3 uch u_int8_t *sc_tba; /* transmit buffer address */
112 1.3 uch int sc_tbc; /* transmit byte count */
113 1.3 uch int sc_heldtbc;
114 1.3 uch u_int8_t *sc_rbuf; /* receive buffer address */
115 1.3 uch int sc_rbput; /* receive byte count */
116 1.3 uch int sc_rbget;
117 1.1 uch };
118 1.1 uch
119 1.1 uch extern struct cfdriver txcom_cd;
120 1.1 uch
121 1.9 uch int txcom_match(struct device *, struct cfdata *, void *);
122 1.9 uch void txcom_attach(struct device *, struct device *, void *);
123 1.9 uch int txcom_print(void*, const char *);
124 1.9 uch
125 1.9 uch int txcom_txintr(void *);
126 1.9 uch int txcom_rxintr(void *);
127 1.9 uch int txcom_frameerr_intr(void *);
128 1.9 uch int txcom_parityerr_intr(void *);
129 1.9 uch int txcom_break_intr(void *);
130 1.3 uch
131 1.9 uch void txcom_rxsoft(void *);
132 1.9 uch void txcom_txsoft(void *);
133 1.3 uch
134 1.9 uch int txcom_stsoft(void *);
135 1.9 uch int txcom_stsoft2(void *);
136 1.9 uch int txcom_stsoft3(void *);
137 1.9 uch int txcom_stsoft4(void *);
138 1.9 uch
139 1.9 uch
140 1.9 uch void txcom_shutdown(struct txcom_softc *);
141 1.9 uch void txcom_break(struct txcom_softc *, int);
142 1.9 uch void txcom_modem(struct txcom_softc *, int);
143 1.9 uch void txcomstart(struct tty *);
144 1.9 uch int txcomparam(struct tty *, struct termios *);
145 1.9 uch
146 1.9 uch void txcom_reset (struct txcom_chip *);
147 1.9 uch int txcom_enable (struct txcom_chip *);
148 1.9 uch void txcom_disable (struct txcom_chip *);
149 1.9 uch void txcom_setmode (struct txcom_chip *);
150 1.9 uch void txcom_setbaudrate(struct txcom_chip *);
151 1.9 uch int txcom_cngetc (dev_t);
152 1.9 uch void txcom_cnputc (dev_t, int);
153 1.9 uch void txcom_cnpollc (dev_t, int);
154 1.3 uch
155 1.9 uch int txcom_dcd_hook(void *, int, long, void *);
156 1.9 uch int txcom_cts_hook(void *, int, long, void *);
157 1.1 uch
158 1.9 uch
159 1.9 uch __inline__ int __txcom_txbufready(struct txcom_chip *, int);
160 1.9 uch const char *__txcom_slotname(int);
161 1.9 uch
162 1.9 uch #ifdef TX39UARTDEBUG
163 1.9 uch void txcom_dump(struct txcom_chip *);
164 1.9 uch #endif
165 1.6 uch
166 1.1 uch cdev_decl(txcom);
167 1.1 uch
168 1.3 uch struct consdev txcomcons = {
169 1.3 uch NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc,
170 1.14 uch NULL, NODEV, CN_NORMAL
171 1.3 uch };
172 1.3 uch
173 1.1 uch /* Serial console */
174 1.3 uch struct txcom_chip txcom_chip;
175 1.1 uch
176 1.1 uch struct cfattach txcom_ca = {
177 1.1 uch sizeof(struct txcom_softc), txcom_match, txcom_attach
178 1.1 uch };
179 1.1 uch
180 1.1 uch int
181 1.1 uch txcom_match(parent, cf, aux)
182 1.1 uch struct device *parent;
183 1.1 uch struct cfdata *cf;
184 1.1 uch void *aux;
185 1.1 uch {
186 1.1 uch /* if the autoconfiguration got this far, there's a slot here */
187 1.1 uch return 1;
188 1.1 uch }
189 1.1 uch
190 1.1 uch void
191 1.9 uch txcom_attach(struct device *parent, struct device *self, void *aux)
192 1.1 uch {
193 1.1 uch struct tx39uart_attach_args *ua = aux;
194 1.1 uch struct txcom_softc *sc = (void*)self;
195 1.1 uch tx_chipset_tag_t tc;
196 1.1 uch struct tty *tp;
197 1.3 uch struct txcom_chip *chip;
198 1.6 uch int slot, console;
199 1.1 uch
200 1.1 uch /* Check this slot used as serial console */
201 1.6 uch console = (ua->ua_slot == txcom_chip.sc_slot) &&
202 1.14 uch (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE);
203 1.6 uch
204 1.6 uch if (console) {
205 1.3 uch sc->sc_chip = &txcom_chip;
206 1.3 uch } else {
207 1.3 uch if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip),
208 1.14 uch M_DEVBUF, M_WAITOK))) {
209 1.3 uch printf(": can't allocate chip\n");
210 1.3 uch return;
211 1.3 uch }
212 1.3 uch memset(sc->sc_chip, 0, sizeof(struct txcom_chip));
213 1.1 uch }
214 1.1 uch
215 1.3 uch chip = sc->sc_chip;
216 1.3 uch tc = chip->sc_tc = ua->ua_tc;
217 1.3 uch slot = chip->sc_slot = ua->ua_slot;
218 1.3 uch
219 1.6 uch #ifdef TX39UARTDEBUG
220 1.6 uch txcom_dump(chip);
221 1.6 uch #endif
222 1.6 uch if (!console)
223 1.6 uch txcom_reset(chip);
224 1.6 uch
225 1.3 uch if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) {
226 1.3 uch printf(": can't allocate buffer.\n");
227 1.3 uch return;
228 1.3 uch }
229 1.3 uch memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE);
230 1.1 uch
231 1.1 uch tp = ttymalloc();
232 1.1 uch tp->t_oproc = txcomstart;
233 1.1 uch tp->t_param = txcomparam;
234 1.1 uch tp->t_hwiflow = NULL;
235 1.1 uch sc->sc_tty = tp;
236 1.1 uch tty_attach(tp);
237 1.1 uch
238 1.3 uch if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
239 1.1 uch int maj;
240 1.1 uch /* locate the major number */
241 1.1 uch for (maj = 0; maj < nchrdev; maj++)
242 1.1 uch if (cdevsw[maj].d_open == txcomopen)
243 1.1 uch break;
244 1.1 uch
245 1.1 uch cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit);
246 1.1 uch
247 1.3 uch printf(": console");
248 1.1 uch }
249 1.1 uch
250 1.3 uch printf("\n");
251 1.1 uch
252 1.1 uch /*
253 1.1 uch * Enable interrupt
254 1.1 uch */
255 1.3 uch #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s))
256 1.3 uch
257 1.3 uch tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY,
258 1.14 uch txcom_rxintr, sc);
259 1.3 uch tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY,
260 1.14 uch txcom_txintr, sc);
261 1.3 uch tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY,
262 1.14 uch txcom_rxintr, sc);
263 1.3 uch tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY,
264 1.14 uch txcom_txintr, sc);
265 1.3 uch tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY,
266 1.14 uch txcom_frameerr_intr, sc);
267 1.3 uch tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY,
268 1.14 uch txcom_parityerr_intr, sc);
269 1.3 uch tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY,
270 1.14 uch txcom_break_intr, sc);
271 1.5 uch
272 1.9 uch /*
273 1.9 uch * UARTA has external signal line. (its wiring is platform dependent)
274 1.9 uch */
275 1.9 uch if (IS_COM0(slot)) {
276 1.9 uch /* install DCD, CTS hooks. */
277 1.11 sato config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_DCD,
278 1.14 uch CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc);
279 1.11 sato config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_CTS,
280 1.14 uch CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc);
281 1.9 uch }
282 1.6 uch
283 1.5 uch /*
284 1.5 uch * UARTB can connect IR module
285 1.5 uch */
286 1.9 uch if (IS_COM1(slot)) {
287 1.5 uch struct txcom_attach_args tca;
288 1.5 uch tca.tca_tc = tc;
289 1.5 uch tca.tca_parent = self;
290 1.5 uch config_found(self, &tca, txcom_print);
291 1.5 uch }
292 1.5 uch }
293 1.5 uch
294 1.5 uch int
295 1.9 uch txcom_print(void *aux, const char *pnp)
296 1.5 uch {
297 1.5 uch return pnp ? QUIET : UNCONF;
298 1.1 uch }
299 1.1 uch
300 1.6 uch void
301 1.9 uch txcom_reset(struct txcom_chip *chip)
302 1.6 uch {
303 1.6 uch tx_chipset_tag_t tc;
304 1.6 uch int slot, ofs;
305 1.6 uch txreg_t reg;
306 1.6 uch
307 1.6 uch tc = chip->sc_tc;
308 1.6 uch slot = chip->sc_slot;
309 1.6 uch ofs = TX39_UARTCTRL1_REG(slot);
310 1.6 uch
311 1.6 uch /* Supply clock */
312 1.6 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
313 1.6 uch reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
314 1.6 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
315 1.6 uch
316 1.6 uch /* reset UART module */
317 1.6 uch tx_conf_write(tc, ofs, 0);
318 1.6 uch }
319 1.6 uch
320 1.1 uch int
321 1.9 uch txcom_enable(struct txcom_chip *chip)
322 1.1 uch {
323 1.1 uch tx_chipset_tag_t tc;
324 1.1 uch txreg_t reg;
325 1.3 uch int slot, ofs, timeout;
326 1.1 uch
327 1.3 uch tc = chip->sc_tc;
328 1.3 uch slot = chip->sc_slot;
329 1.3 uch ofs = TX39_UARTCTRL1_REG(slot);
330 1.1 uch
331 1.9 uch /* External power supply (if any) */
332 1.9 uch config_hook_call(CONFIG_HOOK_POWERCONTROL,
333 1.14 uch CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON);
334 1.9 uch delay(3);
335 1.9 uch
336 1.6 uch /* Supply clock */
337 1.5 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
338 1.5 uch reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
339 1.5 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
340 1.5 uch
341 1.6 uch /*
342 1.6 uch * XXX Disable DMA (DMA not coded yet)
343 1.6 uch */
344 1.6 uch reg = tx_conf_read(tc, ofs);
345 1.6 uch reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
346 1.6 uch tx_conf_write(tc, ofs, reg);
347 1.6 uch
348 1.6 uch /* enable */
349 1.3 uch reg = tx_conf_read(tc, ofs);
350 1.1 uch reg |= TX39_UARTCTRL1_ENUART;
351 1.1 uch reg &= ~TX39_UARTCTRL1_ENBREAHALT;
352 1.3 uch tx_conf_write(tc, ofs, reg);
353 1.3 uch
354 1.9 uch timeout = 100000;
355 1.3 uch
356 1.3 uch while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) &&
357 1.14 uch --timeout > 0)
358 1.3 uch ;
359 1.3 uch
360 1.5 uch if (timeout == 0 && !cold) {
361 1.6 uch printf("%s never power up\n", __txcom_slotname(slot));
362 1.3 uch return 1;
363 1.3 uch }
364 1.3 uch
365 1.1 uch return 0;
366 1.1 uch }
367 1.1 uch
368 1.1 uch void
369 1.9 uch txcom_disable(struct txcom_chip *chip)
370 1.1 uch {
371 1.1 uch tx_chipset_tag_t tc;
372 1.1 uch txreg_t reg;
373 1.1 uch int slot;
374 1.1 uch
375 1.3 uch tc = chip->sc_tc;
376 1.3 uch slot = chip->sc_slot;
377 1.1 uch
378 1.1 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
379 1.1 uch /* DMA */
380 1.1 uch reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
381 1.3 uch
382 1.6 uch /* disable module */
383 1.1 uch reg &= ~TX39_UARTCTRL1_ENUART;
384 1.1 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
385 1.3 uch
386 1.1 uch /* Clock */
387 1.1 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
388 1.1 uch reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
389 1.1 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
390 1.1 uch
391 1.1 uch }
392 1.1 uch
393 1.9 uch __inline__ int
394 1.9 uch __txcom_txbufready(struct txcom_chip *chip, int retry)
395 1.3 uch {
396 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
397 1.3 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
398 1.3 uch
399 1.3 uch do {
400 1.3 uch if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY)
401 1.3 uch return 1;
402 1.3 uch } while(--retry != 0);
403 1.3 uch
404 1.1 uch return 0;
405 1.1 uch }
406 1.1 uch
407 1.5 uch void
408 1.9 uch txcom_pulse_mode(struct device *dev)
409 1.5 uch {
410 1.5 uch struct txcom_softc *sc = (void*)dev;
411 1.5 uch struct txcom_chip *chip = sc->sc_chip;
412 1.5 uch tx_chipset_tag_t tc = chip->sc_tc;
413 1.5 uch int ofs;
414 1.5 uch txreg_t reg;
415 1.5 uch
416 1.5 uch ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
417 1.5 uch
418 1.5 uch reg = tx_conf_read(tc, ofs);
419 1.6 uch /* WindowsCE use this setting */
420 1.6 uch reg |= TX39_UARTCTRL1_PULSEOPT1;
421 1.6 uch reg &= ~TX39_UARTCTRL1_PULSEOPT2;
422 1.6 uch reg |= TX39_UARTCTRL1_DTINVERT;
423 1.6 uch
424 1.5 uch tx_conf_write(tc, ofs, reg);
425 1.5 uch }
426 1.5 uch
427 1.3 uch /*
428 1.3 uch * console
429 1.3 uch */
430 1.1 uch int
431 1.9 uch txcom_cngetc(dev_t dev)
432 1.1 uch {
433 1.1 uch tx_chipset_tag_t tc;
434 1.2 uch int ofs, c, s;
435 1.2 uch
436 1.3 uch s = spltty();
437 1.2 uch
438 1.3 uch tc = txcom_chip.sc_tc;
439 1.3 uch ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot);
440 1.1 uch
441 1.1 uch while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs)))
442 1.1 uch ;
443 1.2 uch
444 1.3 uch c = TX39_UARTRXHOLD_RXDATA(
445 1.3 uch tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot)));
446 1.2 uch
447 1.3 uch if (c == '\r')
448 1.1 uch c = '\n';
449 1.1 uch
450 1.2 uch splx(s);
451 1.2 uch
452 1.1 uch return c;
453 1.1 uch }
454 1.1 uch
455 1.1 uch void
456 1.9 uch txcom_cnputc(dev_t dev, int c)
457 1.1 uch {
458 1.3 uch struct txcom_chip *chip = &txcom_chip;
459 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
460 1.3 uch int s;
461 1.2 uch
462 1.3 uch s = spltty();
463 1.1 uch
464 1.3 uch /* Wait for transmitter to empty */
465 1.3 uch __txcom_txbufready(chip, -1);
466 1.1 uch
467 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
468 1.14 uch (c & TX39_UARTTXHOLD_TXDATA_MASK));
469 1.1 uch
470 1.3 uch __txcom_txbufready(chip, -1);
471 1.3 uch
472 1.2 uch splx(s);
473 1.1 uch }
474 1.1 uch
475 1.1 uch void
476 1.9 uch txcom_cnpollc(dev_t dev, int on)
477 1.1 uch {
478 1.1 uch }
479 1.1 uch
480 1.1 uch void
481 1.9 uch txcom_setmode(struct txcom_chip *chip)
482 1.1 uch {
483 1.3 uch tcflag_t cflag = chip->sc_cflag;
484 1.3 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
485 1.1 uch txreg_t reg;
486 1.1 uch
487 1.3 uch reg = tx_conf_read(chip->sc_tc, ofs);
488 1.6 uch reg &= ~TX39_UARTCTRL1_ENUART;
489 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg);
490 1.6 uch
491 1.1 uch switch (ISSET(cflag, CSIZE)) {
492 1.1 uch default:
493 1.1 uch printf("txcom_setmode: CS7, CS8 only. use CS7");
494 1.1 uch /* FALL THROUGH */
495 1.1 uch case CS7:
496 1.1 uch reg |= TX39_UARTCTRL1_BIT7;
497 1.1 uch break;
498 1.1 uch case CS8:
499 1.1 uch reg &= ~TX39_UARTCTRL1_BIT7;
500 1.1 uch break;
501 1.1 uch }
502 1.3 uch
503 1.1 uch if (ISSET(cflag, PARENB)) {
504 1.1 uch reg |= TX39_UARTCTRL1_ENPARITY;
505 1.1 uch if (ISSET(cflag, PARODD)) {
506 1.1 uch reg &= ~TX39_UARTCTRL1_EVENPARITY;
507 1.1 uch } else {
508 1.1 uch reg |= TX39_UARTCTRL1_EVENPARITY;
509 1.1 uch }
510 1.1 uch } else {
511 1.1 uch reg &= ~TX39_UARTCTRL1_ENPARITY;
512 1.1 uch }
513 1.3 uch
514 1.6 uch if (ISSET(cflag, CSTOPB))
515 1.1 uch reg |= TX39_UARTCTRL1_TWOSTOP;
516 1.6 uch else
517 1.6 uch reg &= ~TX39_UARTCTRL1_TWOSTOP;
518 1.6 uch
519 1.6 uch reg |= TX39_UARTCTRL1_ENUART;
520 1.3 uch tx_conf_write(chip->sc_tc, ofs, reg);
521 1.3 uch }
522 1.3 uch
523 1.3 uch void
524 1.9 uch txcom_setbaudrate(struct txcom_chip *chip)
525 1.3 uch {
526 1.3 uch int baudrate;
527 1.6 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
528 1.6 uch txreg_t reg, reg1;
529 1.3 uch
530 1.3 uch if (chip->sc_speed == 0)
531 1.3 uch return;
532 1.3 uch
533 1.5 uch if (!cold)
534 1.15 uch DPRINTF("%d\n", chip->sc_speed);
535 1.5 uch
536 1.6 uch reg1 = tx_conf_read(chip->sc_tc, ofs);
537 1.6 uch reg1 &= ~TX39_UARTCTRL1_ENUART;
538 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg1);
539 1.6 uch
540 1.3 uch baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1;
541 1.3 uch reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate);
542 1.3 uch
543 1.3 uch tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg);
544 1.6 uch
545 1.6 uch reg1 |= TX39_UARTCTRL1_ENUART;
546 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg1);
547 1.3 uch }
548 1.3 uch
549 1.3 uch int
550 1.9 uch txcom_cnattach(int slot, int speed, int cflag)
551 1.3 uch {
552 1.3 uch cn_tab = &txcomcons;
553 1.3 uch
554 1.3 uch txcom_chip.sc_tc = tx_conf_get_tag();
555 1.3 uch txcom_chip.sc_slot = slot;
556 1.3 uch txcom_chip.sc_cflag = cflag;
557 1.3 uch txcom_chip.sc_speed = speed;
558 1.3 uch txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE;
559 1.6 uch #if notyet
560 1.6 uch txcom_reset(&txcom_chip);
561 1.6 uch #endif
562 1.6 uch txcom_setmode(&txcom_chip);
563 1.6 uch txcom_setbaudrate(&txcom_chip);
564 1.3 uch
565 1.5 uch if (txcom_enable(&txcom_chip))
566 1.5 uch return 1;
567 1.5 uch
568 1.3 uch return 0;
569 1.3 uch }
570 1.3 uch
571 1.3 uch /*
572 1.3 uch * tty
573 1.3 uch */
574 1.3 uch void
575 1.9 uch txcom_break(struct txcom_softc *sc, int on)
576 1.3 uch {
577 1.3 uch struct txcom_chip *chip = sc->sc_chip;
578 1.1 uch
579 1.3 uch tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
580 1.14 uch on ? TX39_UARTTXHOLD_BREAK : 0);
581 1.1 uch }
582 1.1 uch
583 1.1 uch void
584 1.9 uch txcom_modem(struct txcom_softc *sc, int on)
585 1.1 uch {
586 1.3 uch struct txcom_chip *chip = sc->sc_chip;
587 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
588 1.3 uch int slot = chip->sc_slot;
589 1.1 uch txreg_t reg;
590 1.1 uch
591 1.9 uch /* assert DTR */
592 1.9 uch if (IS_COM0(slot)) {
593 1.11 sato config_hook_call(CONFIG_HOOK_SET,
594 1.14 uch CONFIG_HOOK_COM0_DTR,
595 1.14 uch (void *)on);
596 1.9 uch }
597 1.9 uch
598 1.3 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
599 1.6 uch reg &= ~TX39_UARTCTRL1_ENUART;
600 1.6 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
601 1.3 uch
602 1.3 uch if (on) {
603 1.3 uch reg &= ~TX39_UARTCTRL1_DISTXD;
604 1.3 uch } else {
605 1.6 uch reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */
606 1.3 uch }
607 1.6 uch
608 1.6 uch reg |= TX39_UARTCTRL1_ENUART;
609 1.6 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
610 1.1 uch }
611 1.1 uch
612 1.1 uch void
613 1.9 uch txcom_shutdown(struct txcom_softc *sc)
614 1.1 uch {
615 1.1 uch struct tty *tp = sc->sc_tty;
616 1.3 uch int s = spltty();
617 1.1 uch
618 1.3 uch /* Clear any break condition set with TIOCSBRK. */
619 1.3 uch txcom_break(sc, 0);
620 1.3 uch
621 1.3 uch /*
622 1.3 uch * Hang up if necessary. Wait a bit, so the other side has time to
623 1.3 uch * notice even if we immediately open the port again.
624 1.3 uch */
625 1.3 uch if (ISSET(tp->t_cflag, HUPCL)) {
626 1.3 uch txcom_modem(sc, 0);
627 1.3 uch (void) tsleep(sc, TTIPRI, ttclos, hz);
628 1.3 uch }
629 1.3 uch
630 1.3 uch
631 1.3 uch /* Turn off interrupts if not the console. */
632 1.3 uch if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
633 1.3 uch txcom_disable(sc->sc_chip);
634 1.3 uch }
635 1.1 uch
636 1.3 uch splx(s);
637 1.3 uch }
638 1.1 uch
639 1.9 uch const char *
640 1.9 uch __txcom_slotname(int slot)
641 1.3 uch {
642 1.9 uch static const char *slotname[] = {"UARTA", "UARTB", "unknown"};
643 1.9 uch
644 1.9 uch if (slot != 0 && slot != 1)
645 1.9 uch return slotname[2];
646 1.9 uch
647 1.9 uch return slotname[slot];
648 1.2 uch }
649 1.2 uch
650 1.2 uch int
651 1.9 uch txcom_frameerr_intr(void *arg)
652 1.3 uch {
653 1.3 uch struct txcom_softc *sc = arg;
654 1.3 uch
655 1.3 uch printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot));
656 1.3 uch
657 1.3 uch return 0;
658 1.3 uch }
659 1.3 uch
660 1.3 uch int
661 1.9 uch txcom_parityerr_intr(void *arg)
662 1.3 uch {
663 1.3 uch struct txcom_softc *sc = arg;
664 1.3 uch
665 1.3 uch printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot));
666 1.2 uch
667 1.2 uch return 0;
668 1.1 uch }
669 1.1 uch
670 1.1 uch int
671 1.9 uch txcom_break_intr(void *arg)
672 1.1 uch {
673 1.1 uch struct txcom_softc *sc = arg;
674 1.3 uch
675 1.3 uch printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot));
676 1.3 uch
677 1.3 uch return 0;
678 1.3 uch }
679 1.3 uch
680 1.3 uch int
681 1.9 uch txcom_rxintr(void *arg)
682 1.3 uch {
683 1.3 uch struct txcom_softc *sc = arg;
684 1.3 uch struct txcom_chip *chip = sc->sc_chip;
685 1.1 uch u_int8_t c;
686 1.1 uch
687 1.3 uch c = TX39_UARTRXHOLD_RXDATA(
688 1.3 uch tx_conf_read(chip->sc_tc,
689 1.14 uch TX39_UARTRXHOLD_REG(chip->sc_slot)));
690 1.3 uch
691 1.3 uch sc->sc_rbuf[sc->sc_rbput] = c;
692 1.3 uch sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK;
693 1.3 uch
694 1.8 thorpej callout_reset(&sc->sc_rxsoft_ch, 1, txcom_rxsoft, sc);
695 1.1 uch
696 1.1 uch return 0;
697 1.1 uch }
698 1.1 uch
699 1.3 uch void
700 1.9 uch txcom_rxsoft(void *arg)
701 1.3 uch {
702 1.3 uch struct txcom_softc *sc = arg;
703 1.3 uch struct tty *tp = sc->sc_tty;
704 1.14 uch int (*rint)(int, struct tty *);
705 1.3 uch int code;
706 1.3 uch int s, end, get;
707 1.3 uch
708 1.10 eeh rint = tp->t_linesw->l_rint;
709 1.3 uch
710 1.3 uch s = spltty();
711 1.3 uch end = sc->sc_rbput;
712 1.3 uch get = sc->sc_rbget;
713 1.3 uch
714 1.3 uch while (get != end) {
715 1.3 uch code = sc->sc_rbuf[get];
716 1.3 uch
717 1.3 uch if ((*rint)(code, tp) == -1) {
718 1.3 uch /*
719 1.3 uch * The line discipline's buffer is out of space.
720 1.3 uch */
721 1.3 uch }
722 1.3 uch get = (get + 1) % TXCOM_RING_MASK;
723 1.3 uch }
724 1.3 uch sc->sc_rbget = get;
725 1.3 uch
726 1.3 uch splx(s);
727 1.3 uch }
728 1.3 uch
729 1.1 uch int
730 1.9 uch txcom_txintr(void *arg)
731 1.1 uch {
732 1.1 uch struct txcom_softc *sc = arg;
733 1.3 uch struct txcom_chip *chip = sc->sc_chip;
734 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
735 1.1 uch
736 1.3 uch if (sc->sc_tbc > 0) {
737 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
738 1.14 uch (*sc->sc_tba &
739 1.14 uch TX39_UARTTXHOLD_TXDATA_MASK));
740 1.3 uch sc->sc_tbc--;
741 1.3 uch sc->sc_tba++;
742 1.3 uch } else {
743 1.8 thorpej callout_reset(&sc->sc_rxsoft_ch, 1, txcom_txsoft, sc);
744 1.3 uch }
745 1.1 uch
746 1.1 uch return 0;
747 1.1 uch }
748 1.1 uch
749 1.3 uch void
750 1.9 uch txcom_txsoft(void *arg)
751 1.3 uch {
752 1.3 uch struct txcom_softc *sc = arg;
753 1.3 uch struct tty *tp = sc->sc_tty;
754 1.3 uch int s = spltty();
755 1.3 uch
756 1.3 uch CLR(tp->t_state, TS_BUSY);
757 1.3 uch if (ISSET(tp->t_state, TS_FLUSH)) {
758 1.3 uch CLR(tp->t_state, TS_FLUSH);
759 1.3 uch } else {
760 1.3 uch ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
761 1.3 uch }
762 1.3 uch
763 1.10 eeh (*tp->t_linesw->l_start)(tp);
764 1.3 uch
765 1.3 uch splx(s);
766 1.3 uch }
767 1.1 uch
768 1.1 uch int
769 1.9 uch txcomopen(dev_t dev, int flag, int mode, struct proc *p)
770 1.1 uch {
771 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
772 1.3 uch struct txcom_chip *chip;
773 1.3 uch struct tty *tp;
774 1.3 uch int s, err;
775 1.1 uch
776 1.3 uch if (!sc)
777 1.3 uch return ENXIO;
778 1.3 uch
779 1.3 uch chip = sc->sc_chip;
780 1.3 uch tp = sc->sc_tty;
781 1.3 uch
782 1.3 uch if (ISSET(tp->t_state, TS_ISOPEN) &&
783 1.3 uch ISSET(tp->t_state, TS_XCLUDE) &&
784 1.3 uch p->p_ucred->cr_uid != 0)
785 1.3 uch return (EBUSY);
786 1.3 uch
787 1.3 uch s = spltty();
788 1.3 uch
789 1.6 uch if (txcom_enable(sc->sc_chip)) {
790 1.6 uch splx(s);
791 1.5 uch goto out;
792 1.6 uch }
793 1.5 uch /*
794 1.5 uch * Do the following iff this is a first open.
795 1.5 uch */
796 1.5 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
797 1.5 uch struct termios t;
798 1.5 uch
799 1.5 uch tp->t_dev = dev;
800 1.1 uch
801 1.5 uch t.c_ispeed = 0;
802 1.5 uch if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
803 1.5 uch t.c_ospeed = chip->sc_speed;
804 1.5 uch t.c_cflag = chip->sc_cflag;
805 1.5 uch } else {
806 1.5 uch t.c_ospeed = TTYDEF_SPEED;
807 1.5 uch t.c_cflag = TTYDEF_CFLAG;
808 1.5 uch }
809 1.3 uch
810 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL))
811 1.5 uch SET(t.c_cflag, CLOCAL);
812 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS))
813 1.5 uch SET(t.c_cflag, CRTSCTS);
814 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF))
815 1.5 uch SET(t.c_cflag, MDMBUF);
816 1.5 uch
817 1.5 uch /* Make sure txcomparam() will do something. */
818 1.5 uch tp->t_ospeed = 0;
819 1.5 uch txcomparam(tp, &t);
820 1.5 uch
821 1.5 uch tp->t_iflag = TTYDEF_IFLAG;
822 1.5 uch tp->t_oflag = TTYDEF_OFLAG;
823 1.5 uch tp->t_lflag = TTYDEF_LFLAG;
824 1.1 uch
825 1.5 uch ttychars(tp);
826 1.5 uch ttsetwater(tp);
827 1.3 uch
828 1.5 uch /*
829 1.5 uch * Turn on DTR. We must always do this, even if carrier is not
830 1.5 uch * present, because otherwise we'd have to use TIOCSDTR
831 1.5 uch * immediately after setting CLOCAL, which applications do not
832 1.5 uch * expect. We always assert DTR while the device is open
833 1.5 uch * unless explicitly requested to deassert it.
834 1.5 uch */
835 1.5 uch txcom_modem(sc, 1);
836 1.3 uch
837 1.5 uch /* Clear the input ring, and unblock. */
838 1.5 uch sc->sc_rbget = sc->sc_rbput = 0;
839 1.5 uch }
840 1.3 uch
841 1.3 uch splx(s);
842 1.6 uch #define TXCOMDIALOUT(x) (minor(x) & 0x80000)
843 1.6 uch if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) {
844 1.15 uch DPRINTF("ttyopen failed\n");
845 1.3 uch goto out;
846 1.1 uch }
847 1.10 eeh if ((err = (*tp->t_linesw->l_open)(dev, tp))) {
848 1.15 uch DPRINTF("line dicipline open failed\n");
849 1.3 uch goto out;
850 1.3 uch }
851 1.3 uch
852 1.3 uch return err;
853 1.3 uch
854 1.3 uch out:
855 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
856 1.3 uch /*
857 1.3 uch * We failed to open the device, and nobody else had it opened.
858 1.3 uch * Clean up the state as appropriate.
859 1.3 uch */
860 1.3 uch txcom_shutdown(sc);
861 1.1 uch }
862 1.1 uch
863 1.1 uch return err;
864 1.3 uch
865 1.1 uch }
866 1.1 uch
867 1.1 uch int
868 1.9 uch txcomclose(dev_t dev, int flag, int mode, struct proc *p)
869 1.1 uch {
870 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
871 1.1 uch struct tty *tp = sc->sc_tty;
872 1.1 uch
873 1.3 uch /* XXX This is for cons.c. */
874 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN))
875 1.3 uch return 0;
876 1.3 uch
877 1.10 eeh (*tp->t_linesw->l_close)(tp, flag);
878 1.1 uch ttyclose(tp);
879 1.1 uch
880 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
881 1.3 uch /*
882 1.3 uch * Although we got a last close, the device may still be in
883 1.3 uch * use; e.g. if this was the dialout node, and there are still
884 1.3 uch * processes waiting for carrier on the non-dialout node.
885 1.3 uch */
886 1.3 uch txcom_shutdown(sc);
887 1.3 uch }
888 1.3 uch
889 1.1 uch return 0;
890 1.1 uch }
891 1.1 uch
892 1.1 uch int
893 1.9 uch txcomread(dev_t dev, struct uio *uio, int flag)
894 1.1 uch {
895 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
896 1.1 uch struct tty *tp = sc->sc_tty;
897 1.3 uch
898 1.10 eeh return ((*tp->t_linesw->l_read)(tp, uio, flag));
899 1.1 uch }
900 1.1 uch
901 1.1 uch int
902 1.9 uch txcomwrite(dev_t dev, struct uio *uio, int flag)
903 1.1 uch {
904 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
905 1.1 uch struct tty *tp = sc->sc_tty;
906 1.1 uch
907 1.10 eeh return ((*tp->t_linesw->l_write)(tp, uio, flag));
908 1.12 scw }
909 1.12 scw
910 1.12 scw int
911 1.12 scw txcompoll(dev_t dev, int events, struct proc *p)
912 1.12 scw {
913 1.12 scw struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
914 1.12 scw struct tty *tp = sc->sc_tty;
915 1.12 scw
916 1.12 scw return ((*tp->t_linesw->l_poll)(tp, events, p));
917 1.1 uch }
918 1.1 uch
919 1.1 uch struct tty *
920 1.9 uch txcomtty(dev_t dev)
921 1.1 uch {
922 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
923 1.3 uch
924 1.3 uch return sc->sc_tty;
925 1.1 uch }
926 1.1 uch
927 1.1 uch int
928 1.9 uch txcomioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
929 1.1 uch {
930 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
931 1.1 uch struct tty *tp = sc->sc_tty;
932 1.3 uch int s, err;
933 1.3 uch
934 1.10 eeh err = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
935 1.3 uch if (err >= 0) {
936 1.3 uch return err;
937 1.3 uch }
938 1.3 uch
939 1.3 uch err = ttioctl(tp, cmd, data, flag, p);
940 1.3 uch if (err >= 0) {
941 1.3 uch return err;
942 1.3 uch }
943 1.3 uch
944 1.3 uch err = 0;
945 1.3 uch
946 1.3 uch s = spltty();
947 1.3 uch
948 1.3 uch switch (cmd) {
949 1.5 uch default:
950 1.5 uch err = ENOTTY;
951 1.5 uch break;
952 1.5 uch
953 1.3 uch case TIOCSBRK:
954 1.3 uch txcom_break(sc, 1);
955 1.3 uch break;
956 1.3 uch
957 1.3 uch case TIOCCBRK:
958 1.3 uch txcom_break(sc, 0);
959 1.3 uch break;
960 1.3 uch
961 1.3 uch case TIOCSDTR:
962 1.3 uch txcom_modem(sc, 1);
963 1.3 uch break;
964 1.3 uch
965 1.3 uch case TIOCCDTR:
966 1.3 uch txcom_modem(sc, 0);
967 1.3 uch break;
968 1.3 uch
969 1.3 uch case TIOCGFLAGS:
970 1.3 uch *(int *)data = sc->sc_chip->sc_swflags;
971 1.3 uch break;
972 1.3 uch
973 1.3 uch case TIOCSFLAGS:
974 1.3 uch err = suser(p->p_ucred, &p->p_acflag);
975 1.3 uch if (err) {
976 1.3 uch break;
977 1.3 uch }
978 1.3 uch sc->sc_chip->sc_swflags = *(int *)data;
979 1.3 uch break;
980 1.3 uch
981 1.3 uch }
982 1.1 uch
983 1.3 uch splx(s);
984 1.1 uch
985 1.3 uch return err;
986 1.1 uch }
987 1.1 uch
988 1.1 uch void
989 1.9 uch txcomstop(struct tty *tp, int flag)
990 1.1 uch {
991 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
992 1.1 uch int s;
993 1.1 uch
994 1.1 uch s = spltty();
995 1.1 uch
996 1.1 uch if (ISSET(tp->t_state, TS_BUSY)) {
997 1.1 uch /* Stop transmitting at the next chunk. */
998 1.1 uch sc->sc_tbc = 0;
999 1.1 uch sc->sc_heldtbc = 0;
1000 1.1 uch if (!ISSET(tp->t_state, TS_TTSTOP))
1001 1.1 uch SET(tp->t_state, TS_FLUSH);
1002 1.1 uch }
1003 1.3 uch
1004 1.1 uch splx(s);
1005 1.1 uch }
1006 1.1 uch
1007 1.1 uch void
1008 1.9 uch txcomstart(struct tty *tp)
1009 1.1 uch {
1010 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
1011 1.3 uch struct txcom_chip *chip = sc->sc_chip;
1012 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
1013 1.3 uch int slot = chip->sc_slot;
1014 1.1 uch int s;
1015 1.1 uch
1016 1.1 uch s = spltty();
1017 1.3 uch
1018 1.3 uch if (!__txcom_txbufready(chip, 0) ||
1019 1.3 uch ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
1020 1.3 uch goto out;
1021 1.1 uch
1022 1.1 uch if (tp->t_outq.c_cc <= tp->t_lowat) {
1023 1.1 uch if (ISSET(tp->t_state, TS_ASLEEP)) {
1024 1.1 uch CLR(tp->t_state, TS_ASLEEP);
1025 1.1 uch wakeup(&tp->t_outq);
1026 1.1 uch }
1027 1.1 uch selwakeup(&tp->t_wsel);
1028 1.1 uch if (tp->t_outq.c_cc == 0)
1029 1.3 uch goto out;
1030 1.1 uch }
1031 1.3 uch
1032 1.1 uch sc->sc_tba = tp->t_outq.c_cf;
1033 1.1 uch sc->sc_tbc = ndqb(&tp->t_outq, 0);
1034 1.3 uch SET(tp->t_state, TS_BUSY);
1035 1.3 uch
1036 1.3 uch /* Output the first character of the contiguous buffer. */
1037 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot),
1038 1.14 uch (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK));
1039 1.3 uch
1040 1.3 uch sc->sc_tbc--;
1041 1.3 uch sc->sc_tba++;
1042 1.1 uch
1043 1.3 uch out:
1044 1.1 uch splx(s);
1045 1.1 uch }
1046 1.1 uch
1047 1.3 uch /*
1048 1.3 uch * Set TXcom tty parameters from termios.
1049 1.3 uch */
1050 1.1 uch int
1051 1.9 uch txcomparam(struct tty *tp, struct termios *t)
1052 1.1 uch {
1053 1.3 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
1054 1.3 uch struct txcom_chip *chip;
1055 1.5 uch int ospeed;
1056 1.3 uch int s;
1057 1.3 uch
1058 1.3 uch if (!sc)
1059 1.3 uch return ENXIO;
1060 1.3 uch
1061 1.3 uch ospeed = t->c_ospeed;
1062 1.3 uch
1063 1.3 uch /* Check requested parameters. */
1064 1.3 uch if (ospeed < 0) {
1065 1.3 uch return EINVAL;
1066 1.3 uch }
1067 1.3 uch if (t->c_ispeed && t->c_ispeed != ospeed) {
1068 1.3 uch return EINVAL;
1069 1.3 uch }
1070 1.3 uch
1071 1.3 uch s = spltty();
1072 1.3 uch chip = sc->sc_chip;
1073 1.3 uch /*
1074 1.3 uch * For the console, always force CLOCAL and !HUPCL, so that the port
1075 1.3 uch * is always active.
1076 1.3 uch */
1077 1.3 uch if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) ||
1078 1.3 uch ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
1079 1.5 uch SET(t->c_cflag, CLOCAL);
1080 1.5 uch CLR(t->c_cflag, HUPCL);
1081 1.3 uch }
1082 1.3 uch splx(s);
1083 1.3 uch
1084 1.3 uch /*
1085 1.6 uch * If we're not in a mode that assumes a connection is present, then
1086 1.6 uch * ignore carrier changes.
1087 1.6 uch */
1088 1.6 uch if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
1089 1.6 uch chip->sc_dcd = 0;
1090 1.6 uch else
1091 1.6 uch chip->sc_dcd = 1;
1092 1.6 uch
1093 1.6 uch /*
1094 1.3 uch * Only whack the UART when params change.
1095 1.3 uch * Some callers need to clear tp->t_ospeed
1096 1.3 uch * to make sure initialization gets done.
1097 1.3 uch */
1098 1.5 uch if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) {
1099 1.3 uch return 0;
1100 1.3 uch }
1101 1.3 uch
1102 1.3 uch s = spltty();
1103 1.3 uch chip = sc->sc_chip;
1104 1.3 uch chip->sc_speed = ospeed;
1105 1.5 uch chip->sc_cflag = t->c_cflag;
1106 1.3 uch
1107 1.3 uch txcom_setmode(chip);
1108 1.3 uch txcom_setbaudrate(chip);
1109 1.6 uch
1110 1.3 uch /* And copy to tty. */
1111 1.3 uch tp->t_ispeed = 0;
1112 1.3 uch tp->t_ospeed = chip->sc_speed;
1113 1.3 uch tp->t_cflag = chip->sc_cflag;
1114 1.3 uch
1115 1.3 uch /*
1116 1.6 uch * Update the tty layer's idea of the carrier bit, in case we changed
1117 1.6 uch * CLOCAL or MDMBUF. We don't hang up here; we only do that by
1118 1.6 uch * explicit request.
1119 1.6 uch */
1120 1.10 eeh (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd);
1121 1.6 uch
1122 1.6 uch /*
1123 1.3 uch * If hardware flow control is disabled, unblock any hard flow
1124 1.3 uch * control state.
1125 1.3 uch */
1126 1.3 uch if (!ISSET(chip->sc_cflag, CHWFLOW)) {
1127 1.3 uch txcomstart(tp);
1128 1.3 uch }
1129 1.3 uch
1130 1.3 uch splx(s);
1131 1.6 uch
1132 1.6 uch return 0;
1133 1.6 uch }
1134 1.6 uch
1135 1.9 uch int
1136 1.9 uch txcom_dcd_hook(void *arg, int type, long id, void *msg)
1137 1.9 uch {
1138 1.9 uch struct txcom_softc *sc = arg;
1139 1.9 uch struct tty *tp = sc->sc_tty;
1140 1.9 uch struct txcom_chip *chip = sc->sc_chip;
1141 1.9 uch int modem = !(int)msg; /* p-edge 1, n-edge 0 */
1142 1.9 uch
1143 1.15 uch DPRINTF("DCD %s\n", modem ? "ON" : "OFF");
1144 1.9 uch
1145 1.9 uch if (modem && chip->sc_dcd)
1146 1.10 eeh (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd);
1147 1.9 uch
1148 1.9 uch return 0;
1149 1.9 uch }
1150 1.9 uch
1151 1.9 uch int
1152 1.9 uch txcom_cts_hook(void *arg, int type, long id, void *msg)
1153 1.9 uch {
1154 1.9 uch struct txcom_softc *sc = arg;
1155 1.9 uch struct tty *tp = sc->sc_tty;
1156 1.9 uch struct txcom_chip *chip = sc->sc_chip;
1157 1.9 uch int clear = !(int)msg; /* p-edge 1, n-edge 0 */
1158 1.9 uch
1159 1.15 uch DPRINTF("CTS %s\n", clear ? "ON" : "OFF");
1160 1.9 uch
1161 1.9 uch if (chip->sc_msr_cts) {
1162 1.9 uch if (!clear) {
1163 1.9 uch chip->sc_tx_stopped = 1;
1164 1.9 uch } else {
1165 1.9 uch chip->sc_tx_stopped = 0;
1166 1.10 eeh (*tp->t_linesw->l_start)(tp);
1167 1.9 uch }
1168 1.9 uch }
1169 1.9 uch
1170 1.9 uch return 0;
1171 1.9 uch }
1172 1.9 uch
1173 1.9 uch #ifdef TX39UARTDEBUG
1174 1.6 uch void
1175 1.9 uch txcom_dump(struct txcom_chip *chip)
1176 1.6 uch {
1177 1.6 uch tx_chipset_tag_t tc = chip->sc_tc;
1178 1.6 uch int slot = chip->sc_slot;
1179 1.6 uch txreg_t reg;
1180 1.6 uch
1181 1.6 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
1182 1.6 uch #define ISSETPRINT(r, m) \
1183 1.15 uch dbg_bitmask_print(r, TX39_UARTCTRL1_##m, #m)
1184 1.6 uch ISSETPRINT(reg, UARTON);
1185 1.6 uch ISSETPRINT(reg, EMPTY);
1186 1.6 uch ISSETPRINT(reg, PRXHOLDFULL);
1187 1.6 uch ISSETPRINT(reg, RXHOLDFULL);
1188 1.6 uch ISSETPRINT(reg, ENDMARX);
1189 1.6 uch ISSETPRINT(reg, ENDMATX);
1190 1.6 uch ISSETPRINT(reg, TESTMODE);
1191 1.6 uch ISSETPRINT(reg, ENBREAHALT);
1192 1.6 uch ISSETPRINT(reg, ENDMATEST);
1193 1.6 uch ISSETPRINT(reg, ENDMALOOP);
1194 1.6 uch ISSETPRINT(reg, PULSEOPT2);
1195 1.6 uch ISSETPRINT(reg, PULSEOPT1);
1196 1.6 uch ISSETPRINT(reg, DTINVERT);
1197 1.6 uch ISSETPRINT(reg, DISTXD);
1198 1.6 uch ISSETPRINT(reg, TWOSTOP);
1199 1.6 uch ISSETPRINT(reg, LOOPBACK);
1200 1.6 uch ISSETPRINT(reg, BIT7);
1201 1.6 uch ISSETPRINT(reg, EVENPARITY);
1202 1.6 uch ISSETPRINT(reg, ENPARITY);
1203 1.6 uch ISSETPRINT(reg, ENUART);
1204 1.6 uch }
1205 1.9 uch #endif /* TX39UARTDEBUG */
1206