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txcom.c revision 1.21.2.2
      1  1.21.2.1     skrll /*	$NetBSD: txcom.c,v 1.21.2.2 2004/09/18 14:34:59 skrll Exp $ */
      2       1.1       uch 
      3       1.9       uch /*-
      4  1.21.2.1     skrll  * Copyright (c) 1999, 2000, 2004 The NetBSD Foundation, Inc.
      5       1.1       uch  * All rights reserved.
      6       1.1       uch  *
      7       1.9       uch  * This code is derived from software contributed to The NetBSD Foundation
      8       1.9       uch  * by UCHIYAMA Yasushi.
      9       1.9       uch  *
     10       1.1       uch  * Redistribution and use in source and binary forms, with or without
     11       1.1       uch  * modification, are permitted provided that the following conditions
     12       1.1       uch  * are met:
     13       1.1       uch  * 1. Redistributions of source code must retain the above copyright
     14       1.1       uch  *    notice, this list of conditions and the following disclaimer.
     15       1.9       uch  * 2. Redistributions in binary form must reproduce the above copyright
     16       1.9       uch  *    notice, this list of conditions and the following disclaimer in the
     17       1.9       uch  *    documentation and/or other materials provided with the distribution.
     18       1.9       uch  * 3. All advertising materials mentioning features or use of this software
     19       1.9       uch  *    must display the following acknowledgement:
     20       1.9       uch  *        This product includes software developed by the NetBSD
     21       1.9       uch  *        Foundation, Inc. and its contributors.
     22       1.9       uch  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23       1.9       uch  *    contributors may be used to endorse or promote products derived
     24       1.9       uch  *    from this software without specific prior written permission.
     25       1.1       uch  *
     26       1.9       uch  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27       1.9       uch  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28       1.9       uch  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29       1.9       uch  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30       1.9       uch  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31       1.9       uch  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32       1.9       uch  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33       1.9       uch  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34       1.9       uch  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35       1.9       uch  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36       1.9       uch  * POSSIBILITY OF SUCH DAMAGE.
     37       1.1       uch  */
     38      1.15       uch 
     39  1.21.2.1     skrll #include <sys/cdefs.h>
     40  1.21.2.1     skrll __KERNEL_RCSID(0, "$NetBSD: txcom.c,v 1.21.2.2 2004/09/18 14:34:59 skrll Exp $");
     41  1.21.2.1     skrll 
     42      1.15       uch #include "opt_tx39uart_debug.h"
     43       1.1       uch 
     44       1.1       uch #include <sys/param.h>
     45       1.1       uch #include <sys/systm.h>
     46       1.3       uch #include <sys/kernel.h>
     47       1.1       uch #include <sys/device.h>
     48       1.3       uch #include <sys/malloc.h>
     49       1.1       uch 
     50       1.1       uch #include <sys/proc.h> /* tsleep/wakeup */
     51       1.1       uch 
     52       1.1       uch #include <sys/ioctl.h>
     53       1.1       uch #include <sys/select.h>
     54       1.1       uch #include <sys/file.h>
     55       1.1       uch 
     56       1.1       uch #include <sys/tty.h>
     57       1.1       uch #include <sys/conf.h>
     58       1.1       uch #include <dev/cons.h> /* consdev */
     59       1.1       uch 
     60       1.1       uch #include <machine/bus.h>
     61       1.9       uch #include <machine/config_hook.h>
     62       1.1       uch 
     63       1.1       uch #include <hpcmips/tx/tx39var.h>
     64       1.1       uch #include <hpcmips/tx/tx39icureg.h>
     65       1.1       uch #include <hpcmips/tx/tx39uartvar.h>
     66       1.1       uch #include <hpcmips/tx/tx39uartreg.h>
     67       1.1       uch 
     68       1.5       uch #include <hpcmips/tx/tx39irvar.h>
     69       1.5       uch 
     70       1.1       uch #include <hpcmips/tx/tx39clockreg.h> /* XXX */
     71       1.6       uch 
     72       1.1       uch #define SET(t, f)	(t) |= (f)
     73       1.1       uch #define CLR(t, f)	(t) &= ~(f)
     74       1.1       uch #define ISSET(t, f)	((t) & (f))
     75       1.9       uch /*
     76       1.9       uch  * UARTA channel has DTR, DSR, RTS, CTS lines. and they  wired to MFIO/IO port.
     77       1.9       uch  */
     78       1.9       uch #define IS_COM0(s)	((s) == 0)
     79       1.9       uch #define IS_COM1(s)	((s) == 1)
     80       1.9       uch #define ON		((void *)1)
     81       1.9       uch #define OFF		((void *)0)
     82       1.1       uch 
     83      1.15       uch #ifdef	TX39UART_DEBUG
     84      1.15       uch #define DPRINTF_ENABLE
     85      1.15       uch #define DPRINTF_DEBUG	tx39uart_debug
     86       1.1       uch #endif
     87      1.15       uch #include <machine/debug.h>
     88       1.1       uch 
     89       1.3       uch #define TXCOM_HW_CONSOLE	0x40
     90       1.3       uch #define	TXCOM_RING_SIZE		256 /* must be a power of two! */
     91       1.3       uch #define TXCOM_RING_MASK		(TXCOM_RING_SIZE - 1)
     92       1.1       uch 
     93       1.3       uch struct txcom_chip {
     94       1.1       uch 	tx_chipset_tag_t sc_tc;
     95       1.1       uch 	int sc_slot;	/* UARTA or UARTB */
     96       1.1       uch 	int sc_cflag;
     97       1.1       uch 	int sc_speed;
     98       1.3       uch 	int sc_swflags;
     99       1.1       uch 	int sc_hwflags;
    100       1.6       uch 
    101       1.6       uch 	int sc_dcd;
    102       1.9       uch 	int sc_msr_cts;
    103       1.9       uch 	int sc_tx_stopped;
    104       1.3       uch };
    105       1.1       uch 
    106       1.3       uch struct txcom_softc {
    107       1.3       uch 	struct	device		sc_dev;
    108       1.3       uch 	struct tty		*sc_tty;
    109       1.3       uch 	struct txcom_chip	*sc_chip;
    110       1.3       uch 
    111       1.8   thorpej 	struct callout		sc_txsoft_ch;
    112       1.8   thorpej 	struct callout		sc_rxsoft_ch;
    113       1.8   thorpej 
    114       1.3       uch  	u_int8_t	*sc_tba;	/* transmit buffer address */
    115       1.3       uch  	int		sc_tbc;		/* transmit byte count */
    116       1.3       uch 	int		sc_heldtbc;
    117       1.3       uch 	u_int8_t	*sc_rbuf;	/* receive buffer address */
    118       1.3       uch 	int		sc_rbput;	/* receive byte count */
    119       1.3       uch 	int		sc_rbget;
    120       1.1       uch };
    121       1.1       uch 
    122       1.1       uch extern struct cfdriver txcom_cd;
    123       1.1       uch 
    124       1.9       uch int	txcom_match(struct device *, struct cfdata *, void *);
    125       1.9       uch void	txcom_attach(struct device *, struct device *, void *);
    126       1.9       uch int	txcom_print(void*, const char *);
    127       1.9       uch 
    128       1.9       uch int	txcom_txintr(void *);
    129       1.9       uch int	txcom_rxintr(void *);
    130       1.9       uch int	txcom_frameerr_intr(void *);
    131       1.9       uch int	txcom_parityerr_intr(void *);
    132       1.9       uch int	txcom_break_intr(void *);
    133       1.3       uch 
    134       1.9       uch void	txcom_rxsoft(void *);
    135       1.9       uch void	txcom_txsoft(void *);
    136       1.3       uch 
    137       1.9       uch int	txcom_stsoft(void *);
    138       1.9       uch int	txcom_stsoft2(void *);
    139       1.9       uch int	txcom_stsoft3(void *);
    140       1.9       uch int	txcom_stsoft4(void *);
    141       1.9       uch 
    142       1.9       uch 
    143       1.9       uch void	txcom_shutdown(struct txcom_softc *);
    144       1.9       uch void	txcom_break(struct txcom_softc *, int);
    145       1.9       uch void	txcom_modem(struct txcom_softc *, int);
    146       1.9       uch void	txcomstart(struct tty *);
    147       1.9       uch int	txcomparam(struct tty *, struct termios *);
    148       1.9       uch 
    149       1.9       uch void	txcom_reset	(struct txcom_chip *);
    150  1.21.2.1     skrll int	txcom_enable	(struct txcom_chip *, boolean_t);
    151       1.9       uch void	txcom_disable	(struct txcom_chip *);
    152       1.9       uch void	txcom_setmode	(struct txcom_chip *);
    153       1.9       uch void	txcom_setbaudrate(struct txcom_chip *);
    154       1.9       uch int	txcom_cngetc	(dev_t);
    155       1.9       uch void	txcom_cnputc	(dev_t, int);
    156       1.9       uch void	txcom_cnpollc	(dev_t, int);
    157       1.3       uch 
    158       1.9       uch int	txcom_dcd_hook(void *, int, long, void *);
    159       1.9       uch int	txcom_cts_hook(void *, int, long, void *);
    160       1.1       uch 
    161       1.9       uch 
    162       1.9       uch __inline__ int	__txcom_txbufready(struct txcom_chip *, int);
    163       1.9       uch const char *__txcom_slotname(int);
    164       1.9       uch 
    165       1.9       uch #ifdef TX39UARTDEBUG
    166       1.9       uch void	txcom_dump(struct txcom_chip *);
    167       1.9       uch #endif
    168       1.6       uch 
    169       1.3       uch struct consdev txcomcons = {
    170      1.21  nakayama 	NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc, NULL, NULL,
    171      1.14       uch 	NULL, NODEV, CN_NORMAL
    172       1.3       uch };
    173       1.3       uch 
    174       1.1       uch /* Serial console */
    175       1.3       uch struct txcom_chip txcom_chip;
    176       1.1       uch 
    177      1.19   thorpej CFATTACH_DECL(txcom, sizeof(struct txcom_softc),
    178      1.19   thorpej     txcom_match, txcom_attach, NULL, NULL);
    179       1.1       uch 
    180      1.17   gehenna dev_type_open(txcomopen);
    181      1.17   gehenna dev_type_close(txcomclose);
    182      1.17   gehenna dev_type_read(txcomread);
    183      1.17   gehenna dev_type_write(txcomwrite);
    184      1.17   gehenna dev_type_ioctl(txcomioctl);
    185      1.17   gehenna dev_type_stop(txcomstop);
    186      1.17   gehenna dev_type_tty(txcomtty);
    187      1.17   gehenna dev_type_poll(txcompoll);
    188      1.17   gehenna 
    189      1.17   gehenna const struct cdevsw txcom_cdevsw = {
    190      1.17   gehenna 	txcomopen, txcomclose, txcomread, txcomwrite, txcomioctl,
    191      1.20  jdolecek 	txcomstop, txcomtty, txcompoll, nommap, ttykqfilter, D_TTY
    192      1.17   gehenna };
    193      1.17   gehenna 
    194       1.1       uch int
    195       1.1       uch txcom_match(parent, cf, aux)
    196       1.1       uch 	struct device *parent;
    197       1.1       uch 	struct cfdata *cf;
    198       1.1       uch 	void *aux;
    199       1.1       uch {
    200       1.1       uch 	/* if the autoconfiguration got this far, there's a slot here */
    201       1.1       uch 	return 1;
    202       1.1       uch }
    203       1.1       uch 
    204       1.1       uch void
    205       1.9       uch txcom_attach(struct device *parent, struct device *self, void *aux)
    206       1.1       uch {
    207       1.1       uch 	struct tx39uart_attach_args *ua = aux;
    208       1.1       uch 	struct txcom_softc *sc = (void*)self;
    209       1.1       uch 	tx_chipset_tag_t tc;
    210       1.1       uch 	struct tty *tp;
    211       1.3       uch 	struct txcom_chip *chip;
    212       1.6       uch 	int slot, console;
    213       1.1       uch 
    214       1.1       uch 	/* Check this slot used as serial console */
    215       1.6       uch 	console = (ua->ua_slot == txcom_chip.sc_slot) &&
    216      1.14       uch 	    (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE);
    217       1.6       uch 
    218       1.6       uch 	if (console) {
    219       1.3       uch 		sc->sc_chip = &txcom_chip;
    220       1.3       uch 	} else {
    221       1.3       uch 		if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip),
    222      1.14       uch 		    M_DEVBUF, M_WAITOK))) {
    223       1.3       uch 			printf(": can't allocate chip\n");
    224       1.3       uch 			return;
    225       1.3       uch 		}
    226       1.3       uch 		memset(sc->sc_chip, 0, sizeof(struct txcom_chip));
    227       1.1       uch 	}
    228       1.1       uch 
    229       1.3       uch 	chip = sc->sc_chip;
    230       1.3       uch 	tc = chip->sc_tc = ua->ua_tc;
    231       1.3       uch 	slot = chip->sc_slot = ua->ua_slot;
    232       1.3       uch 
    233       1.6       uch #ifdef TX39UARTDEBUG
    234       1.6       uch 	txcom_dump(chip);
    235       1.6       uch #endif
    236       1.6       uch 	if (!console)
    237       1.6       uch 		txcom_reset(chip);
    238       1.6       uch 
    239       1.3       uch 	if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) {
    240       1.3       uch 		printf(": can't allocate buffer.\n");
    241       1.3       uch 		return;
    242       1.3       uch 	}
    243       1.3       uch 	memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE);
    244       1.1       uch 
    245       1.1       uch 	tp = ttymalloc();
    246       1.1       uch 	tp->t_oproc = txcomstart;
    247       1.1       uch 	tp->t_param = txcomparam;
    248       1.1       uch 	tp->t_hwiflow = NULL;
    249       1.1       uch 	sc->sc_tty = tp;
    250       1.1       uch 	tty_attach(tp);
    251       1.1       uch 
    252       1.3       uch 	if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
    253       1.1       uch 		int maj;
    254       1.1       uch 		/* locate the major number */
    255      1.17   gehenna 		maj = cdevsw_lookup_major(&txcom_cdevsw);
    256       1.1       uch 
    257       1.1       uch 		cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit);
    258       1.1       uch 
    259       1.3       uch 		printf(": console");
    260       1.1       uch 	}
    261       1.1       uch 
    262       1.3       uch 	printf("\n");
    263       1.1       uch 
    264       1.1       uch 	/*
    265       1.1       uch 	 * Enable interrupt
    266       1.1       uch 	 */
    267       1.3       uch #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s))
    268       1.3       uch 
    269       1.3       uch 	tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY,
    270      1.14       uch 	    txcom_rxintr, sc);
    271       1.3       uch 	tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY,
    272      1.14       uch 	    txcom_txintr, sc);
    273       1.3       uch 	tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY,
    274      1.14       uch 	    txcom_rxintr, sc);
    275       1.3       uch 	tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY,
    276      1.14       uch 	    txcom_txintr, sc);
    277       1.3       uch 	tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY,
    278      1.14       uch 	    txcom_frameerr_intr, sc);
    279       1.3       uch 	tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY,
    280      1.14       uch 	    txcom_parityerr_intr, sc);
    281       1.3       uch 	tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY,
    282      1.14       uch 	    txcom_break_intr, sc);
    283       1.5       uch 
    284       1.9       uch 	/*
    285       1.9       uch 	 * UARTA has external signal line. (its wiring is platform dependent)
    286       1.9       uch 	 */
    287       1.9       uch 	if (IS_COM0(slot)) {
    288       1.9       uch 		/* install DCD, CTS hooks. */
    289      1.11      sato 		config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_DCD,
    290      1.14       uch 		    CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc);
    291      1.11      sato 		config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_CTS,
    292      1.14       uch 		    CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc);
    293       1.9       uch 	}
    294       1.6       uch 
    295       1.5       uch 	/*
    296       1.5       uch 	 * UARTB can connect IR module
    297       1.5       uch 	 */
    298       1.9       uch 	if (IS_COM1(slot)) {
    299       1.5       uch 		struct txcom_attach_args tca;
    300       1.5       uch 		tca.tca_tc = tc;
    301       1.5       uch 		tca.tca_parent = self;
    302       1.5       uch 		config_found(self, &tca, txcom_print);
    303       1.5       uch 	}
    304       1.5       uch }
    305       1.5       uch 
    306       1.5       uch int
    307       1.9       uch txcom_print(void *aux, const char *pnp)
    308       1.5       uch {
    309       1.5       uch 	return pnp ? QUIET : UNCONF;
    310       1.1       uch }
    311       1.1       uch 
    312       1.6       uch void
    313       1.9       uch txcom_reset(struct txcom_chip *chip)
    314       1.6       uch {
    315       1.6       uch 	tx_chipset_tag_t tc;
    316       1.6       uch 	int slot, ofs;
    317       1.6       uch 	txreg_t reg;
    318       1.6       uch 
    319       1.6       uch 	tc = chip->sc_tc;
    320       1.6       uch 	slot = chip->sc_slot;
    321       1.6       uch 	ofs = TX39_UARTCTRL1_REG(slot);
    322       1.6       uch 
    323       1.6       uch 	/* Supply clock */
    324       1.6       uch 	reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
    325       1.6       uch 	reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
    326       1.6       uch 	tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
    327       1.6       uch 
    328       1.6       uch 	/* reset UART module */
    329       1.6       uch 	tx_conf_write(tc, ofs, 0);
    330       1.6       uch }
    331       1.6       uch 
    332       1.1       uch int
    333  1.21.2.1     skrll txcom_enable(struct txcom_chip *chip, boolean_t console)
    334       1.1       uch {
    335       1.1       uch 	tx_chipset_tag_t tc;
    336       1.1       uch 	txreg_t reg;
    337       1.3       uch 	int slot, ofs, timeout;
    338       1.1       uch 
    339       1.3       uch 	tc = chip->sc_tc;
    340       1.3       uch 	slot = chip->sc_slot;
    341       1.3       uch 	ofs = TX39_UARTCTRL1_REG(slot);
    342       1.1       uch 
    343  1.21.2.1     skrll 	/*
    344  1.21.2.1     skrll 	 * External power supply (if any)
    345  1.21.2.1     skrll 	 * When serial console, Windows CE already powered on it.
    346  1.21.2.1     skrll 	 */
    347  1.21.2.1     skrll 	if (!console) {
    348  1.21.2.1     skrll 		config_hook_call(CONFIG_HOOK_POWERCONTROL,
    349  1.21.2.1     skrll 		    CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON);
    350  1.21.2.1     skrll 		delay(3);
    351  1.21.2.1     skrll 	}
    352       1.9       uch 
    353       1.6       uch 	/* Supply clock */
    354       1.5       uch 	reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
    355       1.5       uch 	reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
    356       1.5       uch 	tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
    357       1.5       uch 
    358       1.6       uch 	/*
    359       1.6       uch 	 * XXX Disable DMA (DMA not coded yet)
    360       1.6       uch 	 */
    361       1.6       uch 	reg = tx_conf_read(tc, ofs);
    362       1.6       uch 	reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
    363       1.6       uch 	tx_conf_write(tc, ofs, reg);
    364       1.6       uch 
    365       1.6       uch 	/* enable */
    366       1.3       uch 	reg = tx_conf_read(tc, ofs);
    367       1.1       uch 	reg |= TX39_UARTCTRL1_ENUART;
    368       1.1       uch 	reg &= ~TX39_UARTCTRL1_ENBREAHALT;
    369       1.3       uch 	tx_conf_write(tc, ofs, reg);
    370       1.3       uch 
    371       1.9       uch 	timeout = 100000;
    372       1.3       uch 
    373       1.3       uch 	while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) &&
    374      1.14       uch 	    --timeout > 0)
    375       1.3       uch 		;
    376       1.3       uch 
    377       1.5       uch 	if (timeout == 0 && !cold) {
    378       1.6       uch 		printf("%s never power up\n", __txcom_slotname(slot));
    379       1.3       uch 		return 1;
    380       1.3       uch 	}
    381       1.3       uch 
    382       1.1       uch 	return 0;
    383       1.1       uch }
    384       1.1       uch 
    385       1.1       uch void
    386       1.9       uch txcom_disable(struct txcom_chip *chip)
    387       1.1       uch {
    388       1.1       uch 	tx_chipset_tag_t tc;
    389       1.1       uch 	txreg_t reg;
    390       1.1       uch 	int slot;
    391       1.1       uch 
    392       1.3       uch 	tc = chip->sc_tc;
    393       1.3       uch 	slot = chip->sc_slot;
    394       1.1       uch 
    395       1.1       uch 	reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
    396       1.1       uch 	/* DMA */
    397       1.1       uch 	reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
    398       1.3       uch 
    399       1.6       uch 	/* disable module */
    400       1.1       uch 	reg &= ~TX39_UARTCTRL1_ENUART;
    401       1.1       uch 	tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
    402       1.3       uch 
    403       1.1       uch 	/* Clock */
    404       1.1       uch 	reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
    405       1.1       uch 	reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
    406       1.1       uch 	tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
    407       1.1       uch 
    408       1.1       uch }
    409       1.1       uch 
    410       1.9       uch __inline__ int
    411       1.9       uch __txcom_txbufready(struct txcom_chip *chip, int retry)
    412       1.3       uch {
    413       1.3       uch 	tx_chipset_tag_t tc = chip->sc_tc;
    414       1.3       uch 	int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
    415       1.3       uch 
    416       1.3       uch 	do {
    417       1.3       uch 		if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY)
    418       1.3       uch 			return 1;
    419       1.3       uch 	} while(--retry != 0);
    420       1.3       uch 
    421       1.1       uch 	return 0;
    422       1.1       uch }
    423       1.1       uch 
    424       1.5       uch void
    425       1.9       uch txcom_pulse_mode(struct device *dev)
    426       1.5       uch {
    427       1.5       uch 	struct txcom_softc *sc = (void*)dev;
    428       1.5       uch 	struct txcom_chip *chip = sc->sc_chip;
    429       1.5       uch 	tx_chipset_tag_t tc = chip->sc_tc;
    430       1.5       uch 	int ofs;
    431       1.5       uch 	txreg_t reg;
    432       1.5       uch 
    433       1.5       uch 	ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
    434       1.5       uch 
    435       1.5       uch 	reg = tx_conf_read(tc, ofs);
    436       1.6       uch 	/* WindowsCE use this setting */
    437       1.6       uch 	reg |= TX39_UARTCTRL1_PULSEOPT1;
    438       1.6       uch 	reg &= ~TX39_UARTCTRL1_PULSEOPT2;
    439       1.6       uch 	reg |= TX39_UARTCTRL1_DTINVERT;
    440       1.6       uch 
    441       1.5       uch 	tx_conf_write(tc, ofs, reg);
    442       1.5       uch }
    443       1.5       uch 
    444       1.3       uch /*
    445       1.3       uch  * console
    446       1.3       uch  */
    447       1.1       uch int
    448       1.9       uch txcom_cngetc(dev_t dev)
    449       1.1       uch {
    450       1.1       uch 	tx_chipset_tag_t tc;
    451       1.2       uch 	int ofs, c, s;
    452       1.2       uch 
    453       1.3       uch 	s = spltty();
    454       1.2       uch 
    455       1.3       uch 	tc = txcom_chip.sc_tc;
    456       1.3       uch 	ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot);
    457       1.1       uch 
    458       1.1       uch 	while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs)))
    459       1.1       uch 		;
    460       1.2       uch 
    461       1.3       uch 	c = TX39_UARTRXHOLD_RXDATA(
    462       1.3       uch 		tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot)));
    463       1.2       uch 
    464       1.3       uch 	if (c == '\r')
    465       1.1       uch 		c = '\n';
    466       1.1       uch 
    467       1.2       uch 	splx(s);
    468       1.2       uch 
    469       1.1       uch 	return c;
    470       1.1       uch }
    471       1.1       uch 
    472       1.1       uch void
    473       1.9       uch txcom_cnputc(dev_t dev, int c)
    474       1.1       uch {
    475       1.3       uch 	struct txcom_chip *chip = &txcom_chip;
    476       1.3       uch 	tx_chipset_tag_t tc = chip->sc_tc;
    477       1.3       uch 	int s;
    478       1.2       uch 
    479       1.3       uch 	s = spltty();
    480       1.1       uch 
    481       1.3       uch 	/* Wait for transmitter to empty */
    482       1.3       uch 	__txcom_txbufready(chip, -1);
    483       1.1       uch 
    484       1.3       uch 	tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
    485      1.14       uch 	    (c & TX39_UARTTXHOLD_TXDATA_MASK));
    486       1.1       uch 
    487       1.3       uch 	__txcom_txbufready(chip, -1);
    488       1.3       uch 
    489       1.2       uch 	splx(s);
    490       1.1       uch }
    491       1.1       uch 
    492       1.1       uch void
    493       1.9       uch txcom_cnpollc(dev_t dev, int on)
    494       1.1       uch {
    495       1.1       uch }
    496       1.1       uch 
    497       1.1       uch void
    498       1.9       uch txcom_setmode(struct txcom_chip *chip)
    499       1.1       uch {
    500       1.3       uch 	tcflag_t cflag = chip->sc_cflag;
    501       1.3       uch 	int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
    502       1.1       uch 	txreg_t reg;
    503       1.1       uch 
    504       1.3       uch 	reg = tx_conf_read(chip->sc_tc, ofs);
    505       1.6       uch 	reg &= ~TX39_UARTCTRL1_ENUART;
    506       1.6       uch 	tx_conf_write(chip->sc_tc, ofs, reg);
    507       1.6       uch 
    508       1.1       uch 	switch (ISSET(cflag, CSIZE)) {
    509       1.1       uch 	default:
    510       1.1       uch 		printf("txcom_setmode: CS7, CS8 only. use CS7");
    511       1.1       uch 		/* FALL THROUGH */
    512       1.1       uch 	case CS7:
    513       1.1       uch 		reg |= TX39_UARTCTRL1_BIT7;
    514       1.1       uch 		break;
    515       1.1       uch 	case CS8:
    516       1.1       uch 		reg &= ~TX39_UARTCTRL1_BIT7;
    517       1.1       uch 		break;
    518       1.1       uch 	}
    519       1.3       uch 
    520       1.1       uch 	if (ISSET(cflag, PARENB)) {
    521       1.1       uch 		reg |= TX39_UARTCTRL1_ENPARITY;
    522       1.1       uch 		if (ISSET(cflag, PARODD)) {
    523       1.1       uch 			reg &= ~TX39_UARTCTRL1_EVENPARITY;
    524       1.1       uch 		} else {
    525       1.1       uch 			reg |= TX39_UARTCTRL1_EVENPARITY;
    526       1.1       uch 		}
    527       1.1       uch 	} else {
    528       1.1       uch 		reg &= ~TX39_UARTCTRL1_ENPARITY;
    529       1.1       uch 	}
    530       1.3       uch 
    531       1.6       uch 	if (ISSET(cflag, CSTOPB))
    532       1.1       uch 		reg |= TX39_UARTCTRL1_TWOSTOP;
    533       1.6       uch 	else
    534       1.6       uch 		reg &= ~TX39_UARTCTRL1_TWOSTOP;
    535       1.6       uch 
    536       1.6       uch 	reg |= TX39_UARTCTRL1_ENUART;
    537       1.3       uch 	tx_conf_write(chip->sc_tc, ofs, reg);
    538       1.3       uch }
    539       1.3       uch 
    540       1.3       uch void
    541       1.9       uch txcom_setbaudrate(struct txcom_chip *chip)
    542       1.3       uch {
    543       1.3       uch 	int baudrate;
    544       1.6       uch 	int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
    545       1.6       uch 	txreg_t reg, reg1;
    546       1.3       uch 
    547       1.3       uch 	if (chip->sc_speed == 0)
    548       1.3       uch 		return;
    549       1.3       uch 
    550       1.5       uch 	if (!cold)
    551      1.15       uch 		DPRINTF("%d\n", chip->sc_speed);
    552       1.5       uch 
    553       1.6       uch 	reg1 = tx_conf_read(chip->sc_tc, ofs);
    554       1.6       uch 	reg1 &= ~TX39_UARTCTRL1_ENUART;
    555       1.6       uch 	tx_conf_write(chip->sc_tc, ofs, reg1);
    556       1.6       uch 
    557       1.3       uch 	baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1;
    558       1.3       uch 	reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate);
    559       1.3       uch 
    560       1.3       uch 	tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg);
    561       1.6       uch 
    562       1.6       uch 	reg1 |= TX39_UARTCTRL1_ENUART;
    563       1.6       uch 	tx_conf_write(chip->sc_tc, ofs, reg1);
    564       1.3       uch }
    565       1.3       uch 
    566       1.3       uch int
    567       1.9       uch txcom_cnattach(int slot, int speed, int cflag)
    568       1.3       uch {
    569       1.3       uch 	cn_tab = &txcomcons;
    570       1.3       uch 
    571       1.3       uch 	txcom_chip.sc_tc	= tx_conf_get_tag();
    572       1.3       uch 	txcom_chip.sc_slot	= slot;
    573       1.3       uch 	txcom_chip.sc_cflag	= cflag;
    574       1.3       uch 	txcom_chip.sc_speed	= speed;
    575       1.3       uch 	txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE;
    576       1.6       uch #if notyet
    577       1.6       uch 	txcom_reset(&txcom_chip);
    578       1.6       uch #endif
    579       1.6       uch 	txcom_setmode(&txcom_chip);
    580       1.6       uch 	txcom_setbaudrate(&txcom_chip);
    581       1.3       uch 
    582  1.21.2.1     skrll 	if (txcom_enable(&txcom_chip, TRUE) != 0)
    583       1.5       uch 		return 1;
    584       1.5       uch 
    585       1.3       uch 	return 0;
    586       1.3       uch }
    587       1.3       uch 
    588       1.3       uch /*
    589       1.3       uch  * tty
    590       1.3       uch  */
    591       1.3       uch void
    592       1.9       uch txcom_break(struct txcom_softc *sc, int on)
    593       1.3       uch {
    594       1.3       uch 	struct txcom_chip *chip = sc->sc_chip;
    595       1.1       uch 
    596       1.3       uch 	tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
    597      1.14       uch 	    on ? TX39_UARTTXHOLD_BREAK : 0);
    598       1.1       uch }
    599       1.1       uch 
    600       1.1       uch void
    601       1.9       uch txcom_modem(struct txcom_softc *sc, int on)
    602       1.1       uch {
    603       1.3       uch 	struct txcom_chip *chip = sc->sc_chip;
    604       1.3       uch 	tx_chipset_tag_t tc = chip->sc_tc;
    605       1.3       uch 	int slot = chip->sc_slot;
    606       1.1       uch 	txreg_t reg;
    607       1.1       uch 
    608       1.9       uch 	/* assert DTR */
    609       1.9       uch 	if (IS_COM0(slot)) {
    610      1.11      sato 		config_hook_call(CONFIG_HOOK_SET,
    611      1.14       uch 		    CONFIG_HOOK_COM0_DTR,
    612      1.14       uch 		    (void *)on);
    613       1.9       uch 	}
    614       1.9       uch 
    615       1.3       uch 	reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
    616       1.6       uch 	reg &= ~TX39_UARTCTRL1_ENUART;
    617       1.6       uch 	tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
    618       1.3       uch 
    619       1.3       uch 	if (on) {
    620       1.3       uch 		reg &= ~TX39_UARTCTRL1_DISTXD;
    621       1.3       uch 	} else {
    622       1.6       uch 		reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */
    623       1.3       uch 	}
    624       1.6       uch 
    625       1.6       uch 	reg |= TX39_UARTCTRL1_ENUART;
    626       1.6       uch 	tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
    627       1.1       uch }
    628       1.1       uch 
    629       1.1       uch void
    630       1.9       uch txcom_shutdown(struct txcom_softc *sc)
    631       1.1       uch {
    632       1.1       uch 	struct tty *tp = sc->sc_tty;
    633       1.3       uch 	int s = spltty();
    634       1.1       uch 
    635       1.3       uch 	/* Clear any break condition set with TIOCSBRK. */
    636       1.3       uch 	txcom_break(sc, 0);
    637       1.3       uch 
    638       1.3       uch 	/*
    639       1.3       uch 	 * Hang up if necessary.  Wait a bit, so the other side has time to
    640       1.3       uch 	 * notice even if we immediately open the port again.
    641       1.3       uch 	 */
    642       1.3       uch 	if (ISSET(tp->t_cflag, HUPCL)) {
    643       1.3       uch 		txcom_modem(sc, 0);
    644       1.3       uch 		(void) tsleep(sc, TTIPRI, ttclos, hz);
    645       1.3       uch 	}
    646       1.3       uch 
    647       1.3       uch 
    648       1.3       uch 	/* Turn off interrupts if not the console. */
    649       1.3       uch 	if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
    650       1.3       uch 		txcom_disable(sc->sc_chip);
    651       1.3       uch 	}
    652       1.1       uch 
    653       1.3       uch 	splx(s);
    654       1.3       uch }
    655       1.1       uch 
    656       1.9       uch const char *
    657       1.9       uch __txcom_slotname(int slot)
    658       1.3       uch {
    659       1.9       uch 	static const char *slotname[] = {"UARTA", "UARTB", "unknown"};
    660       1.9       uch 
    661       1.9       uch 	if (slot != 0 && slot != 1)
    662       1.9       uch 		return slotname[2];
    663       1.9       uch 
    664       1.9       uch 	return slotname[slot];
    665       1.2       uch }
    666       1.2       uch 
    667       1.2       uch int
    668       1.9       uch txcom_frameerr_intr(void *arg)
    669       1.3       uch {
    670       1.3       uch 	struct txcom_softc *sc = arg;
    671       1.3       uch 
    672       1.3       uch 	printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot));
    673       1.3       uch 
    674       1.3       uch 	return 0;
    675       1.3       uch }
    676       1.3       uch 
    677       1.3       uch int
    678       1.9       uch txcom_parityerr_intr(void *arg)
    679       1.3       uch {
    680       1.3       uch 	struct txcom_softc *sc = arg;
    681       1.3       uch 
    682       1.3       uch 	printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot));
    683       1.2       uch 
    684       1.2       uch 	return 0;
    685       1.1       uch }
    686       1.1       uch 
    687       1.1       uch int
    688       1.9       uch txcom_break_intr(void *arg)
    689       1.1       uch {
    690       1.1       uch 	struct txcom_softc *sc = arg;
    691       1.3       uch 
    692       1.3       uch 	printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot));
    693       1.3       uch 
    694       1.3       uch 	return 0;
    695       1.3       uch }
    696       1.3       uch 
    697       1.3       uch int
    698       1.9       uch txcom_rxintr(void *arg)
    699       1.3       uch {
    700       1.3       uch 	struct txcom_softc *sc = arg;
    701       1.3       uch 	struct txcom_chip *chip = sc->sc_chip;
    702       1.1       uch 	u_int8_t c;
    703       1.1       uch 
    704       1.3       uch 	c = TX39_UARTRXHOLD_RXDATA(
    705       1.3       uch 		tx_conf_read(chip->sc_tc,
    706      1.14       uch 		    TX39_UARTRXHOLD_REG(chip->sc_slot)));
    707       1.3       uch 
    708       1.3       uch 	sc->sc_rbuf[sc->sc_rbput] = c;
    709       1.3       uch 	sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK;
    710       1.3       uch 
    711       1.8   thorpej 	callout_reset(&sc->sc_rxsoft_ch, 1, txcom_rxsoft, sc);
    712       1.1       uch 
    713       1.1       uch 	return 0;
    714       1.1       uch }
    715       1.1       uch 
    716       1.3       uch void
    717       1.9       uch txcom_rxsoft(void *arg)
    718       1.3       uch {
    719       1.3       uch 	struct txcom_softc *sc = arg;
    720       1.3       uch 	struct tty *tp = sc->sc_tty;
    721      1.14       uch 	int (*rint)(int, struct tty *);
    722       1.3       uch 	int code;
    723       1.3       uch 	int s, end, get;
    724       1.3       uch 
    725      1.10       eeh 	rint = tp->t_linesw->l_rint;
    726       1.3       uch 
    727       1.3       uch 	s = spltty();
    728       1.3       uch 	end = sc->sc_rbput;
    729       1.3       uch 	get = sc->sc_rbget;
    730       1.3       uch 
    731       1.3       uch 	while (get != end) {
    732       1.3       uch 		code = sc->sc_rbuf[get];
    733       1.3       uch 
    734       1.3       uch 		if ((*rint)(code, tp) == -1) {
    735       1.3       uch 			/*
    736       1.3       uch 			 * The line discipline's buffer is out of space.
    737       1.3       uch 			 */
    738       1.3       uch 		}
    739       1.3       uch 		get = (get + 1) % TXCOM_RING_MASK;
    740       1.3       uch 	}
    741       1.3       uch 	sc->sc_rbget = get;
    742       1.3       uch 
    743       1.3       uch 	splx(s);
    744       1.3       uch }
    745       1.3       uch 
    746       1.1       uch int
    747       1.9       uch txcom_txintr(void *arg)
    748       1.1       uch {
    749       1.1       uch 	struct txcom_softc *sc = arg;
    750       1.3       uch 	struct txcom_chip *chip = sc->sc_chip;
    751       1.3       uch 	tx_chipset_tag_t tc = chip->sc_tc;
    752       1.1       uch 
    753       1.3       uch 	if (sc->sc_tbc > 0) {
    754       1.3       uch 		tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
    755      1.14       uch 		    (*sc->sc_tba &
    756      1.14       uch 			TX39_UARTTXHOLD_TXDATA_MASK));
    757       1.3       uch 		sc->sc_tbc--;
    758       1.3       uch 		sc->sc_tba++;
    759       1.3       uch 	} else {
    760       1.8   thorpej 		callout_reset(&sc->sc_rxsoft_ch, 1, txcom_txsoft, sc);
    761       1.3       uch 	}
    762       1.1       uch 
    763       1.1       uch 	return 0;
    764       1.1       uch }
    765       1.1       uch 
    766       1.3       uch void
    767       1.9       uch txcom_txsoft(void *arg)
    768       1.3       uch {
    769       1.3       uch 	struct txcom_softc *sc = arg;
    770       1.3       uch 	struct tty *tp = sc->sc_tty;
    771       1.3       uch 	int s = spltty();
    772       1.3       uch 
    773       1.3       uch 	CLR(tp->t_state, TS_BUSY);
    774       1.3       uch 	if (ISSET(tp->t_state, TS_FLUSH)) {
    775       1.3       uch 		CLR(tp->t_state, TS_FLUSH);
    776       1.3       uch 	} else {
    777       1.3       uch 		ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
    778       1.3       uch 	}
    779       1.3       uch 
    780      1.10       eeh 	(*tp->t_linesw->l_start)(tp);
    781       1.3       uch 
    782       1.3       uch 	splx(s);
    783       1.3       uch }
    784       1.1       uch 
    785       1.1       uch int
    786       1.9       uch txcomopen(dev_t dev, int flag, int mode, struct proc *p)
    787       1.1       uch {
    788       1.1       uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
    789       1.3       uch 	struct txcom_chip *chip;
    790       1.3       uch 	struct tty *tp;
    791  1.21.2.1     skrll 	int s, err = ENXIO;
    792  1.21.2.1     skrll ;
    793       1.1       uch 
    794       1.3       uch 	if (!sc)
    795  1.21.2.1     skrll 		return err;
    796       1.3       uch 
    797       1.3       uch 	chip = sc->sc_chip;
    798       1.3       uch 	tp = sc->sc_tty;
    799       1.3       uch 
    800       1.3       uch 	if (ISSET(tp->t_state, TS_ISOPEN) &&
    801       1.3       uch 	    ISSET(tp->t_state, TS_XCLUDE) &&
    802       1.3       uch 	    p->p_ucred->cr_uid != 0)
    803       1.3       uch 		return (EBUSY);
    804       1.3       uch 
    805       1.3       uch 	s = spltty();
    806       1.3       uch 
    807  1.21.2.1     skrll 	if (txcom_enable(sc->sc_chip, FALSE)) {
    808       1.6       uch 		splx(s);
    809       1.5       uch 		goto out;
    810       1.6       uch 	}
    811       1.5       uch 	/*
    812       1.5       uch 	 * Do the following iff this is a first open.
    813       1.5       uch 	 */
    814       1.5       uch 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    815       1.5       uch 		struct termios t;
    816       1.5       uch 
    817       1.5       uch 		tp->t_dev = dev;
    818       1.1       uch 
    819       1.5       uch 		t.c_ispeed = 0;
    820       1.5       uch 		if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
    821       1.5       uch 			t.c_ospeed = chip->sc_speed;
    822       1.5       uch 			t.c_cflag = chip->sc_cflag;
    823       1.5       uch 		} else {
    824       1.5       uch 			t.c_ospeed = TTYDEF_SPEED;
    825       1.5       uch 			t.c_cflag = TTYDEF_CFLAG;
    826       1.5       uch 		}
    827       1.3       uch 
    828       1.5       uch 		if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL))
    829       1.5       uch 			SET(t.c_cflag, CLOCAL);
    830       1.5       uch 		if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS))
    831       1.5       uch 			SET(t.c_cflag, CRTSCTS);
    832       1.5       uch 		if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF))
    833       1.5       uch 			SET(t.c_cflag, MDMBUF);
    834       1.5       uch 
    835       1.5       uch 		/* Make sure txcomparam() will do something. */
    836       1.5       uch 		tp->t_ospeed = 0;
    837       1.5       uch 		txcomparam(tp, &t);
    838       1.5       uch 
    839       1.5       uch 		tp->t_iflag = TTYDEF_IFLAG;
    840       1.5       uch 		tp->t_oflag = TTYDEF_OFLAG;
    841       1.5       uch 		tp->t_lflag = TTYDEF_LFLAG;
    842       1.1       uch 
    843       1.5       uch 		ttychars(tp);
    844       1.5       uch 		ttsetwater(tp);
    845       1.3       uch 
    846       1.5       uch 		/*
    847       1.5       uch 		 * Turn on DTR.  We must always do this, even if carrier is not
    848       1.5       uch 		 * present, because otherwise we'd have to use TIOCSDTR
    849       1.5       uch 		 * immediately after setting CLOCAL, which applications do not
    850       1.5       uch 		 * expect.  We always assert DTR while the device is open
    851       1.5       uch 		 * unless explicitly requested to deassert it.
    852       1.5       uch 		 */
    853       1.5       uch 		txcom_modem(sc, 1);
    854       1.3       uch 
    855       1.5       uch 		/* Clear the input ring, and unblock. */
    856       1.5       uch 		sc->sc_rbget = sc->sc_rbput = 0;
    857       1.5       uch 	}
    858       1.3       uch 
    859       1.3       uch 	splx(s);
    860       1.6       uch #define	TXCOMDIALOUT(x)	(minor(x) & 0x80000)
    861       1.6       uch 	if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) {
    862      1.15       uch 		DPRINTF("ttyopen failed\n");
    863       1.3       uch 		goto out;
    864       1.1       uch 	}
    865      1.10       eeh 	if ((err = (*tp->t_linesw->l_open)(dev, tp))) {
    866      1.15       uch 		DPRINTF("line dicipline open failed\n");
    867       1.3       uch 		goto out;
    868       1.3       uch 	}
    869       1.3       uch 
    870       1.3       uch 	return err;
    871       1.3       uch 
    872       1.3       uch  out:
    873       1.3       uch 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    874       1.3       uch 		/*
    875       1.3       uch 		 * We failed to open the device, and nobody else had it opened.
    876       1.3       uch 		 * Clean up the state as appropriate.
    877       1.3       uch 		 */
    878       1.3       uch 		txcom_shutdown(sc);
    879       1.1       uch 	}
    880       1.1       uch 
    881       1.1       uch 	return err;
    882       1.3       uch 
    883       1.1       uch }
    884       1.1       uch 
    885       1.1       uch int
    886       1.9       uch txcomclose(dev_t dev, int flag, int mode, struct proc *p)
    887       1.1       uch {
    888       1.1       uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
    889       1.1       uch 	struct tty *tp = sc->sc_tty;
    890       1.1       uch 
    891       1.3       uch 	/* XXX This is for cons.c. */
    892       1.3       uch 	if (!ISSET(tp->t_state, TS_ISOPEN))
    893       1.3       uch 		return 0;
    894       1.3       uch 
    895      1.10       eeh 	(*tp->t_linesw->l_close)(tp, flag);
    896       1.1       uch 	ttyclose(tp);
    897       1.1       uch 
    898       1.3       uch 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    899       1.3       uch 		/*
    900       1.3       uch 		 * Although we got a last close, the device may still be in
    901       1.3       uch 		 * use; e.g. if this was the dialout node, and there are still
    902       1.3       uch 		 * processes waiting for carrier on the non-dialout node.
    903       1.3       uch 		 */
    904       1.3       uch 		txcom_shutdown(sc);
    905       1.3       uch 	}
    906       1.3       uch 
    907       1.1       uch 	return 0;
    908       1.1       uch }
    909       1.1       uch 
    910       1.1       uch int
    911       1.9       uch txcomread(dev_t dev, struct uio *uio, int flag)
    912       1.1       uch {
    913       1.1       uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
    914       1.1       uch 	struct tty *tp = sc->sc_tty;
    915       1.3       uch 
    916      1.10       eeh 	return ((*tp->t_linesw->l_read)(tp, uio, flag));
    917       1.1       uch }
    918       1.1       uch 
    919       1.1       uch int
    920       1.9       uch txcomwrite(dev_t dev, struct uio *uio, int flag)
    921       1.1       uch {
    922       1.1       uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
    923       1.1       uch 	struct tty *tp = sc->sc_tty;
    924       1.1       uch 
    925      1.10       eeh 	return ((*tp->t_linesw->l_write)(tp, uio, flag));
    926      1.12       scw }
    927      1.12       scw 
    928      1.12       scw int
    929      1.12       scw txcompoll(dev_t dev, int events, struct proc *p)
    930      1.12       scw {
    931      1.12       scw 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
    932      1.12       scw 	struct tty *tp = sc->sc_tty;
    933      1.12       scw 
    934      1.12       scw 	return ((*tp->t_linesw->l_poll)(tp, events, p));
    935       1.1       uch }
    936       1.1       uch 
    937       1.1       uch struct tty *
    938       1.9       uch txcomtty(dev_t dev)
    939       1.1       uch {
    940       1.1       uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
    941       1.3       uch 
    942       1.3       uch 	return sc->sc_tty;
    943       1.1       uch }
    944       1.1       uch 
    945       1.1       uch int
    946       1.9       uch txcomioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
    947       1.1       uch {
    948       1.1       uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
    949       1.1       uch 	struct tty *tp = sc->sc_tty;
    950       1.3       uch 	int s, err;
    951       1.3       uch 
    952      1.10       eeh 	err = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
    953      1.16    atatat 	if (err != EPASSTHROUGH) {
    954       1.3       uch 		return err;
    955       1.3       uch 	}
    956       1.3       uch 
    957       1.3       uch 	err = ttioctl(tp, cmd, data, flag, p);
    958      1.16    atatat 	if (err != EPASSTHROUGH) {
    959       1.3       uch 		return err;
    960       1.3       uch 	}
    961       1.3       uch 
    962       1.3       uch 	err = 0;
    963       1.3       uch 
    964       1.3       uch 	s = spltty();
    965       1.3       uch 
    966       1.3       uch 	switch (cmd) {
    967       1.5       uch 	default:
    968      1.16    atatat 		err = EPASSTHROUGH;
    969       1.5       uch 		break;
    970       1.5       uch 
    971       1.3       uch 	case TIOCSBRK:
    972       1.3       uch 		txcom_break(sc, 1);
    973       1.3       uch 		break;
    974       1.3       uch 
    975       1.3       uch 	case TIOCCBRK:
    976       1.3       uch 		txcom_break(sc, 0);
    977       1.3       uch 		break;
    978       1.3       uch 
    979       1.3       uch 	case TIOCSDTR:
    980       1.3       uch 		txcom_modem(sc, 1);
    981       1.3       uch 		break;
    982       1.3       uch 
    983       1.3       uch 	case TIOCCDTR:
    984       1.3       uch 		txcom_modem(sc, 0);
    985       1.3       uch 		break;
    986       1.3       uch 
    987       1.3       uch 	case TIOCGFLAGS:
    988       1.3       uch 		*(int *)data = sc->sc_chip->sc_swflags;
    989       1.3       uch 		break;
    990       1.3       uch 
    991       1.3       uch 	case TIOCSFLAGS:
    992       1.3       uch 		err = suser(p->p_ucred, &p->p_acflag);
    993       1.3       uch 		if (err) {
    994       1.3       uch 			break;
    995       1.3       uch 		}
    996       1.3       uch 		sc->sc_chip->sc_swflags = *(int *)data;
    997       1.3       uch 		break;
    998       1.3       uch 
    999       1.3       uch 	}
   1000       1.1       uch 
   1001       1.3       uch 	splx(s);
   1002       1.1       uch 
   1003       1.3       uch 	return err;
   1004       1.1       uch }
   1005       1.1       uch 
   1006       1.1       uch void
   1007       1.9       uch txcomstop(struct tty *tp, int flag)
   1008       1.1       uch {
   1009       1.1       uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
   1010       1.1       uch 	int s;
   1011       1.1       uch 
   1012       1.1       uch 	s = spltty();
   1013       1.1       uch 
   1014       1.1       uch 	if (ISSET(tp->t_state, TS_BUSY)) {
   1015       1.1       uch 		/* Stop transmitting at the next chunk. */
   1016       1.1       uch 		sc->sc_tbc = 0;
   1017       1.1       uch 		sc->sc_heldtbc = 0;
   1018       1.1       uch 		if (!ISSET(tp->t_state, TS_TTSTOP))
   1019       1.1       uch 			SET(tp->t_state, TS_FLUSH);
   1020       1.1       uch 	}
   1021       1.3       uch 
   1022       1.1       uch 	splx(s);
   1023       1.1       uch }
   1024       1.1       uch 
   1025       1.1       uch void
   1026       1.9       uch txcomstart(struct tty *tp)
   1027       1.1       uch {
   1028       1.1       uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
   1029       1.3       uch 	struct txcom_chip *chip = sc->sc_chip;
   1030       1.3       uch 	tx_chipset_tag_t tc = chip->sc_tc;
   1031       1.3       uch 	int slot = chip->sc_slot;
   1032       1.1       uch 	int s;
   1033       1.1       uch 
   1034       1.1       uch 	s = spltty();
   1035       1.3       uch 
   1036       1.3       uch 	if (!__txcom_txbufready(chip, 0) ||
   1037       1.3       uch 	    ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
   1038       1.3       uch 		goto out;
   1039       1.1       uch 
   1040       1.1       uch 	if (tp->t_outq.c_cc <= tp->t_lowat) {
   1041       1.1       uch 		if (ISSET(tp->t_state, TS_ASLEEP)) {
   1042       1.1       uch 			CLR(tp->t_state, TS_ASLEEP);
   1043       1.1       uch 			wakeup(&tp->t_outq);
   1044       1.1       uch 		}
   1045       1.1       uch 		selwakeup(&tp->t_wsel);
   1046       1.1       uch 		if (tp->t_outq.c_cc == 0)
   1047       1.3       uch 			goto out;
   1048       1.1       uch 	}
   1049       1.3       uch 
   1050       1.1       uch 	sc->sc_tba = tp->t_outq.c_cf;
   1051       1.1       uch 	sc->sc_tbc = ndqb(&tp->t_outq, 0);
   1052       1.3       uch 	SET(tp->t_state, TS_BUSY);
   1053       1.3       uch 
   1054       1.3       uch 	/* Output the first character of the contiguous buffer. */
   1055       1.3       uch 	tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot),
   1056      1.14       uch 	    (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK));
   1057       1.3       uch 
   1058       1.3       uch 	sc->sc_tbc--;
   1059       1.3       uch 	sc->sc_tba++;
   1060       1.1       uch 
   1061       1.3       uch  out:
   1062       1.1       uch 	splx(s);
   1063       1.1       uch }
   1064       1.1       uch 
   1065       1.3       uch /*
   1066       1.3       uch  * Set TXcom tty parameters from termios.
   1067       1.3       uch  */
   1068       1.1       uch int
   1069       1.9       uch txcomparam(struct tty *tp, struct termios *t)
   1070       1.1       uch {
   1071       1.3       uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
   1072       1.3       uch 	struct txcom_chip *chip;
   1073       1.5       uch 	int ospeed;
   1074       1.3       uch 	int s;
   1075       1.3       uch 
   1076       1.3       uch 	if (!sc)
   1077       1.3       uch 		return ENXIO;
   1078       1.3       uch 
   1079       1.3       uch 	ospeed = t->c_ospeed;
   1080       1.3       uch 
   1081       1.3       uch 	/* Check requested parameters. */
   1082       1.3       uch 	if (ospeed < 0) {
   1083       1.3       uch 		return EINVAL;
   1084       1.3       uch 	}
   1085       1.3       uch 	if (t->c_ispeed && t->c_ispeed != ospeed) {
   1086       1.3       uch 		return EINVAL;
   1087       1.3       uch 	}
   1088       1.3       uch 
   1089       1.3       uch 	s = spltty();
   1090       1.3       uch 	chip = sc->sc_chip;
   1091       1.3       uch 	/*
   1092       1.3       uch 	 * For the console, always force CLOCAL and !HUPCL, so that the port
   1093       1.3       uch 	 * is always active.
   1094       1.3       uch 	 */
   1095       1.3       uch 	if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) ||
   1096       1.3       uch 	    ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
   1097       1.5       uch 		SET(t->c_cflag, CLOCAL);
   1098       1.5       uch 		CLR(t->c_cflag, HUPCL);
   1099       1.3       uch 	}
   1100       1.3       uch 	splx(s);
   1101       1.3       uch 
   1102       1.3       uch 	/*
   1103       1.6       uch 	 * If we're not in a mode that assumes a connection is present, then
   1104       1.6       uch 	 * ignore carrier changes.
   1105       1.6       uch 	 */
   1106       1.6       uch 	if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
   1107       1.6       uch 		chip->sc_dcd = 0;
   1108       1.6       uch 	else
   1109       1.6       uch 		chip->sc_dcd = 1;
   1110       1.6       uch 
   1111       1.6       uch 	/*
   1112       1.3       uch 	 * Only whack the UART when params change.
   1113       1.3       uch 	 * Some callers need to clear tp->t_ospeed
   1114       1.3       uch 	 * to make sure initialization gets done.
   1115       1.3       uch 	 */
   1116       1.5       uch 	if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) {
   1117       1.3       uch 		return 0;
   1118       1.3       uch 	}
   1119       1.3       uch 
   1120       1.3       uch 	s = spltty();
   1121       1.3       uch 	chip = sc->sc_chip;
   1122       1.3       uch 	chip->sc_speed = ospeed;
   1123       1.5       uch 	chip->sc_cflag = t->c_cflag;
   1124       1.3       uch 
   1125       1.3       uch 	txcom_setmode(chip);
   1126       1.3       uch 	txcom_setbaudrate(chip);
   1127       1.6       uch 
   1128       1.3       uch 	/* And copy to tty. */
   1129       1.3       uch 	tp->t_ispeed = 0;
   1130       1.3       uch 	tp->t_ospeed = chip->sc_speed;
   1131       1.3       uch 	tp->t_cflag = chip->sc_cflag;
   1132       1.3       uch 
   1133       1.3       uch 	/*
   1134       1.6       uch 	 * Update the tty layer's idea of the carrier bit, in case we changed
   1135       1.6       uch 	 * CLOCAL or MDMBUF.  We don't hang up here; we only do that by
   1136       1.6       uch 	 * explicit request.
   1137       1.6       uch 	 */
   1138      1.10       eeh 	(void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd);
   1139       1.6       uch 
   1140       1.6       uch 	/*
   1141       1.3       uch 	 * If hardware flow control is disabled, unblock any hard flow
   1142       1.3       uch 	 * control state.
   1143       1.3       uch 	 */
   1144       1.3       uch 	if (!ISSET(chip->sc_cflag, CHWFLOW)) {
   1145       1.3       uch 		txcomstart(tp);
   1146       1.3       uch 	}
   1147       1.3       uch 
   1148       1.3       uch 	splx(s);
   1149       1.6       uch 
   1150       1.6       uch 	return 0;
   1151       1.6       uch }
   1152       1.6       uch 
   1153       1.9       uch int
   1154       1.9       uch txcom_dcd_hook(void *arg, int type, long id, void *msg)
   1155       1.9       uch {
   1156       1.9       uch 	struct txcom_softc *sc = arg;
   1157       1.9       uch 	struct tty *tp = sc->sc_tty;
   1158       1.9       uch 	struct txcom_chip *chip = sc->sc_chip;
   1159       1.9       uch 	int modem = !(int)msg; /* p-edge 1, n-edge 0 */
   1160       1.9       uch 
   1161      1.15       uch 	DPRINTF("DCD %s\n", modem ? "ON" : "OFF");
   1162       1.9       uch 
   1163       1.9       uch 	if (modem && chip->sc_dcd)
   1164      1.10       eeh 		(void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd);
   1165       1.9       uch 
   1166       1.9       uch 	return 0;
   1167       1.9       uch }
   1168       1.9       uch 
   1169       1.9       uch int
   1170       1.9       uch txcom_cts_hook(void *arg, int type, long id, void *msg)
   1171       1.9       uch {
   1172       1.9       uch 	struct txcom_softc *sc = arg;
   1173       1.9       uch 	struct tty *tp = sc->sc_tty;
   1174       1.9       uch 	struct txcom_chip *chip = sc->sc_chip;
   1175       1.9       uch 	int clear = !(int)msg; /* p-edge 1, n-edge 0 */
   1176       1.9       uch 
   1177      1.15       uch 	DPRINTF("CTS %s\n", clear ? "ON"  : "OFF");
   1178       1.9       uch 
   1179       1.9       uch 	if (chip->sc_msr_cts) {
   1180       1.9       uch 		if (!clear) {
   1181       1.9       uch 			chip->sc_tx_stopped = 1;
   1182       1.9       uch 		} else {
   1183       1.9       uch 			chip->sc_tx_stopped = 0;
   1184      1.10       eeh 			(*tp->t_linesw->l_start)(tp);
   1185       1.9       uch 		}
   1186       1.9       uch 	}
   1187       1.9       uch 
   1188       1.9       uch 	return 0;
   1189       1.9       uch }
   1190       1.9       uch 
   1191       1.9       uch #ifdef TX39UARTDEBUG
   1192       1.6       uch void
   1193       1.9       uch txcom_dump(struct txcom_chip *chip)
   1194       1.6       uch {
   1195       1.6       uch 	tx_chipset_tag_t tc = chip->sc_tc;
   1196       1.6       uch 	int slot = chip->sc_slot;
   1197       1.6       uch 	txreg_t reg;
   1198       1.6       uch 
   1199       1.6       uch 	reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
   1200       1.6       uch #define ISSETPRINT(r, m) \
   1201      1.15       uch 	dbg_bitmask_print(r, TX39_UARTCTRL1_##m, #m)
   1202       1.6       uch 	ISSETPRINT(reg, UARTON);
   1203       1.6       uch 	ISSETPRINT(reg, EMPTY);
   1204       1.6       uch 	ISSETPRINT(reg, PRXHOLDFULL);
   1205       1.6       uch 	ISSETPRINT(reg, RXHOLDFULL);
   1206       1.6       uch 	ISSETPRINT(reg, ENDMARX);
   1207       1.6       uch 	ISSETPRINT(reg, ENDMATX);
   1208       1.6       uch 	ISSETPRINT(reg, TESTMODE);
   1209       1.6       uch 	ISSETPRINT(reg, ENBREAHALT);
   1210       1.6       uch 	ISSETPRINT(reg, ENDMATEST);
   1211       1.6       uch 	ISSETPRINT(reg, ENDMALOOP);
   1212       1.6       uch 	ISSETPRINT(reg, PULSEOPT2);
   1213       1.6       uch 	ISSETPRINT(reg, PULSEOPT1);
   1214       1.6       uch 	ISSETPRINT(reg, DTINVERT);
   1215       1.6       uch 	ISSETPRINT(reg, DISTXD);
   1216       1.6       uch 	ISSETPRINT(reg, TWOSTOP);
   1217       1.6       uch 	ISSETPRINT(reg, LOOPBACK);
   1218       1.6       uch 	ISSETPRINT(reg, BIT7);
   1219       1.6       uch 	ISSETPRINT(reg, EVENPARITY);
   1220       1.6       uch 	ISSETPRINT(reg, ENPARITY);
   1221       1.6       uch 	ISSETPRINT(reg, ENUART);
   1222       1.6       uch }
   1223       1.9       uch #endif /* TX39UARTDEBUG */
   1224