txcom.c revision 1.22 1 1.22 lukem /* $NetBSD: txcom.c,v 1.22 2003/07/15 02:29:33 lukem Exp $ */
2 1.1 uch
3 1.9 uch /*-
4 1.9 uch * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5 1.1 uch * All rights reserved.
6 1.1 uch *
7 1.9 uch * This code is derived from software contributed to The NetBSD Foundation
8 1.9 uch * by UCHIYAMA Yasushi.
9 1.9 uch *
10 1.1 uch * Redistribution and use in source and binary forms, with or without
11 1.1 uch * modification, are permitted provided that the following conditions
12 1.1 uch * are met:
13 1.1 uch * 1. Redistributions of source code must retain the above copyright
14 1.1 uch * notice, this list of conditions and the following disclaimer.
15 1.9 uch * 2. Redistributions in binary form must reproduce the above copyright
16 1.9 uch * notice, this list of conditions and the following disclaimer in the
17 1.9 uch * documentation and/or other materials provided with the distribution.
18 1.9 uch * 3. All advertising materials mentioning features or use of this software
19 1.9 uch * must display the following acknowledgement:
20 1.9 uch * This product includes software developed by the NetBSD
21 1.9 uch * Foundation, Inc. and its contributors.
22 1.9 uch * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.9 uch * contributors may be used to endorse or promote products derived
24 1.9 uch * from this software without specific prior written permission.
25 1.1 uch *
26 1.9 uch * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.9 uch * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.9 uch * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.9 uch * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.9 uch * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.9 uch * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.9 uch * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.9 uch * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.9 uch * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.9 uch * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.9 uch * POSSIBILITY OF SUCH DAMAGE.
37 1.1 uch */
38 1.22 lukem
39 1.22 lukem #include <sys/cdefs.h>
40 1.22 lukem __KERNEL_RCSID(0, "$NetBSD: txcom.c,v 1.22 2003/07/15 02:29:33 lukem Exp $");
41 1.15 uch
42 1.15 uch #include "opt_tx39uart_debug.h"
43 1.1 uch
44 1.1 uch #include <sys/param.h>
45 1.1 uch #include <sys/systm.h>
46 1.3 uch #include <sys/kernel.h>
47 1.1 uch #include <sys/device.h>
48 1.3 uch #include <sys/malloc.h>
49 1.1 uch
50 1.1 uch #include <sys/proc.h> /* tsleep/wakeup */
51 1.1 uch
52 1.1 uch #include <sys/ioctl.h>
53 1.1 uch #include <sys/select.h>
54 1.1 uch #include <sys/file.h>
55 1.1 uch
56 1.1 uch #include <sys/tty.h>
57 1.1 uch #include <sys/conf.h>
58 1.1 uch #include <dev/cons.h> /* consdev */
59 1.1 uch
60 1.1 uch #include <machine/bus.h>
61 1.9 uch #include <machine/config_hook.h>
62 1.1 uch
63 1.1 uch #include <hpcmips/tx/tx39var.h>
64 1.1 uch #include <hpcmips/tx/tx39icureg.h>
65 1.1 uch #include <hpcmips/tx/tx39uartvar.h>
66 1.1 uch #include <hpcmips/tx/tx39uartreg.h>
67 1.1 uch
68 1.5 uch #include <hpcmips/tx/tx39irvar.h>
69 1.5 uch
70 1.1 uch #include <hpcmips/tx/tx39clockreg.h> /* XXX */
71 1.6 uch
72 1.1 uch #define SET(t, f) (t) |= (f)
73 1.1 uch #define CLR(t, f) (t) &= ~(f)
74 1.1 uch #define ISSET(t, f) ((t) & (f))
75 1.9 uch /*
76 1.9 uch * UARTA channel has DTR, DSR, RTS, CTS lines. and they wired to MFIO/IO port.
77 1.9 uch */
78 1.9 uch #define IS_COM0(s) ((s) == 0)
79 1.9 uch #define IS_COM1(s) ((s) == 1)
80 1.9 uch #define ON ((void *)1)
81 1.9 uch #define OFF ((void *)0)
82 1.1 uch
83 1.15 uch #ifdef TX39UART_DEBUG
84 1.15 uch #define DPRINTF_ENABLE
85 1.15 uch #define DPRINTF_DEBUG tx39uart_debug
86 1.1 uch #endif
87 1.15 uch #include <machine/debug.h>
88 1.1 uch
89 1.3 uch #define TXCOM_HW_CONSOLE 0x40
90 1.3 uch #define TXCOM_RING_SIZE 256 /* must be a power of two! */
91 1.3 uch #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1)
92 1.1 uch
93 1.3 uch struct txcom_chip {
94 1.1 uch tx_chipset_tag_t sc_tc;
95 1.1 uch int sc_slot; /* UARTA or UARTB */
96 1.1 uch int sc_cflag;
97 1.1 uch int sc_speed;
98 1.3 uch int sc_swflags;
99 1.1 uch int sc_hwflags;
100 1.6 uch
101 1.6 uch int sc_dcd;
102 1.9 uch int sc_msr_cts;
103 1.9 uch int sc_tx_stopped;
104 1.3 uch };
105 1.1 uch
106 1.3 uch struct txcom_softc {
107 1.3 uch struct device sc_dev;
108 1.3 uch struct tty *sc_tty;
109 1.3 uch struct txcom_chip *sc_chip;
110 1.3 uch
111 1.8 thorpej struct callout sc_txsoft_ch;
112 1.8 thorpej struct callout sc_rxsoft_ch;
113 1.8 thorpej
114 1.3 uch u_int8_t *sc_tba; /* transmit buffer address */
115 1.3 uch int sc_tbc; /* transmit byte count */
116 1.3 uch int sc_heldtbc;
117 1.3 uch u_int8_t *sc_rbuf; /* receive buffer address */
118 1.3 uch int sc_rbput; /* receive byte count */
119 1.3 uch int sc_rbget;
120 1.1 uch };
121 1.1 uch
122 1.1 uch extern struct cfdriver txcom_cd;
123 1.1 uch
124 1.9 uch int txcom_match(struct device *, struct cfdata *, void *);
125 1.9 uch void txcom_attach(struct device *, struct device *, void *);
126 1.9 uch int txcom_print(void*, const char *);
127 1.9 uch
128 1.9 uch int txcom_txintr(void *);
129 1.9 uch int txcom_rxintr(void *);
130 1.9 uch int txcom_frameerr_intr(void *);
131 1.9 uch int txcom_parityerr_intr(void *);
132 1.9 uch int txcom_break_intr(void *);
133 1.3 uch
134 1.9 uch void txcom_rxsoft(void *);
135 1.9 uch void txcom_txsoft(void *);
136 1.3 uch
137 1.9 uch int txcom_stsoft(void *);
138 1.9 uch int txcom_stsoft2(void *);
139 1.9 uch int txcom_stsoft3(void *);
140 1.9 uch int txcom_stsoft4(void *);
141 1.9 uch
142 1.9 uch
143 1.9 uch void txcom_shutdown(struct txcom_softc *);
144 1.9 uch void txcom_break(struct txcom_softc *, int);
145 1.9 uch void txcom_modem(struct txcom_softc *, int);
146 1.9 uch void txcomstart(struct tty *);
147 1.9 uch int txcomparam(struct tty *, struct termios *);
148 1.9 uch
149 1.9 uch void txcom_reset (struct txcom_chip *);
150 1.9 uch int txcom_enable (struct txcom_chip *);
151 1.9 uch void txcom_disable (struct txcom_chip *);
152 1.9 uch void txcom_setmode (struct txcom_chip *);
153 1.9 uch void txcom_setbaudrate(struct txcom_chip *);
154 1.9 uch int txcom_cngetc (dev_t);
155 1.9 uch void txcom_cnputc (dev_t, int);
156 1.9 uch void txcom_cnpollc (dev_t, int);
157 1.3 uch
158 1.9 uch int txcom_dcd_hook(void *, int, long, void *);
159 1.9 uch int txcom_cts_hook(void *, int, long, void *);
160 1.1 uch
161 1.9 uch
162 1.9 uch __inline__ int __txcom_txbufready(struct txcom_chip *, int);
163 1.9 uch const char *__txcom_slotname(int);
164 1.9 uch
165 1.9 uch #ifdef TX39UARTDEBUG
166 1.9 uch void txcom_dump(struct txcom_chip *);
167 1.9 uch #endif
168 1.6 uch
169 1.3 uch struct consdev txcomcons = {
170 1.21 nakayama NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc, NULL, NULL,
171 1.14 uch NULL, NODEV, CN_NORMAL
172 1.3 uch };
173 1.3 uch
174 1.1 uch /* Serial console */
175 1.3 uch struct txcom_chip txcom_chip;
176 1.1 uch
177 1.19 thorpej CFATTACH_DECL(txcom, sizeof(struct txcom_softc),
178 1.19 thorpej txcom_match, txcom_attach, NULL, NULL);
179 1.1 uch
180 1.17 gehenna dev_type_open(txcomopen);
181 1.17 gehenna dev_type_close(txcomclose);
182 1.17 gehenna dev_type_read(txcomread);
183 1.17 gehenna dev_type_write(txcomwrite);
184 1.17 gehenna dev_type_ioctl(txcomioctl);
185 1.17 gehenna dev_type_stop(txcomstop);
186 1.17 gehenna dev_type_tty(txcomtty);
187 1.17 gehenna dev_type_poll(txcompoll);
188 1.17 gehenna
189 1.17 gehenna const struct cdevsw txcom_cdevsw = {
190 1.17 gehenna txcomopen, txcomclose, txcomread, txcomwrite, txcomioctl,
191 1.20 jdolecek txcomstop, txcomtty, txcompoll, nommap, ttykqfilter, D_TTY
192 1.17 gehenna };
193 1.17 gehenna
194 1.1 uch int
195 1.1 uch txcom_match(parent, cf, aux)
196 1.1 uch struct device *parent;
197 1.1 uch struct cfdata *cf;
198 1.1 uch void *aux;
199 1.1 uch {
200 1.1 uch /* if the autoconfiguration got this far, there's a slot here */
201 1.1 uch return 1;
202 1.1 uch }
203 1.1 uch
204 1.1 uch void
205 1.9 uch txcom_attach(struct device *parent, struct device *self, void *aux)
206 1.1 uch {
207 1.1 uch struct tx39uart_attach_args *ua = aux;
208 1.1 uch struct txcom_softc *sc = (void*)self;
209 1.1 uch tx_chipset_tag_t tc;
210 1.1 uch struct tty *tp;
211 1.3 uch struct txcom_chip *chip;
212 1.6 uch int slot, console;
213 1.1 uch
214 1.1 uch /* Check this slot used as serial console */
215 1.6 uch console = (ua->ua_slot == txcom_chip.sc_slot) &&
216 1.14 uch (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE);
217 1.6 uch
218 1.6 uch if (console) {
219 1.3 uch sc->sc_chip = &txcom_chip;
220 1.3 uch } else {
221 1.3 uch if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip),
222 1.14 uch M_DEVBUF, M_WAITOK))) {
223 1.3 uch printf(": can't allocate chip\n");
224 1.3 uch return;
225 1.3 uch }
226 1.3 uch memset(sc->sc_chip, 0, sizeof(struct txcom_chip));
227 1.1 uch }
228 1.1 uch
229 1.3 uch chip = sc->sc_chip;
230 1.3 uch tc = chip->sc_tc = ua->ua_tc;
231 1.3 uch slot = chip->sc_slot = ua->ua_slot;
232 1.3 uch
233 1.6 uch #ifdef TX39UARTDEBUG
234 1.6 uch txcom_dump(chip);
235 1.6 uch #endif
236 1.6 uch if (!console)
237 1.6 uch txcom_reset(chip);
238 1.6 uch
239 1.3 uch if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) {
240 1.3 uch printf(": can't allocate buffer.\n");
241 1.3 uch return;
242 1.3 uch }
243 1.3 uch memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE);
244 1.1 uch
245 1.1 uch tp = ttymalloc();
246 1.1 uch tp->t_oproc = txcomstart;
247 1.1 uch tp->t_param = txcomparam;
248 1.1 uch tp->t_hwiflow = NULL;
249 1.1 uch sc->sc_tty = tp;
250 1.1 uch tty_attach(tp);
251 1.1 uch
252 1.3 uch if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
253 1.1 uch int maj;
254 1.1 uch /* locate the major number */
255 1.17 gehenna maj = cdevsw_lookup_major(&txcom_cdevsw);
256 1.1 uch
257 1.1 uch cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit);
258 1.1 uch
259 1.3 uch printf(": console");
260 1.1 uch }
261 1.1 uch
262 1.3 uch printf("\n");
263 1.1 uch
264 1.1 uch /*
265 1.1 uch * Enable interrupt
266 1.1 uch */
267 1.3 uch #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s))
268 1.3 uch
269 1.3 uch tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY,
270 1.14 uch txcom_rxintr, sc);
271 1.3 uch tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY,
272 1.14 uch txcom_txintr, sc);
273 1.3 uch tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY,
274 1.14 uch txcom_rxintr, sc);
275 1.3 uch tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY,
276 1.14 uch txcom_txintr, sc);
277 1.3 uch tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY,
278 1.14 uch txcom_frameerr_intr, sc);
279 1.3 uch tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY,
280 1.14 uch txcom_parityerr_intr, sc);
281 1.3 uch tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY,
282 1.14 uch txcom_break_intr, sc);
283 1.5 uch
284 1.9 uch /*
285 1.9 uch * UARTA has external signal line. (its wiring is platform dependent)
286 1.9 uch */
287 1.9 uch if (IS_COM0(slot)) {
288 1.9 uch /* install DCD, CTS hooks. */
289 1.11 sato config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_DCD,
290 1.14 uch CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc);
291 1.11 sato config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_CTS,
292 1.14 uch CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc);
293 1.9 uch }
294 1.6 uch
295 1.5 uch /*
296 1.5 uch * UARTB can connect IR module
297 1.5 uch */
298 1.9 uch if (IS_COM1(slot)) {
299 1.5 uch struct txcom_attach_args tca;
300 1.5 uch tca.tca_tc = tc;
301 1.5 uch tca.tca_parent = self;
302 1.5 uch config_found(self, &tca, txcom_print);
303 1.5 uch }
304 1.5 uch }
305 1.5 uch
306 1.5 uch int
307 1.9 uch txcom_print(void *aux, const char *pnp)
308 1.5 uch {
309 1.5 uch return pnp ? QUIET : UNCONF;
310 1.1 uch }
311 1.1 uch
312 1.6 uch void
313 1.9 uch txcom_reset(struct txcom_chip *chip)
314 1.6 uch {
315 1.6 uch tx_chipset_tag_t tc;
316 1.6 uch int slot, ofs;
317 1.6 uch txreg_t reg;
318 1.6 uch
319 1.6 uch tc = chip->sc_tc;
320 1.6 uch slot = chip->sc_slot;
321 1.6 uch ofs = TX39_UARTCTRL1_REG(slot);
322 1.6 uch
323 1.6 uch /* Supply clock */
324 1.6 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
325 1.6 uch reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
326 1.6 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
327 1.6 uch
328 1.6 uch /* reset UART module */
329 1.6 uch tx_conf_write(tc, ofs, 0);
330 1.6 uch }
331 1.6 uch
332 1.1 uch int
333 1.9 uch txcom_enable(struct txcom_chip *chip)
334 1.1 uch {
335 1.1 uch tx_chipset_tag_t tc;
336 1.1 uch txreg_t reg;
337 1.3 uch int slot, ofs, timeout;
338 1.1 uch
339 1.3 uch tc = chip->sc_tc;
340 1.3 uch slot = chip->sc_slot;
341 1.3 uch ofs = TX39_UARTCTRL1_REG(slot);
342 1.1 uch
343 1.9 uch /* External power supply (if any) */
344 1.9 uch config_hook_call(CONFIG_HOOK_POWERCONTROL,
345 1.14 uch CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON);
346 1.9 uch delay(3);
347 1.9 uch
348 1.6 uch /* Supply clock */
349 1.5 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
350 1.5 uch reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
351 1.5 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
352 1.5 uch
353 1.6 uch /*
354 1.6 uch * XXX Disable DMA (DMA not coded yet)
355 1.6 uch */
356 1.6 uch reg = tx_conf_read(tc, ofs);
357 1.6 uch reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
358 1.6 uch tx_conf_write(tc, ofs, reg);
359 1.6 uch
360 1.6 uch /* enable */
361 1.3 uch reg = tx_conf_read(tc, ofs);
362 1.1 uch reg |= TX39_UARTCTRL1_ENUART;
363 1.1 uch reg &= ~TX39_UARTCTRL1_ENBREAHALT;
364 1.3 uch tx_conf_write(tc, ofs, reg);
365 1.3 uch
366 1.9 uch timeout = 100000;
367 1.3 uch
368 1.3 uch while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) &&
369 1.14 uch --timeout > 0)
370 1.3 uch ;
371 1.3 uch
372 1.5 uch if (timeout == 0 && !cold) {
373 1.6 uch printf("%s never power up\n", __txcom_slotname(slot));
374 1.3 uch return 1;
375 1.3 uch }
376 1.3 uch
377 1.1 uch return 0;
378 1.1 uch }
379 1.1 uch
380 1.1 uch void
381 1.9 uch txcom_disable(struct txcom_chip *chip)
382 1.1 uch {
383 1.1 uch tx_chipset_tag_t tc;
384 1.1 uch txreg_t reg;
385 1.1 uch int slot;
386 1.1 uch
387 1.3 uch tc = chip->sc_tc;
388 1.3 uch slot = chip->sc_slot;
389 1.1 uch
390 1.1 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
391 1.1 uch /* DMA */
392 1.1 uch reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
393 1.3 uch
394 1.6 uch /* disable module */
395 1.1 uch reg &= ~TX39_UARTCTRL1_ENUART;
396 1.1 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
397 1.3 uch
398 1.1 uch /* Clock */
399 1.1 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
400 1.1 uch reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
401 1.1 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
402 1.1 uch
403 1.1 uch }
404 1.1 uch
405 1.9 uch __inline__ int
406 1.9 uch __txcom_txbufready(struct txcom_chip *chip, int retry)
407 1.3 uch {
408 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
409 1.3 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
410 1.3 uch
411 1.3 uch do {
412 1.3 uch if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY)
413 1.3 uch return 1;
414 1.3 uch } while(--retry != 0);
415 1.3 uch
416 1.1 uch return 0;
417 1.1 uch }
418 1.1 uch
419 1.5 uch void
420 1.9 uch txcom_pulse_mode(struct device *dev)
421 1.5 uch {
422 1.5 uch struct txcom_softc *sc = (void*)dev;
423 1.5 uch struct txcom_chip *chip = sc->sc_chip;
424 1.5 uch tx_chipset_tag_t tc = chip->sc_tc;
425 1.5 uch int ofs;
426 1.5 uch txreg_t reg;
427 1.5 uch
428 1.5 uch ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
429 1.5 uch
430 1.5 uch reg = tx_conf_read(tc, ofs);
431 1.6 uch /* WindowsCE use this setting */
432 1.6 uch reg |= TX39_UARTCTRL1_PULSEOPT1;
433 1.6 uch reg &= ~TX39_UARTCTRL1_PULSEOPT2;
434 1.6 uch reg |= TX39_UARTCTRL1_DTINVERT;
435 1.6 uch
436 1.5 uch tx_conf_write(tc, ofs, reg);
437 1.5 uch }
438 1.5 uch
439 1.3 uch /*
440 1.3 uch * console
441 1.3 uch */
442 1.1 uch int
443 1.9 uch txcom_cngetc(dev_t dev)
444 1.1 uch {
445 1.1 uch tx_chipset_tag_t tc;
446 1.2 uch int ofs, c, s;
447 1.2 uch
448 1.3 uch s = spltty();
449 1.2 uch
450 1.3 uch tc = txcom_chip.sc_tc;
451 1.3 uch ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot);
452 1.1 uch
453 1.1 uch while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs)))
454 1.1 uch ;
455 1.2 uch
456 1.3 uch c = TX39_UARTRXHOLD_RXDATA(
457 1.3 uch tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot)));
458 1.2 uch
459 1.3 uch if (c == '\r')
460 1.1 uch c = '\n';
461 1.1 uch
462 1.2 uch splx(s);
463 1.2 uch
464 1.1 uch return c;
465 1.1 uch }
466 1.1 uch
467 1.1 uch void
468 1.9 uch txcom_cnputc(dev_t dev, int c)
469 1.1 uch {
470 1.3 uch struct txcom_chip *chip = &txcom_chip;
471 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
472 1.3 uch int s;
473 1.2 uch
474 1.3 uch s = spltty();
475 1.1 uch
476 1.3 uch /* Wait for transmitter to empty */
477 1.3 uch __txcom_txbufready(chip, -1);
478 1.1 uch
479 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
480 1.14 uch (c & TX39_UARTTXHOLD_TXDATA_MASK));
481 1.1 uch
482 1.3 uch __txcom_txbufready(chip, -1);
483 1.3 uch
484 1.2 uch splx(s);
485 1.1 uch }
486 1.1 uch
487 1.1 uch void
488 1.9 uch txcom_cnpollc(dev_t dev, int on)
489 1.1 uch {
490 1.1 uch }
491 1.1 uch
492 1.1 uch void
493 1.9 uch txcom_setmode(struct txcom_chip *chip)
494 1.1 uch {
495 1.3 uch tcflag_t cflag = chip->sc_cflag;
496 1.3 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
497 1.1 uch txreg_t reg;
498 1.1 uch
499 1.3 uch reg = tx_conf_read(chip->sc_tc, ofs);
500 1.6 uch reg &= ~TX39_UARTCTRL1_ENUART;
501 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg);
502 1.6 uch
503 1.1 uch switch (ISSET(cflag, CSIZE)) {
504 1.1 uch default:
505 1.1 uch printf("txcom_setmode: CS7, CS8 only. use CS7");
506 1.1 uch /* FALL THROUGH */
507 1.1 uch case CS7:
508 1.1 uch reg |= TX39_UARTCTRL1_BIT7;
509 1.1 uch break;
510 1.1 uch case CS8:
511 1.1 uch reg &= ~TX39_UARTCTRL1_BIT7;
512 1.1 uch break;
513 1.1 uch }
514 1.3 uch
515 1.1 uch if (ISSET(cflag, PARENB)) {
516 1.1 uch reg |= TX39_UARTCTRL1_ENPARITY;
517 1.1 uch if (ISSET(cflag, PARODD)) {
518 1.1 uch reg &= ~TX39_UARTCTRL1_EVENPARITY;
519 1.1 uch } else {
520 1.1 uch reg |= TX39_UARTCTRL1_EVENPARITY;
521 1.1 uch }
522 1.1 uch } else {
523 1.1 uch reg &= ~TX39_UARTCTRL1_ENPARITY;
524 1.1 uch }
525 1.3 uch
526 1.6 uch if (ISSET(cflag, CSTOPB))
527 1.1 uch reg |= TX39_UARTCTRL1_TWOSTOP;
528 1.6 uch else
529 1.6 uch reg &= ~TX39_UARTCTRL1_TWOSTOP;
530 1.6 uch
531 1.6 uch reg |= TX39_UARTCTRL1_ENUART;
532 1.3 uch tx_conf_write(chip->sc_tc, ofs, reg);
533 1.3 uch }
534 1.3 uch
535 1.3 uch void
536 1.9 uch txcom_setbaudrate(struct txcom_chip *chip)
537 1.3 uch {
538 1.3 uch int baudrate;
539 1.6 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
540 1.6 uch txreg_t reg, reg1;
541 1.3 uch
542 1.3 uch if (chip->sc_speed == 0)
543 1.3 uch return;
544 1.3 uch
545 1.5 uch if (!cold)
546 1.15 uch DPRINTF("%d\n", chip->sc_speed);
547 1.5 uch
548 1.6 uch reg1 = tx_conf_read(chip->sc_tc, ofs);
549 1.6 uch reg1 &= ~TX39_UARTCTRL1_ENUART;
550 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg1);
551 1.6 uch
552 1.3 uch baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1;
553 1.3 uch reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate);
554 1.3 uch
555 1.3 uch tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg);
556 1.6 uch
557 1.6 uch reg1 |= TX39_UARTCTRL1_ENUART;
558 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg1);
559 1.3 uch }
560 1.3 uch
561 1.3 uch int
562 1.9 uch txcom_cnattach(int slot, int speed, int cflag)
563 1.3 uch {
564 1.3 uch cn_tab = &txcomcons;
565 1.3 uch
566 1.3 uch txcom_chip.sc_tc = tx_conf_get_tag();
567 1.3 uch txcom_chip.sc_slot = slot;
568 1.3 uch txcom_chip.sc_cflag = cflag;
569 1.3 uch txcom_chip.sc_speed = speed;
570 1.3 uch txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE;
571 1.6 uch #if notyet
572 1.6 uch txcom_reset(&txcom_chip);
573 1.6 uch #endif
574 1.6 uch txcom_setmode(&txcom_chip);
575 1.6 uch txcom_setbaudrate(&txcom_chip);
576 1.3 uch
577 1.5 uch if (txcom_enable(&txcom_chip))
578 1.5 uch return 1;
579 1.5 uch
580 1.3 uch return 0;
581 1.3 uch }
582 1.3 uch
583 1.3 uch /*
584 1.3 uch * tty
585 1.3 uch */
586 1.3 uch void
587 1.9 uch txcom_break(struct txcom_softc *sc, int on)
588 1.3 uch {
589 1.3 uch struct txcom_chip *chip = sc->sc_chip;
590 1.1 uch
591 1.3 uch tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
592 1.14 uch on ? TX39_UARTTXHOLD_BREAK : 0);
593 1.1 uch }
594 1.1 uch
595 1.1 uch void
596 1.9 uch txcom_modem(struct txcom_softc *sc, int on)
597 1.1 uch {
598 1.3 uch struct txcom_chip *chip = sc->sc_chip;
599 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
600 1.3 uch int slot = chip->sc_slot;
601 1.1 uch txreg_t reg;
602 1.1 uch
603 1.9 uch /* assert DTR */
604 1.9 uch if (IS_COM0(slot)) {
605 1.11 sato config_hook_call(CONFIG_HOOK_SET,
606 1.14 uch CONFIG_HOOK_COM0_DTR,
607 1.14 uch (void *)on);
608 1.9 uch }
609 1.9 uch
610 1.3 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
611 1.6 uch reg &= ~TX39_UARTCTRL1_ENUART;
612 1.6 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
613 1.3 uch
614 1.3 uch if (on) {
615 1.3 uch reg &= ~TX39_UARTCTRL1_DISTXD;
616 1.3 uch } else {
617 1.6 uch reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */
618 1.3 uch }
619 1.6 uch
620 1.6 uch reg |= TX39_UARTCTRL1_ENUART;
621 1.6 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
622 1.1 uch }
623 1.1 uch
624 1.1 uch void
625 1.9 uch txcom_shutdown(struct txcom_softc *sc)
626 1.1 uch {
627 1.1 uch struct tty *tp = sc->sc_tty;
628 1.3 uch int s = spltty();
629 1.1 uch
630 1.3 uch /* Clear any break condition set with TIOCSBRK. */
631 1.3 uch txcom_break(sc, 0);
632 1.3 uch
633 1.3 uch /*
634 1.3 uch * Hang up if necessary. Wait a bit, so the other side has time to
635 1.3 uch * notice even if we immediately open the port again.
636 1.3 uch */
637 1.3 uch if (ISSET(tp->t_cflag, HUPCL)) {
638 1.3 uch txcom_modem(sc, 0);
639 1.3 uch (void) tsleep(sc, TTIPRI, ttclos, hz);
640 1.3 uch }
641 1.3 uch
642 1.3 uch
643 1.3 uch /* Turn off interrupts if not the console. */
644 1.3 uch if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
645 1.3 uch txcom_disable(sc->sc_chip);
646 1.3 uch }
647 1.1 uch
648 1.3 uch splx(s);
649 1.3 uch }
650 1.1 uch
651 1.9 uch const char *
652 1.9 uch __txcom_slotname(int slot)
653 1.3 uch {
654 1.9 uch static const char *slotname[] = {"UARTA", "UARTB", "unknown"};
655 1.9 uch
656 1.9 uch if (slot != 0 && slot != 1)
657 1.9 uch return slotname[2];
658 1.9 uch
659 1.9 uch return slotname[slot];
660 1.2 uch }
661 1.2 uch
662 1.2 uch int
663 1.9 uch txcom_frameerr_intr(void *arg)
664 1.3 uch {
665 1.3 uch struct txcom_softc *sc = arg;
666 1.3 uch
667 1.3 uch printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot));
668 1.3 uch
669 1.3 uch return 0;
670 1.3 uch }
671 1.3 uch
672 1.3 uch int
673 1.9 uch txcom_parityerr_intr(void *arg)
674 1.3 uch {
675 1.3 uch struct txcom_softc *sc = arg;
676 1.3 uch
677 1.3 uch printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot));
678 1.2 uch
679 1.2 uch return 0;
680 1.1 uch }
681 1.1 uch
682 1.1 uch int
683 1.9 uch txcom_break_intr(void *arg)
684 1.1 uch {
685 1.1 uch struct txcom_softc *sc = arg;
686 1.3 uch
687 1.3 uch printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot));
688 1.3 uch
689 1.3 uch return 0;
690 1.3 uch }
691 1.3 uch
692 1.3 uch int
693 1.9 uch txcom_rxintr(void *arg)
694 1.3 uch {
695 1.3 uch struct txcom_softc *sc = arg;
696 1.3 uch struct txcom_chip *chip = sc->sc_chip;
697 1.1 uch u_int8_t c;
698 1.1 uch
699 1.3 uch c = TX39_UARTRXHOLD_RXDATA(
700 1.3 uch tx_conf_read(chip->sc_tc,
701 1.14 uch TX39_UARTRXHOLD_REG(chip->sc_slot)));
702 1.3 uch
703 1.3 uch sc->sc_rbuf[sc->sc_rbput] = c;
704 1.3 uch sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK;
705 1.3 uch
706 1.8 thorpej callout_reset(&sc->sc_rxsoft_ch, 1, txcom_rxsoft, sc);
707 1.1 uch
708 1.1 uch return 0;
709 1.1 uch }
710 1.1 uch
711 1.3 uch void
712 1.9 uch txcom_rxsoft(void *arg)
713 1.3 uch {
714 1.3 uch struct txcom_softc *sc = arg;
715 1.3 uch struct tty *tp = sc->sc_tty;
716 1.14 uch int (*rint)(int, struct tty *);
717 1.3 uch int code;
718 1.3 uch int s, end, get;
719 1.3 uch
720 1.10 eeh rint = tp->t_linesw->l_rint;
721 1.3 uch
722 1.3 uch s = spltty();
723 1.3 uch end = sc->sc_rbput;
724 1.3 uch get = sc->sc_rbget;
725 1.3 uch
726 1.3 uch while (get != end) {
727 1.3 uch code = sc->sc_rbuf[get];
728 1.3 uch
729 1.3 uch if ((*rint)(code, tp) == -1) {
730 1.3 uch /*
731 1.3 uch * The line discipline's buffer is out of space.
732 1.3 uch */
733 1.3 uch }
734 1.3 uch get = (get + 1) % TXCOM_RING_MASK;
735 1.3 uch }
736 1.3 uch sc->sc_rbget = get;
737 1.3 uch
738 1.3 uch splx(s);
739 1.3 uch }
740 1.3 uch
741 1.1 uch int
742 1.9 uch txcom_txintr(void *arg)
743 1.1 uch {
744 1.1 uch struct txcom_softc *sc = arg;
745 1.3 uch struct txcom_chip *chip = sc->sc_chip;
746 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
747 1.1 uch
748 1.3 uch if (sc->sc_tbc > 0) {
749 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
750 1.14 uch (*sc->sc_tba &
751 1.14 uch TX39_UARTTXHOLD_TXDATA_MASK));
752 1.3 uch sc->sc_tbc--;
753 1.3 uch sc->sc_tba++;
754 1.3 uch } else {
755 1.8 thorpej callout_reset(&sc->sc_rxsoft_ch, 1, txcom_txsoft, sc);
756 1.3 uch }
757 1.1 uch
758 1.1 uch return 0;
759 1.1 uch }
760 1.1 uch
761 1.3 uch void
762 1.9 uch txcom_txsoft(void *arg)
763 1.3 uch {
764 1.3 uch struct txcom_softc *sc = arg;
765 1.3 uch struct tty *tp = sc->sc_tty;
766 1.3 uch int s = spltty();
767 1.3 uch
768 1.3 uch CLR(tp->t_state, TS_BUSY);
769 1.3 uch if (ISSET(tp->t_state, TS_FLUSH)) {
770 1.3 uch CLR(tp->t_state, TS_FLUSH);
771 1.3 uch } else {
772 1.3 uch ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
773 1.3 uch }
774 1.3 uch
775 1.10 eeh (*tp->t_linesw->l_start)(tp);
776 1.3 uch
777 1.3 uch splx(s);
778 1.3 uch }
779 1.1 uch
780 1.1 uch int
781 1.9 uch txcomopen(dev_t dev, int flag, int mode, struct proc *p)
782 1.1 uch {
783 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
784 1.3 uch struct txcom_chip *chip;
785 1.3 uch struct tty *tp;
786 1.3 uch int s, err;
787 1.1 uch
788 1.3 uch if (!sc)
789 1.3 uch return ENXIO;
790 1.3 uch
791 1.3 uch chip = sc->sc_chip;
792 1.3 uch tp = sc->sc_tty;
793 1.3 uch
794 1.3 uch if (ISSET(tp->t_state, TS_ISOPEN) &&
795 1.3 uch ISSET(tp->t_state, TS_XCLUDE) &&
796 1.3 uch p->p_ucred->cr_uid != 0)
797 1.3 uch return (EBUSY);
798 1.3 uch
799 1.3 uch s = spltty();
800 1.3 uch
801 1.6 uch if (txcom_enable(sc->sc_chip)) {
802 1.6 uch splx(s);
803 1.5 uch goto out;
804 1.6 uch }
805 1.5 uch /*
806 1.5 uch * Do the following iff this is a first open.
807 1.5 uch */
808 1.5 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
809 1.5 uch struct termios t;
810 1.5 uch
811 1.5 uch tp->t_dev = dev;
812 1.1 uch
813 1.5 uch t.c_ispeed = 0;
814 1.5 uch if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
815 1.5 uch t.c_ospeed = chip->sc_speed;
816 1.5 uch t.c_cflag = chip->sc_cflag;
817 1.5 uch } else {
818 1.5 uch t.c_ospeed = TTYDEF_SPEED;
819 1.5 uch t.c_cflag = TTYDEF_CFLAG;
820 1.5 uch }
821 1.3 uch
822 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL))
823 1.5 uch SET(t.c_cflag, CLOCAL);
824 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS))
825 1.5 uch SET(t.c_cflag, CRTSCTS);
826 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF))
827 1.5 uch SET(t.c_cflag, MDMBUF);
828 1.5 uch
829 1.5 uch /* Make sure txcomparam() will do something. */
830 1.5 uch tp->t_ospeed = 0;
831 1.5 uch txcomparam(tp, &t);
832 1.5 uch
833 1.5 uch tp->t_iflag = TTYDEF_IFLAG;
834 1.5 uch tp->t_oflag = TTYDEF_OFLAG;
835 1.5 uch tp->t_lflag = TTYDEF_LFLAG;
836 1.1 uch
837 1.5 uch ttychars(tp);
838 1.5 uch ttsetwater(tp);
839 1.3 uch
840 1.5 uch /*
841 1.5 uch * Turn on DTR. We must always do this, even if carrier is not
842 1.5 uch * present, because otherwise we'd have to use TIOCSDTR
843 1.5 uch * immediately after setting CLOCAL, which applications do not
844 1.5 uch * expect. We always assert DTR while the device is open
845 1.5 uch * unless explicitly requested to deassert it.
846 1.5 uch */
847 1.5 uch txcom_modem(sc, 1);
848 1.3 uch
849 1.5 uch /* Clear the input ring, and unblock. */
850 1.5 uch sc->sc_rbget = sc->sc_rbput = 0;
851 1.5 uch }
852 1.3 uch
853 1.3 uch splx(s);
854 1.6 uch #define TXCOMDIALOUT(x) (minor(x) & 0x80000)
855 1.6 uch if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) {
856 1.15 uch DPRINTF("ttyopen failed\n");
857 1.3 uch goto out;
858 1.1 uch }
859 1.10 eeh if ((err = (*tp->t_linesw->l_open)(dev, tp))) {
860 1.15 uch DPRINTF("line dicipline open failed\n");
861 1.3 uch goto out;
862 1.3 uch }
863 1.3 uch
864 1.3 uch return err;
865 1.3 uch
866 1.3 uch out:
867 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
868 1.3 uch /*
869 1.3 uch * We failed to open the device, and nobody else had it opened.
870 1.3 uch * Clean up the state as appropriate.
871 1.3 uch */
872 1.3 uch txcom_shutdown(sc);
873 1.1 uch }
874 1.1 uch
875 1.1 uch return err;
876 1.3 uch
877 1.1 uch }
878 1.1 uch
879 1.1 uch int
880 1.9 uch txcomclose(dev_t dev, int flag, int mode, struct proc *p)
881 1.1 uch {
882 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
883 1.1 uch struct tty *tp = sc->sc_tty;
884 1.1 uch
885 1.3 uch /* XXX This is for cons.c. */
886 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN))
887 1.3 uch return 0;
888 1.3 uch
889 1.10 eeh (*tp->t_linesw->l_close)(tp, flag);
890 1.1 uch ttyclose(tp);
891 1.1 uch
892 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
893 1.3 uch /*
894 1.3 uch * Although we got a last close, the device may still be in
895 1.3 uch * use; e.g. if this was the dialout node, and there are still
896 1.3 uch * processes waiting for carrier on the non-dialout node.
897 1.3 uch */
898 1.3 uch txcom_shutdown(sc);
899 1.3 uch }
900 1.3 uch
901 1.1 uch return 0;
902 1.1 uch }
903 1.1 uch
904 1.1 uch int
905 1.9 uch txcomread(dev_t dev, struct uio *uio, int flag)
906 1.1 uch {
907 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
908 1.1 uch struct tty *tp = sc->sc_tty;
909 1.3 uch
910 1.10 eeh return ((*tp->t_linesw->l_read)(tp, uio, flag));
911 1.1 uch }
912 1.1 uch
913 1.1 uch int
914 1.9 uch txcomwrite(dev_t dev, struct uio *uio, int flag)
915 1.1 uch {
916 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
917 1.1 uch struct tty *tp = sc->sc_tty;
918 1.1 uch
919 1.10 eeh return ((*tp->t_linesw->l_write)(tp, uio, flag));
920 1.12 scw }
921 1.12 scw
922 1.12 scw int
923 1.12 scw txcompoll(dev_t dev, int events, struct proc *p)
924 1.12 scw {
925 1.12 scw struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
926 1.12 scw struct tty *tp = sc->sc_tty;
927 1.12 scw
928 1.12 scw return ((*tp->t_linesw->l_poll)(tp, events, p));
929 1.1 uch }
930 1.1 uch
931 1.1 uch struct tty *
932 1.9 uch txcomtty(dev_t dev)
933 1.1 uch {
934 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
935 1.3 uch
936 1.3 uch return sc->sc_tty;
937 1.1 uch }
938 1.1 uch
939 1.1 uch int
940 1.9 uch txcomioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
941 1.1 uch {
942 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
943 1.1 uch struct tty *tp = sc->sc_tty;
944 1.3 uch int s, err;
945 1.3 uch
946 1.10 eeh err = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
947 1.16 atatat if (err != EPASSTHROUGH) {
948 1.3 uch return err;
949 1.3 uch }
950 1.3 uch
951 1.3 uch err = ttioctl(tp, cmd, data, flag, p);
952 1.16 atatat if (err != EPASSTHROUGH) {
953 1.3 uch return err;
954 1.3 uch }
955 1.3 uch
956 1.3 uch err = 0;
957 1.3 uch
958 1.3 uch s = spltty();
959 1.3 uch
960 1.3 uch switch (cmd) {
961 1.5 uch default:
962 1.16 atatat err = EPASSTHROUGH;
963 1.5 uch break;
964 1.5 uch
965 1.3 uch case TIOCSBRK:
966 1.3 uch txcom_break(sc, 1);
967 1.3 uch break;
968 1.3 uch
969 1.3 uch case TIOCCBRK:
970 1.3 uch txcom_break(sc, 0);
971 1.3 uch break;
972 1.3 uch
973 1.3 uch case TIOCSDTR:
974 1.3 uch txcom_modem(sc, 1);
975 1.3 uch break;
976 1.3 uch
977 1.3 uch case TIOCCDTR:
978 1.3 uch txcom_modem(sc, 0);
979 1.3 uch break;
980 1.3 uch
981 1.3 uch case TIOCGFLAGS:
982 1.3 uch *(int *)data = sc->sc_chip->sc_swflags;
983 1.3 uch break;
984 1.3 uch
985 1.3 uch case TIOCSFLAGS:
986 1.3 uch err = suser(p->p_ucred, &p->p_acflag);
987 1.3 uch if (err) {
988 1.3 uch break;
989 1.3 uch }
990 1.3 uch sc->sc_chip->sc_swflags = *(int *)data;
991 1.3 uch break;
992 1.3 uch
993 1.3 uch }
994 1.1 uch
995 1.3 uch splx(s);
996 1.1 uch
997 1.3 uch return err;
998 1.1 uch }
999 1.1 uch
1000 1.1 uch void
1001 1.9 uch txcomstop(struct tty *tp, int flag)
1002 1.1 uch {
1003 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
1004 1.1 uch int s;
1005 1.1 uch
1006 1.1 uch s = spltty();
1007 1.1 uch
1008 1.1 uch if (ISSET(tp->t_state, TS_BUSY)) {
1009 1.1 uch /* Stop transmitting at the next chunk. */
1010 1.1 uch sc->sc_tbc = 0;
1011 1.1 uch sc->sc_heldtbc = 0;
1012 1.1 uch if (!ISSET(tp->t_state, TS_TTSTOP))
1013 1.1 uch SET(tp->t_state, TS_FLUSH);
1014 1.1 uch }
1015 1.3 uch
1016 1.1 uch splx(s);
1017 1.1 uch }
1018 1.1 uch
1019 1.1 uch void
1020 1.9 uch txcomstart(struct tty *tp)
1021 1.1 uch {
1022 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
1023 1.3 uch struct txcom_chip *chip = sc->sc_chip;
1024 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
1025 1.3 uch int slot = chip->sc_slot;
1026 1.1 uch int s;
1027 1.1 uch
1028 1.1 uch s = spltty();
1029 1.3 uch
1030 1.3 uch if (!__txcom_txbufready(chip, 0) ||
1031 1.3 uch ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
1032 1.3 uch goto out;
1033 1.1 uch
1034 1.1 uch if (tp->t_outq.c_cc <= tp->t_lowat) {
1035 1.1 uch if (ISSET(tp->t_state, TS_ASLEEP)) {
1036 1.1 uch CLR(tp->t_state, TS_ASLEEP);
1037 1.1 uch wakeup(&tp->t_outq);
1038 1.1 uch }
1039 1.1 uch selwakeup(&tp->t_wsel);
1040 1.1 uch if (tp->t_outq.c_cc == 0)
1041 1.3 uch goto out;
1042 1.1 uch }
1043 1.3 uch
1044 1.1 uch sc->sc_tba = tp->t_outq.c_cf;
1045 1.1 uch sc->sc_tbc = ndqb(&tp->t_outq, 0);
1046 1.3 uch SET(tp->t_state, TS_BUSY);
1047 1.3 uch
1048 1.3 uch /* Output the first character of the contiguous buffer. */
1049 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot),
1050 1.14 uch (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK));
1051 1.3 uch
1052 1.3 uch sc->sc_tbc--;
1053 1.3 uch sc->sc_tba++;
1054 1.1 uch
1055 1.3 uch out:
1056 1.1 uch splx(s);
1057 1.1 uch }
1058 1.1 uch
1059 1.3 uch /*
1060 1.3 uch * Set TXcom tty parameters from termios.
1061 1.3 uch */
1062 1.1 uch int
1063 1.9 uch txcomparam(struct tty *tp, struct termios *t)
1064 1.1 uch {
1065 1.3 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
1066 1.3 uch struct txcom_chip *chip;
1067 1.5 uch int ospeed;
1068 1.3 uch int s;
1069 1.3 uch
1070 1.3 uch if (!sc)
1071 1.3 uch return ENXIO;
1072 1.3 uch
1073 1.3 uch ospeed = t->c_ospeed;
1074 1.3 uch
1075 1.3 uch /* Check requested parameters. */
1076 1.3 uch if (ospeed < 0) {
1077 1.3 uch return EINVAL;
1078 1.3 uch }
1079 1.3 uch if (t->c_ispeed && t->c_ispeed != ospeed) {
1080 1.3 uch return EINVAL;
1081 1.3 uch }
1082 1.3 uch
1083 1.3 uch s = spltty();
1084 1.3 uch chip = sc->sc_chip;
1085 1.3 uch /*
1086 1.3 uch * For the console, always force CLOCAL and !HUPCL, so that the port
1087 1.3 uch * is always active.
1088 1.3 uch */
1089 1.3 uch if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) ||
1090 1.3 uch ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
1091 1.5 uch SET(t->c_cflag, CLOCAL);
1092 1.5 uch CLR(t->c_cflag, HUPCL);
1093 1.3 uch }
1094 1.3 uch splx(s);
1095 1.3 uch
1096 1.3 uch /*
1097 1.6 uch * If we're not in a mode that assumes a connection is present, then
1098 1.6 uch * ignore carrier changes.
1099 1.6 uch */
1100 1.6 uch if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
1101 1.6 uch chip->sc_dcd = 0;
1102 1.6 uch else
1103 1.6 uch chip->sc_dcd = 1;
1104 1.6 uch
1105 1.6 uch /*
1106 1.3 uch * Only whack the UART when params change.
1107 1.3 uch * Some callers need to clear tp->t_ospeed
1108 1.3 uch * to make sure initialization gets done.
1109 1.3 uch */
1110 1.5 uch if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) {
1111 1.3 uch return 0;
1112 1.3 uch }
1113 1.3 uch
1114 1.3 uch s = spltty();
1115 1.3 uch chip = sc->sc_chip;
1116 1.3 uch chip->sc_speed = ospeed;
1117 1.5 uch chip->sc_cflag = t->c_cflag;
1118 1.3 uch
1119 1.3 uch txcom_setmode(chip);
1120 1.3 uch txcom_setbaudrate(chip);
1121 1.6 uch
1122 1.3 uch /* And copy to tty. */
1123 1.3 uch tp->t_ispeed = 0;
1124 1.3 uch tp->t_ospeed = chip->sc_speed;
1125 1.3 uch tp->t_cflag = chip->sc_cflag;
1126 1.3 uch
1127 1.3 uch /*
1128 1.6 uch * Update the tty layer's idea of the carrier bit, in case we changed
1129 1.6 uch * CLOCAL or MDMBUF. We don't hang up here; we only do that by
1130 1.6 uch * explicit request.
1131 1.6 uch */
1132 1.10 eeh (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd);
1133 1.6 uch
1134 1.6 uch /*
1135 1.3 uch * If hardware flow control is disabled, unblock any hard flow
1136 1.3 uch * control state.
1137 1.3 uch */
1138 1.3 uch if (!ISSET(chip->sc_cflag, CHWFLOW)) {
1139 1.3 uch txcomstart(tp);
1140 1.3 uch }
1141 1.3 uch
1142 1.3 uch splx(s);
1143 1.6 uch
1144 1.6 uch return 0;
1145 1.6 uch }
1146 1.6 uch
1147 1.9 uch int
1148 1.9 uch txcom_dcd_hook(void *arg, int type, long id, void *msg)
1149 1.9 uch {
1150 1.9 uch struct txcom_softc *sc = arg;
1151 1.9 uch struct tty *tp = sc->sc_tty;
1152 1.9 uch struct txcom_chip *chip = sc->sc_chip;
1153 1.9 uch int modem = !(int)msg; /* p-edge 1, n-edge 0 */
1154 1.9 uch
1155 1.15 uch DPRINTF("DCD %s\n", modem ? "ON" : "OFF");
1156 1.9 uch
1157 1.9 uch if (modem && chip->sc_dcd)
1158 1.10 eeh (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd);
1159 1.9 uch
1160 1.9 uch return 0;
1161 1.9 uch }
1162 1.9 uch
1163 1.9 uch int
1164 1.9 uch txcom_cts_hook(void *arg, int type, long id, void *msg)
1165 1.9 uch {
1166 1.9 uch struct txcom_softc *sc = arg;
1167 1.9 uch struct tty *tp = sc->sc_tty;
1168 1.9 uch struct txcom_chip *chip = sc->sc_chip;
1169 1.9 uch int clear = !(int)msg; /* p-edge 1, n-edge 0 */
1170 1.9 uch
1171 1.15 uch DPRINTF("CTS %s\n", clear ? "ON" : "OFF");
1172 1.9 uch
1173 1.9 uch if (chip->sc_msr_cts) {
1174 1.9 uch if (!clear) {
1175 1.9 uch chip->sc_tx_stopped = 1;
1176 1.9 uch } else {
1177 1.9 uch chip->sc_tx_stopped = 0;
1178 1.10 eeh (*tp->t_linesw->l_start)(tp);
1179 1.9 uch }
1180 1.9 uch }
1181 1.9 uch
1182 1.9 uch return 0;
1183 1.9 uch }
1184 1.9 uch
1185 1.9 uch #ifdef TX39UARTDEBUG
1186 1.6 uch void
1187 1.9 uch txcom_dump(struct txcom_chip *chip)
1188 1.6 uch {
1189 1.6 uch tx_chipset_tag_t tc = chip->sc_tc;
1190 1.6 uch int slot = chip->sc_slot;
1191 1.6 uch txreg_t reg;
1192 1.6 uch
1193 1.6 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
1194 1.6 uch #define ISSETPRINT(r, m) \
1195 1.15 uch dbg_bitmask_print(r, TX39_UARTCTRL1_##m, #m)
1196 1.6 uch ISSETPRINT(reg, UARTON);
1197 1.6 uch ISSETPRINT(reg, EMPTY);
1198 1.6 uch ISSETPRINT(reg, PRXHOLDFULL);
1199 1.6 uch ISSETPRINT(reg, RXHOLDFULL);
1200 1.6 uch ISSETPRINT(reg, ENDMARX);
1201 1.6 uch ISSETPRINT(reg, ENDMATX);
1202 1.6 uch ISSETPRINT(reg, TESTMODE);
1203 1.6 uch ISSETPRINT(reg, ENBREAHALT);
1204 1.6 uch ISSETPRINT(reg, ENDMATEST);
1205 1.6 uch ISSETPRINT(reg, ENDMALOOP);
1206 1.6 uch ISSETPRINT(reg, PULSEOPT2);
1207 1.6 uch ISSETPRINT(reg, PULSEOPT1);
1208 1.6 uch ISSETPRINT(reg, DTINVERT);
1209 1.6 uch ISSETPRINT(reg, DISTXD);
1210 1.6 uch ISSETPRINT(reg, TWOSTOP);
1211 1.6 uch ISSETPRINT(reg, LOOPBACK);
1212 1.6 uch ISSETPRINT(reg, BIT7);
1213 1.6 uch ISSETPRINT(reg, EVENPARITY);
1214 1.6 uch ISSETPRINT(reg, ENPARITY);
1215 1.6 uch ISSETPRINT(reg, ENUART);
1216 1.6 uch }
1217 1.9 uch #endif /* TX39UARTDEBUG */
1218