txcom.c revision 1.36 1 1.36 thorpej /* $NetBSD: txcom.c,v 1.36 2007/02/22 05:38:03 thorpej Exp $ */
2 1.1 uch
3 1.9 uch /*-
4 1.24 uch * Copyright (c) 1999, 2000, 2004 The NetBSD Foundation, Inc.
5 1.1 uch * All rights reserved.
6 1.1 uch *
7 1.9 uch * This code is derived from software contributed to The NetBSD Foundation
8 1.9 uch * by UCHIYAMA Yasushi.
9 1.9 uch *
10 1.1 uch * Redistribution and use in source and binary forms, with or without
11 1.1 uch * modification, are permitted provided that the following conditions
12 1.1 uch * are met:
13 1.1 uch * 1. Redistributions of source code must retain the above copyright
14 1.1 uch * notice, this list of conditions and the following disclaimer.
15 1.9 uch * 2. Redistributions in binary form must reproduce the above copyright
16 1.9 uch * notice, this list of conditions and the following disclaimer in the
17 1.9 uch * documentation and/or other materials provided with the distribution.
18 1.9 uch * 3. All advertising materials mentioning features or use of this software
19 1.9 uch * must display the following acknowledgement:
20 1.9 uch * This product includes software developed by the NetBSD
21 1.9 uch * Foundation, Inc. and its contributors.
22 1.9 uch * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.9 uch * contributors may be used to endorse or promote products derived
24 1.9 uch * from this software without specific prior written permission.
25 1.1 uch *
26 1.9 uch * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.9 uch * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.9 uch * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.9 uch * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.9 uch * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.9 uch * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.9 uch * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.9 uch * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.9 uch * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.9 uch * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.9 uch * POSSIBILITY OF SUCH DAMAGE.
37 1.1 uch */
38 1.22 lukem
39 1.22 lukem #include <sys/cdefs.h>
40 1.36 thorpej __KERNEL_RCSID(0, "$NetBSD: txcom.c,v 1.36 2007/02/22 05:38:03 thorpej Exp $");
41 1.15 uch
42 1.15 uch #include "opt_tx39uart_debug.h"
43 1.1 uch
44 1.1 uch #include <sys/param.h>
45 1.1 uch #include <sys/systm.h>
46 1.3 uch #include <sys/kernel.h>
47 1.1 uch #include <sys/device.h>
48 1.3 uch #include <sys/malloc.h>
49 1.30 elad #include <sys/kauth.h>
50 1.1 uch
51 1.1 uch #include <sys/proc.h> /* tsleep/wakeup */
52 1.1 uch
53 1.1 uch #include <sys/ioctl.h>
54 1.1 uch #include <sys/select.h>
55 1.1 uch #include <sys/file.h>
56 1.1 uch
57 1.1 uch #include <sys/tty.h>
58 1.1 uch #include <sys/conf.h>
59 1.1 uch #include <dev/cons.h> /* consdev */
60 1.1 uch
61 1.1 uch #include <machine/bus.h>
62 1.9 uch #include <machine/config_hook.h>
63 1.1 uch
64 1.1 uch #include <hpcmips/tx/tx39var.h>
65 1.1 uch #include <hpcmips/tx/tx39icureg.h>
66 1.1 uch #include <hpcmips/tx/tx39uartvar.h>
67 1.1 uch #include <hpcmips/tx/tx39uartreg.h>
68 1.1 uch
69 1.5 uch #include <hpcmips/tx/tx39irvar.h>
70 1.5 uch
71 1.1 uch #include <hpcmips/tx/tx39clockreg.h> /* XXX */
72 1.6 uch
73 1.9 uch /*
74 1.9 uch * UARTA channel has DTR, DSR, RTS, CTS lines. and they wired to MFIO/IO port.
75 1.9 uch */
76 1.9 uch #define IS_COM0(s) ((s) == 0)
77 1.9 uch #define IS_COM1(s) ((s) == 1)
78 1.9 uch #define ON ((void *)1)
79 1.9 uch #define OFF ((void *)0)
80 1.1 uch
81 1.15 uch #ifdef TX39UART_DEBUG
82 1.15 uch #define DPRINTF_ENABLE
83 1.15 uch #define DPRINTF_DEBUG tx39uart_debug
84 1.1 uch #endif
85 1.15 uch #include <machine/debug.h>
86 1.1 uch
87 1.3 uch #define TXCOM_HW_CONSOLE 0x40
88 1.3 uch #define TXCOM_RING_SIZE 256 /* must be a power of two! */
89 1.3 uch #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1)
90 1.1 uch
91 1.3 uch struct txcom_chip {
92 1.1 uch tx_chipset_tag_t sc_tc;
93 1.1 uch int sc_slot; /* UARTA or UARTB */
94 1.1 uch int sc_cflag;
95 1.1 uch int sc_speed;
96 1.3 uch int sc_swflags;
97 1.1 uch int sc_hwflags;
98 1.6 uch
99 1.6 uch int sc_dcd;
100 1.9 uch int sc_msr_cts;
101 1.9 uch int sc_tx_stopped;
102 1.3 uch };
103 1.1 uch
104 1.3 uch struct txcom_softc {
105 1.3 uch struct device sc_dev;
106 1.3 uch struct tty *sc_tty;
107 1.3 uch struct txcom_chip *sc_chip;
108 1.3 uch
109 1.8 thorpej struct callout sc_txsoft_ch;
110 1.8 thorpej struct callout sc_rxsoft_ch;
111 1.8 thorpej
112 1.3 uch u_int8_t *sc_tba; /* transmit buffer address */
113 1.3 uch int sc_tbc; /* transmit byte count */
114 1.3 uch int sc_heldtbc;
115 1.3 uch u_int8_t *sc_rbuf; /* receive buffer address */
116 1.3 uch int sc_rbput; /* receive byte count */
117 1.3 uch int sc_rbget;
118 1.1 uch };
119 1.1 uch
120 1.1 uch extern struct cfdriver txcom_cd;
121 1.1 uch
122 1.9 uch int txcom_match(struct device *, struct cfdata *, void *);
123 1.9 uch void txcom_attach(struct device *, struct device *, void *);
124 1.9 uch int txcom_print(void*, const char *);
125 1.9 uch
126 1.9 uch int txcom_txintr(void *);
127 1.9 uch int txcom_rxintr(void *);
128 1.9 uch int txcom_frameerr_intr(void *);
129 1.9 uch int txcom_parityerr_intr(void *);
130 1.9 uch int txcom_break_intr(void *);
131 1.3 uch
132 1.9 uch void txcom_rxsoft(void *);
133 1.9 uch void txcom_txsoft(void *);
134 1.3 uch
135 1.9 uch int txcom_stsoft(void *);
136 1.9 uch int txcom_stsoft2(void *);
137 1.9 uch int txcom_stsoft3(void *);
138 1.9 uch int txcom_stsoft4(void *);
139 1.9 uch
140 1.9 uch
141 1.9 uch void txcom_shutdown(struct txcom_softc *);
142 1.9 uch void txcom_break(struct txcom_softc *, int);
143 1.9 uch void txcom_modem(struct txcom_softc *, int);
144 1.9 uch void txcomstart(struct tty *);
145 1.9 uch int txcomparam(struct tty *, struct termios *);
146 1.9 uch
147 1.9 uch void txcom_reset (struct txcom_chip *);
148 1.35 thorpej int txcom_enable (struct txcom_chip *, bool);
149 1.9 uch void txcom_disable (struct txcom_chip *);
150 1.9 uch void txcom_setmode (struct txcom_chip *);
151 1.9 uch void txcom_setbaudrate(struct txcom_chip *);
152 1.9 uch int txcom_cngetc (dev_t);
153 1.9 uch void txcom_cnputc (dev_t, int);
154 1.9 uch void txcom_cnpollc (dev_t, int);
155 1.3 uch
156 1.9 uch int txcom_dcd_hook(void *, int, long, void *);
157 1.9 uch int txcom_cts_hook(void *, int, long, void *);
158 1.1 uch
159 1.9 uch
160 1.27 perry inline int __txcom_txbufready(struct txcom_chip *, int);
161 1.9 uch const char *__txcom_slotname(int);
162 1.9 uch
163 1.9 uch #ifdef TX39UARTDEBUG
164 1.9 uch void txcom_dump(struct txcom_chip *);
165 1.9 uch #endif
166 1.6 uch
167 1.3 uch struct consdev txcomcons = {
168 1.21 nakayama NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc, NULL, NULL,
169 1.14 uch NULL, NODEV, CN_NORMAL
170 1.3 uch };
171 1.3 uch
172 1.1 uch /* Serial console */
173 1.3 uch struct txcom_chip txcom_chip;
174 1.1 uch
175 1.19 thorpej CFATTACH_DECL(txcom, sizeof(struct txcom_softc),
176 1.19 thorpej txcom_match, txcom_attach, NULL, NULL);
177 1.1 uch
178 1.17 gehenna dev_type_open(txcomopen);
179 1.17 gehenna dev_type_close(txcomclose);
180 1.17 gehenna dev_type_read(txcomread);
181 1.17 gehenna dev_type_write(txcomwrite);
182 1.17 gehenna dev_type_ioctl(txcomioctl);
183 1.17 gehenna dev_type_stop(txcomstop);
184 1.17 gehenna dev_type_tty(txcomtty);
185 1.17 gehenna dev_type_poll(txcompoll);
186 1.17 gehenna
187 1.17 gehenna const struct cdevsw txcom_cdevsw = {
188 1.17 gehenna txcomopen, txcomclose, txcomread, txcomwrite, txcomioctl,
189 1.20 jdolecek txcomstop, txcomtty, txcompoll, nommap, ttykqfilter, D_TTY
190 1.17 gehenna };
191 1.17 gehenna
192 1.1 uch int
193 1.1 uch txcom_match(parent, cf, aux)
194 1.1 uch struct device *parent;
195 1.1 uch struct cfdata *cf;
196 1.1 uch void *aux;
197 1.1 uch {
198 1.1 uch /* if the autoconfiguration got this far, there's a slot here */
199 1.1 uch return 1;
200 1.1 uch }
201 1.1 uch
202 1.1 uch void
203 1.9 uch txcom_attach(struct device *parent, struct device *self, void *aux)
204 1.1 uch {
205 1.1 uch struct tx39uart_attach_args *ua = aux;
206 1.1 uch struct txcom_softc *sc = (void*)self;
207 1.1 uch tx_chipset_tag_t tc;
208 1.1 uch struct tty *tp;
209 1.3 uch struct txcom_chip *chip;
210 1.6 uch int slot, console;
211 1.1 uch
212 1.1 uch /* Check this slot used as serial console */
213 1.6 uch console = (ua->ua_slot == txcom_chip.sc_slot) &&
214 1.14 uch (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE);
215 1.6 uch
216 1.6 uch if (console) {
217 1.3 uch sc->sc_chip = &txcom_chip;
218 1.3 uch } else {
219 1.3 uch if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip),
220 1.14 uch M_DEVBUF, M_WAITOK))) {
221 1.3 uch printf(": can't allocate chip\n");
222 1.3 uch return;
223 1.3 uch }
224 1.3 uch memset(sc->sc_chip, 0, sizeof(struct txcom_chip));
225 1.1 uch }
226 1.1 uch
227 1.3 uch chip = sc->sc_chip;
228 1.3 uch tc = chip->sc_tc = ua->ua_tc;
229 1.3 uch slot = chip->sc_slot = ua->ua_slot;
230 1.3 uch
231 1.6 uch #ifdef TX39UARTDEBUG
232 1.6 uch txcom_dump(chip);
233 1.6 uch #endif
234 1.6 uch if (!console)
235 1.6 uch txcom_reset(chip);
236 1.6 uch
237 1.3 uch if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) {
238 1.3 uch printf(": can't allocate buffer.\n");
239 1.3 uch return;
240 1.3 uch }
241 1.3 uch memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE);
242 1.1 uch
243 1.1 uch tp = ttymalloc();
244 1.1 uch tp->t_oproc = txcomstart;
245 1.1 uch tp->t_param = txcomparam;
246 1.1 uch tp->t_hwiflow = NULL;
247 1.1 uch sc->sc_tty = tp;
248 1.1 uch tty_attach(tp);
249 1.1 uch
250 1.3 uch if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
251 1.1 uch int maj;
252 1.1 uch /* locate the major number */
253 1.17 gehenna maj = cdevsw_lookup_major(&txcom_cdevsw);
254 1.1 uch
255 1.29 thorpej cn_tab->cn_dev = makedev(maj, device_unit(&sc->sc_dev));
256 1.1 uch
257 1.3 uch printf(": console");
258 1.1 uch }
259 1.1 uch
260 1.3 uch printf("\n");
261 1.1 uch
262 1.1 uch /*
263 1.1 uch * Enable interrupt
264 1.1 uch */
265 1.3 uch #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s))
266 1.3 uch
267 1.3 uch tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY,
268 1.14 uch txcom_rxintr, sc);
269 1.3 uch tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY,
270 1.14 uch txcom_txintr, sc);
271 1.3 uch tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY,
272 1.14 uch txcom_rxintr, sc);
273 1.3 uch tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY,
274 1.14 uch txcom_txintr, sc);
275 1.3 uch tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY,
276 1.14 uch txcom_frameerr_intr, sc);
277 1.3 uch tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY,
278 1.14 uch txcom_parityerr_intr, sc);
279 1.3 uch tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY,
280 1.14 uch txcom_break_intr, sc);
281 1.5 uch
282 1.9 uch /*
283 1.9 uch * UARTA has external signal line. (its wiring is platform dependent)
284 1.9 uch */
285 1.9 uch if (IS_COM0(slot)) {
286 1.9 uch /* install DCD, CTS hooks. */
287 1.11 sato config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_DCD,
288 1.14 uch CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc);
289 1.11 sato config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_CTS,
290 1.14 uch CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc);
291 1.9 uch }
292 1.6 uch
293 1.5 uch /*
294 1.5 uch * UARTB can connect IR module
295 1.5 uch */
296 1.9 uch if (IS_COM1(slot)) {
297 1.5 uch struct txcom_attach_args tca;
298 1.5 uch tca.tca_tc = tc;
299 1.5 uch tca.tca_parent = self;
300 1.5 uch config_found(self, &tca, txcom_print);
301 1.5 uch }
302 1.5 uch }
303 1.5 uch
304 1.5 uch int
305 1.9 uch txcom_print(void *aux, const char *pnp)
306 1.5 uch {
307 1.5 uch return pnp ? QUIET : UNCONF;
308 1.1 uch }
309 1.1 uch
310 1.6 uch void
311 1.9 uch txcom_reset(struct txcom_chip *chip)
312 1.6 uch {
313 1.6 uch tx_chipset_tag_t tc;
314 1.6 uch int slot, ofs;
315 1.6 uch txreg_t reg;
316 1.6 uch
317 1.6 uch tc = chip->sc_tc;
318 1.6 uch slot = chip->sc_slot;
319 1.6 uch ofs = TX39_UARTCTRL1_REG(slot);
320 1.6 uch
321 1.6 uch /* Supply clock */
322 1.6 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
323 1.6 uch reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
324 1.6 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
325 1.6 uch
326 1.6 uch /* reset UART module */
327 1.6 uch tx_conf_write(tc, ofs, 0);
328 1.6 uch }
329 1.6 uch
330 1.1 uch int
331 1.35 thorpej txcom_enable(struct txcom_chip *chip, bool console)
332 1.1 uch {
333 1.1 uch tx_chipset_tag_t tc;
334 1.1 uch txreg_t reg;
335 1.3 uch int slot, ofs, timeout;
336 1.1 uch
337 1.3 uch tc = chip->sc_tc;
338 1.3 uch slot = chip->sc_slot;
339 1.3 uch ofs = TX39_UARTCTRL1_REG(slot);
340 1.1 uch
341 1.24 uch /*
342 1.24 uch * External power supply (if any)
343 1.24 uch * When serial console, Windows CE already powered on it.
344 1.24 uch */
345 1.24 uch if (!console) {
346 1.24 uch config_hook_call(CONFIG_HOOK_POWERCONTROL,
347 1.24 uch CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON);
348 1.24 uch delay(3);
349 1.24 uch }
350 1.9 uch
351 1.6 uch /* Supply clock */
352 1.5 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
353 1.5 uch reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
354 1.5 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
355 1.5 uch
356 1.6 uch /*
357 1.6 uch * XXX Disable DMA (DMA not coded yet)
358 1.6 uch */
359 1.6 uch reg = tx_conf_read(tc, ofs);
360 1.6 uch reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
361 1.6 uch tx_conf_write(tc, ofs, reg);
362 1.6 uch
363 1.6 uch /* enable */
364 1.3 uch reg = tx_conf_read(tc, ofs);
365 1.1 uch reg |= TX39_UARTCTRL1_ENUART;
366 1.1 uch reg &= ~TX39_UARTCTRL1_ENBREAHALT;
367 1.3 uch tx_conf_write(tc, ofs, reg);
368 1.3 uch
369 1.9 uch timeout = 100000;
370 1.3 uch
371 1.3 uch while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) &&
372 1.14 uch --timeout > 0)
373 1.3 uch ;
374 1.3 uch
375 1.5 uch if (timeout == 0 && !cold) {
376 1.6 uch printf("%s never power up\n", __txcom_slotname(slot));
377 1.3 uch return 1;
378 1.3 uch }
379 1.3 uch
380 1.1 uch return 0;
381 1.1 uch }
382 1.1 uch
383 1.1 uch void
384 1.9 uch txcom_disable(struct txcom_chip *chip)
385 1.1 uch {
386 1.1 uch tx_chipset_tag_t tc;
387 1.1 uch txreg_t reg;
388 1.1 uch int slot;
389 1.1 uch
390 1.3 uch tc = chip->sc_tc;
391 1.3 uch slot = chip->sc_slot;
392 1.1 uch
393 1.1 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
394 1.1 uch /* DMA */
395 1.1 uch reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
396 1.3 uch
397 1.6 uch /* disable module */
398 1.1 uch reg &= ~TX39_UARTCTRL1_ENUART;
399 1.1 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
400 1.3 uch
401 1.1 uch /* Clock */
402 1.1 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
403 1.1 uch reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
404 1.1 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
405 1.1 uch
406 1.1 uch }
407 1.1 uch
408 1.27 perry inline int
409 1.9 uch __txcom_txbufready(struct txcom_chip *chip, int retry)
410 1.3 uch {
411 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
412 1.3 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
413 1.3 uch
414 1.3 uch do {
415 1.3 uch if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY)
416 1.3 uch return 1;
417 1.3 uch } while(--retry != 0);
418 1.3 uch
419 1.1 uch return 0;
420 1.1 uch }
421 1.1 uch
422 1.5 uch void
423 1.9 uch txcom_pulse_mode(struct device *dev)
424 1.5 uch {
425 1.5 uch struct txcom_softc *sc = (void*)dev;
426 1.5 uch struct txcom_chip *chip = sc->sc_chip;
427 1.5 uch tx_chipset_tag_t tc = chip->sc_tc;
428 1.5 uch int ofs;
429 1.5 uch txreg_t reg;
430 1.5 uch
431 1.5 uch ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
432 1.5 uch
433 1.5 uch reg = tx_conf_read(tc, ofs);
434 1.6 uch /* WindowsCE use this setting */
435 1.6 uch reg |= TX39_UARTCTRL1_PULSEOPT1;
436 1.6 uch reg &= ~TX39_UARTCTRL1_PULSEOPT2;
437 1.6 uch reg |= TX39_UARTCTRL1_DTINVERT;
438 1.6 uch
439 1.5 uch tx_conf_write(tc, ofs, reg);
440 1.5 uch }
441 1.5 uch
442 1.3 uch /*
443 1.3 uch * console
444 1.3 uch */
445 1.1 uch int
446 1.9 uch txcom_cngetc(dev_t dev)
447 1.1 uch {
448 1.1 uch tx_chipset_tag_t tc;
449 1.2 uch int ofs, c, s;
450 1.2 uch
451 1.3 uch s = spltty();
452 1.2 uch
453 1.3 uch tc = txcom_chip.sc_tc;
454 1.3 uch ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot);
455 1.1 uch
456 1.1 uch while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs)))
457 1.1 uch ;
458 1.2 uch
459 1.3 uch c = TX39_UARTRXHOLD_RXDATA(
460 1.3 uch tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot)));
461 1.2 uch
462 1.3 uch if (c == '\r')
463 1.1 uch c = '\n';
464 1.1 uch
465 1.2 uch splx(s);
466 1.2 uch
467 1.1 uch return c;
468 1.1 uch }
469 1.1 uch
470 1.1 uch void
471 1.9 uch txcom_cnputc(dev_t dev, int c)
472 1.1 uch {
473 1.3 uch struct txcom_chip *chip = &txcom_chip;
474 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
475 1.3 uch int s;
476 1.2 uch
477 1.3 uch s = spltty();
478 1.1 uch
479 1.3 uch /* Wait for transmitter to empty */
480 1.3 uch __txcom_txbufready(chip, -1);
481 1.1 uch
482 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
483 1.14 uch (c & TX39_UARTTXHOLD_TXDATA_MASK));
484 1.1 uch
485 1.3 uch __txcom_txbufready(chip, -1);
486 1.3 uch
487 1.2 uch splx(s);
488 1.1 uch }
489 1.1 uch
490 1.1 uch void
491 1.9 uch txcom_cnpollc(dev_t dev, int on)
492 1.1 uch {
493 1.1 uch }
494 1.1 uch
495 1.1 uch void
496 1.9 uch txcom_setmode(struct txcom_chip *chip)
497 1.1 uch {
498 1.3 uch tcflag_t cflag = chip->sc_cflag;
499 1.3 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
500 1.1 uch txreg_t reg;
501 1.1 uch
502 1.3 uch reg = tx_conf_read(chip->sc_tc, ofs);
503 1.6 uch reg &= ~TX39_UARTCTRL1_ENUART;
504 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg);
505 1.6 uch
506 1.1 uch switch (ISSET(cflag, CSIZE)) {
507 1.1 uch default:
508 1.1 uch printf("txcom_setmode: CS7, CS8 only. use CS7");
509 1.1 uch /* FALL THROUGH */
510 1.1 uch case CS7:
511 1.1 uch reg |= TX39_UARTCTRL1_BIT7;
512 1.1 uch break;
513 1.1 uch case CS8:
514 1.1 uch reg &= ~TX39_UARTCTRL1_BIT7;
515 1.1 uch break;
516 1.1 uch }
517 1.3 uch
518 1.1 uch if (ISSET(cflag, PARENB)) {
519 1.1 uch reg |= TX39_UARTCTRL1_ENPARITY;
520 1.1 uch if (ISSET(cflag, PARODD)) {
521 1.1 uch reg &= ~TX39_UARTCTRL1_EVENPARITY;
522 1.1 uch } else {
523 1.1 uch reg |= TX39_UARTCTRL1_EVENPARITY;
524 1.1 uch }
525 1.1 uch } else {
526 1.1 uch reg &= ~TX39_UARTCTRL1_ENPARITY;
527 1.1 uch }
528 1.3 uch
529 1.6 uch if (ISSET(cflag, CSTOPB))
530 1.1 uch reg |= TX39_UARTCTRL1_TWOSTOP;
531 1.6 uch else
532 1.6 uch reg &= ~TX39_UARTCTRL1_TWOSTOP;
533 1.6 uch
534 1.6 uch reg |= TX39_UARTCTRL1_ENUART;
535 1.3 uch tx_conf_write(chip->sc_tc, ofs, reg);
536 1.3 uch }
537 1.3 uch
538 1.3 uch void
539 1.9 uch txcom_setbaudrate(struct txcom_chip *chip)
540 1.3 uch {
541 1.3 uch int baudrate;
542 1.6 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
543 1.6 uch txreg_t reg, reg1;
544 1.3 uch
545 1.3 uch if (chip->sc_speed == 0)
546 1.3 uch return;
547 1.3 uch
548 1.5 uch if (!cold)
549 1.15 uch DPRINTF("%d\n", chip->sc_speed);
550 1.5 uch
551 1.6 uch reg1 = tx_conf_read(chip->sc_tc, ofs);
552 1.6 uch reg1 &= ~TX39_UARTCTRL1_ENUART;
553 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg1);
554 1.6 uch
555 1.3 uch baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1;
556 1.3 uch reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate);
557 1.3 uch
558 1.3 uch tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg);
559 1.6 uch
560 1.6 uch reg1 |= TX39_UARTCTRL1_ENUART;
561 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg1);
562 1.3 uch }
563 1.3 uch
564 1.3 uch int
565 1.9 uch txcom_cnattach(int slot, int speed, int cflag)
566 1.3 uch {
567 1.3 uch cn_tab = &txcomcons;
568 1.3 uch
569 1.3 uch txcom_chip.sc_tc = tx_conf_get_tag();
570 1.3 uch txcom_chip.sc_slot = slot;
571 1.3 uch txcom_chip.sc_cflag = cflag;
572 1.3 uch txcom_chip.sc_speed = speed;
573 1.3 uch txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE;
574 1.6 uch #if notyet
575 1.6 uch txcom_reset(&txcom_chip);
576 1.6 uch #endif
577 1.6 uch txcom_setmode(&txcom_chip);
578 1.6 uch txcom_setbaudrate(&txcom_chip);
579 1.3 uch
580 1.36 thorpej if (txcom_enable(&txcom_chip, true) != 0)
581 1.5 uch return 1;
582 1.5 uch
583 1.3 uch return 0;
584 1.3 uch }
585 1.3 uch
586 1.3 uch /*
587 1.3 uch * tty
588 1.3 uch */
589 1.3 uch void
590 1.9 uch txcom_break(struct txcom_softc *sc, int on)
591 1.3 uch {
592 1.3 uch struct txcom_chip *chip = sc->sc_chip;
593 1.1 uch
594 1.3 uch tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
595 1.14 uch on ? TX39_UARTTXHOLD_BREAK : 0);
596 1.1 uch }
597 1.1 uch
598 1.1 uch void
599 1.9 uch txcom_modem(struct txcom_softc *sc, int on)
600 1.1 uch {
601 1.3 uch struct txcom_chip *chip = sc->sc_chip;
602 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
603 1.3 uch int slot = chip->sc_slot;
604 1.1 uch txreg_t reg;
605 1.1 uch
606 1.9 uch /* assert DTR */
607 1.9 uch if (IS_COM0(slot)) {
608 1.11 sato config_hook_call(CONFIG_HOOK_SET,
609 1.14 uch CONFIG_HOOK_COM0_DTR,
610 1.14 uch (void *)on);
611 1.9 uch }
612 1.9 uch
613 1.3 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
614 1.6 uch reg &= ~TX39_UARTCTRL1_ENUART;
615 1.6 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
616 1.3 uch
617 1.3 uch if (on) {
618 1.3 uch reg &= ~TX39_UARTCTRL1_DISTXD;
619 1.3 uch } else {
620 1.6 uch reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */
621 1.3 uch }
622 1.6 uch
623 1.6 uch reg |= TX39_UARTCTRL1_ENUART;
624 1.6 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
625 1.1 uch }
626 1.1 uch
627 1.1 uch void
628 1.9 uch txcom_shutdown(struct txcom_softc *sc)
629 1.1 uch {
630 1.1 uch struct tty *tp = sc->sc_tty;
631 1.3 uch int s = spltty();
632 1.1 uch
633 1.3 uch /* Clear any break condition set with TIOCSBRK. */
634 1.3 uch txcom_break(sc, 0);
635 1.3 uch
636 1.3 uch /*
637 1.3 uch * Hang up if necessary. Wait a bit, so the other side has time to
638 1.3 uch * notice even if we immediately open the port again.
639 1.3 uch */
640 1.3 uch if (ISSET(tp->t_cflag, HUPCL)) {
641 1.3 uch txcom_modem(sc, 0);
642 1.3 uch (void) tsleep(sc, TTIPRI, ttclos, hz);
643 1.3 uch }
644 1.3 uch
645 1.3 uch
646 1.3 uch /* Turn off interrupts if not the console. */
647 1.3 uch if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
648 1.3 uch txcom_disable(sc->sc_chip);
649 1.3 uch }
650 1.1 uch
651 1.3 uch splx(s);
652 1.3 uch }
653 1.1 uch
654 1.9 uch const char *
655 1.9 uch __txcom_slotname(int slot)
656 1.3 uch {
657 1.9 uch static const char *slotname[] = {"UARTA", "UARTB", "unknown"};
658 1.9 uch
659 1.9 uch if (slot != 0 && slot != 1)
660 1.9 uch return slotname[2];
661 1.9 uch
662 1.9 uch return slotname[slot];
663 1.2 uch }
664 1.2 uch
665 1.2 uch int
666 1.9 uch txcom_frameerr_intr(void *arg)
667 1.3 uch {
668 1.3 uch struct txcom_softc *sc = arg;
669 1.3 uch
670 1.3 uch printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot));
671 1.3 uch
672 1.3 uch return 0;
673 1.3 uch }
674 1.3 uch
675 1.3 uch int
676 1.9 uch txcom_parityerr_intr(void *arg)
677 1.3 uch {
678 1.3 uch struct txcom_softc *sc = arg;
679 1.3 uch
680 1.3 uch printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot));
681 1.2 uch
682 1.2 uch return 0;
683 1.1 uch }
684 1.1 uch
685 1.1 uch int
686 1.9 uch txcom_break_intr(void *arg)
687 1.1 uch {
688 1.1 uch struct txcom_softc *sc = arg;
689 1.3 uch
690 1.3 uch printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot));
691 1.3 uch
692 1.3 uch return 0;
693 1.3 uch }
694 1.3 uch
695 1.3 uch int
696 1.9 uch txcom_rxintr(void *arg)
697 1.3 uch {
698 1.3 uch struct txcom_softc *sc = arg;
699 1.3 uch struct txcom_chip *chip = sc->sc_chip;
700 1.1 uch u_int8_t c;
701 1.1 uch
702 1.3 uch c = TX39_UARTRXHOLD_RXDATA(
703 1.3 uch tx_conf_read(chip->sc_tc,
704 1.14 uch TX39_UARTRXHOLD_REG(chip->sc_slot)));
705 1.3 uch
706 1.3 uch sc->sc_rbuf[sc->sc_rbput] = c;
707 1.3 uch sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK;
708 1.3 uch
709 1.8 thorpej callout_reset(&sc->sc_rxsoft_ch, 1, txcom_rxsoft, sc);
710 1.1 uch
711 1.1 uch return 0;
712 1.1 uch }
713 1.1 uch
714 1.3 uch void
715 1.9 uch txcom_rxsoft(void *arg)
716 1.3 uch {
717 1.3 uch struct txcom_softc *sc = arg;
718 1.3 uch struct tty *tp = sc->sc_tty;
719 1.14 uch int (*rint)(int, struct tty *);
720 1.3 uch int code;
721 1.3 uch int s, end, get;
722 1.3 uch
723 1.10 eeh rint = tp->t_linesw->l_rint;
724 1.3 uch
725 1.3 uch s = spltty();
726 1.3 uch end = sc->sc_rbput;
727 1.3 uch get = sc->sc_rbget;
728 1.3 uch
729 1.3 uch while (get != end) {
730 1.3 uch code = sc->sc_rbuf[get];
731 1.3 uch
732 1.3 uch if ((*rint)(code, tp) == -1) {
733 1.3 uch /*
734 1.3 uch * The line discipline's buffer is out of space.
735 1.3 uch */
736 1.3 uch }
737 1.3 uch get = (get + 1) % TXCOM_RING_MASK;
738 1.3 uch }
739 1.3 uch sc->sc_rbget = get;
740 1.3 uch
741 1.3 uch splx(s);
742 1.3 uch }
743 1.3 uch
744 1.1 uch int
745 1.9 uch txcom_txintr(void *arg)
746 1.1 uch {
747 1.1 uch struct txcom_softc *sc = arg;
748 1.3 uch struct txcom_chip *chip = sc->sc_chip;
749 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
750 1.1 uch
751 1.3 uch if (sc->sc_tbc > 0) {
752 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
753 1.14 uch (*sc->sc_tba &
754 1.14 uch TX39_UARTTXHOLD_TXDATA_MASK));
755 1.3 uch sc->sc_tbc--;
756 1.3 uch sc->sc_tba++;
757 1.3 uch } else {
758 1.8 thorpej callout_reset(&sc->sc_rxsoft_ch, 1, txcom_txsoft, sc);
759 1.3 uch }
760 1.1 uch
761 1.1 uch return 0;
762 1.1 uch }
763 1.1 uch
764 1.3 uch void
765 1.9 uch txcom_txsoft(void *arg)
766 1.3 uch {
767 1.3 uch struct txcom_softc *sc = arg;
768 1.3 uch struct tty *tp = sc->sc_tty;
769 1.3 uch int s = spltty();
770 1.3 uch
771 1.3 uch CLR(tp->t_state, TS_BUSY);
772 1.3 uch if (ISSET(tp->t_state, TS_FLUSH)) {
773 1.3 uch CLR(tp->t_state, TS_FLUSH);
774 1.3 uch } else {
775 1.3 uch ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
776 1.3 uch }
777 1.3 uch
778 1.10 eeh (*tp->t_linesw->l_start)(tp);
779 1.3 uch
780 1.3 uch splx(s);
781 1.3 uch }
782 1.1 uch
783 1.1 uch int
784 1.26 christos txcomopen(dev_t dev, int flag, int mode, struct lwp *l)
785 1.1 uch {
786 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
787 1.3 uch struct txcom_chip *chip;
788 1.3 uch struct tty *tp;
789 1.23 shin int s, err = ENXIO;
790 1.1 uch
791 1.3 uch if (!sc)
792 1.23 shin return err;
793 1.3 uch
794 1.3 uch chip = sc->sc_chip;
795 1.3 uch tp = sc->sc_tty;
796 1.3 uch
797 1.32 elad if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp))
798 1.3 uch return (EBUSY);
799 1.3 uch
800 1.3 uch s = spltty();
801 1.3 uch
802 1.36 thorpej if (txcom_enable(sc->sc_chip, false)) {
803 1.6 uch splx(s);
804 1.5 uch goto out;
805 1.6 uch }
806 1.5 uch /*
807 1.5 uch * Do the following iff this is a first open.
808 1.5 uch */
809 1.5 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
810 1.5 uch struct termios t;
811 1.5 uch
812 1.5 uch tp->t_dev = dev;
813 1.1 uch
814 1.5 uch t.c_ispeed = 0;
815 1.5 uch if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
816 1.5 uch t.c_ospeed = chip->sc_speed;
817 1.5 uch t.c_cflag = chip->sc_cflag;
818 1.5 uch } else {
819 1.5 uch t.c_ospeed = TTYDEF_SPEED;
820 1.5 uch t.c_cflag = TTYDEF_CFLAG;
821 1.5 uch }
822 1.3 uch
823 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL))
824 1.5 uch SET(t.c_cflag, CLOCAL);
825 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS))
826 1.5 uch SET(t.c_cflag, CRTSCTS);
827 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF))
828 1.5 uch SET(t.c_cflag, MDMBUF);
829 1.5 uch
830 1.5 uch /* Make sure txcomparam() will do something. */
831 1.5 uch tp->t_ospeed = 0;
832 1.5 uch txcomparam(tp, &t);
833 1.5 uch
834 1.5 uch tp->t_iflag = TTYDEF_IFLAG;
835 1.5 uch tp->t_oflag = TTYDEF_OFLAG;
836 1.5 uch tp->t_lflag = TTYDEF_LFLAG;
837 1.1 uch
838 1.5 uch ttychars(tp);
839 1.5 uch ttsetwater(tp);
840 1.3 uch
841 1.5 uch /*
842 1.5 uch * Turn on DTR. We must always do this, even if carrier is not
843 1.5 uch * present, because otherwise we'd have to use TIOCSDTR
844 1.5 uch * immediately after setting CLOCAL, which applications do not
845 1.5 uch * expect. We always assert DTR while the device is open
846 1.5 uch * unless explicitly requested to deassert it.
847 1.5 uch */
848 1.5 uch txcom_modem(sc, 1);
849 1.3 uch
850 1.5 uch /* Clear the input ring, and unblock. */
851 1.5 uch sc->sc_rbget = sc->sc_rbput = 0;
852 1.5 uch }
853 1.3 uch
854 1.3 uch splx(s);
855 1.6 uch #define TXCOMDIALOUT(x) (minor(x) & 0x80000)
856 1.6 uch if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) {
857 1.15 uch DPRINTF("ttyopen failed\n");
858 1.3 uch goto out;
859 1.1 uch }
860 1.10 eeh if ((err = (*tp->t_linesw->l_open)(dev, tp))) {
861 1.15 uch DPRINTF("line dicipline open failed\n");
862 1.3 uch goto out;
863 1.3 uch }
864 1.3 uch
865 1.3 uch return err;
866 1.3 uch
867 1.3 uch out:
868 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
869 1.3 uch /*
870 1.3 uch * We failed to open the device, and nobody else had it opened.
871 1.3 uch * Clean up the state as appropriate.
872 1.3 uch */
873 1.3 uch txcom_shutdown(sc);
874 1.1 uch }
875 1.1 uch
876 1.1 uch return err;
877 1.3 uch
878 1.1 uch }
879 1.1 uch
880 1.1 uch int
881 1.26 christos txcomclose(dev_t dev, int flag, int mode, struct lwp *l)
882 1.1 uch {
883 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
884 1.1 uch struct tty *tp = sc->sc_tty;
885 1.1 uch
886 1.3 uch /* XXX This is for cons.c. */
887 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN))
888 1.3 uch return 0;
889 1.3 uch
890 1.10 eeh (*tp->t_linesw->l_close)(tp, flag);
891 1.1 uch ttyclose(tp);
892 1.1 uch
893 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
894 1.3 uch /*
895 1.3 uch * Although we got a last close, the device may still be in
896 1.3 uch * use; e.g. if this was the dialout node, and there are still
897 1.3 uch * processes waiting for carrier on the non-dialout node.
898 1.3 uch */
899 1.3 uch txcom_shutdown(sc);
900 1.3 uch }
901 1.3 uch
902 1.1 uch return 0;
903 1.1 uch }
904 1.1 uch
905 1.1 uch int
906 1.9 uch txcomread(dev_t dev, struct uio *uio, int flag)
907 1.1 uch {
908 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
909 1.1 uch struct tty *tp = sc->sc_tty;
910 1.3 uch
911 1.10 eeh return ((*tp->t_linesw->l_read)(tp, uio, flag));
912 1.1 uch }
913 1.1 uch
914 1.1 uch int
915 1.9 uch txcomwrite(dev_t dev, struct uio *uio, int flag)
916 1.1 uch {
917 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
918 1.1 uch struct tty *tp = sc->sc_tty;
919 1.1 uch
920 1.10 eeh return ((*tp->t_linesw->l_write)(tp, uio, flag));
921 1.12 scw }
922 1.12 scw
923 1.12 scw int
924 1.26 christos txcompoll(dev_t dev, int events, struct lwp *l)
925 1.12 scw {
926 1.12 scw struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
927 1.12 scw struct tty *tp = sc->sc_tty;
928 1.12 scw
929 1.26 christos return ((*tp->t_linesw->l_poll)(tp, events, l));
930 1.1 uch }
931 1.1 uch
932 1.1 uch struct tty *
933 1.9 uch txcomtty(dev_t dev)
934 1.1 uch {
935 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
936 1.3 uch
937 1.3 uch return sc->sc_tty;
938 1.1 uch }
939 1.1 uch
940 1.1 uch int
941 1.26 christos txcomioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct lwp *l)
942 1.1 uch {
943 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
944 1.1 uch struct tty *tp = sc->sc_tty;
945 1.3 uch int s, err;
946 1.3 uch
947 1.26 christos err = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
948 1.16 atatat if (err != EPASSTHROUGH) {
949 1.3 uch return err;
950 1.3 uch }
951 1.3 uch
952 1.26 christos err = ttioctl(tp, cmd, data, flag, l);
953 1.16 atatat if (err != EPASSTHROUGH) {
954 1.3 uch return err;
955 1.3 uch }
956 1.3 uch
957 1.3 uch err = 0;
958 1.3 uch
959 1.3 uch s = spltty();
960 1.3 uch
961 1.3 uch switch (cmd) {
962 1.5 uch default:
963 1.16 atatat err = EPASSTHROUGH;
964 1.5 uch break;
965 1.5 uch
966 1.3 uch case TIOCSBRK:
967 1.3 uch txcom_break(sc, 1);
968 1.3 uch break;
969 1.3 uch
970 1.3 uch case TIOCCBRK:
971 1.3 uch txcom_break(sc, 0);
972 1.3 uch break;
973 1.3 uch
974 1.3 uch case TIOCSDTR:
975 1.3 uch txcom_modem(sc, 1);
976 1.3 uch break;
977 1.3 uch
978 1.3 uch case TIOCCDTR:
979 1.3 uch txcom_modem(sc, 0);
980 1.3 uch break;
981 1.3 uch
982 1.3 uch case TIOCGFLAGS:
983 1.3 uch *(int *)data = sc->sc_chip->sc_swflags;
984 1.3 uch break;
985 1.3 uch
986 1.3 uch case TIOCSFLAGS:
987 1.34 elad err = kauth_authorize_device_tty(l->l_cred,
988 1.34 elad KAUTH_DEVICE_TTY_PRIVSET, tp);
989 1.3 uch if (err) {
990 1.3 uch break;
991 1.3 uch }
992 1.3 uch sc->sc_chip->sc_swflags = *(int *)data;
993 1.3 uch break;
994 1.3 uch
995 1.3 uch }
996 1.1 uch
997 1.3 uch splx(s);
998 1.1 uch
999 1.3 uch return err;
1000 1.1 uch }
1001 1.1 uch
1002 1.1 uch void
1003 1.9 uch txcomstop(struct tty *tp, int flag)
1004 1.1 uch {
1005 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
1006 1.1 uch int s;
1007 1.1 uch
1008 1.1 uch s = spltty();
1009 1.1 uch
1010 1.1 uch if (ISSET(tp->t_state, TS_BUSY)) {
1011 1.1 uch /* Stop transmitting at the next chunk. */
1012 1.1 uch sc->sc_tbc = 0;
1013 1.1 uch sc->sc_heldtbc = 0;
1014 1.1 uch if (!ISSET(tp->t_state, TS_TTSTOP))
1015 1.1 uch SET(tp->t_state, TS_FLUSH);
1016 1.1 uch }
1017 1.3 uch
1018 1.1 uch splx(s);
1019 1.1 uch }
1020 1.1 uch
1021 1.1 uch void
1022 1.9 uch txcomstart(struct tty *tp)
1023 1.1 uch {
1024 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
1025 1.3 uch struct txcom_chip *chip = sc->sc_chip;
1026 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
1027 1.3 uch int slot = chip->sc_slot;
1028 1.1 uch int s;
1029 1.1 uch
1030 1.1 uch s = spltty();
1031 1.3 uch
1032 1.3 uch if (!__txcom_txbufready(chip, 0) ||
1033 1.3 uch ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
1034 1.3 uch goto out;
1035 1.1 uch
1036 1.1 uch if (tp->t_outq.c_cc <= tp->t_lowat) {
1037 1.1 uch if (ISSET(tp->t_state, TS_ASLEEP)) {
1038 1.1 uch CLR(tp->t_state, TS_ASLEEP);
1039 1.1 uch wakeup(&tp->t_outq);
1040 1.1 uch }
1041 1.1 uch selwakeup(&tp->t_wsel);
1042 1.1 uch if (tp->t_outq.c_cc == 0)
1043 1.3 uch goto out;
1044 1.1 uch }
1045 1.3 uch
1046 1.1 uch sc->sc_tba = tp->t_outq.c_cf;
1047 1.1 uch sc->sc_tbc = ndqb(&tp->t_outq, 0);
1048 1.3 uch SET(tp->t_state, TS_BUSY);
1049 1.3 uch
1050 1.3 uch /* Output the first character of the contiguous buffer. */
1051 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot),
1052 1.14 uch (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK));
1053 1.3 uch
1054 1.3 uch sc->sc_tbc--;
1055 1.3 uch sc->sc_tba++;
1056 1.1 uch
1057 1.3 uch out:
1058 1.1 uch splx(s);
1059 1.1 uch }
1060 1.1 uch
1061 1.3 uch /*
1062 1.3 uch * Set TXcom tty parameters from termios.
1063 1.3 uch */
1064 1.1 uch int
1065 1.9 uch txcomparam(struct tty *tp, struct termios *t)
1066 1.1 uch {
1067 1.3 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
1068 1.3 uch struct txcom_chip *chip;
1069 1.5 uch int ospeed;
1070 1.3 uch int s;
1071 1.3 uch
1072 1.3 uch if (!sc)
1073 1.3 uch return ENXIO;
1074 1.3 uch
1075 1.3 uch ospeed = t->c_ospeed;
1076 1.3 uch
1077 1.3 uch /* Check requested parameters. */
1078 1.3 uch if (ospeed < 0) {
1079 1.3 uch return EINVAL;
1080 1.3 uch }
1081 1.3 uch if (t->c_ispeed && t->c_ispeed != ospeed) {
1082 1.3 uch return EINVAL;
1083 1.3 uch }
1084 1.3 uch
1085 1.3 uch s = spltty();
1086 1.3 uch chip = sc->sc_chip;
1087 1.3 uch /*
1088 1.3 uch * For the console, always force CLOCAL and !HUPCL, so that the port
1089 1.3 uch * is always active.
1090 1.3 uch */
1091 1.3 uch if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) ||
1092 1.3 uch ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
1093 1.5 uch SET(t->c_cflag, CLOCAL);
1094 1.5 uch CLR(t->c_cflag, HUPCL);
1095 1.3 uch }
1096 1.3 uch splx(s);
1097 1.3 uch
1098 1.3 uch /*
1099 1.6 uch * If we're not in a mode that assumes a connection is present, then
1100 1.6 uch * ignore carrier changes.
1101 1.6 uch */
1102 1.6 uch if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
1103 1.6 uch chip->sc_dcd = 0;
1104 1.6 uch else
1105 1.6 uch chip->sc_dcd = 1;
1106 1.6 uch
1107 1.6 uch /*
1108 1.3 uch * Only whack the UART when params change.
1109 1.3 uch * Some callers need to clear tp->t_ospeed
1110 1.3 uch * to make sure initialization gets done.
1111 1.3 uch */
1112 1.5 uch if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) {
1113 1.3 uch return 0;
1114 1.3 uch }
1115 1.3 uch
1116 1.3 uch s = spltty();
1117 1.3 uch chip = sc->sc_chip;
1118 1.3 uch chip->sc_speed = ospeed;
1119 1.5 uch chip->sc_cflag = t->c_cflag;
1120 1.3 uch
1121 1.3 uch txcom_setmode(chip);
1122 1.3 uch txcom_setbaudrate(chip);
1123 1.6 uch
1124 1.3 uch /* And copy to tty. */
1125 1.3 uch tp->t_ispeed = 0;
1126 1.3 uch tp->t_ospeed = chip->sc_speed;
1127 1.3 uch tp->t_cflag = chip->sc_cflag;
1128 1.3 uch
1129 1.3 uch /*
1130 1.6 uch * Update the tty layer's idea of the carrier bit, in case we changed
1131 1.6 uch * CLOCAL or MDMBUF. We don't hang up here; we only do that by
1132 1.6 uch * explicit request.
1133 1.6 uch */
1134 1.10 eeh (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd);
1135 1.6 uch
1136 1.6 uch /*
1137 1.3 uch * If hardware flow control is disabled, unblock any hard flow
1138 1.3 uch * control state.
1139 1.3 uch */
1140 1.3 uch if (!ISSET(chip->sc_cflag, CHWFLOW)) {
1141 1.3 uch txcomstart(tp);
1142 1.3 uch }
1143 1.3 uch
1144 1.3 uch splx(s);
1145 1.6 uch
1146 1.6 uch return 0;
1147 1.6 uch }
1148 1.6 uch
1149 1.9 uch int
1150 1.9 uch txcom_dcd_hook(void *arg, int type, long id, void *msg)
1151 1.9 uch {
1152 1.9 uch struct txcom_softc *sc = arg;
1153 1.9 uch struct tty *tp = sc->sc_tty;
1154 1.9 uch struct txcom_chip *chip = sc->sc_chip;
1155 1.9 uch int modem = !(int)msg; /* p-edge 1, n-edge 0 */
1156 1.9 uch
1157 1.15 uch DPRINTF("DCD %s\n", modem ? "ON" : "OFF");
1158 1.9 uch
1159 1.9 uch if (modem && chip->sc_dcd)
1160 1.10 eeh (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd);
1161 1.9 uch
1162 1.9 uch return 0;
1163 1.9 uch }
1164 1.9 uch
1165 1.9 uch int
1166 1.9 uch txcom_cts_hook(void *arg, int type, long id, void *msg)
1167 1.9 uch {
1168 1.9 uch struct txcom_softc *sc = arg;
1169 1.9 uch struct tty *tp = sc->sc_tty;
1170 1.9 uch struct txcom_chip *chip = sc->sc_chip;
1171 1.9 uch int clear = !(int)msg; /* p-edge 1, n-edge 0 */
1172 1.9 uch
1173 1.15 uch DPRINTF("CTS %s\n", clear ? "ON" : "OFF");
1174 1.9 uch
1175 1.9 uch if (chip->sc_msr_cts) {
1176 1.9 uch if (!clear) {
1177 1.9 uch chip->sc_tx_stopped = 1;
1178 1.9 uch } else {
1179 1.9 uch chip->sc_tx_stopped = 0;
1180 1.10 eeh (*tp->t_linesw->l_start)(tp);
1181 1.9 uch }
1182 1.9 uch }
1183 1.9 uch
1184 1.9 uch return 0;
1185 1.9 uch }
1186 1.9 uch
1187 1.9 uch #ifdef TX39UARTDEBUG
1188 1.6 uch void
1189 1.9 uch txcom_dump(struct txcom_chip *chip)
1190 1.6 uch {
1191 1.6 uch tx_chipset_tag_t tc = chip->sc_tc;
1192 1.6 uch int slot = chip->sc_slot;
1193 1.6 uch txreg_t reg;
1194 1.6 uch
1195 1.6 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
1196 1.6 uch #define ISSETPRINT(r, m) \
1197 1.15 uch dbg_bitmask_print(r, TX39_UARTCTRL1_##m, #m)
1198 1.6 uch ISSETPRINT(reg, UARTON);
1199 1.6 uch ISSETPRINT(reg, EMPTY);
1200 1.6 uch ISSETPRINT(reg, PRXHOLDFULL);
1201 1.6 uch ISSETPRINT(reg, RXHOLDFULL);
1202 1.6 uch ISSETPRINT(reg, ENDMARX);
1203 1.6 uch ISSETPRINT(reg, ENDMATX);
1204 1.6 uch ISSETPRINT(reg, TESTMODE);
1205 1.6 uch ISSETPRINT(reg, ENBREAHALT);
1206 1.6 uch ISSETPRINT(reg, ENDMATEST);
1207 1.6 uch ISSETPRINT(reg, ENDMALOOP);
1208 1.6 uch ISSETPRINT(reg, PULSEOPT2);
1209 1.6 uch ISSETPRINT(reg, PULSEOPT1);
1210 1.6 uch ISSETPRINT(reg, DTINVERT);
1211 1.6 uch ISSETPRINT(reg, DISTXD);
1212 1.6 uch ISSETPRINT(reg, TWOSTOP);
1213 1.6 uch ISSETPRINT(reg, LOOPBACK);
1214 1.6 uch ISSETPRINT(reg, BIT7);
1215 1.6 uch ISSETPRINT(reg, EVENPARITY);
1216 1.6 uch ISSETPRINT(reg, ENPARITY);
1217 1.6 uch ISSETPRINT(reg, ENUART);
1218 1.6 uch }
1219 1.9 uch #endif /* TX39UARTDEBUG */
1220