txcom.c revision 1.4 1 1.4 uch /* $NetBSD: txcom.c,v 1.4 2000/01/06 18:11:23 uch Exp $ */
2 1.1 uch
3 1.1 uch /*
4 1.1 uch * Copyright (c) 1999, by UCHIYAMA Yasushi
5 1.1 uch * All rights reserved.
6 1.1 uch *
7 1.1 uch * Redistribution and use in source and binary forms, with or without
8 1.1 uch * modification, are permitted provided that the following conditions
9 1.1 uch * are met:
10 1.1 uch * 1. Redistributions of source code must retain the above copyright
11 1.1 uch * notice, this list of conditions and the following disclaimer.
12 1.1 uch * 2. The name of the developer may NOT be used to endorse or promote products
13 1.1 uch * derived from this software without specific prior written permission.
14 1.1 uch *
15 1.1 uch * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 1.1 uch * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 1.1 uch * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 1.1 uch * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 1.1 uch * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 1.1 uch * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 1.1 uch * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 1.1 uch * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 1.1 uch * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 1.1 uch * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 1.1 uch * SUCH DAMAGE.
26 1.1 uch *
27 1.1 uch */
28 1.1 uch #include "opt_tx39_debug.h"
29 1.1 uch #include "opt_tx39uartdebug.h"
30 1.1 uch
31 1.1 uch #include <sys/param.h>
32 1.1 uch #include <sys/systm.h>
33 1.3 uch #include <sys/kernel.h>
34 1.1 uch #include <sys/device.h>
35 1.3 uch #include <sys/malloc.h>
36 1.1 uch
37 1.1 uch #include <sys/proc.h> /* tsleep/wakeup */
38 1.1 uch
39 1.1 uch #include <sys/ioctl.h>
40 1.1 uch #include <sys/select.h>
41 1.1 uch #include <sys/file.h>
42 1.1 uch
43 1.1 uch #include <sys/tty.h>
44 1.1 uch #include <sys/conf.h>
45 1.1 uch #include <dev/cons.h> /* consdev */
46 1.1 uch
47 1.1 uch #include <machine/bus.h>
48 1.1 uch
49 1.1 uch #include <hpcmips/tx/tx39var.h>
50 1.1 uch #include <hpcmips/tx/tx39icureg.h>
51 1.1 uch #include <hpcmips/tx/tx39uartvar.h>
52 1.1 uch #include <hpcmips/tx/tx39uartreg.h>
53 1.1 uch
54 1.1 uch #include <hpcmips/tx/tx39clockreg.h> /* XXX */
55 1.1 uch
56 1.1 uch #define SET(t, f) (t) |= (f)
57 1.1 uch #define CLR(t, f) (t) &= ~(f)
58 1.1 uch #define ISSET(t, f) ((t) & (f))
59 1.1 uch
60 1.1 uch #ifdef TX39UARTDEBUG
61 1.1 uch #define DPRINTF(arg) printf arg
62 1.1 uch #else
63 1.1 uch #define DPRINTF(arg)
64 1.1 uch #endif
65 1.1 uch
66 1.3 uch #define TXCOM_HW_CONSOLE 0x40
67 1.3 uch #define TXCOM_RING_SIZE 256 /* must be a power of two! */
68 1.3 uch #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1)
69 1.1 uch
70 1.3 uch struct txcom_chip {
71 1.1 uch tx_chipset_tag_t sc_tc;
72 1.1 uch int sc_slot; /* UARTA or UARTB */
73 1.1 uch int sc_cflag;
74 1.1 uch int sc_speed;
75 1.3 uch int sc_swflags;
76 1.1 uch int sc_hwflags;
77 1.3 uch };
78 1.1 uch
79 1.3 uch struct txcom_softc {
80 1.3 uch struct device sc_dev;
81 1.3 uch struct tty *sc_tty;
82 1.3 uch struct txcom_chip *sc_chip;
83 1.3 uch
84 1.3 uch u_int8_t *sc_tba; /* transmit buffer address */
85 1.3 uch int sc_tbc; /* transmit byte count */
86 1.3 uch int sc_heldtbc;
87 1.3 uch u_int8_t *sc_rbuf; /* receive buffer address */
88 1.3 uch int sc_rbput; /* receive byte count */
89 1.3 uch int sc_rbget;
90 1.1 uch };
91 1.1 uch
92 1.1 uch extern struct cfdriver txcom_cd;
93 1.1 uch
94 1.1 uch int txcom_match __P((struct device*, struct cfdata*, void*));
95 1.1 uch void txcom_attach __P((struct device*, struct device*, void*));
96 1.3 uch
97 1.3 uch int txcom_txintr __P((void*));
98 1.3 uch int txcom_rxintr __P((void*));
99 1.2 uch int txcom_overrun_intr __P((void*));
100 1.3 uch int txcom_frameerr_intr __P((void*));
101 1.3 uch int txcom_parityerr_intr __P((void*));
102 1.3 uch int txcom_break_intr __P((void*));
103 1.3 uch
104 1.1 uch void txcom_rxsoft __P((void*));
105 1.3 uch void txcom_txsoft __P((void*));
106 1.3 uch
107 1.3 uch void txcom_shutdown __P((struct txcom_softc*));
108 1.3 uch void txcom_break __P((struct txcom_softc*, int));
109 1.3 uch void txcom_modem __P((struct txcom_softc*, int));
110 1.3 uch void txcomstart __P((struct tty*));
111 1.3 uch int txcomparam __P((struct tty*, struct termios*));
112 1.3 uch
113 1.3 uch int txcom_enable __P((struct txcom_chip*));
114 1.3 uch void txcom_disable __P((struct txcom_chip*));
115 1.3 uch void txcom_setmode __P((struct txcom_chip*));
116 1.3 uch void txcom_setbaudrate __P((struct txcom_chip*));
117 1.1 uch int txcom_cngetc __P((dev_t));
118 1.1 uch void txcom_cnputc __P((dev_t, int));
119 1.3 uch void txcom_cnpollc __P((dev_t, int));
120 1.3 uch
121 1.3 uch __inline int __txcom_txbufready __P((struct txcom_chip*, int));
122 1.3 uch __inline const char *__txcom_slotname __P((int));
123 1.1 uch
124 1.1 uch cdev_decl(txcom);
125 1.1 uch
126 1.3 uch struct consdev txcomcons = {
127 1.3 uch NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc,
128 1.3 uch NODEV, CN_NORMAL
129 1.3 uch };
130 1.3 uch
131 1.1 uch /* Serial console */
132 1.3 uch struct txcom_chip txcom_chip;
133 1.1 uch
134 1.1 uch struct cfattach txcom_ca = {
135 1.1 uch sizeof(struct txcom_softc), txcom_match, txcom_attach
136 1.1 uch };
137 1.1 uch
138 1.1 uch int
139 1.1 uch txcom_match(parent, cf, aux)
140 1.1 uch struct device *parent;
141 1.1 uch struct cfdata *cf;
142 1.1 uch void *aux;
143 1.1 uch {
144 1.1 uch /* if the autoconfiguration got this far, there's a slot here */
145 1.1 uch return 1;
146 1.1 uch }
147 1.1 uch
148 1.1 uch void
149 1.1 uch txcom_attach(parent, self, aux)
150 1.1 uch struct device *parent;
151 1.1 uch struct device *self;
152 1.1 uch void *aux;
153 1.1 uch {
154 1.1 uch struct tx39uart_attach_args *ua = aux;
155 1.1 uch struct txcom_softc *sc = (void*)self;
156 1.1 uch tx_chipset_tag_t tc;
157 1.1 uch struct tty *tp;
158 1.3 uch struct txcom_chip *chip;
159 1.3 uch int slot;
160 1.1 uch
161 1.1 uch /* Check this slot used as serial console */
162 1.3 uch if (ua->ua_slot == txcom_chip.sc_slot &&
163 1.3 uch (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE)) {
164 1.3 uch sc->sc_chip = &txcom_chip;
165 1.3 uch } else {
166 1.3 uch if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip),
167 1.3 uch M_DEVBUF, M_WAITOK))) {
168 1.3 uch printf(": can't allocate chip\n");
169 1.3 uch return;
170 1.3 uch }
171 1.3 uch memset(sc->sc_chip, 0, sizeof(struct txcom_chip));
172 1.1 uch }
173 1.1 uch
174 1.3 uch chip = sc->sc_chip;
175 1.3 uch tc = chip->sc_tc = ua->ua_tc;
176 1.3 uch slot = chip->sc_slot = ua->ua_slot;
177 1.3 uch
178 1.3 uch if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) {
179 1.3 uch printf(": can't allocate buffer.\n");
180 1.3 uch return;
181 1.3 uch }
182 1.3 uch memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE);
183 1.1 uch
184 1.1 uch tp = ttymalloc();
185 1.1 uch tp->t_oproc = txcomstart;
186 1.1 uch tp->t_param = txcomparam;
187 1.1 uch tp->t_hwiflow = NULL;
188 1.1 uch sc->sc_tty = tp;
189 1.1 uch tty_attach(tp);
190 1.1 uch
191 1.3 uch if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
192 1.1 uch int maj;
193 1.1 uch /* locate the major number */
194 1.1 uch for (maj = 0; maj < nchrdev; maj++)
195 1.1 uch if (cdevsw[maj].d_open == txcomopen)
196 1.1 uch break;
197 1.1 uch
198 1.1 uch cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit);
199 1.1 uch
200 1.3 uch printf(": console");
201 1.1 uch }
202 1.1 uch
203 1.3 uch printf("\n");
204 1.1 uch
205 1.1 uch /*
206 1.1 uch * Enable interrupt
207 1.1 uch */
208 1.3 uch #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s))
209 1.3 uch
210 1.3 uch tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY,
211 1.3 uch txcom_rxintr, sc);
212 1.3 uch tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY,
213 1.3 uch txcom_txintr, sc);
214 1.3 uch tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY,
215 1.4 uch txcom_rxintr, sc);
216 1.3 uch tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY,
217 1.4 uch txcom_txintr, sc);
218 1.3 uch tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY,
219 1.3 uch txcom_frameerr_intr, sc);
220 1.3 uch tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY,
221 1.3 uch txcom_parityerr_intr, sc);
222 1.3 uch tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY,
223 1.3 uch txcom_break_intr, sc);
224 1.1 uch }
225 1.1 uch
226 1.1 uch int
227 1.3 uch txcom_enable(chip)
228 1.3 uch struct txcom_chip *chip;
229 1.1 uch {
230 1.1 uch tx_chipset_tag_t tc;
231 1.3 uch
232 1.1 uch txreg_t reg;
233 1.3 uch int slot, ofs, timeout;
234 1.1 uch
235 1.3 uch tc = chip->sc_tc;
236 1.3 uch slot = chip->sc_slot;
237 1.3 uch ofs = TX39_UARTCTRL1_REG(slot);
238 1.1 uch
239 1.3 uch /* Power on */
240 1.3 uch reg = tx_conf_read(tc, ofs);
241 1.1 uch reg |= TX39_UARTCTRL1_ENUART;
242 1.1 uch reg &= ~TX39_UARTCTRL1_ENBREAHALT;
243 1.3 uch tx_conf_write(tc, ofs, reg);
244 1.3 uch
245 1.3 uch timeout = 100;
246 1.3 uch
247 1.3 uch while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) &&
248 1.3 uch --timeout > 0)
249 1.3 uch ;
250 1.3 uch
251 1.3 uch if (timeout == 0) {
252 1.3 uch printf("UART%c never power up\n", "AB"[chip->sc_slot]);
253 1.3 uch return 1;
254 1.3 uch }
255 1.3 uch
256 1.1 uch /*
257 1.1 uch * XXX Disable DMA (DMA not coded yet)
258 1.1 uch */
259 1.1 uch reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
260 1.3 uch tx_conf_write(tc, ofs, reg);
261 1.1 uch
262 1.3 uch /* Supply clock XXX should call clock module routine. */
263 1.1 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
264 1.1 uch reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
265 1.1 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
266 1.1 uch
267 1.1 uch return 0;
268 1.1 uch }
269 1.1 uch
270 1.1 uch void
271 1.3 uch txcom_disable(chip)
272 1.3 uch struct txcom_chip *chip;
273 1.1 uch {
274 1.1 uch tx_chipset_tag_t tc;
275 1.1 uch txreg_t reg;
276 1.1 uch int slot;
277 1.1 uch
278 1.3 uch tc = chip->sc_tc;
279 1.3 uch slot = chip->sc_slot;
280 1.1 uch
281 1.1 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
282 1.1 uch /* DMA */
283 1.1 uch reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
284 1.3 uch
285 1.1 uch /* Power */
286 1.1 uch reg &= ~TX39_UARTCTRL1_ENUART;
287 1.1 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
288 1.3 uch
289 1.1 uch /* Clock */
290 1.1 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
291 1.1 uch reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
292 1.1 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
293 1.1 uch
294 1.1 uch }
295 1.1 uch
296 1.3 uch __inline int
297 1.3 uch __txcom_txbufready(chip, retry)
298 1.3 uch struct txcom_chip *chip;
299 1.3 uch int retry;
300 1.3 uch {
301 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
302 1.3 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
303 1.3 uch
304 1.3 uch do {
305 1.3 uch if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY)
306 1.3 uch return 1;
307 1.3 uch } while(--retry != 0);
308 1.3 uch
309 1.1 uch return 0;
310 1.1 uch }
311 1.1 uch
312 1.3 uch /*
313 1.3 uch * console
314 1.3 uch */
315 1.1 uch int
316 1.1 uch txcom_cngetc(dev)
317 1.1 uch dev_t dev;
318 1.1 uch {
319 1.1 uch tx_chipset_tag_t tc;
320 1.2 uch int ofs, c, s;
321 1.2 uch
322 1.3 uch s = spltty();
323 1.2 uch
324 1.3 uch tc = txcom_chip.sc_tc;
325 1.3 uch ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot);
326 1.1 uch
327 1.1 uch while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs)))
328 1.1 uch ;
329 1.2 uch
330 1.3 uch c = TX39_UARTRXHOLD_RXDATA(
331 1.3 uch tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot)));
332 1.2 uch
333 1.3 uch if (c == '\r')
334 1.1 uch c = '\n';
335 1.1 uch
336 1.2 uch splx(s);
337 1.2 uch
338 1.1 uch return c;
339 1.1 uch }
340 1.1 uch
341 1.1 uch void
342 1.1 uch txcom_cnputc(dev, c)
343 1.1 uch dev_t dev;
344 1.1 uch int c;
345 1.1 uch {
346 1.3 uch struct txcom_chip *chip = &txcom_chip;
347 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
348 1.3 uch int s;
349 1.2 uch
350 1.3 uch s = spltty();
351 1.1 uch
352 1.3 uch /* Wait for transmitter to empty */
353 1.3 uch __txcom_txbufready(chip, -1);
354 1.1 uch
355 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
356 1.1 uch (c & TX39_UARTTXHOLD_TXDATA_MASK));
357 1.1 uch
358 1.3 uch __txcom_txbufready(chip, -1);
359 1.3 uch
360 1.2 uch splx(s);
361 1.1 uch }
362 1.1 uch
363 1.1 uch void
364 1.1 uch txcom_cnpollc(dev, on)
365 1.1 uch dev_t dev;
366 1.1 uch int on;
367 1.1 uch {
368 1.1 uch }
369 1.1 uch
370 1.1 uch void
371 1.3 uch txcom_setmode(chip)
372 1.3 uch struct txcom_chip *chip;
373 1.1 uch {
374 1.3 uch tcflag_t cflag = chip->sc_cflag;
375 1.3 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
376 1.1 uch txreg_t reg;
377 1.1 uch
378 1.3 uch reg = tx_conf_read(chip->sc_tc, ofs);
379 1.1 uch
380 1.1 uch switch (ISSET(cflag, CSIZE)) {
381 1.1 uch default:
382 1.1 uch printf("txcom_setmode: CS7, CS8 only. use CS7");
383 1.1 uch /* FALL THROUGH */
384 1.1 uch case CS7:
385 1.1 uch reg |= TX39_UARTCTRL1_BIT7;
386 1.1 uch break;
387 1.1 uch case CS8:
388 1.1 uch reg &= ~TX39_UARTCTRL1_BIT7;
389 1.1 uch break;
390 1.1 uch }
391 1.3 uch
392 1.1 uch if (ISSET(cflag, PARENB)) {
393 1.1 uch reg |= TX39_UARTCTRL1_ENPARITY;
394 1.1 uch if (ISSET(cflag, PARODD)) {
395 1.1 uch reg &= ~TX39_UARTCTRL1_EVENPARITY;
396 1.1 uch } else {
397 1.1 uch reg |= TX39_UARTCTRL1_EVENPARITY;
398 1.1 uch }
399 1.1 uch } else {
400 1.1 uch reg &= ~TX39_UARTCTRL1_ENPARITY;
401 1.1 uch }
402 1.3 uch
403 1.1 uch if (ISSET(cflag, CSTOPB)) {
404 1.1 uch reg |= TX39_UARTCTRL1_TWOSTOP;
405 1.1 uch }
406 1.3 uch
407 1.3 uch tx_conf_write(chip->sc_tc, ofs, reg);
408 1.3 uch }
409 1.3 uch
410 1.3 uch void
411 1.3 uch txcom_setbaudrate(chip)
412 1.3 uch struct txcom_chip *chip;
413 1.3 uch {
414 1.3 uch int baudrate;
415 1.3 uch txreg_t reg;
416 1.3 uch
417 1.3 uch if (chip->sc_speed == 0)
418 1.3 uch return;
419 1.3 uch
420 1.3 uch baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1;
421 1.3 uch reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate);
422 1.3 uch
423 1.3 uch tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg);
424 1.3 uch }
425 1.3 uch
426 1.3 uch int
427 1.3 uch txcom_cnattach(slot, speed, cflag)
428 1.3 uch int slot, speed, cflag;
429 1.3 uch {
430 1.3 uch cn_tab = &txcomcons;
431 1.3 uch
432 1.3 uch txcom_chip.sc_tc = tx_conf_get_tag();
433 1.3 uch txcom_chip.sc_slot = slot;
434 1.3 uch txcom_chip.sc_cflag = cflag;
435 1.3 uch txcom_chip.sc_speed = speed;
436 1.3 uch txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE;
437 1.3 uch
438 1.3 uch txcom_enable(&txcom_chip);
439 1.3 uch txcom_setmode(&txcom_chip);
440 1.3 uch txcom_setbaudrate(&txcom_chip);
441 1.3 uch
442 1.3 uch return 0;
443 1.3 uch }
444 1.3 uch
445 1.3 uch /*
446 1.3 uch * tty
447 1.3 uch */
448 1.3 uch void
449 1.3 uch txcom_break(sc, on)
450 1.3 uch struct txcom_softc *sc;
451 1.3 uch int on;
452 1.3 uch {
453 1.3 uch struct txcom_chip *chip = sc->sc_chip;
454 1.1 uch
455 1.3 uch tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
456 1.3 uch on ? TX39_UARTTXHOLD_BREAK : 0);
457 1.1 uch }
458 1.1 uch
459 1.1 uch void
460 1.3 uch txcom_modem(sc, on)
461 1.1 uch struct txcom_softc *sc;
462 1.3 uch int on;
463 1.1 uch {
464 1.3 uch struct txcom_chip *chip = sc->sc_chip;
465 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
466 1.3 uch int slot = chip->sc_slot;
467 1.1 uch txreg_t reg;
468 1.1 uch
469 1.3 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
470 1.3 uch
471 1.3 uch if (on) {
472 1.3 uch reg &= ~TX39_UARTCTRL1_DISTXD;
473 1.3 uch } else {
474 1.3 uch reg |= TX39_UARTCTRL1_DISTXD;
475 1.3 uch }
476 1.1 uch
477 1.3 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
478 1.1 uch }
479 1.1 uch
480 1.1 uch void
481 1.3 uch txcom_shutdown(sc)
482 1.3 uch struct txcom_softc *sc;
483 1.1 uch {
484 1.1 uch struct tty *tp = sc->sc_tty;
485 1.3 uch int s = spltty();
486 1.1 uch
487 1.3 uch /* Clear any break condition set with TIOCSBRK. */
488 1.3 uch txcom_break(sc, 0);
489 1.3 uch
490 1.3 uch /*
491 1.3 uch * Hang up if necessary. Wait a bit, so the other side has time to
492 1.3 uch * notice even if we immediately open the port again.
493 1.3 uch */
494 1.3 uch if (ISSET(tp->t_cflag, HUPCL)) {
495 1.3 uch txcom_modem(sc, 0);
496 1.3 uch (void) tsleep(sc, TTIPRI, ttclos, hz);
497 1.3 uch }
498 1.3 uch
499 1.3 uch
500 1.3 uch /* Turn off interrupts if not the console. */
501 1.3 uch if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
502 1.3 uch txcom_disable(sc->sc_chip);
503 1.3 uch }
504 1.1 uch
505 1.3 uch splx(s);
506 1.3 uch }
507 1.1 uch
508 1.3 uch __inline const char *
509 1.3 uch __txcom_slotname(slot)
510 1.3 uch int slot;
511 1.3 uch {
512 1.3 uch static const char *slotname[] = {"UARTA", "UARTB"};
513 1.3 uch if (slot != 0 && slot != 1) {
514 1.3 uch return "bogus slot";
515 1.3 uch } else {
516 1.3 uch return slotname[slot];
517 1.1 uch }
518 1.2 uch }
519 1.2 uch
520 1.2 uch int
521 1.2 uch txcom_overrun_intr(arg)
522 1.2 uch void *arg;
523 1.2 uch {
524 1.2 uch struct txcom_softc *sc = arg;
525 1.2 uch
526 1.3 uch printf("%s overrun\n", __txcom_slotname(sc->sc_chip->sc_slot));
527 1.3 uch
528 1.3 uch return 0;
529 1.3 uch }
530 1.3 uch
531 1.3 uch int
532 1.3 uch txcom_frameerr_intr(arg)
533 1.3 uch void *arg;
534 1.3 uch {
535 1.3 uch struct txcom_softc *sc = arg;
536 1.3 uch
537 1.3 uch printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot));
538 1.3 uch
539 1.3 uch return 0;
540 1.3 uch }
541 1.3 uch
542 1.3 uch int
543 1.3 uch txcom_parityerr_intr(arg)
544 1.3 uch void *arg;
545 1.3 uch {
546 1.3 uch struct txcom_softc *sc = arg;
547 1.3 uch
548 1.3 uch printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot));
549 1.2 uch
550 1.2 uch return 0;
551 1.1 uch }
552 1.1 uch
553 1.1 uch int
554 1.3 uch txcom_break_intr(arg)
555 1.1 uch void *arg;
556 1.1 uch {
557 1.1 uch struct txcom_softc *sc = arg;
558 1.3 uch
559 1.3 uch printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot));
560 1.3 uch
561 1.3 uch return 0;
562 1.3 uch }
563 1.3 uch
564 1.3 uch int
565 1.3 uch txcom_rxintr(arg)
566 1.3 uch void *arg;
567 1.3 uch {
568 1.3 uch struct txcom_softc *sc = arg;
569 1.3 uch struct txcom_chip *chip = sc->sc_chip;
570 1.1 uch u_int8_t c;
571 1.1 uch
572 1.3 uch c = TX39_UARTRXHOLD_RXDATA(
573 1.3 uch tx_conf_read(chip->sc_tc,
574 1.3 uch TX39_UARTRXHOLD_REG(chip->sc_slot)));
575 1.3 uch
576 1.3 uch sc->sc_rbuf[sc->sc_rbput] = c;
577 1.3 uch sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK;
578 1.3 uch
579 1.3 uch timeout(txcom_rxsoft, arg, 1);
580 1.1 uch
581 1.1 uch return 0;
582 1.1 uch }
583 1.1 uch
584 1.3 uch void
585 1.3 uch txcom_rxsoft(arg)
586 1.3 uch void *arg;
587 1.3 uch {
588 1.3 uch struct txcom_softc *sc = arg;
589 1.3 uch struct tty *tp = sc->sc_tty;
590 1.3 uch int (*rint) __P((int c, struct tty *tp));
591 1.3 uch int code;
592 1.3 uch int s, end, get;
593 1.3 uch
594 1.3 uch rint = linesw[tp->t_line].l_rint;
595 1.3 uch
596 1.3 uch s = spltty();
597 1.3 uch end = sc->sc_rbput;
598 1.3 uch get = sc->sc_rbget;
599 1.3 uch
600 1.3 uch while (get != end) {
601 1.3 uch code = sc->sc_rbuf[get];
602 1.3 uch
603 1.3 uch if ((*rint)(code, tp) == -1) {
604 1.3 uch /*
605 1.3 uch * The line discipline's buffer is out of space.
606 1.3 uch */
607 1.3 uch }
608 1.3 uch get = (get + 1) % TXCOM_RING_MASK;
609 1.3 uch }
610 1.3 uch sc->sc_rbget = get;
611 1.3 uch
612 1.3 uch splx(s);
613 1.3 uch }
614 1.3 uch
615 1.1 uch int
616 1.3 uch txcom_txintr(arg)
617 1.1 uch void *arg;
618 1.1 uch {
619 1.1 uch struct txcom_softc *sc = arg;
620 1.3 uch struct txcom_chip *chip = sc->sc_chip;
621 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
622 1.1 uch
623 1.3 uch if (sc->sc_tbc > 0) {
624 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
625 1.3 uch (*sc->sc_tba &
626 1.3 uch TX39_UARTTXHOLD_TXDATA_MASK));
627 1.3 uch sc->sc_tbc--;
628 1.3 uch sc->sc_tba++;
629 1.3 uch } else {
630 1.3 uch timeout(txcom_txsoft, arg, 1);
631 1.3 uch }
632 1.1 uch
633 1.1 uch return 0;
634 1.1 uch }
635 1.1 uch
636 1.3 uch void
637 1.3 uch txcom_txsoft(arg)
638 1.3 uch void *arg;
639 1.3 uch {
640 1.3 uch struct txcom_softc *sc = arg;
641 1.3 uch struct tty *tp = sc->sc_tty;
642 1.3 uch int s = spltty();
643 1.3 uch
644 1.3 uch CLR(tp->t_state, TS_BUSY);
645 1.3 uch if (ISSET(tp->t_state, TS_FLUSH)) {
646 1.3 uch CLR(tp->t_state, TS_FLUSH);
647 1.3 uch } else {
648 1.3 uch ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
649 1.3 uch }
650 1.3 uch
651 1.3 uch (*linesw[tp->t_line].l_start)(tp);
652 1.3 uch
653 1.3 uch splx(s);
654 1.3 uch }
655 1.1 uch
656 1.1 uch int
657 1.1 uch txcomopen(dev, flag, mode, p)
658 1.1 uch dev_t dev;
659 1.1 uch int flag, mode;
660 1.1 uch struct proc *p;
661 1.1 uch {
662 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
663 1.3 uch struct txcom_chip *chip;
664 1.3 uch struct tty *tp;
665 1.3 uch int s, err;
666 1.1 uch struct termios t;
667 1.1 uch
668 1.3 uch if (!sc)
669 1.3 uch return ENXIO;
670 1.3 uch
671 1.3 uch chip = sc->sc_chip;
672 1.3 uch tp = sc->sc_tty;
673 1.3 uch
674 1.3 uch if (ISSET(tp->t_state, TS_ISOPEN) &&
675 1.3 uch ISSET(tp->t_state, TS_XCLUDE) &&
676 1.3 uch p->p_ucred->cr_uid != 0)
677 1.3 uch return (EBUSY);
678 1.3 uch
679 1.3 uch s = spltty();
680 1.3 uch
681 1.1 uch tp->t_dev = dev;
682 1.3 uch tp->t_ispeed = 0;
683 1.3 uch tp->t_ospeed = 0;
684 1.3 uch
685 1.3 uch t.c_ispeed = 0;
686 1.3 uch if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
687 1.3 uch t.c_ospeed = chip->sc_speed;
688 1.3 uch t.c_cflag = chip->sc_cflag;
689 1.3 uch } else {
690 1.3 uch t.c_ospeed = TTYDEF_SPEED;
691 1.3 uch t.c_cflag = TTYDEF_CFLAG;
692 1.3 uch }
693 1.1 uch
694 1.3 uch if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL))
695 1.3 uch SET(t.c_cflag, CLOCAL);
696 1.3 uch if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS))
697 1.3 uch SET(t.c_cflag, CRTSCTS);
698 1.3 uch if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF))
699 1.3 uch SET(t.c_cflag, MDMBUF);
700 1.3 uch
701 1.3 uch txcom_enable(sc->sc_chip);
702 1.3 uch
703 1.3 uch txcomparam(tp, &t);
704 1.1 uch
705 1.1 uch tp->t_iflag = TTYDEF_IFLAG;
706 1.1 uch tp->t_oflag = TTYDEF_OFLAG;
707 1.1 uch tp->t_lflag = TTYDEF_LFLAG;
708 1.3 uch
709 1.1 uch ttychars(tp);
710 1.1 uch ttsetwater(tp);
711 1.1 uch
712 1.3 uch /*
713 1.3 uch * Turn on DTR. We must always do this, even if carrier is not
714 1.3 uch * present, because otherwise we'd have to use TIOCSDTR
715 1.3 uch * immediately after setting CLOCAL, which applications do not
716 1.3 uch * expect. We always assert DTR while the device is open
717 1.3 uch * unless explicitly requested to deassert it.
718 1.3 uch */
719 1.3 uch txcom_modem(sc, 1);
720 1.3 uch
721 1.3 uch /* Clear the input ring, and unblock. */
722 1.3 uch sc->sc_rbget = sc->sc_rbput = 0;
723 1.3 uch
724 1.3 uch splx(s);
725 1.3 uch
726 1.1 uch if ((err = ttyopen(tp, minor(dev), ISSET(flag, O_NONBLOCK)))) {
727 1.1 uch DPRINTF(("txcomopen: ttyopen failed\n"));
728 1.3 uch goto out;
729 1.1 uch }
730 1.1 uch if ((err = (*linesw[tp->t_line].l_open)(dev, tp))) {
731 1.1 uch DPRINTF(("txcomopen: line dicipline open failed\n"));
732 1.3 uch goto out;
733 1.3 uch }
734 1.3 uch
735 1.3 uch return err;
736 1.3 uch
737 1.3 uch out:
738 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
739 1.3 uch /*
740 1.3 uch * We failed to open the device, and nobody else had it opened.
741 1.3 uch * Clean up the state as appropriate.
742 1.3 uch */
743 1.3 uch txcom_shutdown(sc);
744 1.1 uch }
745 1.1 uch
746 1.1 uch return err;
747 1.3 uch
748 1.1 uch }
749 1.1 uch
750 1.1 uch int
751 1.1 uch txcomclose(dev, flag, mode, p)
752 1.1 uch dev_t dev;
753 1.1 uch int flag, mode;
754 1.1 uch struct proc *p;
755 1.1 uch {
756 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
757 1.1 uch struct tty *tp = sc->sc_tty;
758 1.1 uch
759 1.3 uch /* XXX This is for cons.c. */
760 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN))
761 1.3 uch return 0;
762 1.3 uch
763 1.1 uch (*linesw[tp->t_line].l_close)(tp, flag);
764 1.1 uch ttyclose(tp);
765 1.1 uch
766 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
767 1.3 uch /*
768 1.3 uch * Although we got a last close, the device may still be in
769 1.3 uch * use; e.g. if this was the dialout node, and there are still
770 1.3 uch * processes waiting for carrier on the non-dialout node.
771 1.3 uch */
772 1.3 uch txcom_shutdown(sc);
773 1.3 uch }
774 1.3 uch
775 1.1 uch return 0;
776 1.1 uch }
777 1.1 uch
778 1.1 uch int
779 1.1 uch txcomread(dev, uio, flag)
780 1.1 uch dev_t dev;
781 1.1 uch struct uio *uio;
782 1.1 uch int flag;
783 1.1 uch {
784 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
785 1.1 uch struct tty *tp = sc->sc_tty;
786 1.3 uch
787 1.1 uch return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
788 1.1 uch }
789 1.1 uch
790 1.1 uch int
791 1.1 uch txcomwrite(dev, uio, flag)
792 1.1 uch dev_t dev;
793 1.1 uch struct uio *uio;
794 1.1 uch int flag;
795 1.1 uch {
796 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
797 1.1 uch struct tty *tp = sc->sc_tty;
798 1.1 uch
799 1.1 uch return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
800 1.1 uch }
801 1.1 uch
802 1.1 uch struct tty *
803 1.1 uch txcomtty(dev)
804 1.1 uch dev_t dev;
805 1.1 uch {
806 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
807 1.3 uch
808 1.3 uch return sc->sc_tty;
809 1.1 uch }
810 1.1 uch
811 1.1 uch int
812 1.1 uch txcomioctl(dev, cmd, data, flag, p)
813 1.1 uch dev_t dev;
814 1.1 uch u_long cmd;
815 1.1 uch caddr_t data;
816 1.1 uch int flag;
817 1.1 uch struct proc *p;
818 1.1 uch {
819 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
820 1.1 uch struct tty *tp = sc->sc_tty;
821 1.3 uch int s, err;
822 1.3 uch
823 1.3 uch err = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
824 1.3 uch if (err >= 0) {
825 1.3 uch return err;
826 1.3 uch }
827 1.3 uch
828 1.3 uch err = ttioctl(tp, cmd, data, flag, p);
829 1.3 uch if (err >= 0) {
830 1.3 uch return err;
831 1.3 uch }
832 1.3 uch
833 1.3 uch err = 0;
834 1.3 uch
835 1.3 uch s = spltty();
836 1.3 uch
837 1.3 uch switch (cmd) {
838 1.3 uch case TIOCSBRK:
839 1.3 uch txcom_break(sc, 1);
840 1.3 uch break;
841 1.3 uch
842 1.3 uch case TIOCCBRK:
843 1.3 uch txcom_break(sc, 0);
844 1.3 uch break;
845 1.3 uch
846 1.3 uch case TIOCSDTR:
847 1.3 uch txcom_modem(sc, 1);
848 1.3 uch break;
849 1.3 uch
850 1.3 uch case TIOCCDTR:
851 1.3 uch txcom_modem(sc, 0);
852 1.3 uch break;
853 1.3 uch
854 1.3 uch case TIOCGFLAGS:
855 1.3 uch *(int *)data = sc->sc_chip->sc_swflags;
856 1.3 uch break;
857 1.3 uch
858 1.3 uch case TIOCSFLAGS:
859 1.3 uch err = suser(p->p_ucred, &p->p_acflag);
860 1.3 uch if (err) {
861 1.3 uch break;
862 1.3 uch }
863 1.3 uch sc->sc_chip->sc_swflags = *(int *)data;
864 1.3 uch break;
865 1.3 uch
866 1.3 uch }
867 1.1 uch
868 1.3 uch splx(s);
869 1.1 uch
870 1.3 uch return err;
871 1.1 uch }
872 1.1 uch
873 1.1 uch void
874 1.1 uch txcomstop(tp, flag)
875 1.1 uch struct tty *tp;
876 1.1 uch int flag;
877 1.1 uch {
878 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
879 1.1 uch int s;
880 1.1 uch
881 1.1 uch s = spltty();
882 1.1 uch
883 1.1 uch if (ISSET(tp->t_state, TS_BUSY)) {
884 1.1 uch /* Stop transmitting at the next chunk. */
885 1.1 uch sc->sc_tbc = 0;
886 1.1 uch sc->sc_heldtbc = 0;
887 1.1 uch if (!ISSET(tp->t_state, TS_TTSTOP))
888 1.1 uch SET(tp->t_state, TS_FLUSH);
889 1.1 uch }
890 1.3 uch
891 1.1 uch splx(s);
892 1.1 uch }
893 1.1 uch
894 1.1 uch void
895 1.1 uch txcomstart(tp)
896 1.1 uch struct tty *tp;
897 1.1 uch {
898 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
899 1.3 uch struct txcom_chip *chip = sc->sc_chip;
900 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
901 1.3 uch int slot = chip->sc_slot;
902 1.1 uch int s;
903 1.1 uch
904 1.1 uch s = spltty();
905 1.3 uch
906 1.3 uch if (!__txcom_txbufready(chip, 0) ||
907 1.3 uch ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
908 1.3 uch goto out;
909 1.1 uch
910 1.1 uch if (tp->t_outq.c_cc <= tp->t_lowat) {
911 1.1 uch if (ISSET(tp->t_state, TS_ASLEEP)) {
912 1.1 uch CLR(tp->t_state, TS_ASLEEP);
913 1.1 uch wakeup(&tp->t_outq);
914 1.1 uch }
915 1.1 uch selwakeup(&tp->t_wsel);
916 1.1 uch if (tp->t_outq.c_cc == 0)
917 1.3 uch goto out;
918 1.1 uch }
919 1.3 uch
920 1.1 uch sc->sc_tba = tp->t_outq.c_cf;
921 1.1 uch sc->sc_tbc = ndqb(&tp->t_outq, 0);
922 1.3 uch SET(tp->t_state, TS_BUSY);
923 1.3 uch
924 1.3 uch /* Output the first character of the contiguous buffer. */
925 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot),
926 1.3 uch (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK));
927 1.3 uch
928 1.3 uch sc->sc_tbc--;
929 1.3 uch sc->sc_tba++;
930 1.1 uch
931 1.3 uch out:
932 1.1 uch splx(s);
933 1.1 uch }
934 1.1 uch
935 1.3 uch /*
936 1.3 uch * Set TXcom tty parameters from termios.
937 1.3 uch */
938 1.1 uch int
939 1.1 uch txcomparam(tp, t)
940 1.1 uch struct tty *tp;
941 1.1 uch struct termios *t;
942 1.1 uch {
943 1.3 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
944 1.3 uch struct txcom_chip *chip;
945 1.3 uch int ospeed, cflag;
946 1.3 uch int s;
947 1.3 uch
948 1.3 uch if (!sc)
949 1.3 uch return ENXIO;
950 1.3 uch
951 1.3 uch ospeed = t->c_ospeed;
952 1.3 uch cflag = t->c_cflag;
953 1.3 uch
954 1.3 uch /* Check requested parameters. */
955 1.3 uch if (ospeed < 0) {
956 1.3 uch return EINVAL;
957 1.3 uch }
958 1.3 uch if (t->c_ispeed && t->c_ispeed != ospeed) {
959 1.3 uch return EINVAL;
960 1.3 uch }
961 1.3 uch
962 1.3 uch s = spltty();
963 1.3 uch chip = sc->sc_chip;
964 1.3 uch /*
965 1.3 uch * For the console, always force CLOCAL and !HUPCL, so that the port
966 1.3 uch * is always active.
967 1.3 uch */
968 1.3 uch if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) ||
969 1.3 uch ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
970 1.3 uch SET(cflag, CLOCAL);
971 1.3 uch CLR(cflag, HUPCL);
972 1.3 uch }
973 1.3 uch splx(s);
974 1.3 uch
975 1.3 uch /*
976 1.3 uch * Only whack the UART when params change.
977 1.3 uch * Some callers need to clear tp->t_ospeed
978 1.3 uch * to make sure initialization gets done.
979 1.3 uch */
980 1.3 uch if (tp->t_ospeed == ospeed && tp->t_cflag == cflag) {
981 1.3 uch return 0;
982 1.3 uch }
983 1.3 uch
984 1.3 uch s = spltty();
985 1.3 uch chip = sc->sc_chip;
986 1.3 uch chip->sc_speed = ospeed;
987 1.3 uch chip->sc_cflag = cflag;
988 1.3 uch
989 1.3 uch txcom_setmode(chip);
990 1.3 uch txcom_setbaudrate(chip);
991 1.3 uch
992 1.3 uch /* And copy to tty. */
993 1.3 uch tp->t_ispeed = 0;
994 1.3 uch tp->t_ospeed = chip->sc_speed;
995 1.3 uch tp->t_cflag = chip->sc_cflag;
996 1.3 uch
997 1.3 uch /*
998 1.3 uch * If hardware flow control is disabled, unblock any hard flow
999 1.3 uch * control state.
1000 1.3 uch */
1001 1.3 uch if (!ISSET(chip->sc_cflag, CHWFLOW)) {
1002 1.3 uch txcomstart(tp);
1003 1.3 uch }
1004 1.3 uch
1005 1.3 uch splx(s);
1006 1.3 uch
1007 1.1 uch return 0;
1008 1.1 uch }
1009