txcom.c revision 1.40 1 1.40 tsutsui /* $NetBSD: txcom.c,v 1.40 2008/06/12 16:50:53 tsutsui Exp $ */
2 1.1 uch
3 1.9 uch /*-
4 1.24 uch * Copyright (c) 1999, 2000, 2004 The NetBSD Foundation, Inc.
5 1.1 uch * All rights reserved.
6 1.1 uch *
7 1.9 uch * This code is derived from software contributed to The NetBSD Foundation
8 1.9 uch * by UCHIYAMA Yasushi.
9 1.9 uch *
10 1.1 uch * Redistribution and use in source and binary forms, with or without
11 1.1 uch * modification, are permitted provided that the following conditions
12 1.1 uch * are met:
13 1.1 uch * 1. Redistributions of source code must retain the above copyright
14 1.1 uch * notice, this list of conditions and the following disclaimer.
15 1.9 uch * 2. Redistributions in binary form must reproduce the above copyright
16 1.9 uch * notice, this list of conditions and the following disclaimer in the
17 1.9 uch * documentation and/or other materials provided with the distribution.
18 1.1 uch *
19 1.9 uch * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.9 uch * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.9 uch * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.9 uch * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.9 uch * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.9 uch * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.9 uch * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.9 uch * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.9 uch * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.9 uch * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.9 uch * POSSIBILITY OF SUCH DAMAGE.
30 1.1 uch */
31 1.22 lukem
32 1.22 lukem #include <sys/cdefs.h>
33 1.40 tsutsui __KERNEL_RCSID(0, "$NetBSD: txcom.c,v 1.40 2008/06/12 16:50:53 tsutsui Exp $");
34 1.15 uch
35 1.15 uch #include "opt_tx39uart_debug.h"
36 1.1 uch
37 1.1 uch #include <sys/param.h>
38 1.1 uch #include <sys/systm.h>
39 1.3 uch #include <sys/kernel.h>
40 1.1 uch #include <sys/device.h>
41 1.3 uch #include <sys/malloc.h>
42 1.30 elad #include <sys/kauth.h>
43 1.1 uch
44 1.1 uch #include <sys/proc.h> /* tsleep/wakeup */
45 1.1 uch
46 1.1 uch #include <sys/ioctl.h>
47 1.1 uch #include <sys/select.h>
48 1.1 uch #include <sys/file.h>
49 1.1 uch
50 1.1 uch #include <sys/tty.h>
51 1.1 uch #include <sys/conf.h>
52 1.1 uch #include <dev/cons.h> /* consdev */
53 1.1 uch
54 1.1 uch #include <machine/bus.h>
55 1.9 uch #include <machine/config_hook.h>
56 1.1 uch
57 1.1 uch #include <hpcmips/tx/tx39var.h>
58 1.1 uch #include <hpcmips/tx/tx39icureg.h>
59 1.1 uch #include <hpcmips/tx/tx39uartvar.h>
60 1.1 uch #include <hpcmips/tx/tx39uartreg.h>
61 1.1 uch
62 1.5 uch #include <hpcmips/tx/tx39irvar.h>
63 1.5 uch
64 1.1 uch #include <hpcmips/tx/tx39clockreg.h> /* XXX */
65 1.6 uch
66 1.9 uch /*
67 1.9 uch * UARTA channel has DTR, DSR, RTS, CTS lines. and they wired to MFIO/IO port.
68 1.9 uch */
69 1.9 uch #define IS_COM0(s) ((s) == 0)
70 1.9 uch #define IS_COM1(s) ((s) == 1)
71 1.9 uch #define ON ((void *)1)
72 1.9 uch #define OFF ((void *)0)
73 1.1 uch
74 1.15 uch #ifdef TX39UART_DEBUG
75 1.15 uch #define DPRINTF_ENABLE
76 1.15 uch #define DPRINTF_DEBUG tx39uart_debug
77 1.1 uch #endif
78 1.15 uch #include <machine/debug.h>
79 1.1 uch
80 1.3 uch #define TXCOM_HW_CONSOLE 0x40
81 1.3 uch #define TXCOM_RING_SIZE 256 /* must be a power of two! */
82 1.3 uch #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1)
83 1.1 uch
84 1.3 uch struct txcom_chip {
85 1.1 uch tx_chipset_tag_t sc_tc;
86 1.1 uch int sc_slot; /* UARTA or UARTB */
87 1.1 uch int sc_cflag;
88 1.1 uch int sc_speed;
89 1.3 uch int sc_swflags;
90 1.1 uch int sc_hwflags;
91 1.6 uch
92 1.6 uch int sc_dcd;
93 1.9 uch int sc_msr_cts;
94 1.9 uch int sc_tx_stopped;
95 1.3 uch };
96 1.1 uch
97 1.3 uch struct txcom_softc {
98 1.3 uch struct device sc_dev;
99 1.3 uch struct tty *sc_tty;
100 1.3 uch struct txcom_chip *sc_chip;
101 1.3 uch
102 1.8 thorpej struct callout sc_txsoft_ch;
103 1.8 thorpej struct callout sc_rxsoft_ch;
104 1.8 thorpej
105 1.3 uch u_int8_t *sc_tba; /* transmit buffer address */
106 1.3 uch int sc_tbc; /* transmit byte count */
107 1.3 uch int sc_heldtbc;
108 1.3 uch u_int8_t *sc_rbuf; /* receive buffer address */
109 1.3 uch int sc_rbput; /* receive byte count */
110 1.3 uch int sc_rbget;
111 1.1 uch };
112 1.1 uch
113 1.1 uch extern struct cfdriver txcom_cd;
114 1.1 uch
115 1.9 uch int txcom_match(struct device *, struct cfdata *, void *);
116 1.9 uch void txcom_attach(struct device *, struct device *, void *);
117 1.9 uch int txcom_print(void*, const char *);
118 1.9 uch
119 1.9 uch int txcom_txintr(void *);
120 1.9 uch int txcom_rxintr(void *);
121 1.9 uch int txcom_frameerr_intr(void *);
122 1.9 uch int txcom_parityerr_intr(void *);
123 1.9 uch int txcom_break_intr(void *);
124 1.3 uch
125 1.9 uch void txcom_rxsoft(void *);
126 1.9 uch void txcom_txsoft(void *);
127 1.3 uch
128 1.9 uch int txcom_stsoft(void *);
129 1.9 uch int txcom_stsoft2(void *);
130 1.9 uch int txcom_stsoft3(void *);
131 1.9 uch int txcom_stsoft4(void *);
132 1.9 uch
133 1.9 uch
134 1.9 uch void txcom_shutdown(struct txcom_softc *);
135 1.9 uch void txcom_break(struct txcom_softc *, int);
136 1.9 uch void txcom_modem(struct txcom_softc *, int);
137 1.9 uch void txcomstart(struct tty *);
138 1.9 uch int txcomparam(struct tty *, struct termios *);
139 1.9 uch
140 1.9 uch void txcom_reset (struct txcom_chip *);
141 1.35 thorpej int txcom_enable (struct txcom_chip *, bool);
142 1.9 uch void txcom_disable (struct txcom_chip *);
143 1.9 uch void txcom_setmode (struct txcom_chip *);
144 1.9 uch void txcom_setbaudrate(struct txcom_chip *);
145 1.9 uch int txcom_cngetc (dev_t);
146 1.9 uch void txcom_cnputc (dev_t, int);
147 1.9 uch void txcom_cnpollc (dev_t, int);
148 1.3 uch
149 1.9 uch int txcom_dcd_hook(void *, int, long, void *);
150 1.9 uch int txcom_cts_hook(void *, int, long, void *);
151 1.1 uch
152 1.9 uch
153 1.27 perry inline int __txcom_txbufready(struct txcom_chip *, int);
154 1.9 uch const char *__txcom_slotname(int);
155 1.9 uch
156 1.9 uch #ifdef TX39UARTDEBUG
157 1.9 uch void txcom_dump(struct txcom_chip *);
158 1.9 uch #endif
159 1.6 uch
160 1.3 uch struct consdev txcomcons = {
161 1.21 nakayama NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc, NULL, NULL,
162 1.14 uch NULL, NODEV, CN_NORMAL
163 1.3 uch };
164 1.3 uch
165 1.1 uch /* Serial console */
166 1.3 uch struct txcom_chip txcom_chip;
167 1.1 uch
168 1.19 thorpej CFATTACH_DECL(txcom, sizeof(struct txcom_softc),
169 1.19 thorpej txcom_match, txcom_attach, NULL, NULL);
170 1.1 uch
171 1.17 gehenna dev_type_open(txcomopen);
172 1.17 gehenna dev_type_close(txcomclose);
173 1.17 gehenna dev_type_read(txcomread);
174 1.17 gehenna dev_type_write(txcomwrite);
175 1.17 gehenna dev_type_ioctl(txcomioctl);
176 1.17 gehenna dev_type_stop(txcomstop);
177 1.17 gehenna dev_type_tty(txcomtty);
178 1.17 gehenna dev_type_poll(txcompoll);
179 1.17 gehenna
180 1.17 gehenna const struct cdevsw txcom_cdevsw = {
181 1.17 gehenna txcomopen, txcomclose, txcomread, txcomwrite, txcomioctl,
182 1.20 jdolecek txcomstop, txcomtty, txcompoll, nommap, ttykqfilter, D_TTY
183 1.17 gehenna };
184 1.17 gehenna
185 1.1 uch int
186 1.1 uch txcom_match(parent, cf, aux)
187 1.1 uch struct device *parent;
188 1.1 uch struct cfdata *cf;
189 1.1 uch void *aux;
190 1.1 uch {
191 1.1 uch /* if the autoconfiguration got this far, there's a slot here */
192 1.1 uch return 1;
193 1.1 uch }
194 1.1 uch
195 1.1 uch void
196 1.9 uch txcom_attach(struct device *parent, struct device *self, void *aux)
197 1.1 uch {
198 1.1 uch struct tx39uart_attach_args *ua = aux;
199 1.1 uch struct txcom_softc *sc = (void*)self;
200 1.1 uch tx_chipset_tag_t tc;
201 1.1 uch struct tty *tp;
202 1.3 uch struct txcom_chip *chip;
203 1.6 uch int slot, console;
204 1.1 uch
205 1.1 uch /* Check this slot used as serial console */
206 1.6 uch console = (ua->ua_slot == txcom_chip.sc_slot) &&
207 1.14 uch (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE);
208 1.6 uch
209 1.6 uch if (console) {
210 1.3 uch sc->sc_chip = &txcom_chip;
211 1.3 uch } else {
212 1.3 uch if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip),
213 1.14 uch M_DEVBUF, M_WAITOK))) {
214 1.3 uch printf(": can't allocate chip\n");
215 1.3 uch return;
216 1.3 uch }
217 1.3 uch memset(sc->sc_chip, 0, sizeof(struct txcom_chip));
218 1.1 uch }
219 1.1 uch
220 1.3 uch chip = sc->sc_chip;
221 1.3 uch tc = chip->sc_tc = ua->ua_tc;
222 1.3 uch slot = chip->sc_slot = ua->ua_slot;
223 1.3 uch
224 1.6 uch #ifdef TX39UARTDEBUG
225 1.6 uch txcom_dump(chip);
226 1.6 uch #endif
227 1.6 uch if (!console)
228 1.6 uch txcom_reset(chip);
229 1.6 uch
230 1.3 uch if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) {
231 1.3 uch printf(": can't allocate buffer.\n");
232 1.3 uch return;
233 1.3 uch }
234 1.3 uch memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE);
235 1.1 uch
236 1.1 uch tp = ttymalloc();
237 1.1 uch tp->t_oproc = txcomstart;
238 1.1 uch tp->t_param = txcomparam;
239 1.1 uch tp->t_hwiflow = NULL;
240 1.1 uch sc->sc_tty = tp;
241 1.1 uch tty_attach(tp);
242 1.1 uch
243 1.3 uch if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
244 1.1 uch int maj;
245 1.1 uch /* locate the major number */
246 1.17 gehenna maj = cdevsw_lookup_major(&txcom_cdevsw);
247 1.1 uch
248 1.29 thorpej cn_tab->cn_dev = makedev(maj, device_unit(&sc->sc_dev));
249 1.1 uch
250 1.3 uch printf(": console");
251 1.1 uch }
252 1.1 uch
253 1.3 uch printf("\n");
254 1.1 uch
255 1.1 uch /*
256 1.1 uch * Enable interrupt
257 1.1 uch */
258 1.3 uch #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s))
259 1.3 uch
260 1.3 uch tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY,
261 1.14 uch txcom_rxintr, sc);
262 1.3 uch tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY,
263 1.14 uch txcom_txintr, sc);
264 1.3 uch tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY,
265 1.14 uch txcom_rxintr, sc);
266 1.3 uch tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY,
267 1.14 uch txcom_txintr, sc);
268 1.3 uch tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY,
269 1.14 uch txcom_frameerr_intr, sc);
270 1.3 uch tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY,
271 1.14 uch txcom_parityerr_intr, sc);
272 1.3 uch tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY,
273 1.14 uch txcom_break_intr, sc);
274 1.5 uch
275 1.9 uch /*
276 1.9 uch * UARTA has external signal line. (its wiring is platform dependent)
277 1.9 uch */
278 1.9 uch if (IS_COM0(slot)) {
279 1.9 uch /* install DCD, CTS hooks. */
280 1.11 sato config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_DCD,
281 1.14 uch CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc);
282 1.11 sato config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_CTS,
283 1.14 uch CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc);
284 1.9 uch }
285 1.6 uch
286 1.5 uch /*
287 1.5 uch * UARTB can connect IR module
288 1.5 uch */
289 1.9 uch if (IS_COM1(slot)) {
290 1.5 uch struct txcom_attach_args tca;
291 1.5 uch tca.tca_tc = tc;
292 1.5 uch tca.tca_parent = self;
293 1.5 uch config_found(self, &tca, txcom_print);
294 1.5 uch }
295 1.5 uch }
296 1.5 uch
297 1.5 uch int
298 1.9 uch txcom_print(void *aux, const char *pnp)
299 1.5 uch {
300 1.5 uch return pnp ? QUIET : UNCONF;
301 1.1 uch }
302 1.1 uch
303 1.6 uch void
304 1.9 uch txcom_reset(struct txcom_chip *chip)
305 1.6 uch {
306 1.6 uch tx_chipset_tag_t tc;
307 1.6 uch int slot, ofs;
308 1.6 uch txreg_t reg;
309 1.6 uch
310 1.6 uch tc = chip->sc_tc;
311 1.6 uch slot = chip->sc_slot;
312 1.6 uch ofs = TX39_UARTCTRL1_REG(slot);
313 1.6 uch
314 1.6 uch /* Supply clock */
315 1.6 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
316 1.6 uch reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
317 1.6 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
318 1.6 uch
319 1.6 uch /* reset UART module */
320 1.6 uch tx_conf_write(tc, ofs, 0);
321 1.6 uch }
322 1.6 uch
323 1.1 uch int
324 1.35 thorpej txcom_enable(struct txcom_chip *chip, bool console)
325 1.1 uch {
326 1.1 uch tx_chipset_tag_t tc;
327 1.1 uch txreg_t reg;
328 1.3 uch int slot, ofs, timeout;
329 1.1 uch
330 1.3 uch tc = chip->sc_tc;
331 1.3 uch slot = chip->sc_slot;
332 1.3 uch ofs = TX39_UARTCTRL1_REG(slot);
333 1.1 uch
334 1.24 uch /*
335 1.24 uch * External power supply (if any)
336 1.24 uch * When serial console, Windows CE already powered on it.
337 1.24 uch */
338 1.24 uch if (!console) {
339 1.24 uch config_hook_call(CONFIG_HOOK_POWERCONTROL,
340 1.24 uch CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON);
341 1.24 uch delay(3);
342 1.24 uch }
343 1.9 uch
344 1.6 uch /* Supply clock */
345 1.5 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
346 1.5 uch reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
347 1.5 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
348 1.5 uch
349 1.6 uch /*
350 1.6 uch * XXX Disable DMA (DMA not coded yet)
351 1.6 uch */
352 1.6 uch reg = tx_conf_read(tc, ofs);
353 1.6 uch reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
354 1.6 uch tx_conf_write(tc, ofs, reg);
355 1.6 uch
356 1.6 uch /* enable */
357 1.3 uch reg = tx_conf_read(tc, ofs);
358 1.1 uch reg |= TX39_UARTCTRL1_ENUART;
359 1.1 uch reg &= ~TX39_UARTCTRL1_ENBREAHALT;
360 1.3 uch tx_conf_write(tc, ofs, reg);
361 1.3 uch
362 1.9 uch timeout = 100000;
363 1.3 uch
364 1.3 uch while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) &&
365 1.14 uch --timeout > 0)
366 1.3 uch ;
367 1.3 uch
368 1.5 uch if (timeout == 0 && !cold) {
369 1.6 uch printf("%s never power up\n", __txcom_slotname(slot));
370 1.3 uch return 1;
371 1.3 uch }
372 1.3 uch
373 1.1 uch return 0;
374 1.1 uch }
375 1.1 uch
376 1.1 uch void
377 1.9 uch txcom_disable(struct txcom_chip *chip)
378 1.1 uch {
379 1.1 uch tx_chipset_tag_t tc;
380 1.1 uch txreg_t reg;
381 1.1 uch int slot;
382 1.1 uch
383 1.3 uch tc = chip->sc_tc;
384 1.3 uch slot = chip->sc_slot;
385 1.1 uch
386 1.1 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
387 1.1 uch /* DMA */
388 1.1 uch reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
389 1.3 uch
390 1.6 uch /* disable module */
391 1.1 uch reg &= ~TX39_UARTCTRL1_ENUART;
392 1.1 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
393 1.3 uch
394 1.1 uch /* Clock */
395 1.1 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
396 1.1 uch reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
397 1.1 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
398 1.1 uch
399 1.1 uch }
400 1.1 uch
401 1.27 perry inline int
402 1.9 uch __txcom_txbufready(struct txcom_chip *chip, int retry)
403 1.3 uch {
404 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
405 1.3 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
406 1.3 uch
407 1.3 uch do {
408 1.3 uch if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY)
409 1.3 uch return 1;
410 1.3 uch } while(--retry != 0);
411 1.3 uch
412 1.1 uch return 0;
413 1.1 uch }
414 1.1 uch
415 1.5 uch void
416 1.9 uch txcom_pulse_mode(struct device *dev)
417 1.5 uch {
418 1.5 uch struct txcom_softc *sc = (void*)dev;
419 1.5 uch struct txcom_chip *chip = sc->sc_chip;
420 1.5 uch tx_chipset_tag_t tc = chip->sc_tc;
421 1.5 uch int ofs;
422 1.5 uch txreg_t reg;
423 1.5 uch
424 1.5 uch ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
425 1.5 uch
426 1.5 uch reg = tx_conf_read(tc, ofs);
427 1.6 uch /* WindowsCE use this setting */
428 1.6 uch reg |= TX39_UARTCTRL1_PULSEOPT1;
429 1.6 uch reg &= ~TX39_UARTCTRL1_PULSEOPT2;
430 1.6 uch reg |= TX39_UARTCTRL1_DTINVERT;
431 1.6 uch
432 1.5 uch tx_conf_write(tc, ofs, reg);
433 1.5 uch }
434 1.5 uch
435 1.3 uch /*
436 1.3 uch * console
437 1.3 uch */
438 1.1 uch int
439 1.9 uch txcom_cngetc(dev_t dev)
440 1.1 uch {
441 1.1 uch tx_chipset_tag_t tc;
442 1.2 uch int ofs, c, s;
443 1.2 uch
444 1.3 uch s = spltty();
445 1.2 uch
446 1.3 uch tc = txcom_chip.sc_tc;
447 1.3 uch ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot);
448 1.1 uch
449 1.1 uch while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs)))
450 1.1 uch ;
451 1.2 uch
452 1.3 uch c = TX39_UARTRXHOLD_RXDATA(
453 1.3 uch tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot)));
454 1.2 uch
455 1.3 uch if (c == '\r')
456 1.1 uch c = '\n';
457 1.1 uch
458 1.2 uch splx(s);
459 1.2 uch
460 1.1 uch return c;
461 1.1 uch }
462 1.1 uch
463 1.1 uch void
464 1.9 uch txcom_cnputc(dev_t dev, int c)
465 1.1 uch {
466 1.3 uch struct txcom_chip *chip = &txcom_chip;
467 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
468 1.3 uch int s;
469 1.2 uch
470 1.3 uch s = spltty();
471 1.1 uch
472 1.3 uch /* Wait for transmitter to empty */
473 1.3 uch __txcom_txbufready(chip, -1);
474 1.1 uch
475 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
476 1.14 uch (c & TX39_UARTTXHOLD_TXDATA_MASK));
477 1.1 uch
478 1.3 uch __txcom_txbufready(chip, -1);
479 1.3 uch
480 1.2 uch splx(s);
481 1.1 uch }
482 1.1 uch
483 1.1 uch void
484 1.9 uch txcom_cnpollc(dev_t dev, int on)
485 1.1 uch {
486 1.1 uch }
487 1.1 uch
488 1.1 uch void
489 1.9 uch txcom_setmode(struct txcom_chip *chip)
490 1.1 uch {
491 1.3 uch tcflag_t cflag = chip->sc_cflag;
492 1.3 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
493 1.1 uch txreg_t reg;
494 1.1 uch
495 1.3 uch reg = tx_conf_read(chip->sc_tc, ofs);
496 1.6 uch reg &= ~TX39_UARTCTRL1_ENUART;
497 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg);
498 1.6 uch
499 1.1 uch switch (ISSET(cflag, CSIZE)) {
500 1.1 uch default:
501 1.1 uch printf("txcom_setmode: CS7, CS8 only. use CS7");
502 1.1 uch /* FALL THROUGH */
503 1.1 uch case CS7:
504 1.1 uch reg |= TX39_UARTCTRL1_BIT7;
505 1.1 uch break;
506 1.1 uch case CS8:
507 1.1 uch reg &= ~TX39_UARTCTRL1_BIT7;
508 1.1 uch break;
509 1.1 uch }
510 1.3 uch
511 1.1 uch if (ISSET(cflag, PARENB)) {
512 1.1 uch reg |= TX39_UARTCTRL1_ENPARITY;
513 1.1 uch if (ISSET(cflag, PARODD)) {
514 1.1 uch reg &= ~TX39_UARTCTRL1_EVENPARITY;
515 1.1 uch } else {
516 1.1 uch reg |= TX39_UARTCTRL1_EVENPARITY;
517 1.1 uch }
518 1.1 uch } else {
519 1.1 uch reg &= ~TX39_UARTCTRL1_ENPARITY;
520 1.1 uch }
521 1.3 uch
522 1.6 uch if (ISSET(cflag, CSTOPB))
523 1.1 uch reg |= TX39_UARTCTRL1_TWOSTOP;
524 1.6 uch else
525 1.6 uch reg &= ~TX39_UARTCTRL1_TWOSTOP;
526 1.6 uch
527 1.6 uch reg |= TX39_UARTCTRL1_ENUART;
528 1.3 uch tx_conf_write(chip->sc_tc, ofs, reg);
529 1.3 uch }
530 1.3 uch
531 1.3 uch void
532 1.9 uch txcom_setbaudrate(struct txcom_chip *chip)
533 1.3 uch {
534 1.3 uch int baudrate;
535 1.6 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
536 1.6 uch txreg_t reg, reg1;
537 1.3 uch
538 1.3 uch if (chip->sc_speed == 0)
539 1.3 uch return;
540 1.3 uch
541 1.5 uch if (!cold)
542 1.15 uch DPRINTF("%d\n", chip->sc_speed);
543 1.5 uch
544 1.6 uch reg1 = tx_conf_read(chip->sc_tc, ofs);
545 1.6 uch reg1 &= ~TX39_UARTCTRL1_ENUART;
546 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg1);
547 1.6 uch
548 1.3 uch baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1;
549 1.3 uch reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate);
550 1.3 uch
551 1.3 uch tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg);
552 1.6 uch
553 1.6 uch reg1 |= TX39_UARTCTRL1_ENUART;
554 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg1);
555 1.3 uch }
556 1.3 uch
557 1.3 uch int
558 1.9 uch txcom_cnattach(int slot, int speed, int cflag)
559 1.3 uch {
560 1.3 uch cn_tab = &txcomcons;
561 1.3 uch
562 1.3 uch txcom_chip.sc_tc = tx_conf_get_tag();
563 1.3 uch txcom_chip.sc_slot = slot;
564 1.3 uch txcom_chip.sc_cflag = cflag;
565 1.3 uch txcom_chip.sc_speed = speed;
566 1.3 uch txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE;
567 1.6 uch #if notyet
568 1.6 uch txcom_reset(&txcom_chip);
569 1.6 uch #endif
570 1.6 uch txcom_setmode(&txcom_chip);
571 1.6 uch txcom_setbaudrate(&txcom_chip);
572 1.3 uch
573 1.36 thorpej if (txcom_enable(&txcom_chip, true) != 0)
574 1.5 uch return 1;
575 1.5 uch
576 1.3 uch return 0;
577 1.3 uch }
578 1.3 uch
579 1.3 uch /*
580 1.3 uch * tty
581 1.3 uch */
582 1.3 uch void
583 1.9 uch txcom_break(struct txcom_softc *sc, int on)
584 1.3 uch {
585 1.3 uch struct txcom_chip *chip = sc->sc_chip;
586 1.1 uch
587 1.3 uch tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
588 1.14 uch on ? TX39_UARTTXHOLD_BREAK : 0);
589 1.1 uch }
590 1.1 uch
591 1.1 uch void
592 1.9 uch txcom_modem(struct txcom_softc *sc, int on)
593 1.1 uch {
594 1.3 uch struct txcom_chip *chip = sc->sc_chip;
595 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
596 1.3 uch int slot = chip->sc_slot;
597 1.1 uch txreg_t reg;
598 1.1 uch
599 1.9 uch /* assert DTR */
600 1.9 uch if (IS_COM0(slot)) {
601 1.11 sato config_hook_call(CONFIG_HOOK_SET,
602 1.14 uch CONFIG_HOOK_COM0_DTR,
603 1.14 uch (void *)on);
604 1.9 uch }
605 1.9 uch
606 1.3 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
607 1.6 uch reg &= ~TX39_UARTCTRL1_ENUART;
608 1.6 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
609 1.3 uch
610 1.3 uch if (on) {
611 1.3 uch reg &= ~TX39_UARTCTRL1_DISTXD;
612 1.3 uch } else {
613 1.6 uch reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */
614 1.3 uch }
615 1.6 uch
616 1.6 uch reg |= TX39_UARTCTRL1_ENUART;
617 1.6 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
618 1.1 uch }
619 1.1 uch
620 1.1 uch void
621 1.9 uch txcom_shutdown(struct txcom_softc *sc)
622 1.1 uch {
623 1.1 uch struct tty *tp = sc->sc_tty;
624 1.3 uch int s = spltty();
625 1.1 uch
626 1.3 uch /* Clear any break condition set with TIOCSBRK. */
627 1.3 uch txcom_break(sc, 0);
628 1.3 uch
629 1.3 uch /*
630 1.3 uch * Hang up if necessary. Wait a bit, so the other side has time to
631 1.3 uch * notice even if we immediately open the port again.
632 1.3 uch */
633 1.3 uch if (ISSET(tp->t_cflag, HUPCL)) {
634 1.3 uch txcom_modem(sc, 0);
635 1.3 uch (void) tsleep(sc, TTIPRI, ttclos, hz);
636 1.3 uch }
637 1.3 uch
638 1.3 uch
639 1.3 uch /* Turn off interrupts if not the console. */
640 1.3 uch if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
641 1.3 uch txcom_disable(sc->sc_chip);
642 1.3 uch }
643 1.1 uch
644 1.3 uch splx(s);
645 1.3 uch }
646 1.1 uch
647 1.9 uch const char *
648 1.9 uch __txcom_slotname(int slot)
649 1.3 uch {
650 1.9 uch static const char *slotname[] = {"UARTA", "UARTB", "unknown"};
651 1.9 uch
652 1.9 uch if (slot != 0 && slot != 1)
653 1.9 uch return slotname[2];
654 1.9 uch
655 1.9 uch return slotname[slot];
656 1.2 uch }
657 1.2 uch
658 1.2 uch int
659 1.9 uch txcom_frameerr_intr(void *arg)
660 1.3 uch {
661 1.3 uch struct txcom_softc *sc = arg;
662 1.3 uch
663 1.3 uch printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot));
664 1.3 uch
665 1.3 uch return 0;
666 1.3 uch }
667 1.3 uch
668 1.3 uch int
669 1.9 uch txcom_parityerr_intr(void *arg)
670 1.3 uch {
671 1.3 uch struct txcom_softc *sc = arg;
672 1.3 uch
673 1.3 uch printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot));
674 1.2 uch
675 1.2 uch return 0;
676 1.1 uch }
677 1.1 uch
678 1.1 uch int
679 1.9 uch txcom_break_intr(void *arg)
680 1.1 uch {
681 1.1 uch struct txcom_softc *sc = arg;
682 1.3 uch
683 1.3 uch printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot));
684 1.3 uch
685 1.3 uch return 0;
686 1.3 uch }
687 1.3 uch
688 1.3 uch int
689 1.9 uch txcom_rxintr(void *arg)
690 1.3 uch {
691 1.3 uch struct txcom_softc *sc = arg;
692 1.3 uch struct txcom_chip *chip = sc->sc_chip;
693 1.1 uch u_int8_t c;
694 1.1 uch
695 1.3 uch c = TX39_UARTRXHOLD_RXDATA(
696 1.3 uch tx_conf_read(chip->sc_tc,
697 1.14 uch TX39_UARTRXHOLD_REG(chip->sc_slot)));
698 1.3 uch
699 1.3 uch sc->sc_rbuf[sc->sc_rbput] = c;
700 1.3 uch sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK;
701 1.3 uch
702 1.8 thorpej callout_reset(&sc->sc_rxsoft_ch, 1, txcom_rxsoft, sc);
703 1.1 uch
704 1.1 uch return 0;
705 1.1 uch }
706 1.1 uch
707 1.3 uch void
708 1.9 uch txcom_rxsoft(void *arg)
709 1.3 uch {
710 1.3 uch struct txcom_softc *sc = arg;
711 1.3 uch struct tty *tp = sc->sc_tty;
712 1.14 uch int (*rint)(int, struct tty *);
713 1.3 uch int code;
714 1.3 uch int s, end, get;
715 1.3 uch
716 1.10 eeh rint = tp->t_linesw->l_rint;
717 1.3 uch
718 1.3 uch s = spltty();
719 1.3 uch end = sc->sc_rbput;
720 1.3 uch get = sc->sc_rbget;
721 1.3 uch
722 1.3 uch while (get != end) {
723 1.3 uch code = sc->sc_rbuf[get];
724 1.3 uch
725 1.3 uch if ((*rint)(code, tp) == -1) {
726 1.3 uch /*
727 1.3 uch * The line discipline's buffer is out of space.
728 1.3 uch */
729 1.3 uch }
730 1.3 uch get = (get + 1) % TXCOM_RING_MASK;
731 1.3 uch }
732 1.3 uch sc->sc_rbget = get;
733 1.3 uch
734 1.3 uch splx(s);
735 1.3 uch }
736 1.3 uch
737 1.1 uch int
738 1.9 uch txcom_txintr(void *arg)
739 1.1 uch {
740 1.1 uch struct txcom_softc *sc = arg;
741 1.3 uch struct txcom_chip *chip = sc->sc_chip;
742 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
743 1.1 uch
744 1.3 uch if (sc->sc_tbc > 0) {
745 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
746 1.14 uch (*sc->sc_tba &
747 1.14 uch TX39_UARTTXHOLD_TXDATA_MASK));
748 1.3 uch sc->sc_tbc--;
749 1.3 uch sc->sc_tba++;
750 1.3 uch } else {
751 1.8 thorpej callout_reset(&sc->sc_rxsoft_ch, 1, txcom_txsoft, sc);
752 1.3 uch }
753 1.1 uch
754 1.1 uch return 0;
755 1.1 uch }
756 1.1 uch
757 1.3 uch void
758 1.9 uch txcom_txsoft(void *arg)
759 1.3 uch {
760 1.3 uch struct txcom_softc *sc = arg;
761 1.3 uch struct tty *tp = sc->sc_tty;
762 1.3 uch int s = spltty();
763 1.3 uch
764 1.3 uch CLR(tp->t_state, TS_BUSY);
765 1.3 uch if (ISSET(tp->t_state, TS_FLUSH)) {
766 1.3 uch CLR(tp->t_state, TS_FLUSH);
767 1.3 uch } else {
768 1.3 uch ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
769 1.3 uch }
770 1.3 uch
771 1.10 eeh (*tp->t_linesw->l_start)(tp);
772 1.3 uch
773 1.3 uch splx(s);
774 1.3 uch }
775 1.1 uch
776 1.1 uch int
777 1.26 christos txcomopen(dev_t dev, int flag, int mode, struct lwp *l)
778 1.1 uch {
779 1.40 tsutsui struct txcom_softc *sc;
780 1.3 uch struct txcom_chip *chip;
781 1.3 uch struct tty *tp;
782 1.23 shin int s, err = ENXIO;
783 1.1 uch
784 1.40 tsutsui sc = device_lookup_private(&txcom_cd, minor(dev));
785 1.40 tsutsui if (sc == NULL)
786 1.23 shin return err;
787 1.3 uch
788 1.3 uch chip = sc->sc_chip;
789 1.3 uch tp = sc->sc_tty;
790 1.3 uch
791 1.32 elad if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp))
792 1.3 uch return (EBUSY);
793 1.3 uch
794 1.3 uch s = spltty();
795 1.3 uch
796 1.36 thorpej if (txcom_enable(sc->sc_chip, false)) {
797 1.6 uch splx(s);
798 1.5 uch goto out;
799 1.6 uch }
800 1.5 uch /*
801 1.5 uch * Do the following iff this is a first open.
802 1.5 uch */
803 1.5 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
804 1.5 uch struct termios t;
805 1.5 uch
806 1.5 uch tp->t_dev = dev;
807 1.1 uch
808 1.5 uch t.c_ispeed = 0;
809 1.5 uch if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
810 1.5 uch t.c_ospeed = chip->sc_speed;
811 1.5 uch t.c_cflag = chip->sc_cflag;
812 1.5 uch } else {
813 1.5 uch t.c_ospeed = TTYDEF_SPEED;
814 1.5 uch t.c_cflag = TTYDEF_CFLAG;
815 1.5 uch }
816 1.3 uch
817 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL))
818 1.5 uch SET(t.c_cflag, CLOCAL);
819 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS))
820 1.5 uch SET(t.c_cflag, CRTSCTS);
821 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF))
822 1.5 uch SET(t.c_cflag, MDMBUF);
823 1.5 uch
824 1.5 uch /* Make sure txcomparam() will do something. */
825 1.5 uch tp->t_ospeed = 0;
826 1.5 uch txcomparam(tp, &t);
827 1.5 uch
828 1.5 uch tp->t_iflag = TTYDEF_IFLAG;
829 1.5 uch tp->t_oflag = TTYDEF_OFLAG;
830 1.5 uch tp->t_lflag = TTYDEF_LFLAG;
831 1.1 uch
832 1.5 uch ttychars(tp);
833 1.5 uch ttsetwater(tp);
834 1.3 uch
835 1.5 uch /*
836 1.5 uch * Turn on DTR. We must always do this, even if carrier is not
837 1.5 uch * present, because otherwise we'd have to use TIOCSDTR
838 1.5 uch * immediately after setting CLOCAL, which applications do not
839 1.5 uch * expect. We always assert DTR while the device is open
840 1.5 uch * unless explicitly requested to deassert it.
841 1.5 uch */
842 1.5 uch txcom_modem(sc, 1);
843 1.3 uch
844 1.5 uch /* Clear the input ring, and unblock. */
845 1.5 uch sc->sc_rbget = sc->sc_rbput = 0;
846 1.5 uch }
847 1.3 uch
848 1.3 uch splx(s);
849 1.6 uch #define TXCOMDIALOUT(x) (minor(x) & 0x80000)
850 1.6 uch if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) {
851 1.15 uch DPRINTF("ttyopen failed\n");
852 1.3 uch goto out;
853 1.1 uch }
854 1.10 eeh if ((err = (*tp->t_linesw->l_open)(dev, tp))) {
855 1.15 uch DPRINTF("line dicipline open failed\n");
856 1.3 uch goto out;
857 1.3 uch }
858 1.3 uch
859 1.3 uch return err;
860 1.3 uch
861 1.3 uch out:
862 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
863 1.3 uch /*
864 1.3 uch * We failed to open the device, and nobody else had it opened.
865 1.3 uch * Clean up the state as appropriate.
866 1.3 uch */
867 1.3 uch txcom_shutdown(sc);
868 1.1 uch }
869 1.1 uch
870 1.1 uch return err;
871 1.3 uch
872 1.1 uch }
873 1.1 uch
874 1.1 uch int
875 1.26 christos txcomclose(dev_t dev, int flag, int mode, struct lwp *l)
876 1.1 uch {
877 1.40 tsutsui struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
878 1.1 uch struct tty *tp = sc->sc_tty;
879 1.1 uch
880 1.3 uch /* XXX This is for cons.c. */
881 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN))
882 1.3 uch return 0;
883 1.3 uch
884 1.10 eeh (*tp->t_linesw->l_close)(tp, flag);
885 1.1 uch ttyclose(tp);
886 1.1 uch
887 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
888 1.3 uch /*
889 1.3 uch * Although we got a last close, the device may still be in
890 1.3 uch * use; e.g. if this was the dialout node, and there are still
891 1.3 uch * processes waiting for carrier on the non-dialout node.
892 1.3 uch */
893 1.3 uch txcom_shutdown(sc);
894 1.3 uch }
895 1.3 uch
896 1.1 uch return 0;
897 1.1 uch }
898 1.1 uch
899 1.1 uch int
900 1.9 uch txcomread(dev_t dev, struct uio *uio, int flag)
901 1.1 uch {
902 1.40 tsutsui struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
903 1.1 uch struct tty *tp = sc->sc_tty;
904 1.3 uch
905 1.10 eeh return ((*tp->t_linesw->l_read)(tp, uio, flag));
906 1.1 uch }
907 1.1 uch
908 1.1 uch int
909 1.9 uch txcomwrite(dev_t dev, struct uio *uio, int flag)
910 1.1 uch {
911 1.40 tsutsui struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
912 1.1 uch struct tty *tp = sc->sc_tty;
913 1.1 uch
914 1.10 eeh return ((*tp->t_linesw->l_write)(tp, uio, flag));
915 1.12 scw }
916 1.12 scw
917 1.12 scw int
918 1.26 christos txcompoll(dev_t dev, int events, struct lwp *l)
919 1.12 scw {
920 1.40 tsutsui struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
921 1.12 scw struct tty *tp = sc->sc_tty;
922 1.12 scw
923 1.26 christos return ((*tp->t_linesw->l_poll)(tp, events, l));
924 1.1 uch }
925 1.1 uch
926 1.1 uch struct tty *
927 1.9 uch txcomtty(dev_t dev)
928 1.1 uch {
929 1.40 tsutsui struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
930 1.3 uch
931 1.3 uch return sc->sc_tty;
932 1.1 uch }
933 1.1 uch
934 1.1 uch int
935 1.37 christos txcomioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
936 1.1 uch {
937 1.40 tsutsui struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
938 1.1 uch struct tty *tp = sc->sc_tty;
939 1.3 uch int s, err;
940 1.3 uch
941 1.26 christos err = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
942 1.16 atatat if (err != EPASSTHROUGH) {
943 1.3 uch return err;
944 1.3 uch }
945 1.3 uch
946 1.26 christos err = ttioctl(tp, cmd, data, flag, l);
947 1.16 atatat if (err != EPASSTHROUGH) {
948 1.3 uch return err;
949 1.3 uch }
950 1.3 uch
951 1.3 uch err = 0;
952 1.3 uch
953 1.3 uch s = spltty();
954 1.3 uch
955 1.3 uch switch (cmd) {
956 1.5 uch default:
957 1.16 atatat err = EPASSTHROUGH;
958 1.5 uch break;
959 1.5 uch
960 1.3 uch case TIOCSBRK:
961 1.3 uch txcom_break(sc, 1);
962 1.3 uch break;
963 1.3 uch
964 1.3 uch case TIOCCBRK:
965 1.3 uch txcom_break(sc, 0);
966 1.3 uch break;
967 1.3 uch
968 1.3 uch case TIOCSDTR:
969 1.3 uch txcom_modem(sc, 1);
970 1.3 uch break;
971 1.3 uch
972 1.3 uch case TIOCCDTR:
973 1.3 uch txcom_modem(sc, 0);
974 1.3 uch break;
975 1.3 uch
976 1.3 uch case TIOCGFLAGS:
977 1.3 uch *(int *)data = sc->sc_chip->sc_swflags;
978 1.3 uch break;
979 1.3 uch
980 1.3 uch case TIOCSFLAGS:
981 1.34 elad err = kauth_authorize_device_tty(l->l_cred,
982 1.34 elad KAUTH_DEVICE_TTY_PRIVSET, tp);
983 1.3 uch if (err) {
984 1.3 uch break;
985 1.3 uch }
986 1.3 uch sc->sc_chip->sc_swflags = *(int *)data;
987 1.3 uch break;
988 1.3 uch
989 1.3 uch }
990 1.1 uch
991 1.3 uch splx(s);
992 1.1 uch
993 1.3 uch return err;
994 1.1 uch }
995 1.1 uch
996 1.1 uch void
997 1.9 uch txcomstop(struct tty *tp, int flag)
998 1.1 uch {
999 1.40 tsutsui struct txcom_softc *sc;
1000 1.1 uch int s;
1001 1.1 uch
1002 1.40 tsutsui sc = device_lookup_private(&txcom_cd, minor(tp->t_dev));
1003 1.40 tsutsui
1004 1.1 uch s = spltty();
1005 1.1 uch
1006 1.1 uch if (ISSET(tp->t_state, TS_BUSY)) {
1007 1.1 uch /* Stop transmitting at the next chunk. */
1008 1.1 uch sc->sc_tbc = 0;
1009 1.1 uch sc->sc_heldtbc = 0;
1010 1.1 uch if (!ISSET(tp->t_state, TS_TTSTOP))
1011 1.1 uch SET(tp->t_state, TS_FLUSH);
1012 1.1 uch }
1013 1.3 uch
1014 1.1 uch splx(s);
1015 1.1 uch }
1016 1.1 uch
1017 1.1 uch void
1018 1.9 uch txcomstart(struct tty *tp)
1019 1.1 uch {
1020 1.40 tsutsui struct txcom_softc *sc;
1021 1.40 tsutsui struct txcom_chip *chip;
1022 1.40 tsutsui tx_chipset_tag_t tc;
1023 1.40 tsutsui int slot;
1024 1.1 uch int s;
1025 1.1 uch
1026 1.40 tsutsui sc = device_lookup_private(&txcom_cd, minor(tp->t_dev));
1027 1.40 tsutsui chip = sc->sc_chip;
1028 1.40 tsutsui tc = chip->sc_tc;
1029 1.40 tsutsui slot = chip->sc_slot;
1030 1.40 tsutsui
1031 1.1 uch s = spltty();
1032 1.3 uch
1033 1.3 uch if (!__txcom_txbufready(chip, 0) ||
1034 1.3 uch ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
1035 1.3 uch goto out;
1036 1.1 uch
1037 1.38 ad if (!ttypull(tp))
1038 1.38 ad goto out;
1039 1.3 uch
1040 1.1 uch sc->sc_tba = tp->t_outq.c_cf;
1041 1.1 uch sc->sc_tbc = ndqb(&tp->t_outq, 0);
1042 1.3 uch SET(tp->t_state, TS_BUSY);
1043 1.3 uch
1044 1.3 uch /* Output the first character of the contiguous buffer. */
1045 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot),
1046 1.14 uch (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK));
1047 1.3 uch
1048 1.3 uch sc->sc_tbc--;
1049 1.3 uch sc->sc_tba++;
1050 1.1 uch
1051 1.3 uch out:
1052 1.1 uch splx(s);
1053 1.1 uch }
1054 1.1 uch
1055 1.3 uch /*
1056 1.3 uch * Set TXcom tty parameters from termios.
1057 1.3 uch */
1058 1.1 uch int
1059 1.9 uch txcomparam(struct tty *tp, struct termios *t)
1060 1.1 uch {
1061 1.40 tsutsui struct txcom_softc *sc;
1062 1.3 uch struct txcom_chip *chip;
1063 1.5 uch int ospeed;
1064 1.3 uch int s;
1065 1.3 uch
1066 1.40 tsutsui sc = device_lookup_private(&txcom_cd, minor(tp->t_dev));
1067 1.40 tsutsui if (sc == NULL)
1068 1.3 uch return ENXIO;
1069 1.3 uch
1070 1.3 uch ospeed = t->c_ospeed;
1071 1.3 uch
1072 1.3 uch /* Check requested parameters. */
1073 1.3 uch if (ospeed < 0) {
1074 1.3 uch return EINVAL;
1075 1.3 uch }
1076 1.3 uch if (t->c_ispeed && t->c_ispeed != ospeed) {
1077 1.3 uch return EINVAL;
1078 1.3 uch }
1079 1.3 uch
1080 1.3 uch s = spltty();
1081 1.3 uch chip = sc->sc_chip;
1082 1.3 uch /*
1083 1.3 uch * For the console, always force CLOCAL and !HUPCL, so that the port
1084 1.3 uch * is always active.
1085 1.3 uch */
1086 1.3 uch if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) ||
1087 1.3 uch ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
1088 1.5 uch SET(t->c_cflag, CLOCAL);
1089 1.5 uch CLR(t->c_cflag, HUPCL);
1090 1.3 uch }
1091 1.3 uch splx(s);
1092 1.3 uch
1093 1.3 uch /*
1094 1.6 uch * If we're not in a mode that assumes a connection is present, then
1095 1.6 uch * ignore carrier changes.
1096 1.6 uch */
1097 1.6 uch if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
1098 1.6 uch chip->sc_dcd = 0;
1099 1.6 uch else
1100 1.6 uch chip->sc_dcd = 1;
1101 1.6 uch
1102 1.6 uch /*
1103 1.3 uch * Only whack the UART when params change.
1104 1.3 uch * Some callers need to clear tp->t_ospeed
1105 1.3 uch * to make sure initialization gets done.
1106 1.3 uch */
1107 1.5 uch if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) {
1108 1.3 uch return 0;
1109 1.3 uch }
1110 1.3 uch
1111 1.3 uch s = spltty();
1112 1.3 uch chip = sc->sc_chip;
1113 1.3 uch chip->sc_speed = ospeed;
1114 1.5 uch chip->sc_cflag = t->c_cflag;
1115 1.3 uch
1116 1.3 uch txcom_setmode(chip);
1117 1.3 uch txcom_setbaudrate(chip);
1118 1.6 uch
1119 1.3 uch /* And copy to tty. */
1120 1.3 uch tp->t_ispeed = 0;
1121 1.3 uch tp->t_ospeed = chip->sc_speed;
1122 1.3 uch tp->t_cflag = chip->sc_cflag;
1123 1.3 uch
1124 1.3 uch /*
1125 1.6 uch * Update the tty layer's idea of the carrier bit, in case we changed
1126 1.6 uch * CLOCAL or MDMBUF. We don't hang up here; we only do that by
1127 1.6 uch * explicit request.
1128 1.6 uch */
1129 1.10 eeh (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd);
1130 1.6 uch
1131 1.6 uch /*
1132 1.3 uch * If hardware flow control is disabled, unblock any hard flow
1133 1.3 uch * control state.
1134 1.3 uch */
1135 1.3 uch if (!ISSET(chip->sc_cflag, CHWFLOW)) {
1136 1.3 uch txcomstart(tp);
1137 1.3 uch }
1138 1.3 uch
1139 1.3 uch splx(s);
1140 1.6 uch
1141 1.6 uch return 0;
1142 1.6 uch }
1143 1.6 uch
1144 1.9 uch int
1145 1.9 uch txcom_dcd_hook(void *arg, int type, long id, void *msg)
1146 1.9 uch {
1147 1.9 uch struct txcom_softc *sc = arg;
1148 1.9 uch struct tty *tp = sc->sc_tty;
1149 1.9 uch struct txcom_chip *chip = sc->sc_chip;
1150 1.9 uch int modem = !(int)msg; /* p-edge 1, n-edge 0 */
1151 1.9 uch
1152 1.15 uch DPRINTF("DCD %s\n", modem ? "ON" : "OFF");
1153 1.9 uch
1154 1.9 uch if (modem && chip->sc_dcd)
1155 1.10 eeh (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd);
1156 1.9 uch
1157 1.9 uch return 0;
1158 1.9 uch }
1159 1.9 uch
1160 1.9 uch int
1161 1.9 uch txcom_cts_hook(void *arg, int type, long id, void *msg)
1162 1.9 uch {
1163 1.9 uch struct txcom_softc *sc = arg;
1164 1.9 uch struct tty *tp = sc->sc_tty;
1165 1.9 uch struct txcom_chip *chip = sc->sc_chip;
1166 1.9 uch int clear = !(int)msg; /* p-edge 1, n-edge 0 */
1167 1.9 uch
1168 1.15 uch DPRINTF("CTS %s\n", clear ? "ON" : "OFF");
1169 1.9 uch
1170 1.9 uch if (chip->sc_msr_cts) {
1171 1.9 uch if (!clear) {
1172 1.9 uch chip->sc_tx_stopped = 1;
1173 1.9 uch } else {
1174 1.9 uch chip->sc_tx_stopped = 0;
1175 1.10 eeh (*tp->t_linesw->l_start)(tp);
1176 1.9 uch }
1177 1.9 uch }
1178 1.9 uch
1179 1.9 uch return 0;
1180 1.9 uch }
1181 1.9 uch
1182 1.9 uch #ifdef TX39UARTDEBUG
1183 1.6 uch void
1184 1.9 uch txcom_dump(struct txcom_chip *chip)
1185 1.6 uch {
1186 1.6 uch tx_chipset_tag_t tc = chip->sc_tc;
1187 1.6 uch int slot = chip->sc_slot;
1188 1.6 uch txreg_t reg;
1189 1.6 uch
1190 1.6 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
1191 1.6 uch #define ISSETPRINT(r, m) \
1192 1.15 uch dbg_bitmask_print(r, TX39_UARTCTRL1_##m, #m)
1193 1.6 uch ISSETPRINT(reg, UARTON);
1194 1.6 uch ISSETPRINT(reg, EMPTY);
1195 1.6 uch ISSETPRINT(reg, PRXHOLDFULL);
1196 1.6 uch ISSETPRINT(reg, RXHOLDFULL);
1197 1.6 uch ISSETPRINT(reg, ENDMARX);
1198 1.6 uch ISSETPRINT(reg, ENDMATX);
1199 1.6 uch ISSETPRINT(reg, TESTMODE);
1200 1.6 uch ISSETPRINT(reg, ENBREAHALT);
1201 1.6 uch ISSETPRINT(reg, ENDMATEST);
1202 1.6 uch ISSETPRINT(reg, ENDMALOOP);
1203 1.6 uch ISSETPRINT(reg, PULSEOPT2);
1204 1.6 uch ISSETPRINT(reg, PULSEOPT1);
1205 1.6 uch ISSETPRINT(reg, DTINVERT);
1206 1.6 uch ISSETPRINT(reg, DISTXD);
1207 1.6 uch ISSETPRINT(reg, TWOSTOP);
1208 1.6 uch ISSETPRINT(reg, LOOPBACK);
1209 1.6 uch ISSETPRINT(reg, BIT7);
1210 1.6 uch ISSETPRINT(reg, EVENPARITY);
1211 1.6 uch ISSETPRINT(reg, ENPARITY);
1212 1.6 uch ISSETPRINT(reg, ENUART);
1213 1.6 uch }
1214 1.9 uch #endif /* TX39UARTDEBUG */
1215