txcom.c revision 1.46 1 1.46 chs /* $NetBSD: txcom.c,v 1.46 2012/10/27 17:17:54 chs Exp $ */
2 1.1 uch
3 1.9 uch /*-
4 1.24 uch * Copyright (c) 1999, 2000, 2004 The NetBSD Foundation, Inc.
5 1.1 uch * All rights reserved.
6 1.1 uch *
7 1.9 uch * This code is derived from software contributed to The NetBSD Foundation
8 1.9 uch * by UCHIYAMA Yasushi.
9 1.9 uch *
10 1.1 uch * Redistribution and use in source and binary forms, with or without
11 1.1 uch * modification, are permitted provided that the following conditions
12 1.1 uch * are met:
13 1.1 uch * 1. Redistributions of source code must retain the above copyright
14 1.1 uch * notice, this list of conditions and the following disclaimer.
15 1.9 uch * 2. Redistributions in binary form must reproduce the above copyright
16 1.9 uch * notice, this list of conditions and the following disclaimer in the
17 1.9 uch * documentation and/or other materials provided with the distribution.
18 1.1 uch *
19 1.9 uch * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.9 uch * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.9 uch * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.9 uch * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.9 uch * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.9 uch * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.9 uch * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.9 uch * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.9 uch * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.9 uch * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.9 uch * POSSIBILITY OF SUCH DAMAGE.
30 1.1 uch */
31 1.22 lukem
32 1.22 lukem #include <sys/cdefs.h>
33 1.46 chs __KERNEL_RCSID(0, "$NetBSD: txcom.c,v 1.46 2012/10/27 17:17:54 chs Exp $");
34 1.15 uch
35 1.15 uch #include "opt_tx39uart_debug.h"
36 1.1 uch
37 1.1 uch #include <sys/param.h>
38 1.1 uch #include <sys/systm.h>
39 1.3 uch #include <sys/kernel.h>
40 1.1 uch #include <sys/device.h>
41 1.3 uch #include <sys/malloc.h>
42 1.30 elad #include <sys/kauth.h>
43 1.1 uch
44 1.1 uch #include <sys/proc.h> /* tsleep/wakeup */
45 1.1 uch
46 1.1 uch #include <sys/ioctl.h>
47 1.1 uch #include <sys/select.h>
48 1.1 uch #include <sys/file.h>
49 1.1 uch
50 1.1 uch #include <sys/tty.h>
51 1.1 uch #include <sys/conf.h>
52 1.1 uch #include <dev/cons.h> /* consdev */
53 1.1 uch
54 1.1 uch #include <machine/bus.h>
55 1.9 uch #include <machine/config_hook.h>
56 1.1 uch
57 1.1 uch #include <hpcmips/tx/tx39var.h>
58 1.1 uch #include <hpcmips/tx/tx39icureg.h>
59 1.1 uch #include <hpcmips/tx/tx39uartvar.h>
60 1.1 uch #include <hpcmips/tx/tx39uartreg.h>
61 1.1 uch
62 1.5 uch #include <hpcmips/tx/tx39irvar.h>
63 1.5 uch
64 1.1 uch #include <hpcmips/tx/tx39clockreg.h> /* XXX */
65 1.6 uch
66 1.9 uch /*
67 1.9 uch * UARTA channel has DTR, DSR, RTS, CTS lines. and they wired to MFIO/IO port.
68 1.9 uch */
69 1.9 uch #define IS_COM0(s) ((s) == 0)
70 1.9 uch #define IS_COM1(s) ((s) == 1)
71 1.9 uch #define ON ((void *)1)
72 1.9 uch #define OFF ((void *)0)
73 1.1 uch
74 1.15 uch #ifdef TX39UART_DEBUG
75 1.15 uch #define DPRINTF_ENABLE
76 1.15 uch #define DPRINTF_DEBUG tx39uart_debug
77 1.1 uch #endif
78 1.15 uch #include <machine/debug.h>
79 1.1 uch
80 1.3 uch #define TXCOM_HW_CONSOLE 0x40
81 1.3 uch #define TXCOM_RING_SIZE 256 /* must be a power of two! */
82 1.3 uch #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1)
83 1.1 uch
84 1.3 uch struct txcom_chip {
85 1.1 uch tx_chipset_tag_t sc_tc;
86 1.1 uch int sc_slot; /* UARTA or UARTB */
87 1.1 uch int sc_cflag;
88 1.1 uch int sc_speed;
89 1.3 uch int sc_swflags;
90 1.1 uch int sc_hwflags;
91 1.6 uch
92 1.6 uch int sc_dcd;
93 1.9 uch int sc_msr_cts;
94 1.9 uch int sc_tx_stopped;
95 1.3 uch };
96 1.1 uch
97 1.3 uch struct txcom_softc {
98 1.3 uch struct tty *sc_tty;
99 1.3 uch struct txcom_chip *sc_chip;
100 1.3 uch
101 1.44 tsutsui void *sc_txsoft_cookie;
102 1.44 tsutsui void *sc_rxsoft_cookie;
103 1.8 thorpej
104 1.3 uch u_int8_t *sc_tba; /* transmit buffer address */
105 1.3 uch int sc_tbc; /* transmit byte count */
106 1.3 uch int sc_heldtbc;
107 1.3 uch u_int8_t *sc_rbuf; /* receive buffer address */
108 1.3 uch int sc_rbput; /* receive byte count */
109 1.3 uch int sc_rbget;
110 1.1 uch };
111 1.1 uch
112 1.1 uch extern struct cfdriver txcom_cd;
113 1.1 uch
114 1.46 chs int txcom_match(device_t, cfdata_t, void *);
115 1.46 chs void txcom_attach(device_t, device_t, void *);
116 1.46 chs int txcom_print(void *, const char *);
117 1.9 uch
118 1.9 uch int txcom_txintr(void *);
119 1.9 uch int txcom_rxintr(void *);
120 1.9 uch int txcom_frameerr_intr(void *);
121 1.9 uch int txcom_parityerr_intr(void *);
122 1.9 uch int txcom_break_intr(void *);
123 1.3 uch
124 1.9 uch void txcom_rxsoft(void *);
125 1.9 uch void txcom_txsoft(void *);
126 1.3 uch
127 1.9 uch int txcom_stsoft(void *);
128 1.9 uch int txcom_stsoft2(void *);
129 1.9 uch int txcom_stsoft3(void *);
130 1.9 uch int txcom_stsoft4(void *);
131 1.9 uch
132 1.9 uch
133 1.9 uch void txcom_shutdown(struct txcom_softc *);
134 1.9 uch void txcom_break(struct txcom_softc *, int);
135 1.9 uch void txcom_modem(struct txcom_softc *, int);
136 1.9 uch void txcomstart(struct tty *);
137 1.9 uch int txcomparam(struct tty *, struct termios *);
138 1.9 uch
139 1.9 uch void txcom_reset (struct txcom_chip *);
140 1.35 thorpej int txcom_enable (struct txcom_chip *, bool);
141 1.9 uch void txcom_disable (struct txcom_chip *);
142 1.9 uch void txcom_setmode (struct txcom_chip *);
143 1.9 uch void txcom_setbaudrate(struct txcom_chip *);
144 1.9 uch int txcom_cngetc (dev_t);
145 1.9 uch void txcom_cnputc (dev_t, int);
146 1.9 uch void txcom_cnpollc (dev_t, int);
147 1.3 uch
148 1.9 uch int txcom_dcd_hook(void *, int, long, void *);
149 1.9 uch int txcom_cts_hook(void *, int, long, void *);
150 1.1 uch
151 1.9 uch
152 1.27 perry inline int __txcom_txbufready(struct txcom_chip *, int);
153 1.9 uch const char *__txcom_slotname(int);
154 1.9 uch
155 1.9 uch #ifdef TX39UARTDEBUG
156 1.9 uch void txcom_dump(struct txcom_chip *);
157 1.9 uch #endif
158 1.6 uch
159 1.3 uch struct consdev txcomcons = {
160 1.21 nakayama NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc, NULL, NULL,
161 1.14 uch NULL, NODEV, CN_NORMAL
162 1.3 uch };
163 1.3 uch
164 1.1 uch /* Serial console */
165 1.3 uch struct txcom_chip txcom_chip;
166 1.1 uch
167 1.46 chs CFATTACH_DECL_NEW(txcom, sizeof(struct txcom_softc),
168 1.19 thorpej txcom_match, txcom_attach, NULL, NULL);
169 1.1 uch
170 1.17 gehenna dev_type_open(txcomopen);
171 1.17 gehenna dev_type_close(txcomclose);
172 1.17 gehenna dev_type_read(txcomread);
173 1.17 gehenna dev_type_write(txcomwrite);
174 1.17 gehenna dev_type_ioctl(txcomioctl);
175 1.17 gehenna dev_type_stop(txcomstop);
176 1.17 gehenna dev_type_tty(txcomtty);
177 1.17 gehenna dev_type_poll(txcompoll);
178 1.17 gehenna
179 1.17 gehenna const struct cdevsw txcom_cdevsw = {
180 1.17 gehenna txcomopen, txcomclose, txcomread, txcomwrite, txcomioctl,
181 1.20 jdolecek txcomstop, txcomtty, txcompoll, nommap, ttykqfilter, D_TTY
182 1.17 gehenna };
183 1.17 gehenna
184 1.1 uch int
185 1.46 chs txcom_match(device_t parent, cfdata_t cf, void *aux)
186 1.1 uch {
187 1.1 uch /* if the autoconfiguration got this far, there's a slot here */
188 1.1 uch return 1;
189 1.1 uch }
190 1.1 uch
191 1.1 uch void
192 1.46 chs txcom_attach(device_t parent, device_t self, void *aux)
193 1.1 uch {
194 1.1 uch struct tx39uart_attach_args *ua = aux;
195 1.46 chs struct txcom_softc *sc = device_private(self);
196 1.1 uch tx_chipset_tag_t tc;
197 1.1 uch struct tty *tp;
198 1.3 uch struct txcom_chip *chip;
199 1.6 uch int slot, console;
200 1.1 uch
201 1.1 uch /* Check this slot used as serial console */
202 1.6 uch console = (ua->ua_slot == txcom_chip.sc_slot) &&
203 1.14 uch (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE);
204 1.6 uch
205 1.6 uch if (console) {
206 1.3 uch sc->sc_chip = &txcom_chip;
207 1.3 uch } else {
208 1.3 uch if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip),
209 1.14 uch M_DEVBUF, M_WAITOK))) {
210 1.3 uch printf(": can't allocate chip\n");
211 1.3 uch return;
212 1.3 uch }
213 1.3 uch memset(sc->sc_chip, 0, sizeof(struct txcom_chip));
214 1.1 uch }
215 1.1 uch
216 1.3 uch chip = sc->sc_chip;
217 1.3 uch tc = chip->sc_tc = ua->ua_tc;
218 1.3 uch slot = chip->sc_slot = ua->ua_slot;
219 1.3 uch
220 1.6 uch #ifdef TX39UARTDEBUG
221 1.6 uch txcom_dump(chip);
222 1.6 uch #endif
223 1.6 uch if (!console)
224 1.6 uch txcom_reset(chip);
225 1.6 uch
226 1.3 uch if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) {
227 1.3 uch printf(": can't allocate buffer.\n");
228 1.3 uch return;
229 1.3 uch }
230 1.3 uch memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE);
231 1.1 uch
232 1.45 rmind tp = tty_alloc();
233 1.1 uch tp->t_oproc = txcomstart;
234 1.1 uch tp->t_param = txcomparam;
235 1.1 uch tp->t_hwiflow = NULL;
236 1.1 uch sc->sc_tty = tp;
237 1.1 uch tty_attach(tp);
238 1.1 uch
239 1.3 uch if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
240 1.1 uch int maj;
241 1.1 uch /* locate the major number */
242 1.17 gehenna maj = cdevsw_lookup_major(&txcom_cdevsw);
243 1.1 uch
244 1.46 chs cn_tab->cn_dev = makedev(maj, device_unit(self));
245 1.1 uch
246 1.3 uch printf(": console");
247 1.1 uch }
248 1.1 uch
249 1.3 uch printf("\n");
250 1.1 uch
251 1.1 uch /*
252 1.1 uch * Enable interrupt
253 1.1 uch */
254 1.3 uch #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s))
255 1.3 uch
256 1.3 uch tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY,
257 1.14 uch txcom_rxintr, sc);
258 1.3 uch tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY,
259 1.14 uch txcom_txintr, sc);
260 1.3 uch tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY,
261 1.14 uch txcom_rxintr, sc);
262 1.3 uch tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY,
263 1.14 uch txcom_txintr, sc);
264 1.3 uch tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY,
265 1.14 uch txcom_frameerr_intr, sc);
266 1.3 uch tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY,
267 1.14 uch txcom_parityerr_intr, sc);
268 1.3 uch tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY,
269 1.14 uch txcom_break_intr, sc);
270 1.5 uch
271 1.44 tsutsui sc->sc_txsoft_cookie =
272 1.44 tsutsui softint_establish(SOFTINT_SERIAL, txcom_txsoft, sc);
273 1.44 tsutsui sc->sc_rxsoft_cookie =
274 1.44 tsutsui softint_establish(SOFTINT_SERIAL, txcom_rxsoft, sc);
275 1.44 tsutsui
276 1.9 uch /*
277 1.9 uch * UARTA has external signal line. (its wiring is platform dependent)
278 1.9 uch */
279 1.9 uch if (IS_COM0(slot)) {
280 1.9 uch /* install DCD, CTS hooks. */
281 1.11 sato config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_DCD,
282 1.14 uch CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc);
283 1.11 sato config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_CTS,
284 1.14 uch CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc);
285 1.9 uch }
286 1.6 uch
287 1.5 uch /*
288 1.5 uch * UARTB can connect IR module
289 1.5 uch */
290 1.9 uch if (IS_COM1(slot)) {
291 1.5 uch struct txcom_attach_args tca;
292 1.5 uch tca.tca_tc = tc;
293 1.5 uch tca.tca_parent = self;
294 1.5 uch config_found(self, &tca, txcom_print);
295 1.5 uch }
296 1.5 uch }
297 1.5 uch
298 1.5 uch int
299 1.9 uch txcom_print(void *aux, const char *pnp)
300 1.5 uch {
301 1.5 uch return pnp ? QUIET : UNCONF;
302 1.1 uch }
303 1.1 uch
304 1.6 uch void
305 1.9 uch txcom_reset(struct txcom_chip *chip)
306 1.6 uch {
307 1.6 uch tx_chipset_tag_t tc;
308 1.6 uch int slot, ofs;
309 1.6 uch txreg_t reg;
310 1.6 uch
311 1.6 uch tc = chip->sc_tc;
312 1.6 uch slot = chip->sc_slot;
313 1.6 uch ofs = TX39_UARTCTRL1_REG(slot);
314 1.6 uch
315 1.6 uch /* Supply clock */
316 1.6 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
317 1.6 uch reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
318 1.6 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
319 1.6 uch
320 1.6 uch /* reset UART module */
321 1.6 uch tx_conf_write(tc, ofs, 0);
322 1.6 uch }
323 1.6 uch
324 1.1 uch int
325 1.35 thorpej txcom_enable(struct txcom_chip *chip, bool console)
326 1.1 uch {
327 1.1 uch tx_chipset_tag_t tc;
328 1.1 uch txreg_t reg;
329 1.3 uch int slot, ofs, timeout;
330 1.1 uch
331 1.3 uch tc = chip->sc_tc;
332 1.3 uch slot = chip->sc_slot;
333 1.3 uch ofs = TX39_UARTCTRL1_REG(slot);
334 1.1 uch
335 1.24 uch /*
336 1.24 uch * External power supply (if any)
337 1.24 uch * When serial console, Windows CE already powered on it.
338 1.24 uch */
339 1.24 uch if (!console) {
340 1.24 uch config_hook_call(CONFIG_HOOK_POWERCONTROL,
341 1.24 uch CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON);
342 1.24 uch delay(3);
343 1.24 uch }
344 1.9 uch
345 1.6 uch /* Supply clock */
346 1.5 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
347 1.5 uch reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
348 1.5 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
349 1.5 uch
350 1.6 uch /*
351 1.6 uch * XXX Disable DMA (DMA not coded yet)
352 1.6 uch */
353 1.6 uch reg = tx_conf_read(tc, ofs);
354 1.6 uch reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
355 1.6 uch tx_conf_write(tc, ofs, reg);
356 1.6 uch
357 1.6 uch /* enable */
358 1.3 uch reg = tx_conf_read(tc, ofs);
359 1.1 uch reg |= TX39_UARTCTRL1_ENUART;
360 1.1 uch reg &= ~TX39_UARTCTRL1_ENBREAHALT;
361 1.3 uch tx_conf_write(tc, ofs, reg);
362 1.3 uch
363 1.9 uch timeout = 100000;
364 1.3 uch
365 1.3 uch while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) &&
366 1.14 uch --timeout > 0)
367 1.3 uch ;
368 1.3 uch
369 1.5 uch if (timeout == 0 && !cold) {
370 1.6 uch printf("%s never power up\n", __txcom_slotname(slot));
371 1.3 uch return 1;
372 1.3 uch }
373 1.3 uch
374 1.1 uch return 0;
375 1.1 uch }
376 1.1 uch
377 1.1 uch void
378 1.9 uch txcom_disable(struct txcom_chip *chip)
379 1.1 uch {
380 1.1 uch tx_chipset_tag_t tc;
381 1.1 uch txreg_t reg;
382 1.1 uch int slot;
383 1.1 uch
384 1.3 uch tc = chip->sc_tc;
385 1.3 uch slot = chip->sc_slot;
386 1.1 uch
387 1.1 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
388 1.1 uch /* DMA */
389 1.1 uch reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
390 1.3 uch
391 1.6 uch /* disable module */
392 1.1 uch reg &= ~TX39_UARTCTRL1_ENUART;
393 1.1 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
394 1.3 uch
395 1.1 uch /* Clock */
396 1.1 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
397 1.1 uch reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
398 1.1 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
399 1.1 uch
400 1.1 uch }
401 1.1 uch
402 1.27 perry inline int
403 1.9 uch __txcom_txbufready(struct txcom_chip *chip, int retry)
404 1.3 uch {
405 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
406 1.3 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
407 1.3 uch
408 1.3 uch do {
409 1.3 uch if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY)
410 1.3 uch return 1;
411 1.3 uch } while(--retry != 0);
412 1.3 uch
413 1.1 uch return 0;
414 1.1 uch }
415 1.1 uch
416 1.5 uch void
417 1.46 chs txcom_pulse_mode(device_t dev)
418 1.5 uch {
419 1.46 chs struct txcom_softc *sc = device_private(dev);
420 1.5 uch struct txcom_chip *chip = sc->sc_chip;
421 1.5 uch tx_chipset_tag_t tc = chip->sc_tc;
422 1.5 uch int ofs;
423 1.5 uch txreg_t reg;
424 1.5 uch
425 1.5 uch ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
426 1.5 uch
427 1.5 uch reg = tx_conf_read(tc, ofs);
428 1.6 uch /* WindowsCE use this setting */
429 1.6 uch reg |= TX39_UARTCTRL1_PULSEOPT1;
430 1.6 uch reg &= ~TX39_UARTCTRL1_PULSEOPT2;
431 1.6 uch reg |= TX39_UARTCTRL1_DTINVERT;
432 1.6 uch
433 1.5 uch tx_conf_write(tc, ofs, reg);
434 1.5 uch }
435 1.5 uch
436 1.3 uch /*
437 1.3 uch * console
438 1.3 uch */
439 1.1 uch int
440 1.9 uch txcom_cngetc(dev_t dev)
441 1.1 uch {
442 1.1 uch tx_chipset_tag_t tc;
443 1.2 uch int ofs, c, s;
444 1.2 uch
445 1.3 uch s = spltty();
446 1.2 uch
447 1.3 uch tc = txcom_chip.sc_tc;
448 1.3 uch ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot);
449 1.1 uch
450 1.1 uch while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs)))
451 1.1 uch ;
452 1.2 uch
453 1.3 uch c = TX39_UARTRXHOLD_RXDATA(
454 1.3 uch tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot)));
455 1.2 uch
456 1.3 uch if (c == '\r')
457 1.1 uch c = '\n';
458 1.1 uch
459 1.2 uch splx(s);
460 1.2 uch
461 1.1 uch return c;
462 1.1 uch }
463 1.1 uch
464 1.1 uch void
465 1.9 uch txcom_cnputc(dev_t dev, int c)
466 1.1 uch {
467 1.3 uch struct txcom_chip *chip = &txcom_chip;
468 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
469 1.3 uch int s;
470 1.2 uch
471 1.3 uch s = spltty();
472 1.1 uch
473 1.3 uch /* Wait for transmitter to empty */
474 1.3 uch __txcom_txbufready(chip, -1);
475 1.1 uch
476 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
477 1.14 uch (c & TX39_UARTTXHOLD_TXDATA_MASK));
478 1.1 uch
479 1.3 uch __txcom_txbufready(chip, -1);
480 1.3 uch
481 1.2 uch splx(s);
482 1.1 uch }
483 1.1 uch
484 1.1 uch void
485 1.9 uch txcom_cnpollc(dev_t dev, int on)
486 1.1 uch {
487 1.1 uch }
488 1.1 uch
489 1.1 uch void
490 1.9 uch txcom_setmode(struct txcom_chip *chip)
491 1.1 uch {
492 1.3 uch tcflag_t cflag = chip->sc_cflag;
493 1.3 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
494 1.1 uch txreg_t reg;
495 1.1 uch
496 1.3 uch reg = tx_conf_read(chip->sc_tc, ofs);
497 1.6 uch reg &= ~TX39_UARTCTRL1_ENUART;
498 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg);
499 1.6 uch
500 1.1 uch switch (ISSET(cflag, CSIZE)) {
501 1.1 uch default:
502 1.1 uch printf("txcom_setmode: CS7, CS8 only. use CS7");
503 1.1 uch /* FALL THROUGH */
504 1.1 uch case CS7:
505 1.1 uch reg |= TX39_UARTCTRL1_BIT7;
506 1.1 uch break;
507 1.1 uch case CS8:
508 1.1 uch reg &= ~TX39_UARTCTRL1_BIT7;
509 1.1 uch break;
510 1.1 uch }
511 1.3 uch
512 1.1 uch if (ISSET(cflag, PARENB)) {
513 1.1 uch reg |= TX39_UARTCTRL1_ENPARITY;
514 1.1 uch if (ISSET(cflag, PARODD)) {
515 1.1 uch reg &= ~TX39_UARTCTRL1_EVENPARITY;
516 1.1 uch } else {
517 1.1 uch reg |= TX39_UARTCTRL1_EVENPARITY;
518 1.1 uch }
519 1.1 uch } else {
520 1.1 uch reg &= ~TX39_UARTCTRL1_ENPARITY;
521 1.1 uch }
522 1.3 uch
523 1.6 uch if (ISSET(cflag, CSTOPB))
524 1.1 uch reg |= TX39_UARTCTRL1_TWOSTOP;
525 1.6 uch else
526 1.6 uch reg &= ~TX39_UARTCTRL1_TWOSTOP;
527 1.6 uch
528 1.6 uch reg |= TX39_UARTCTRL1_ENUART;
529 1.3 uch tx_conf_write(chip->sc_tc, ofs, reg);
530 1.3 uch }
531 1.3 uch
532 1.3 uch void
533 1.9 uch txcom_setbaudrate(struct txcom_chip *chip)
534 1.3 uch {
535 1.3 uch int baudrate;
536 1.6 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
537 1.6 uch txreg_t reg, reg1;
538 1.3 uch
539 1.3 uch if (chip->sc_speed == 0)
540 1.3 uch return;
541 1.3 uch
542 1.5 uch if (!cold)
543 1.15 uch DPRINTF("%d\n", chip->sc_speed);
544 1.5 uch
545 1.6 uch reg1 = tx_conf_read(chip->sc_tc, ofs);
546 1.6 uch reg1 &= ~TX39_UARTCTRL1_ENUART;
547 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg1);
548 1.6 uch
549 1.3 uch baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1;
550 1.3 uch reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate);
551 1.3 uch
552 1.3 uch tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg);
553 1.6 uch
554 1.6 uch reg1 |= TX39_UARTCTRL1_ENUART;
555 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg1);
556 1.3 uch }
557 1.3 uch
558 1.3 uch int
559 1.9 uch txcom_cnattach(int slot, int speed, int cflag)
560 1.3 uch {
561 1.3 uch cn_tab = &txcomcons;
562 1.3 uch
563 1.3 uch txcom_chip.sc_tc = tx_conf_get_tag();
564 1.3 uch txcom_chip.sc_slot = slot;
565 1.3 uch txcom_chip.sc_cflag = cflag;
566 1.3 uch txcom_chip.sc_speed = speed;
567 1.3 uch txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE;
568 1.6 uch #if notyet
569 1.6 uch txcom_reset(&txcom_chip);
570 1.6 uch #endif
571 1.6 uch txcom_setmode(&txcom_chip);
572 1.6 uch txcom_setbaudrate(&txcom_chip);
573 1.3 uch
574 1.36 thorpej if (txcom_enable(&txcom_chip, true) != 0)
575 1.5 uch return 1;
576 1.5 uch
577 1.3 uch return 0;
578 1.3 uch }
579 1.3 uch
580 1.3 uch /*
581 1.3 uch * tty
582 1.3 uch */
583 1.3 uch void
584 1.9 uch txcom_break(struct txcom_softc *sc, int on)
585 1.3 uch {
586 1.3 uch struct txcom_chip *chip = sc->sc_chip;
587 1.1 uch
588 1.3 uch tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
589 1.14 uch on ? TX39_UARTTXHOLD_BREAK : 0);
590 1.1 uch }
591 1.1 uch
592 1.1 uch void
593 1.9 uch txcom_modem(struct txcom_softc *sc, int on)
594 1.1 uch {
595 1.3 uch struct txcom_chip *chip = sc->sc_chip;
596 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
597 1.3 uch int slot = chip->sc_slot;
598 1.1 uch txreg_t reg;
599 1.1 uch
600 1.9 uch /* assert DTR */
601 1.9 uch if (IS_COM0(slot)) {
602 1.11 sato config_hook_call(CONFIG_HOOK_SET,
603 1.14 uch CONFIG_HOOK_COM0_DTR,
604 1.14 uch (void *)on);
605 1.9 uch }
606 1.9 uch
607 1.3 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
608 1.6 uch reg &= ~TX39_UARTCTRL1_ENUART;
609 1.6 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
610 1.3 uch
611 1.3 uch if (on) {
612 1.3 uch reg &= ~TX39_UARTCTRL1_DISTXD;
613 1.3 uch } else {
614 1.6 uch reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */
615 1.3 uch }
616 1.6 uch
617 1.6 uch reg |= TX39_UARTCTRL1_ENUART;
618 1.6 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
619 1.1 uch }
620 1.1 uch
621 1.1 uch void
622 1.9 uch txcom_shutdown(struct txcom_softc *sc)
623 1.1 uch {
624 1.1 uch struct tty *tp = sc->sc_tty;
625 1.3 uch int s = spltty();
626 1.1 uch
627 1.3 uch /* Clear any break condition set with TIOCSBRK. */
628 1.3 uch txcom_break(sc, 0);
629 1.3 uch
630 1.3 uch /*
631 1.3 uch * Hang up if necessary. Wait a bit, so the other side has time to
632 1.3 uch * notice even if we immediately open the port again.
633 1.3 uch */
634 1.3 uch if (ISSET(tp->t_cflag, HUPCL)) {
635 1.3 uch txcom_modem(sc, 0);
636 1.3 uch (void) tsleep(sc, TTIPRI, ttclos, hz);
637 1.3 uch }
638 1.3 uch
639 1.3 uch
640 1.3 uch /* Turn off interrupts if not the console. */
641 1.3 uch if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
642 1.3 uch txcom_disable(sc->sc_chip);
643 1.3 uch }
644 1.1 uch
645 1.3 uch splx(s);
646 1.3 uch }
647 1.1 uch
648 1.9 uch const char *
649 1.9 uch __txcom_slotname(int slot)
650 1.3 uch {
651 1.9 uch static const char *slotname[] = {"UARTA", "UARTB", "unknown"};
652 1.9 uch
653 1.9 uch if (slot != 0 && slot != 1)
654 1.9 uch return slotname[2];
655 1.9 uch
656 1.9 uch return slotname[slot];
657 1.2 uch }
658 1.2 uch
659 1.2 uch int
660 1.9 uch txcom_frameerr_intr(void *arg)
661 1.3 uch {
662 1.3 uch struct txcom_softc *sc = arg;
663 1.3 uch
664 1.3 uch printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot));
665 1.3 uch
666 1.3 uch return 0;
667 1.3 uch }
668 1.3 uch
669 1.3 uch int
670 1.9 uch txcom_parityerr_intr(void *arg)
671 1.3 uch {
672 1.3 uch struct txcom_softc *sc = arg;
673 1.3 uch
674 1.3 uch printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot));
675 1.2 uch
676 1.2 uch return 0;
677 1.1 uch }
678 1.1 uch
679 1.1 uch int
680 1.9 uch txcom_break_intr(void *arg)
681 1.1 uch {
682 1.1 uch struct txcom_softc *sc = arg;
683 1.3 uch
684 1.3 uch printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot));
685 1.3 uch
686 1.3 uch return 0;
687 1.3 uch }
688 1.3 uch
689 1.3 uch int
690 1.9 uch txcom_rxintr(void *arg)
691 1.3 uch {
692 1.3 uch struct txcom_softc *sc = arg;
693 1.3 uch struct txcom_chip *chip = sc->sc_chip;
694 1.1 uch u_int8_t c;
695 1.1 uch
696 1.3 uch c = TX39_UARTRXHOLD_RXDATA(
697 1.3 uch tx_conf_read(chip->sc_tc,
698 1.14 uch TX39_UARTRXHOLD_REG(chip->sc_slot)));
699 1.3 uch
700 1.3 uch sc->sc_rbuf[sc->sc_rbput] = c;
701 1.3 uch sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK;
702 1.3 uch
703 1.44 tsutsui softint_schedule(sc->sc_rxsoft_cookie);
704 1.1 uch
705 1.1 uch return 0;
706 1.1 uch }
707 1.1 uch
708 1.3 uch void
709 1.9 uch txcom_rxsoft(void *arg)
710 1.3 uch {
711 1.3 uch struct txcom_softc *sc = arg;
712 1.3 uch struct tty *tp = sc->sc_tty;
713 1.14 uch int (*rint)(int, struct tty *);
714 1.3 uch int code;
715 1.3 uch int s, end, get;
716 1.3 uch
717 1.10 eeh rint = tp->t_linesw->l_rint;
718 1.3 uch
719 1.3 uch s = spltty();
720 1.3 uch end = sc->sc_rbput;
721 1.3 uch get = sc->sc_rbget;
722 1.3 uch
723 1.3 uch while (get != end) {
724 1.3 uch code = sc->sc_rbuf[get];
725 1.3 uch
726 1.3 uch if ((*rint)(code, tp) == -1) {
727 1.3 uch /*
728 1.3 uch * The line discipline's buffer is out of space.
729 1.3 uch */
730 1.3 uch }
731 1.3 uch get = (get + 1) % TXCOM_RING_MASK;
732 1.3 uch }
733 1.3 uch sc->sc_rbget = get;
734 1.3 uch
735 1.3 uch splx(s);
736 1.3 uch }
737 1.3 uch
738 1.1 uch int
739 1.9 uch txcom_txintr(void *arg)
740 1.1 uch {
741 1.1 uch struct txcom_softc *sc = arg;
742 1.3 uch struct txcom_chip *chip = sc->sc_chip;
743 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
744 1.1 uch
745 1.3 uch if (sc->sc_tbc > 0) {
746 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
747 1.14 uch (*sc->sc_tba &
748 1.14 uch TX39_UARTTXHOLD_TXDATA_MASK));
749 1.3 uch sc->sc_tbc--;
750 1.3 uch sc->sc_tba++;
751 1.3 uch } else {
752 1.44 tsutsui softint_schedule(sc->sc_txsoft_cookie);
753 1.3 uch }
754 1.1 uch
755 1.1 uch return 0;
756 1.1 uch }
757 1.1 uch
758 1.3 uch void
759 1.9 uch txcom_txsoft(void *arg)
760 1.3 uch {
761 1.3 uch struct txcom_softc *sc = arg;
762 1.3 uch struct tty *tp = sc->sc_tty;
763 1.3 uch int s = spltty();
764 1.3 uch
765 1.3 uch CLR(tp->t_state, TS_BUSY);
766 1.3 uch if (ISSET(tp->t_state, TS_FLUSH)) {
767 1.3 uch CLR(tp->t_state, TS_FLUSH);
768 1.3 uch } else {
769 1.3 uch ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
770 1.3 uch }
771 1.3 uch
772 1.10 eeh (*tp->t_linesw->l_start)(tp);
773 1.3 uch
774 1.3 uch splx(s);
775 1.3 uch }
776 1.1 uch
777 1.1 uch int
778 1.26 christos txcomopen(dev_t dev, int flag, int mode, struct lwp *l)
779 1.1 uch {
780 1.40 tsutsui struct txcom_softc *sc;
781 1.3 uch struct txcom_chip *chip;
782 1.3 uch struct tty *tp;
783 1.23 shin int s, err = ENXIO;
784 1.1 uch
785 1.40 tsutsui sc = device_lookup_private(&txcom_cd, minor(dev));
786 1.40 tsutsui if (sc == NULL)
787 1.23 shin return err;
788 1.3 uch
789 1.3 uch chip = sc->sc_chip;
790 1.3 uch tp = sc->sc_tty;
791 1.3 uch
792 1.32 elad if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp))
793 1.3 uch return (EBUSY);
794 1.3 uch
795 1.3 uch s = spltty();
796 1.3 uch
797 1.36 thorpej if (txcom_enable(sc->sc_chip, false)) {
798 1.6 uch splx(s);
799 1.5 uch goto out;
800 1.6 uch }
801 1.5 uch /*
802 1.5 uch * Do the following iff this is a first open.
803 1.5 uch */
804 1.5 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
805 1.5 uch struct termios t;
806 1.5 uch
807 1.5 uch tp->t_dev = dev;
808 1.1 uch
809 1.5 uch t.c_ispeed = 0;
810 1.5 uch if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
811 1.5 uch t.c_ospeed = chip->sc_speed;
812 1.5 uch t.c_cflag = chip->sc_cflag;
813 1.5 uch } else {
814 1.5 uch t.c_ospeed = TTYDEF_SPEED;
815 1.5 uch t.c_cflag = TTYDEF_CFLAG;
816 1.5 uch }
817 1.3 uch
818 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL))
819 1.5 uch SET(t.c_cflag, CLOCAL);
820 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS))
821 1.5 uch SET(t.c_cflag, CRTSCTS);
822 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF))
823 1.5 uch SET(t.c_cflag, MDMBUF);
824 1.5 uch
825 1.5 uch /* Make sure txcomparam() will do something. */
826 1.5 uch tp->t_ospeed = 0;
827 1.5 uch txcomparam(tp, &t);
828 1.5 uch
829 1.5 uch tp->t_iflag = TTYDEF_IFLAG;
830 1.5 uch tp->t_oflag = TTYDEF_OFLAG;
831 1.5 uch tp->t_lflag = TTYDEF_LFLAG;
832 1.1 uch
833 1.5 uch ttychars(tp);
834 1.5 uch ttsetwater(tp);
835 1.3 uch
836 1.5 uch /*
837 1.5 uch * Turn on DTR. We must always do this, even if carrier is not
838 1.5 uch * present, because otherwise we'd have to use TIOCSDTR
839 1.5 uch * immediately after setting CLOCAL, which applications do not
840 1.5 uch * expect. We always assert DTR while the device is open
841 1.5 uch * unless explicitly requested to deassert it.
842 1.5 uch */
843 1.5 uch txcom_modem(sc, 1);
844 1.3 uch
845 1.5 uch /* Clear the input ring, and unblock. */
846 1.5 uch sc->sc_rbget = sc->sc_rbput = 0;
847 1.5 uch }
848 1.3 uch
849 1.3 uch splx(s);
850 1.6 uch #define TXCOMDIALOUT(x) (minor(x) & 0x80000)
851 1.6 uch if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) {
852 1.15 uch DPRINTF("ttyopen failed\n");
853 1.3 uch goto out;
854 1.1 uch }
855 1.10 eeh if ((err = (*tp->t_linesw->l_open)(dev, tp))) {
856 1.15 uch DPRINTF("line dicipline open failed\n");
857 1.3 uch goto out;
858 1.3 uch }
859 1.3 uch
860 1.3 uch return err;
861 1.3 uch
862 1.3 uch out:
863 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
864 1.3 uch /*
865 1.3 uch * We failed to open the device, and nobody else had it opened.
866 1.3 uch * Clean up the state as appropriate.
867 1.3 uch */
868 1.3 uch txcom_shutdown(sc);
869 1.1 uch }
870 1.1 uch
871 1.1 uch return err;
872 1.3 uch
873 1.1 uch }
874 1.1 uch
875 1.1 uch int
876 1.26 christos txcomclose(dev_t dev, int flag, int mode, struct lwp *l)
877 1.1 uch {
878 1.40 tsutsui struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
879 1.1 uch struct tty *tp = sc->sc_tty;
880 1.1 uch
881 1.3 uch /* XXX This is for cons.c. */
882 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN))
883 1.3 uch return 0;
884 1.3 uch
885 1.10 eeh (*tp->t_linesw->l_close)(tp, flag);
886 1.1 uch ttyclose(tp);
887 1.1 uch
888 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
889 1.3 uch /*
890 1.3 uch * Although we got a last close, the device may still be in
891 1.3 uch * use; e.g. if this was the dialout node, and there are still
892 1.3 uch * processes waiting for carrier on the non-dialout node.
893 1.3 uch */
894 1.3 uch txcom_shutdown(sc);
895 1.3 uch }
896 1.3 uch
897 1.1 uch return 0;
898 1.1 uch }
899 1.1 uch
900 1.1 uch int
901 1.9 uch txcomread(dev_t dev, struct uio *uio, int flag)
902 1.1 uch {
903 1.40 tsutsui struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
904 1.1 uch struct tty *tp = sc->sc_tty;
905 1.3 uch
906 1.10 eeh return ((*tp->t_linesw->l_read)(tp, uio, flag));
907 1.1 uch }
908 1.1 uch
909 1.1 uch int
910 1.9 uch txcomwrite(dev_t dev, struct uio *uio, int flag)
911 1.1 uch {
912 1.40 tsutsui struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
913 1.1 uch struct tty *tp = sc->sc_tty;
914 1.1 uch
915 1.10 eeh return ((*tp->t_linesw->l_write)(tp, uio, flag));
916 1.12 scw }
917 1.12 scw
918 1.12 scw int
919 1.26 christos txcompoll(dev_t dev, int events, struct lwp *l)
920 1.12 scw {
921 1.40 tsutsui struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
922 1.12 scw struct tty *tp = sc->sc_tty;
923 1.12 scw
924 1.26 christos return ((*tp->t_linesw->l_poll)(tp, events, l));
925 1.1 uch }
926 1.1 uch
927 1.1 uch struct tty *
928 1.9 uch txcomtty(dev_t dev)
929 1.1 uch {
930 1.40 tsutsui struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
931 1.3 uch
932 1.3 uch return sc->sc_tty;
933 1.1 uch }
934 1.1 uch
935 1.1 uch int
936 1.37 christos txcomioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
937 1.1 uch {
938 1.40 tsutsui struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
939 1.1 uch struct tty *tp = sc->sc_tty;
940 1.3 uch int s, err;
941 1.3 uch
942 1.26 christos err = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
943 1.16 atatat if (err != EPASSTHROUGH) {
944 1.3 uch return err;
945 1.3 uch }
946 1.3 uch
947 1.26 christos err = ttioctl(tp, cmd, data, flag, l);
948 1.16 atatat if (err != EPASSTHROUGH) {
949 1.3 uch return err;
950 1.3 uch }
951 1.3 uch
952 1.3 uch err = 0;
953 1.3 uch
954 1.3 uch s = spltty();
955 1.3 uch
956 1.3 uch switch (cmd) {
957 1.5 uch default:
958 1.16 atatat err = EPASSTHROUGH;
959 1.5 uch break;
960 1.5 uch
961 1.3 uch case TIOCSBRK:
962 1.3 uch txcom_break(sc, 1);
963 1.3 uch break;
964 1.3 uch
965 1.3 uch case TIOCCBRK:
966 1.3 uch txcom_break(sc, 0);
967 1.3 uch break;
968 1.3 uch
969 1.3 uch case TIOCSDTR:
970 1.3 uch txcom_modem(sc, 1);
971 1.3 uch break;
972 1.3 uch
973 1.3 uch case TIOCCDTR:
974 1.3 uch txcom_modem(sc, 0);
975 1.3 uch break;
976 1.3 uch
977 1.3 uch case TIOCGFLAGS:
978 1.3 uch *(int *)data = sc->sc_chip->sc_swflags;
979 1.3 uch break;
980 1.3 uch
981 1.3 uch case TIOCSFLAGS:
982 1.34 elad err = kauth_authorize_device_tty(l->l_cred,
983 1.34 elad KAUTH_DEVICE_TTY_PRIVSET, tp);
984 1.3 uch if (err) {
985 1.3 uch break;
986 1.3 uch }
987 1.3 uch sc->sc_chip->sc_swflags = *(int *)data;
988 1.3 uch break;
989 1.3 uch
990 1.3 uch }
991 1.1 uch
992 1.3 uch splx(s);
993 1.1 uch
994 1.3 uch return err;
995 1.1 uch }
996 1.1 uch
997 1.1 uch void
998 1.9 uch txcomstop(struct tty *tp, int flag)
999 1.1 uch {
1000 1.40 tsutsui struct txcom_softc *sc;
1001 1.1 uch int s;
1002 1.1 uch
1003 1.40 tsutsui sc = device_lookup_private(&txcom_cd, minor(tp->t_dev));
1004 1.40 tsutsui
1005 1.1 uch s = spltty();
1006 1.1 uch
1007 1.1 uch if (ISSET(tp->t_state, TS_BUSY)) {
1008 1.1 uch /* Stop transmitting at the next chunk. */
1009 1.1 uch sc->sc_tbc = 0;
1010 1.1 uch sc->sc_heldtbc = 0;
1011 1.1 uch if (!ISSET(tp->t_state, TS_TTSTOP))
1012 1.1 uch SET(tp->t_state, TS_FLUSH);
1013 1.1 uch }
1014 1.3 uch
1015 1.1 uch splx(s);
1016 1.1 uch }
1017 1.1 uch
1018 1.1 uch void
1019 1.9 uch txcomstart(struct tty *tp)
1020 1.1 uch {
1021 1.40 tsutsui struct txcom_softc *sc;
1022 1.40 tsutsui struct txcom_chip *chip;
1023 1.40 tsutsui tx_chipset_tag_t tc;
1024 1.40 tsutsui int slot;
1025 1.1 uch int s;
1026 1.1 uch
1027 1.40 tsutsui sc = device_lookup_private(&txcom_cd, minor(tp->t_dev));
1028 1.40 tsutsui chip = sc->sc_chip;
1029 1.40 tsutsui tc = chip->sc_tc;
1030 1.40 tsutsui slot = chip->sc_slot;
1031 1.40 tsutsui
1032 1.1 uch s = spltty();
1033 1.3 uch
1034 1.3 uch if (!__txcom_txbufready(chip, 0) ||
1035 1.3 uch ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
1036 1.3 uch goto out;
1037 1.1 uch
1038 1.38 ad if (!ttypull(tp))
1039 1.38 ad goto out;
1040 1.3 uch
1041 1.1 uch sc->sc_tba = tp->t_outq.c_cf;
1042 1.1 uch sc->sc_tbc = ndqb(&tp->t_outq, 0);
1043 1.3 uch SET(tp->t_state, TS_BUSY);
1044 1.3 uch
1045 1.3 uch /* Output the first character of the contiguous buffer. */
1046 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot),
1047 1.14 uch (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK));
1048 1.3 uch
1049 1.3 uch sc->sc_tbc--;
1050 1.3 uch sc->sc_tba++;
1051 1.1 uch
1052 1.3 uch out:
1053 1.1 uch splx(s);
1054 1.1 uch }
1055 1.1 uch
1056 1.3 uch /*
1057 1.3 uch * Set TXcom tty parameters from termios.
1058 1.3 uch */
1059 1.1 uch int
1060 1.9 uch txcomparam(struct tty *tp, struct termios *t)
1061 1.1 uch {
1062 1.40 tsutsui struct txcom_softc *sc;
1063 1.3 uch struct txcom_chip *chip;
1064 1.5 uch int ospeed;
1065 1.3 uch int s;
1066 1.3 uch
1067 1.40 tsutsui sc = device_lookup_private(&txcom_cd, minor(tp->t_dev));
1068 1.40 tsutsui if (sc == NULL)
1069 1.3 uch return ENXIO;
1070 1.3 uch
1071 1.3 uch ospeed = t->c_ospeed;
1072 1.3 uch
1073 1.3 uch /* Check requested parameters. */
1074 1.3 uch if (ospeed < 0) {
1075 1.3 uch return EINVAL;
1076 1.3 uch }
1077 1.3 uch if (t->c_ispeed && t->c_ispeed != ospeed) {
1078 1.3 uch return EINVAL;
1079 1.3 uch }
1080 1.3 uch
1081 1.3 uch s = spltty();
1082 1.3 uch chip = sc->sc_chip;
1083 1.3 uch /*
1084 1.3 uch * For the console, always force CLOCAL and !HUPCL, so that the port
1085 1.3 uch * is always active.
1086 1.3 uch */
1087 1.3 uch if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) ||
1088 1.3 uch ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
1089 1.5 uch SET(t->c_cflag, CLOCAL);
1090 1.5 uch CLR(t->c_cflag, HUPCL);
1091 1.3 uch }
1092 1.3 uch splx(s);
1093 1.3 uch
1094 1.3 uch /*
1095 1.6 uch * If we're not in a mode that assumes a connection is present, then
1096 1.6 uch * ignore carrier changes.
1097 1.6 uch */
1098 1.6 uch if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
1099 1.6 uch chip->sc_dcd = 0;
1100 1.6 uch else
1101 1.6 uch chip->sc_dcd = 1;
1102 1.6 uch
1103 1.6 uch /*
1104 1.3 uch * Only whack the UART when params change.
1105 1.3 uch * Some callers need to clear tp->t_ospeed
1106 1.3 uch * to make sure initialization gets done.
1107 1.3 uch */
1108 1.5 uch if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) {
1109 1.3 uch return 0;
1110 1.3 uch }
1111 1.3 uch
1112 1.3 uch s = spltty();
1113 1.3 uch chip = sc->sc_chip;
1114 1.3 uch chip->sc_speed = ospeed;
1115 1.5 uch chip->sc_cflag = t->c_cflag;
1116 1.3 uch
1117 1.3 uch txcom_setmode(chip);
1118 1.3 uch txcom_setbaudrate(chip);
1119 1.6 uch
1120 1.3 uch /* And copy to tty. */
1121 1.3 uch tp->t_ispeed = 0;
1122 1.3 uch tp->t_ospeed = chip->sc_speed;
1123 1.3 uch tp->t_cflag = chip->sc_cflag;
1124 1.3 uch
1125 1.3 uch /*
1126 1.6 uch * Update the tty layer's idea of the carrier bit, in case we changed
1127 1.6 uch * CLOCAL or MDMBUF. We don't hang up here; we only do that by
1128 1.6 uch * explicit request.
1129 1.6 uch */
1130 1.10 eeh (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd);
1131 1.6 uch
1132 1.6 uch /*
1133 1.3 uch * If hardware flow control is disabled, unblock any hard flow
1134 1.3 uch * control state.
1135 1.3 uch */
1136 1.3 uch if (!ISSET(chip->sc_cflag, CHWFLOW)) {
1137 1.3 uch txcomstart(tp);
1138 1.3 uch }
1139 1.3 uch
1140 1.3 uch splx(s);
1141 1.6 uch
1142 1.6 uch return 0;
1143 1.6 uch }
1144 1.6 uch
1145 1.9 uch int
1146 1.9 uch txcom_dcd_hook(void *arg, int type, long id, void *msg)
1147 1.9 uch {
1148 1.9 uch struct txcom_softc *sc = arg;
1149 1.9 uch struct tty *tp = sc->sc_tty;
1150 1.9 uch struct txcom_chip *chip = sc->sc_chip;
1151 1.9 uch int modem = !(int)msg; /* p-edge 1, n-edge 0 */
1152 1.9 uch
1153 1.15 uch DPRINTF("DCD %s\n", modem ? "ON" : "OFF");
1154 1.9 uch
1155 1.9 uch if (modem && chip->sc_dcd)
1156 1.10 eeh (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd);
1157 1.9 uch
1158 1.9 uch return 0;
1159 1.9 uch }
1160 1.9 uch
1161 1.9 uch int
1162 1.9 uch txcom_cts_hook(void *arg, int type, long id, void *msg)
1163 1.9 uch {
1164 1.9 uch struct txcom_softc *sc = arg;
1165 1.9 uch struct tty *tp = sc->sc_tty;
1166 1.9 uch struct txcom_chip *chip = sc->sc_chip;
1167 1.9 uch int clear = !(int)msg; /* p-edge 1, n-edge 0 */
1168 1.9 uch
1169 1.15 uch DPRINTF("CTS %s\n", clear ? "ON" : "OFF");
1170 1.9 uch
1171 1.9 uch if (chip->sc_msr_cts) {
1172 1.9 uch if (!clear) {
1173 1.9 uch chip->sc_tx_stopped = 1;
1174 1.9 uch } else {
1175 1.9 uch chip->sc_tx_stopped = 0;
1176 1.10 eeh (*tp->t_linesw->l_start)(tp);
1177 1.9 uch }
1178 1.9 uch }
1179 1.9 uch
1180 1.9 uch return 0;
1181 1.9 uch }
1182 1.9 uch
1183 1.9 uch #ifdef TX39UARTDEBUG
1184 1.6 uch void
1185 1.9 uch txcom_dump(struct txcom_chip *chip)
1186 1.6 uch {
1187 1.6 uch tx_chipset_tag_t tc = chip->sc_tc;
1188 1.6 uch int slot = chip->sc_slot;
1189 1.6 uch txreg_t reg;
1190 1.6 uch
1191 1.6 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
1192 1.6 uch #define ISSETPRINT(r, m) \
1193 1.15 uch dbg_bitmask_print(r, TX39_UARTCTRL1_##m, #m)
1194 1.6 uch ISSETPRINT(reg, UARTON);
1195 1.6 uch ISSETPRINT(reg, EMPTY);
1196 1.6 uch ISSETPRINT(reg, PRXHOLDFULL);
1197 1.6 uch ISSETPRINT(reg, RXHOLDFULL);
1198 1.6 uch ISSETPRINT(reg, ENDMARX);
1199 1.6 uch ISSETPRINT(reg, ENDMATX);
1200 1.6 uch ISSETPRINT(reg, TESTMODE);
1201 1.6 uch ISSETPRINT(reg, ENBREAHALT);
1202 1.6 uch ISSETPRINT(reg, ENDMATEST);
1203 1.6 uch ISSETPRINT(reg, ENDMALOOP);
1204 1.6 uch ISSETPRINT(reg, PULSEOPT2);
1205 1.6 uch ISSETPRINT(reg, PULSEOPT1);
1206 1.6 uch ISSETPRINT(reg, DTINVERT);
1207 1.6 uch ISSETPRINT(reg, DISTXD);
1208 1.6 uch ISSETPRINT(reg, TWOSTOP);
1209 1.6 uch ISSETPRINT(reg, LOOPBACK);
1210 1.6 uch ISSETPRINT(reg, BIT7);
1211 1.6 uch ISSETPRINT(reg, EVENPARITY);
1212 1.6 uch ISSETPRINT(reg, ENPARITY);
1213 1.6 uch ISSETPRINT(reg, ENUART);
1214 1.6 uch }
1215 1.9 uch #endif /* TX39UARTDEBUG */
1216