txcom.c revision 1.47 1 1.47 dholland /* $NetBSD: txcom.c,v 1.47 2014/03/16 05:20:24 dholland Exp $ */
2 1.1 uch
3 1.9 uch /*-
4 1.24 uch * Copyright (c) 1999, 2000, 2004 The NetBSD Foundation, Inc.
5 1.1 uch * All rights reserved.
6 1.1 uch *
7 1.9 uch * This code is derived from software contributed to The NetBSD Foundation
8 1.9 uch * by UCHIYAMA Yasushi.
9 1.9 uch *
10 1.1 uch * Redistribution and use in source and binary forms, with or without
11 1.1 uch * modification, are permitted provided that the following conditions
12 1.1 uch * are met:
13 1.1 uch * 1. Redistributions of source code must retain the above copyright
14 1.1 uch * notice, this list of conditions and the following disclaimer.
15 1.9 uch * 2. Redistributions in binary form must reproduce the above copyright
16 1.9 uch * notice, this list of conditions and the following disclaimer in the
17 1.9 uch * documentation and/or other materials provided with the distribution.
18 1.1 uch *
19 1.9 uch * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.9 uch * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.9 uch * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.9 uch * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.9 uch * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.9 uch * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.9 uch * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.9 uch * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.9 uch * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.9 uch * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.9 uch * POSSIBILITY OF SUCH DAMAGE.
30 1.1 uch */
31 1.22 lukem
32 1.22 lukem #include <sys/cdefs.h>
33 1.47 dholland __KERNEL_RCSID(0, "$NetBSD: txcom.c,v 1.47 2014/03/16 05:20:24 dholland Exp $");
34 1.15 uch
35 1.15 uch #include "opt_tx39uart_debug.h"
36 1.1 uch
37 1.1 uch #include <sys/param.h>
38 1.1 uch #include <sys/systm.h>
39 1.3 uch #include <sys/kernel.h>
40 1.1 uch #include <sys/device.h>
41 1.3 uch #include <sys/malloc.h>
42 1.30 elad #include <sys/kauth.h>
43 1.1 uch
44 1.1 uch #include <sys/proc.h> /* tsleep/wakeup */
45 1.1 uch
46 1.1 uch #include <sys/ioctl.h>
47 1.1 uch #include <sys/select.h>
48 1.1 uch #include <sys/file.h>
49 1.1 uch
50 1.1 uch #include <sys/tty.h>
51 1.1 uch #include <sys/conf.h>
52 1.1 uch #include <dev/cons.h> /* consdev */
53 1.1 uch
54 1.1 uch #include <machine/bus.h>
55 1.9 uch #include <machine/config_hook.h>
56 1.1 uch
57 1.1 uch #include <hpcmips/tx/tx39var.h>
58 1.1 uch #include <hpcmips/tx/tx39icureg.h>
59 1.1 uch #include <hpcmips/tx/tx39uartvar.h>
60 1.1 uch #include <hpcmips/tx/tx39uartreg.h>
61 1.1 uch
62 1.5 uch #include <hpcmips/tx/tx39irvar.h>
63 1.5 uch
64 1.1 uch #include <hpcmips/tx/tx39clockreg.h> /* XXX */
65 1.6 uch
66 1.9 uch /*
67 1.9 uch * UARTA channel has DTR, DSR, RTS, CTS lines. and they wired to MFIO/IO port.
68 1.9 uch */
69 1.9 uch #define IS_COM0(s) ((s) == 0)
70 1.9 uch #define IS_COM1(s) ((s) == 1)
71 1.9 uch #define ON ((void *)1)
72 1.9 uch #define OFF ((void *)0)
73 1.1 uch
74 1.15 uch #ifdef TX39UART_DEBUG
75 1.15 uch #define DPRINTF_ENABLE
76 1.15 uch #define DPRINTF_DEBUG tx39uart_debug
77 1.1 uch #endif
78 1.15 uch #include <machine/debug.h>
79 1.1 uch
80 1.3 uch #define TXCOM_HW_CONSOLE 0x40
81 1.3 uch #define TXCOM_RING_SIZE 256 /* must be a power of two! */
82 1.3 uch #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1)
83 1.1 uch
84 1.3 uch struct txcom_chip {
85 1.1 uch tx_chipset_tag_t sc_tc;
86 1.1 uch int sc_slot; /* UARTA or UARTB */
87 1.1 uch int sc_cflag;
88 1.1 uch int sc_speed;
89 1.3 uch int sc_swflags;
90 1.1 uch int sc_hwflags;
91 1.6 uch
92 1.6 uch int sc_dcd;
93 1.9 uch int sc_msr_cts;
94 1.9 uch int sc_tx_stopped;
95 1.3 uch };
96 1.1 uch
97 1.3 uch struct txcom_softc {
98 1.3 uch struct tty *sc_tty;
99 1.3 uch struct txcom_chip *sc_chip;
100 1.3 uch
101 1.44 tsutsui void *sc_txsoft_cookie;
102 1.44 tsutsui void *sc_rxsoft_cookie;
103 1.8 thorpej
104 1.3 uch u_int8_t *sc_tba; /* transmit buffer address */
105 1.3 uch int sc_tbc; /* transmit byte count */
106 1.3 uch int sc_heldtbc;
107 1.3 uch u_int8_t *sc_rbuf; /* receive buffer address */
108 1.3 uch int sc_rbput; /* receive byte count */
109 1.3 uch int sc_rbget;
110 1.1 uch };
111 1.1 uch
112 1.1 uch extern struct cfdriver txcom_cd;
113 1.1 uch
114 1.46 chs int txcom_match(device_t, cfdata_t, void *);
115 1.46 chs void txcom_attach(device_t, device_t, void *);
116 1.46 chs int txcom_print(void *, const char *);
117 1.9 uch
118 1.9 uch int txcom_txintr(void *);
119 1.9 uch int txcom_rxintr(void *);
120 1.9 uch int txcom_frameerr_intr(void *);
121 1.9 uch int txcom_parityerr_intr(void *);
122 1.9 uch int txcom_break_intr(void *);
123 1.3 uch
124 1.9 uch void txcom_rxsoft(void *);
125 1.9 uch void txcom_txsoft(void *);
126 1.3 uch
127 1.9 uch int txcom_stsoft(void *);
128 1.9 uch int txcom_stsoft2(void *);
129 1.9 uch int txcom_stsoft3(void *);
130 1.9 uch int txcom_stsoft4(void *);
131 1.9 uch
132 1.9 uch
133 1.9 uch void txcom_shutdown(struct txcom_softc *);
134 1.9 uch void txcom_break(struct txcom_softc *, int);
135 1.9 uch void txcom_modem(struct txcom_softc *, int);
136 1.9 uch void txcomstart(struct tty *);
137 1.9 uch int txcomparam(struct tty *, struct termios *);
138 1.9 uch
139 1.9 uch void txcom_reset (struct txcom_chip *);
140 1.35 thorpej int txcom_enable (struct txcom_chip *, bool);
141 1.9 uch void txcom_disable (struct txcom_chip *);
142 1.9 uch void txcom_setmode (struct txcom_chip *);
143 1.9 uch void txcom_setbaudrate(struct txcom_chip *);
144 1.9 uch int txcom_cngetc (dev_t);
145 1.9 uch void txcom_cnputc (dev_t, int);
146 1.9 uch void txcom_cnpollc (dev_t, int);
147 1.3 uch
148 1.9 uch int txcom_dcd_hook(void *, int, long, void *);
149 1.9 uch int txcom_cts_hook(void *, int, long, void *);
150 1.1 uch
151 1.9 uch
152 1.27 perry inline int __txcom_txbufready(struct txcom_chip *, int);
153 1.9 uch const char *__txcom_slotname(int);
154 1.9 uch
155 1.9 uch #ifdef TX39UARTDEBUG
156 1.9 uch void txcom_dump(struct txcom_chip *);
157 1.9 uch #endif
158 1.6 uch
159 1.3 uch struct consdev txcomcons = {
160 1.21 nakayama NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc, NULL, NULL,
161 1.14 uch NULL, NODEV, CN_NORMAL
162 1.3 uch };
163 1.3 uch
164 1.1 uch /* Serial console */
165 1.3 uch struct txcom_chip txcom_chip;
166 1.1 uch
167 1.46 chs CFATTACH_DECL_NEW(txcom, sizeof(struct txcom_softc),
168 1.19 thorpej txcom_match, txcom_attach, NULL, NULL);
169 1.1 uch
170 1.17 gehenna dev_type_open(txcomopen);
171 1.17 gehenna dev_type_close(txcomclose);
172 1.17 gehenna dev_type_read(txcomread);
173 1.17 gehenna dev_type_write(txcomwrite);
174 1.17 gehenna dev_type_ioctl(txcomioctl);
175 1.17 gehenna dev_type_stop(txcomstop);
176 1.17 gehenna dev_type_tty(txcomtty);
177 1.17 gehenna dev_type_poll(txcompoll);
178 1.17 gehenna
179 1.17 gehenna const struct cdevsw txcom_cdevsw = {
180 1.47 dholland .d_open = txcomopen,
181 1.47 dholland .d_close = txcomclose,
182 1.47 dholland .d_read = txcomread,
183 1.47 dholland .d_write = txcomwrite,
184 1.47 dholland .d_ioctl = txcomioctl,
185 1.47 dholland .d_stop = txcomstop,
186 1.47 dholland .d_tty = txcomtty,
187 1.47 dholland .d_poll = txcompoll,
188 1.47 dholland .d_mmap = nommap,
189 1.47 dholland .d_kqfilter = ttykqfilter,
190 1.47 dholland .d_flag = D_TTY
191 1.17 gehenna };
192 1.17 gehenna
193 1.1 uch int
194 1.46 chs txcom_match(device_t parent, cfdata_t cf, void *aux)
195 1.1 uch {
196 1.1 uch /* if the autoconfiguration got this far, there's a slot here */
197 1.1 uch return 1;
198 1.1 uch }
199 1.1 uch
200 1.1 uch void
201 1.46 chs txcom_attach(device_t parent, device_t self, void *aux)
202 1.1 uch {
203 1.1 uch struct tx39uart_attach_args *ua = aux;
204 1.46 chs struct txcom_softc *sc = device_private(self);
205 1.1 uch tx_chipset_tag_t tc;
206 1.1 uch struct tty *tp;
207 1.3 uch struct txcom_chip *chip;
208 1.6 uch int slot, console;
209 1.1 uch
210 1.1 uch /* Check this slot used as serial console */
211 1.6 uch console = (ua->ua_slot == txcom_chip.sc_slot) &&
212 1.14 uch (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE);
213 1.6 uch
214 1.6 uch if (console) {
215 1.3 uch sc->sc_chip = &txcom_chip;
216 1.3 uch } else {
217 1.3 uch if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip),
218 1.14 uch M_DEVBUF, M_WAITOK))) {
219 1.3 uch printf(": can't allocate chip\n");
220 1.3 uch return;
221 1.3 uch }
222 1.3 uch memset(sc->sc_chip, 0, sizeof(struct txcom_chip));
223 1.1 uch }
224 1.1 uch
225 1.3 uch chip = sc->sc_chip;
226 1.3 uch tc = chip->sc_tc = ua->ua_tc;
227 1.3 uch slot = chip->sc_slot = ua->ua_slot;
228 1.3 uch
229 1.6 uch #ifdef TX39UARTDEBUG
230 1.6 uch txcom_dump(chip);
231 1.6 uch #endif
232 1.6 uch if (!console)
233 1.6 uch txcom_reset(chip);
234 1.6 uch
235 1.3 uch if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) {
236 1.3 uch printf(": can't allocate buffer.\n");
237 1.3 uch return;
238 1.3 uch }
239 1.3 uch memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE);
240 1.1 uch
241 1.45 rmind tp = tty_alloc();
242 1.1 uch tp->t_oproc = txcomstart;
243 1.1 uch tp->t_param = txcomparam;
244 1.1 uch tp->t_hwiflow = NULL;
245 1.1 uch sc->sc_tty = tp;
246 1.1 uch tty_attach(tp);
247 1.1 uch
248 1.3 uch if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
249 1.1 uch int maj;
250 1.1 uch /* locate the major number */
251 1.17 gehenna maj = cdevsw_lookup_major(&txcom_cdevsw);
252 1.1 uch
253 1.46 chs cn_tab->cn_dev = makedev(maj, device_unit(self));
254 1.1 uch
255 1.3 uch printf(": console");
256 1.1 uch }
257 1.1 uch
258 1.3 uch printf("\n");
259 1.1 uch
260 1.1 uch /*
261 1.1 uch * Enable interrupt
262 1.1 uch */
263 1.3 uch #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s))
264 1.3 uch
265 1.3 uch tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY,
266 1.14 uch txcom_rxintr, sc);
267 1.3 uch tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY,
268 1.14 uch txcom_txintr, sc);
269 1.3 uch tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY,
270 1.14 uch txcom_rxintr, sc);
271 1.3 uch tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY,
272 1.14 uch txcom_txintr, sc);
273 1.3 uch tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY,
274 1.14 uch txcom_frameerr_intr, sc);
275 1.3 uch tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY,
276 1.14 uch txcom_parityerr_intr, sc);
277 1.3 uch tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY,
278 1.14 uch txcom_break_intr, sc);
279 1.5 uch
280 1.44 tsutsui sc->sc_txsoft_cookie =
281 1.44 tsutsui softint_establish(SOFTINT_SERIAL, txcom_txsoft, sc);
282 1.44 tsutsui sc->sc_rxsoft_cookie =
283 1.44 tsutsui softint_establish(SOFTINT_SERIAL, txcom_rxsoft, sc);
284 1.44 tsutsui
285 1.9 uch /*
286 1.9 uch * UARTA has external signal line. (its wiring is platform dependent)
287 1.9 uch */
288 1.9 uch if (IS_COM0(slot)) {
289 1.9 uch /* install DCD, CTS hooks. */
290 1.11 sato config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_DCD,
291 1.14 uch CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc);
292 1.11 sato config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_CTS,
293 1.14 uch CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc);
294 1.9 uch }
295 1.6 uch
296 1.5 uch /*
297 1.5 uch * UARTB can connect IR module
298 1.5 uch */
299 1.9 uch if (IS_COM1(slot)) {
300 1.5 uch struct txcom_attach_args tca;
301 1.5 uch tca.tca_tc = tc;
302 1.5 uch tca.tca_parent = self;
303 1.5 uch config_found(self, &tca, txcom_print);
304 1.5 uch }
305 1.5 uch }
306 1.5 uch
307 1.5 uch int
308 1.9 uch txcom_print(void *aux, const char *pnp)
309 1.5 uch {
310 1.5 uch return pnp ? QUIET : UNCONF;
311 1.1 uch }
312 1.1 uch
313 1.6 uch void
314 1.9 uch txcom_reset(struct txcom_chip *chip)
315 1.6 uch {
316 1.6 uch tx_chipset_tag_t tc;
317 1.6 uch int slot, ofs;
318 1.6 uch txreg_t reg;
319 1.6 uch
320 1.6 uch tc = chip->sc_tc;
321 1.6 uch slot = chip->sc_slot;
322 1.6 uch ofs = TX39_UARTCTRL1_REG(slot);
323 1.6 uch
324 1.6 uch /* Supply clock */
325 1.6 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
326 1.6 uch reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
327 1.6 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
328 1.6 uch
329 1.6 uch /* reset UART module */
330 1.6 uch tx_conf_write(tc, ofs, 0);
331 1.6 uch }
332 1.6 uch
333 1.1 uch int
334 1.35 thorpej txcom_enable(struct txcom_chip *chip, bool console)
335 1.1 uch {
336 1.1 uch tx_chipset_tag_t tc;
337 1.1 uch txreg_t reg;
338 1.3 uch int slot, ofs, timeout;
339 1.1 uch
340 1.3 uch tc = chip->sc_tc;
341 1.3 uch slot = chip->sc_slot;
342 1.3 uch ofs = TX39_UARTCTRL1_REG(slot);
343 1.1 uch
344 1.24 uch /*
345 1.24 uch * External power supply (if any)
346 1.24 uch * When serial console, Windows CE already powered on it.
347 1.24 uch */
348 1.24 uch if (!console) {
349 1.24 uch config_hook_call(CONFIG_HOOK_POWERCONTROL,
350 1.24 uch CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON);
351 1.24 uch delay(3);
352 1.24 uch }
353 1.9 uch
354 1.6 uch /* Supply clock */
355 1.5 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
356 1.5 uch reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
357 1.5 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
358 1.5 uch
359 1.6 uch /*
360 1.6 uch * XXX Disable DMA (DMA not coded yet)
361 1.6 uch */
362 1.6 uch reg = tx_conf_read(tc, ofs);
363 1.6 uch reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
364 1.6 uch tx_conf_write(tc, ofs, reg);
365 1.6 uch
366 1.6 uch /* enable */
367 1.3 uch reg = tx_conf_read(tc, ofs);
368 1.1 uch reg |= TX39_UARTCTRL1_ENUART;
369 1.1 uch reg &= ~TX39_UARTCTRL1_ENBREAHALT;
370 1.3 uch tx_conf_write(tc, ofs, reg);
371 1.3 uch
372 1.9 uch timeout = 100000;
373 1.3 uch
374 1.3 uch while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) &&
375 1.14 uch --timeout > 0)
376 1.3 uch ;
377 1.3 uch
378 1.5 uch if (timeout == 0 && !cold) {
379 1.6 uch printf("%s never power up\n", __txcom_slotname(slot));
380 1.3 uch return 1;
381 1.3 uch }
382 1.3 uch
383 1.1 uch return 0;
384 1.1 uch }
385 1.1 uch
386 1.1 uch void
387 1.9 uch txcom_disable(struct txcom_chip *chip)
388 1.1 uch {
389 1.1 uch tx_chipset_tag_t tc;
390 1.1 uch txreg_t reg;
391 1.1 uch int slot;
392 1.1 uch
393 1.3 uch tc = chip->sc_tc;
394 1.3 uch slot = chip->sc_slot;
395 1.1 uch
396 1.1 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
397 1.1 uch /* DMA */
398 1.1 uch reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
399 1.3 uch
400 1.6 uch /* disable module */
401 1.1 uch reg &= ~TX39_UARTCTRL1_ENUART;
402 1.1 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
403 1.3 uch
404 1.1 uch /* Clock */
405 1.1 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
406 1.1 uch reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
407 1.1 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
408 1.1 uch
409 1.1 uch }
410 1.1 uch
411 1.27 perry inline int
412 1.9 uch __txcom_txbufready(struct txcom_chip *chip, int retry)
413 1.3 uch {
414 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
415 1.3 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
416 1.3 uch
417 1.3 uch do {
418 1.3 uch if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY)
419 1.3 uch return 1;
420 1.3 uch } while(--retry != 0);
421 1.3 uch
422 1.1 uch return 0;
423 1.1 uch }
424 1.1 uch
425 1.5 uch void
426 1.46 chs txcom_pulse_mode(device_t dev)
427 1.5 uch {
428 1.46 chs struct txcom_softc *sc = device_private(dev);
429 1.5 uch struct txcom_chip *chip = sc->sc_chip;
430 1.5 uch tx_chipset_tag_t tc = chip->sc_tc;
431 1.5 uch int ofs;
432 1.5 uch txreg_t reg;
433 1.5 uch
434 1.5 uch ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
435 1.5 uch
436 1.5 uch reg = tx_conf_read(tc, ofs);
437 1.6 uch /* WindowsCE use this setting */
438 1.6 uch reg |= TX39_UARTCTRL1_PULSEOPT1;
439 1.6 uch reg &= ~TX39_UARTCTRL1_PULSEOPT2;
440 1.6 uch reg |= TX39_UARTCTRL1_DTINVERT;
441 1.6 uch
442 1.5 uch tx_conf_write(tc, ofs, reg);
443 1.5 uch }
444 1.5 uch
445 1.3 uch /*
446 1.3 uch * console
447 1.3 uch */
448 1.1 uch int
449 1.9 uch txcom_cngetc(dev_t dev)
450 1.1 uch {
451 1.1 uch tx_chipset_tag_t tc;
452 1.2 uch int ofs, c, s;
453 1.2 uch
454 1.3 uch s = spltty();
455 1.2 uch
456 1.3 uch tc = txcom_chip.sc_tc;
457 1.3 uch ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot);
458 1.1 uch
459 1.1 uch while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs)))
460 1.1 uch ;
461 1.2 uch
462 1.3 uch c = TX39_UARTRXHOLD_RXDATA(
463 1.3 uch tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot)));
464 1.2 uch
465 1.3 uch if (c == '\r')
466 1.1 uch c = '\n';
467 1.1 uch
468 1.2 uch splx(s);
469 1.2 uch
470 1.1 uch return c;
471 1.1 uch }
472 1.1 uch
473 1.1 uch void
474 1.9 uch txcom_cnputc(dev_t dev, int c)
475 1.1 uch {
476 1.3 uch struct txcom_chip *chip = &txcom_chip;
477 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
478 1.3 uch int s;
479 1.2 uch
480 1.3 uch s = spltty();
481 1.1 uch
482 1.3 uch /* Wait for transmitter to empty */
483 1.3 uch __txcom_txbufready(chip, -1);
484 1.1 uch
485 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
486 1.14 uch (c & TX39_UARTTXHOLD_TXDATA_MASK));
487 1.1 uch
488 1.3 uch __txcom_txbufready(chip, -1);
489 1.3 uch
490 1.2 uch splx(s);
491 1.1 uch }
492 1.1 uch
493 1.1 uch void
494 1.9 uch txcom_cnpollc(dev_t dev, int on)
495 1.1 uch {
496 1.1 uch }
497 1.1 uch
498 1.1 uch void
499 1.9 uch txcom_setmode(struct txcom_chip *chip)
500 1.1 uch {
501 1.3 uch tcflag_t cflag = chip->sc_cflag;
502 1.3 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
503 1.1 uch txreg_t reg;
504 1.1 uch
505 1.3 uch reg = tx_conf_read(chip->sc_tc, ofs);
506 1.6 uch reg &= ~TX39_UARTCTRL1_ENUART;
507 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg);
508 1.6 uch
509 1.1 uch switch (ISSET(cflag, CSIZE)) {
510 1.1 uch default:
511 1.1 uch printf("txcom_setmode: CS7, CS8 only. use CS7");
512 1.1 uch /* FALL THROUGH */
513 1.1 uch case CS7:
514 1.1 uch reg |= TX39_UARTCTRL1_BIT7;
515 1.1 uch break;
516 1.1 uch case CS8:
517 1.1 uch reg &= ~TX39_UARTCTRL1_BIT7;
518 1.1 uch break;
519 1.1 uch }
520 1.3 uch
521 1.1 uch if (ISSET(cflag, PARENB)) {
522 1.1 uch reg |= TX39_UARTCTRL1_ENPARITY;
523 1.1 uch if (ISSET(cflag, PARODD)) {
524 1.1 uch reg &= ~TX39_UARTCTRL1_EVENPARITY;
525 1.1 uch } else {
526 1.1 uch reg |= TX39_UARTCTRL1_EVENPARITY;
527 1.1 uch }
528 1.1 uch } else {
529 1.1 uch reg &= ~TX39_UARTCTRL1_ENPARITY;
530 1.1 uch }
531 1.3 uch
532 1.6 uch if (ISSET(cflag, CSTOPB))
533 1.1 uch reg |= TX39_UARTCTRL1_TWOSTOP;
534 1.6 uch else
535 1.6 uch reg &= ~TX39_UARTCTRL1_TWOSTOP;
536 1.6 uch
537 1.6 uch reg |= TX39_UARTCTRL1_ENUART;
538 1.3 uch tx_conf_write(chip->sc_tc, ofs, reg);
539 1.3 uch }
540 1.3 uch
541 1.3 uch void
542 1.9 uch txcom_setbaudrate(struct txcom_chip *chip)
543 1.3 uch {
544 1.3 uch int baudrate;
545 1.6 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
546 1.6 uch txreg_t reg, reg1;
547 1.3 uch
548 1.3 uch if (chip->sc_speed == 0)
549 1.3 uch return;
550 1.3 uch
551 1.5 uch if (!cold)
552 1.15 uch DPRINTF("%d\n", chip->sc_speed);
553 1.5 uch
554 1.6 uch reg1 = tx_conf_read(chip->sc_tc, ofs);
555 1.6 uch reg1 &= ~TX39_UARTCTRL1_ENUART;
556 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg1);
557 1.6 uch
558 1.3 uch baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1;
559 1.3 uch reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate);
560 1.3 uch
561 1.3 uch tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg);
562 1.6 uch
563 1.6 uch reg1 |= TX39_UARTCTRL1_ENUART;
564 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg1);
565 1.3 uch }
566 1.3 uch
567 1.3 uch int
568 1.9 uch txcom_cnattach(int slot, int speed, int cflag)
569 1.3 uch {
570 1.3 uch cn_tab = &txcomcons;
571 1.3 uch
572 1.3 uch txcom_chip.sc_tc = tx_conf_get_tag();
573 1.3 uch txcom_chip.sc_slot = slot;
574 1.3 uch txcom_chip.sc_cflag = cflag;
575 1.3 uch txcom_chip.sc_speed = speed;
576 1.3 uch txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE;
577 1.6 uch #if notyet
578 1.6 uch txcom_reset(&txcom_chip);
579 1.6 uch #endif
580 1.6 uch txcom_setmode(&txcom_chip);
581 1.6 uch txcom_setbaudrate(&txcom_chip);
582 1.3 uch
583 1.36 thorpej if (txcom_enable(&txcom_chip, true) != 0)
584 1.5 uch return 1;
585 1.5 uch
586 1.3 uch return 0;
587 1.3 uch }
588 1.3 uch
589 1.3 uch /*
590 1.3 uch * tty
591 1.3 uch */
592 1.3 uch void
593 1.9 uch txcom_break(struct txcom_softc *sc, int on)
594 1.3 uch {
595 1.3 uch struct txcom_chip *chip = sc->sc_chip;
596 1.1 uch
597 1.3 uch tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
598 1.14 uch on ? TX39_UARTTXHOLD_BREAK : 0);
599 1.1 uch }
600 1.1 uch
601 1.1 uch void
602 1.9 uch txcom_modem(struct txcom_softc *sc, int on)
603 1.1 uch {
604 1.3 uch struct txcom_chip *chip = sc->sc_chip;
605 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
606 1.3 uch int slot = chip->sc_slot;
607 1.1 uch txreg_t reg;
608 1.1 uch
609 1.9 uch /* assert DTR */
610 1.9 uch if (IS_COM0(slot)) {
611 1.11 sato config_hook_call(CONFIG_HOOK_SET,
612 1.14 uch CONFIG_HOOK_COM0_DTR,
613 1.14 uch (void *)on);
614 1.9 uch }
615 1.9 uch
616 1.3 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
617 1.6 uch reg &= ~TX39_UARTCTRL1_ENUART;
618 1.6 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
619 1.3 uch
620 1.3 uch if (on) {
621 1.3 uch reg &= ~TX39_UARTCTRL1_DISTXD;
622 1.3 uch } else {
623 1.6 uch reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */
624 1.3 uch }
625 1.6 uch
626 1.6 uch reg |= TX39_UARTCTRL1_ENUART;
627 1.6 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
628 1.1 uch }
629 1.1 uch
630 1.1 uch void
631 1.9 uch txcom_shutdown(struct txcom_softc *sc)
632 1.1 uch {
633 1.1 uch struct tty *tp = sc->sc_tty;
634 1.3 uch int s = spltty();
635 1.1 uch
636 1.3 uch /* Clear any break condition set with TIOCSBRK. */
637 1.3 uch txcom_break(sc, 0);
638 1.3 uch
639 1.3 uch /*
640 1.3 uch * Hang up if necessary. Wait a bit, so the other side has time to
641 1.3 uch * notice even if we immediately open the port again.
642 1.3 uch */
643 1.3 uch if (ISSET(tp->t_cflag, HUPCL)) {
644 1.3 uch txcom_modem(sc, 0);
645 1.3 uch (void) tsleep(sc, TTIPRI, ttclos, hz);
646 1.3 uch }
647 1.3 uch
648 1.3 uch
649 1.3 uch /* Turn off interrupts if not the console. */
650 1.3 uch if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
651 1.3 uch txcom_disable(sc->sc_chip);
652 1.3 uch }
653 1.1 uch
654 1.3 uch splx(s);
655 1.3 uch }
656 1.1 uch
657 1.9 uch const char *
658 1.9 uch __txcom_slotname(int slot)
659 1.3 uch {
660 1.9 uch static const char *slotname[] = {"UARTA", "UARTB", "unknown"};
661 1.9 uch
662 1.9 uch if (slot != 0 && slot != 1)
663 1.9 uch return slotname[2];
664 1.9 uch
665 1.9 uch return slotname[slot];
666 1.2 uch }
667 1.2 uch
668 1.2 uch int
669 1.9 uch txcom_frameerr_intr(void *arg)
670 1.3 uch {
671 1.3 uch struct txcom_softc *sc = arg;
672 1.3 uch
673 1.3 uch printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot));
674 1.3 uch
675 1.3 uch return 0;
676 1.3 uch }
677 1.3 uch
678 1.3 uch int
679 1.9 uch txcom_parityerr_intr(void *arg)
680 1.3 uch {
681 1.3 uch struct txcom_softc *sc = arg;
682 1.3 uch
683 1.3 uch printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot));
684 1.2 uch
685 1.2 uch return 0;
686 1.1 uch }
687 1.1 uch
688 1.1 uch int
689 1.9 uch txcom_break_intr(void *arg)
690 1.1 uch {
691 1.1 uch struct txcom_softc *sc = arg;
692 1.3 uch
693 1.3 uch printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot));
694 1.3 uch
695 1.3 uch return 0;
696 1.3 uch }
697 1.3 uch
698 1.3 uch int
699 1.9 uch txcom_rxintr(void *arg)
700 1.3 uch {
701 1.3 uch struct txcom_softc *sc = arg;
702 1.3 uch struct txcom_chip *chip = sc->sc_chip;
703 1.1 uch u_int8_t c;
704 1.1 uch
705 1.3 uch c = TX39_UARTRXHOLD_RXDATA(
706 1.3 uch tx_conf_read(chip->sc_tc,
707 1.14 uch TX39_UARTRXHOLD_REG(chip->sc_slot)));
708 1.3 uch
709 1.3 uch sc->sc_rbuf[sc->sc_rbput] = c;
710 1.3 uch sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK;
711 1.3 uch
712 1.44 tsutsui softint_schedule(sc->sc_rxsoft_cookie);
713 1.1 uch
714 1.1 uch return 0;
715 1.1 uch }
716 1.1 uch
717 1.3 uch void
718 1.9 uch txcom_rxsoft(void *arg)
719 1.3 uch {
720 1.3 uch struct txcom_softc *sc = arg;
721 1.3 uch struct tty *tp = sc->sc_tty;
722 1.14 uch int (*rint)(int, struct tty *);
723 1.3 uch int code;
724 1.3 uch int s, end, get;
725 1.3 uch
726 1.10 eeh rint = tp->t_linesw->l_rint;
727 1.3 uch
728 1.3 uch s = spltty();
729 1.3 uch end = sc->sc_rbput;
730 1.3 uch get = sc->sc_rbget;
731 1.3 uch
732 1.3 uch while (get != end) {
733 1.3 uch code = sc->sc_rbuf[get];
734 1.3 uch
735 1.3 uch if ((*rint)(code, tp) == -1) {
736 1.3 uch /*
737 1.3 uch * The line discipline's buffer is out of space.
738 1.3 uch */
739 1.3 uch }
740 1.3 uch get = (get + 1) % TXCOM_RING_MASK;
741 1.3 uch }
742 1.3 uch sc->sc_rbget = get;
743 1.3 uch
744 1.3 uch splx(s);
745 1.3 uch }
746 1.3 uch
747 1.1 uch int
748 1.9 uch txcom_txintr(void *arg)
749 1.1 uch {
750 1.1 uch struct txcom_softc *sc = arg;
751 1.3 uch struct txcom_chip *chip = sc->sc_chip;
752 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
753 1.1 uch
754 1.3 uch if (sc->sc_tbc > 0) {
755 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
756 1.14 uch (*sc->sc_tba &
757 1.14 uch TX39_UARTTXHOLD_TXDATA_MASK));
758 1.3 uch sc->sc_tbc--;
759 1.3 uch sc->sc_tba++;
760 1.3 uch } else {
761 1.44 tsutsui softint_schedule(sc->sc_txsoft_cookie);
762 1.3 uch }
763 1.1 uch
764 1.1 uch return 0;
765 1.1 uch }
766 1.1 uch
767 1.3 uch void
768 1.9 uch txcom_txsoft(void *arg)
769 1.3 uch {
770 1.3 uch struct txcom_softc *sc = arg;
771 1.3 uch struct tty *tp = sc->sc_tty;
772 1.3 uch int s = spltty();
773 1.3 uch
774 1.3 uch CLR(tp->t_state, TS_BUSY);
775 1.3 uch if (ISSET(tp->t_state, TS_FLUSH)) {
776 1.3 uch CLR(tp->t_state, TS_FLUSH);
777 1.3 uch } else {
778 1.3 uch ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
779 1.3 uch }
780 1.3 uch
781 1.10 eeh (*tp->t_linesw->l_start)(tp);
782 1.3 uch
783 1.3 uch splx(s);
784 1.3 uch }
785 1.1 uch
786 1.1 uch int
787 1.26 christos txcomopen(dev_t dev, int flag, int mode, struct lwp *l)
788 1.1 uch {
789 1.40 tsutsui struct txcom_softc *sc;
790 1.3 uch struct txcom_chip *chip;
791 1.3 uch struct tty *tp;
792 1.23 shin int s, err = ENXIO;
793 1.1 uch
794 1.40 tsutsui sc = device_lookup_private(&txcom_cd, minor(dev));
795 1.40 tsutsui if (sc == NULL)
796 1.23 shin return err;
797 1.3 uch
798 1.3 uch chip = sc->sc_chip;
799 1.3 uch tp = sc->sc_tty;
800 1.3 uch
801 1.32 elad if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp))
802 1.3 uch return (EBUSY);
803 1.3 uch
804 1.3 uch s = spltty();
805 1.3 uch
806 1.36 thorpej if (txcom_enable(sc->sc_chip, false)) {
807 1.6 uch splx(s);
808 1.5 uch goto out;
809 1.6 uch }
810 1.5 uch /*
811 1.5 uch * Do the following iff this is a first open.
812 1.5 uch */
813 1.5 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
814 1.5 uch struct termios t;
815 1.5 uch
816 1.5 uch tp->t_dev = dev;
817 1.1 uch
818 1.5 uch t.c_ispeed = 0;
819 1.5 uch if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
820 1.5 uch t.c_ospeed = chip->sc_speed;
821 1.5 uch t.c_cflag = chip->sc_cflag;
822 1.5 uch } else {
823 1.5 uch t.c_ospeed = TTYDEF_SPEED;
824 1.5 uch t.c_cflag = TTYDEF_CFLAG;
825 1.5 uch }
826 1.3 uch
827 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL))
828 1.5 uch SET(t.c_cflag, CLOCAL);
829 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS))
830 1.5 uch SET(t.c_cflag, CRTSCTS);
831 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF))
832 1.5 uch SET(t.c_cflag, MDMBUF);
833 1.5 uch
834 1.5 uch /* Make sure txcomparam() will do something. */
835 1.5 uch tp->t_ospeed = 0;
836 1.5 uch txcomparam(tp, &t);
837 1.5 uch
838 1.5 uch tp->t_iflag = TTYDEF_IFLAG;
839 1.5 uch tp->t_oflag = TTYDEF_OFLAG;
840 1.5 uch tp->t_lflag = TTYDEF_LFLAG;
841 1.1 uch
842 1.5 uch ttychars(tp);
843 1.5 uch ttsetwater(tp);
844 1.3 uch
845 1.5 uch /*
846 1.5 uch * Turn on DTR. We must always do this, even if carrier is not
847 1.5 uch * present, because otherwise we'd have to use TIOCSDTR
848 1.5 uch * immediately after setting CLOCAL, which applications do not
849 1.5 uch * expect. We always assert DTR while the device is open
850 1.5 uch * unless explicitly requested to deassert it.
851 1.5 uch */
852 1.5 uch txcom_modem(sc, 1);
853 1.3 uch
854 1.5 uch /* Clear the input ring, and unblock. */
855 1.5 uch sc->sc_rbget = sc->sc_rbput = 0;
856 1.5 uch }
857 1.3 uch
858 1.3 uch splx(s);
859 1.6 uch #define TXCOMDIALOUT(x) (minor(x) & 0x80000)
860 1.6 uch if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) {
861 1.15 uch DPRINTF("ttyopen failed\n");
862 1.3 uch goto out;
863 1.1 uch }
864 1.10 eeh if ((err = (*tp->t_linesw->l_open)(dev, tp))) {
865 1.15 uch DPRINTF("line dicipline open failed\n");
866 1.3 uch goto out;
867 1.3 uch }
868 1.3 uch
869 1.3 uch return err;
870 1.3 uch
871 1.3 uch out:
872 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
873 1.3 uch /*
874 1.3 uch * We failed to open the device, and nobody else had it opened.
875 1.3 uch * Clean up the state as appropriate.
876 1.3 uch */
877 1.3 uch txcom_shutdown(sc);
878 1.1 uch }
879 1.1 uch
880 1.1 uch return err;
881 1.3 uch
882 1.1 uch }
883 1.1 uch
884 1.1 uch int
885 1.26 christos txcomclose(dev_t dev, int flag, int mode, struct lwp *l)
886 1.1 uch {
887 1.40 tsutsui struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
888 1.1 uch struct tty *tp = sc->sc_tty;
889 1.1 uch
890 1.3 uch /* XXX This is for cons.c. */
891 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN))
892 1.3 uch return 0;
893 1.3 uch
894 1.10 eeh (*tp->t_linesw->l_close)(tp, flag);
895 1.1 uch ttyclose(tp);
896 1.1 uch
897 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
898 1.3 uch /*
899 1.3 uch * Although we got a last close, the device may still be in
900 1.3 uch * use; e.g. if this was the dialout node, and there are still
901 1.3 uch * processes waiting for carrier on the non-dialout node.
902 1.3 uch */
903 1.3 uch txcom_shutdown(sc);
904 1.3 uch }
905 1.3 uch
906 1.1 uch return 0;
907 1.1 uch }
908 1.1 uch
909 1.1 uch int
910 1.9 uch txcomread(dev_t dev, struct uio *uio, int flag)
911 1.1 uch {
912 1.40 tsutsui struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
913 1.1 uch struct tty *tp = sc->sc_tty;
914 1.3 uch
915 1.10 eeh return ((*tp->t_linesw->l_read)(tp, uio, flag));
916 1.1 uch }
917 1.1 uch
918 1.1 uch int
919 1.9 uch txcomwrite(dev_t dev, struct uio *uio, int flag)
920 1.1 uch {
921 1.40 tsutsui struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
922 1.1 uch struct tty *tp = sc->sc_tty;
923 1.1 uch
924 1.10 eeh return ((*tp->t_linesw->l_write)(tp, uio, flag));
925 1.12 scw }
926 1.12 scw
927 1.12 scw int
928 1.26 christos txcompoll(dev_t dev, int events, struct lwp *l)
929 1.12 scw {
930 1.40 tsutsui struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
931 1.12 scw struct tty *tp = sc->sc_tty;
932 1.12 scw
933 1.26 christos return ((*tp->t_linesw->l_poll)(tp, events, l));
934 1.1 uch }
935 1.1 uch
936 1.1 uch struct tty *
937 1.9 uch txcomtty(dev_t dev)
938 1.1 uch {
939 1.40 tsutsui struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
940 1.3 uch
941 1.3 uch return sc->sc_tty;
942 1.1 uch }
943 1.1 uch
944 1.1 uch int
945 1.37 christos txcomioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
946 1.1 uch {
947 1.40 tsutsui struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
948 1.1 uch struct tty *tp = sc->sc_tty;
949 1.3 uch int s, err;
950 1.3 uch
951 1.26 christos err = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
952 1.16 atatat if (err != EPASSTHROUGH) {
953 1.3 uch return err;
954 1.3 uch }
955 1.3 uch
956 1.26 christos err = ttioctl(tp, cmd, data, flag, l);
957 1.16 atatat if (err != EPASSTHROUGH) {
958 1.3 uch return err;
959 1.3 uch }
960 1.3 uch
961 1.3 uch err = 0;
962 1.3 uch
963 1.3 uch s = spltty();
964 1.3 uch
965 1.3 uch switch (cmd) {
966 1.5 uch default:
967 1.16 atatat err = EPASSTHROUGH;
968 1.5 uch break;
969 1.5 uch
970 1.3 uch case TIOCSBRK:
971 1.3 uch txcom_break(sc, 1);
972 1.3 uch break;
973 1.3 uch
974 1.3 uch case TIOCCBRK:
975 1.3 uch txcom_break(sc, 0);
976 1.3 uch break;
977 1.3 uch
978 1.3 uch case TIOCSDTR:
979 1.3 uch txcom_modem(sc, 1);
980 1.3 uch break;
981 1.3 uch
982 1.3 uch case TIOCCDTR:
983 1.3 uch txcom_modem(sc, 0);
984 1.3 uch break;
985 1.3 uch
986 1.3 uch case TIOCGFLAGS:
987 1.3 uch *(int *)data = sc->sc_chip->sc_swflags;
988 1.3 uch break;
989 1.3 uch
990 1.3 uch case TIOCSFLAGS:
991 1.34 elad err = kauth_authorize_device_tty(l->l_cred,
992 1.34 elad KAUTH_DEVICE_TTY_PRIVSET, tp);
993 1.3 uch if (err) {
994 1.3 uch break;
995 1.3 uch }
996 1.3 uch sc->sc_chip->sc_swflags = *(int *)data;
997 1.3 uch break;
998 1.3 uch
999 1.3 uch }
1000 1.1 uch
1001 1.3 uch splx(s);
1002 1.1 uch
1003 1.3 uch return err;
1004 1.1 uch }
1005 1.1 uch
1006 1.1 uch void
1007 1.9 uch txcomstop(struct tty *tp, int flag)
1008 1.1 uch {
1009 1.40 tsutsui struct txcom_softc *sc;
1010 1.1 uch int s;
1011 1.1 uch
1012 1.40 tsutsui sc = device_lookup_private(&txcom_cd, minor(tp->t_dev));
1013 1.40 tsutsui
1014 1.1 uch s = spltty();
1015 1.1 uch
1016 1.1 uch if (ISSET(tp->t_state, TS_BUSY)) {
1017 1.1 uch /* Stop transmitting at the next chunk. */
1018 1.1 uch sc->sc_tbc = 0;
1019 1.1 uch sc->sc_heldtbc = 0;
1020 1.1 uch if (!ISSET(tp->t_state, TS_TTSTOP))
1021 1.1 uch SET(tp->t_state, TS_FLUSH);
1022 1.1 uch }
1023 1.3 uch
1024 1.1 uch splx(s);
1025 1.1 uch }
1026 1.1 uch
1027 1.1 uch void
1028 1.9 uch txcomstart(struct tty *tp)
1029 1.1 uch {
1030 1.40 tsutsui struct txcom_softc *sc;
1031 1.40 tsutsui struct txcom_chip *chip;
1032 1.40 tsutsui tx_chipset_tag_t tc;
1033 1.40 tsutsui int slot;
1034 1.1 uch int s;
1035 1.1 uch
1036 1.40 tsutsui sc = device_lookup_private(&txcom_cd, minor(tp->t_dev));
1037 1.40 tsutsui chip = sc->sc_chip;
1038 1.40 tsutsui tc = chip->sc_tc;
1039 1.40 tsutsui slot = chip->sc_slot;
1040 1.40 tsutsui
1041 1.1 uch s = spltty();
1042 1.3 uch
1043 1.3 uch if (!__txcom_txbufready(chip, 0) ||
1044 1.3 uch ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
1045 1.3 uch goto out;
1046 1.1 uch
1047 1.38 ad if (!ttypull(tp))
1048 1.38 ad goto out;
1049 1.3 uch
1050 1.1 uch sc->sc_tba = tp->t_outq.c_cf;
1051 1.1 uch sc->sc_tbc = ndqb(&tp->t_outq, 0);
1052 1.3 uch SET(tp->t_state, TS_BUSY);
1053 1.3 uch
1054 1.3 uch /* Output the first character of the contiguous buffer. */
1055 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot),
1056 1.14 uch (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK));
1057 1.3 uch
1058 1.3 uch sc->sc_tbc--;
1059 1.3 uch sc->sc_tba++;
1060 1.1 uch
1061 1.3 uch out:
1062 1.1 uch splx(s);
1063 1.1 uch }
1064 1.1 uch
1065 1.3 uch /*
1066 1.3 uch * Set TXcom tty parameters from termios.
1067 1.3 uch */
1068 1.1 uch int
1069 1.9 uch txcomparam(struct tty *tp, struct termios *t)
1070 1.1 uch {
1071 1.40 tsutsui struct txcom_softc *sc;
1072 1.3 uch struct txcom_chip *chip;
1073 1.5 uch int ospeed;
1074 1.3 uch int s;
1075 1.3 uch
1076 1.40 tsutsui sc = device_lookup_private(&txcom_cd, minor(tp->t_dev));
1077 1.40 tsutsui if (sc == NULL)
1078 1.3 uch return ENXIO;
1079 1.3 uch
1080 1.3 uch ospeed = t->c_ospeed;
1081 1.3 uch
1082 1.3 uch /* Check requested parameters. */
1083 1.3 uch if (ospeed < 0) {
1084 1.3 uch return EINVAL;
1085 1.3 uch }
1086 1.3 uch if (t->c_ispeed && t->c_ispeed != ospeed) {
1087 1.3 uch return EINVAL;
1088 1.3 uch }
1089 1.3 uch
1090 1.3 uch s = spltty();
1091 1.3 uch chip = sc->sc_chip;
1092 1.3 uch /*
1093 1.3 uch * For the console, always force CLOCAL and !HUPCL, so that the port
1094 1.3 uch * is always active.
1095 1.3 uch */
1096 1.3 uch if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) ||
1097 1.3 uch ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
1098 1.5 uch SET(t->c_cflag, CLOCAL);
1099 1.5 uch CLR(t->c_cflag, HUPCL);
1100 1.3 uch }
1101 1.3 uch splx(s);
1102 1.3 uch
1103 1.3 uch /*
1104 1.6 uch * If we're not in a mode that assumes a connection is present, then
1105 1.6 uch * ignore carrier changes.
1106 1.6 uch */
1107 1.6 uch if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
1108 1.6 uch chip->sc_dcd = 0;
1109 1.6 uch else
1110 1.6 uch chip->sc_dcd = 1;
1111 1.6 uch
1112 1.6 uch /*
1113 1.3 uch * Only whack the UART when params change.
1114 1.3 uch * Some callers need to clear tp->t_ospeed
1115 1.3 uch * to make sure initialization gets done.
1116 1.3 uch */
1117 1.5 uch if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) {
1118 1.3 uch return 0;
1119 1.3 uch }
1120 1.3 uch
1121 1.3 uch s = spltty();
1122 1.3 uch chip = sc->sc_chip;
1123 1.3 uch chip->sc_speed = ospeed;
1124 1.5 uch chip->sc_cflag = t->c_cflag;
1125 1.3 uch
1126 1.3 uch txcom_setmode(chip);
1127 1.3 uch txcom_setbaudrate(chip);
1128 1.6 uch
1129 1.3 uch /* And copy to tty. */
1130 1.3 uch tp->t_ispeed = 0;
1131 1.3 uch tp->t_ospeed = chip->sc_speed;
1132 1.3 uch tp->t_cflag = chip->sc_cflag;
1133 1.3 uch
1134 1.3 uch /*
1135 1.6 uch * Update the tty layer's idea of the carrier bit, in case we changed
1136 1.6 uch * CLOCAL or MDMBUF. We don't hang up here; we only do that by
1137 1.6 uch * explicit request.
1138 1.6 uch */
1139 1.10 eeh (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd);
1140 1.6 uch
1141 1.6 uch /*
1142 1.3 uch * If hardware flow control is disabled, unblock any hard flow
1143 1.3 uch * control state.
1144 1.3 uch */
1145 1.3 uch if (!ISSET(chip->sc_cflag, CHWFLOW)) {
1146 1.3 uch txcomstart(tp);
1147 1.3 uch }
1148 1.3 uch
1149 1.3 uch splx(s);
1150 1.6 uch
1151 1.6 uch return 0;
1152 1.6 uch }
1153 1.6 uch
1154 1.9 uch int
1155 1.9 uch txcom_dcd_hook(void *arg, int type, long id, void *msg)
1156 1.9 uch {
1157 1.9 uch struct txcom_softc *sc = arg;
1158 1.9 uch struct tty *tp = sc->sc_tty;
1159 1.9 uch struct txcom_chip *chip = sc->sc_chip;
1160 1.9 uch int modem = !(int)msg; /* p-edge 1, n-edge 0 */
1161 1.9 uch
1162 1.15 uch DPRINTF("DCD %s\n", modem ? "ON" : "OFF");
1163 1.9 uch
1164 1.9 uch if (modem && chip->sc_dcd)
1165 1.10 eeh (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd);
1166 1.9 uch
1167 1.9 uch return 0;
1168 1.9 uch }
1169 1.9 uch
1170 1.9 uch int
1171 1.9 uch txcom_cts_hook(void *arg, int type, long id, void *msg)
1172 1.9 uch {
1173 1.9 uch struct txcom_softc *sc = arg;
1174 1.9 uch struct tty *tp = sc->sc_tty;
1175 1.9 uch struct txcom_chip *chip = sc->sc_chip;
1176 1.9 uch int clear = !(int)msg; /* p-edge 1, n-edge 0 */
1177 1.9 uch
1178 1.15 uch DPRINTF("CTS %s\n", clear ? "ON" : "OFF");
1179 1.9 uch
1180 1.9 uch if (chip->sc_msr_cts) {
1181 1.9 uch if (!clear) {
1182 1.9 uch chip->sc_tx_stopped = 1;
1183 1.9 uch } else {
1184 1.9 uch chip->sc_tx_stopped = 0;
1185 1.10 eeh (*tp->t_linesw->l_start)(tp);
1186 1.9 uch }
1187 1.9 uch }
1188 1.9 uch
1189 1.9 uch return 0;
1190 1.9 uch }
1191 1.9 uch
1192 1.9 uch #ifdef TX39UARTDEBUG
1193 1.6 uch void
1194 1.9 uch txcom_dump(struct txcom_chip *chip)
1195 1.6 uch {
1196 1.6 uch tx_chipset_tag_t tc = chip->sc_tc;
1197 1.6 uch int slot = chip->sc_slot;
1198 1.6 uch txreg_t reg;
1199 1.6 uch
1200 1.6 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
1201 1.6 uch #define ISSETPRINT(r, m) \
1202 1.15 uch dbg_bitmask_print(r, TX39_UARTCTRL1_##m, #m)
1203 1.6 uch ISSETPRINT(reg, UARTON);
1204 1.6 uch ISSETPRINT(reg, EMPTY);
1205 1.6 uch ISSETPRINT(reg, PRXHOLDFULL);
1206 1.6 uch ISSETPRINT(reg, RXHOLDFULL);
1207 1.6 uch ISSETPRINT(reg, ENDMARX);
1208 1.6 uch ISSETPRINT(reg, ENDMATX);
1209 1.6 uch ISSETPRINT(reg, TESTMODE);
1210 1.6 uch ISSETPRINT(reg, ENBREAHALT);
1211 1.6 uch ISSETPRINT(reg, ENDMATEST);
1212 1.6 uch ISSETPRINT(reg, ENDMALOOP);
1213 1.6 uch ISSETPRINT(reg, PULSEOPT2);
1214 1.6 uch ISSETPRINT(reg, PULSEOPT1);
1215 1.6 uch ISSETPRINT(reg, DTINVERT);
1216 1.6 uch ISSETPRINT(reg, DISTXD);
1217 1.6 uch ISSETPRINT(reg, TWOSTOP);
1218 1.6 uch ISSETPRINT(reg, LOOPBACK);
1219 1.6 uch ISSETPRINT(reg, BIT7);
1220 1.6 uch ISSETPRINT(reg, EVENPARITY);
1221 1.6 uch ISSETPRINT(reg, ENPARITY);
1222 1.6 uch ISSETPRINT(reg, ENUART);
1223 1.6 uch }
1224 1.9 uch #endif /* TX39UARTDEBUG */
1225