txcom.c revision 1.48 1 1.48 dholland /* $NetBSD: txcom.c,v 1.48 2014/07/25 08:10:33 dholland Exp $ */
2 1.1 uch
3 1.9 uch /*-
4 1.24 uch * Copyright (c) 1999, 2000, 2004 The NetBSD Foundation, Inc.
5 1.1 uch * All rights reserved.
6 1.1 uch *
7 1.9 uch * This code is derived from software contributed to The NetBSD Foundation
8 1.9 uch * by UCHIYAMA Yasushi.
9 1.9 uch *
10 1.1 uch * Redistribution and use in source and binary forms, with or without
11 1.1 uch * modification, are permitted provided that the following conditions
12 1.1 uch * are met:
13 1.1 uch * 1. Redistributions of source code must retain the above copyright
14 1.1 uch * notice, this list of conditions and the following disclaimer.
15 1.9 uch * 2. Redistributions in binary form must reproduce the above copyright
16 1.9 uch * notice, this list of conditions and the following disclaimer in the
17 1.9 uch * documentation and/or other materials provided with the distribution.
18 1.1 uch *
19 1.9 uch * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.9 uch * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.9 uch * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.9 uch * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.9 uch * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.9 uch * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.9 uch * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.9 uch * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.9 uch * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.9 uch * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.9 uch * POSSIBILITY OF SUCH DAMAGE.
30 1.1 uch */
31 1.22 lukem
32 1.22 lukem #include <sys/cdefs.h>
33 1.48 dholland __KERNEL_RCSID(0, "$NetBSD: txcom.c,v 1.48 2014/07/25 08:10:33 dholland Exp $");
34 1.15 uch
35 1.15 uch #include "opt_tx39uart_debug.h"
36 1.1 uch
37 1.1 uch #include <sys/param.h>
38 1.1 uch #include <sys/systm.h>
39 1.3 uch #include <sys/kernel.h>
40 1.1 uch #include <sys/device.h>
41 1.3 uch #include <sys/malloc.h>
42 1.30 elad #include <sys/kauth.h>
43 1.1 uch
44 1.1 uch #include <sys/proc.h> /* tsleep/wakeup */
45 1.1 uch
46 1.1 uch #include <sys/ioctl.h>
47 1.1 uch #include <sys/select.h>
48 1.1 uch #include <sys/file.h>
49 1.1 uch
50 1.1 uch #include <sys/tty.h>
51 1.1 uch #include <sys/conf.h>
52 1.1 uch #include <dev/cons.h> /* consdev */
53 1.1 uch
54 1.1 uch #include <machine/bus.h>
55 1.9 uch #include <machine/config_hook.h>
56 1.1 uch
57 1.1 uch #include <hpcmips/tx/tx39var.h>
58 1.1 uch #include <hpcmips/tx/tx39icureg.h>
59 1.1 uch #include <hpcmips/tx/tx39uartvar.h>
60 1.1 uch #include <hpcmips/tx/tx39uartreg.h>
61 1.1 uch
62 1.5 uch #include <hpcmips/tx/tx39irvar.h>
63 1.5 uch
64 1.1 uch #include <hpcmips/tx/tx39clockreg.h> /* XXX */
65 1.6 uch
66 1.9 uch /*
67 1.9 uch * UARTA channel has DTR, DSR, RTS, CTS lines. and they wired to MFIO/IO port.
68 1.9 uch */
69 1.9 uch #define IS_COM0(s) ((s) == 0)
70 1.9 uch #define IS_COM1(s) ((s) == 1)
71 1.9 uch #define ON ((void *)1)
72 1.9 uch #define OFF ((void *)0)
73 1.1 uch
74 1.15 uch #ifdef TX39UART_DEBUG
75 1.15 uch #define DPRINTF_ENABLE
76 1.15 uch #define DPRINTF_DEBUG tx39uart_debug
77 1.1 uch #endif
78 1.15 uch #include <machine/debug.h>
79 1.1 uch
80 1.3 uch #define TXCOM_HW_CONSOLE 0x40
81 1.3 uch #define TXCOM_RING_SIZE 256 /* must be a power of two! */
82 1.3 uch #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1)
83 1.1 uch
84 1.3 uch struct txcom_chip {
85 1.1 uch tx_chipset_tag_t sc_tc;
86 1.1 uch int sc_slot; /* UARTA or UARTB */
87 1.1 uch int sc_cflag;
88 1.1 uch int sc_speed;
89 1.3 uch int sc_swflags;
90 1.1 uch int sc_hwflags;
91 1.6 uch
92 1.6 uch int sc_dcd;
93 1.9 uch int sc_msr_cts;
94 1.9 uch int sc_tx_stopped;
95 1.3 uch };
96 1.1 uch
97 1.3 uch struct txcom_softc {
98 1.3 uch struct tty *sc_tty;
99 1.3 uch struct txcom_chip *sc_chip;
100 1.3 uch
101 1.44 tsutsui void *sc_txsoft_cookie;
102 1.44 tsutsui void *sc_rxsoft_cookie;
103 1.8 thorpej
104 1.3 uch u_int8_t *sc_tba; /* transmit buffer address */
105 1.3 uch int sc_tbc; /* transmit byte count */
106 1.3 uch int sc_heldtbc;
107 1.3 uch u_int8_t *sc_rbuf; /* receive buffer address */
108 1.3 uch int sc_rbput; /* receive byte count */
109 1.3 uch int sc_rbget;
110 1.1 uch };
111 1.1 uch
112 1.1 uch extern struct cfdriver txcom_cd;
113 1.1 uch
114 1.46 chs int txcom_match(device_t, cfdata_t, void *);
115 1.46 chs void txcom_attach(device_t, device_t, void *);
116 1.46 chs int txcom_print(void *, const char *);
117 1.9 uch
118 1.9 uch int txcom_txintr(void *);
119 1.9 uch int txcom_rxintr(void *);
120 1.9 uch int txcom_frameerr_intr(void *);
121 1.9 uch int txcom_parityerr_intr(void *);
122 1.9 uch int txcom_break_intr(void *);
123 1.3 uch
124 1.9 uch void txcom_rxsoft(void *);
125 1.9 uch void txcom_txsoft(void *);
126 1.3 uch
127 1.9 uch int txcom_stsoft(void *);
128 1.9 uch int txcom_stsoft2(void *);
129 1.9 uch int txcom_stsoft3(void *);
130 1.9 uch int txcom_stsoft4(void *);
131 1.9 uch
132 1.9 uch
133 1.9 uch void txcom_shutdown(struct txcom_softc *);
134 1.9 uch void txcom_break(struct txcom_softc *, int);
135 1.9 uch void txcom_modem(struct txcom_softc *, int);
136 1.9 uch void txcomstart(struct tty *);
137 1.9 uch int txcomparam(struct tty *, struct termios *);
138 1.9 uch
139 1.9 uch void txcom_reset (struct txcom_chip *);
140 1.35 thorpej int txcom_enable (struct txcom_chip *, bool);
141 1.9 uch void txcom_disable (struct txcom_chip *);
142 1.9 uch void txcom_setmode (struct txcom_chip *);
143 1.9 uch void txcom_setbaudrate(struct txcom_chip *);
144 1.9 uch int txcom_cngetc (dev_t);
145 1.9 uch void txcom_cnputc (dev_t, int);
146 1.9 uch void txcom_cnpollc (dev_t, int);
147 1.3 uch
148 1.9 uch int txcom_dcd_hook(void *, int, long, void *);
149 1.9 uch int txcom_cts_hook(void *, int, long, void *);
150 1.1 uch
151 1.9 uch
152 1.27 perry inline int __txcom_txbufready(struct txcom_chip *, int);
153 1.9 uch const char *__txcom_slotname(int);
154 1.9 uch
155 1.9 uch #ifdef TX39UARTDEBUG
156 1.9 uch void txcom_dump(struct txcom_chip *);
157 1.9 uch #endif
158 1.6 uch
159 1.3 uch struct consdev txcomcons = {
160 1.21 nakayama NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc, NULL, NULL,
161 1.14 uch NULL, NODEV, CN_NORMAL
162 1.3 uch };
163 1.3 uch
164 1.1 uch /* Serial console */
165 1.3 uch struct txcom_chip txcom_chip;
166 1.1 uch
167 1.46 chs CFATTACH_DECL_NEW(txcom, sizeof(struct txcom_softc),
168 1.19 thorpej txcom_match, txcom_attach, NULL, NULL);
169 1.1 uch
170 1.17 gehenna dev_type_open(txcomopen);
171 1.17 gehenna dev_type_close(txcomclose);
172 1.17 gehenna dev_type_read(txcomread);
173 1.17 gehenna dev_type_write(txcomwrite);
174 1.17 gehenna dev_type_ioctl(txcomioctl);
175 1.17 gehenna dev_type_stop(txcomstop);
176 1.17 gehenna dev_type_tty(txcomtty);
177 1.17 gehenna dev_type_poll(txcompoll);
178 1.17 gehenna
179 1.17 gehenna const struct cdevsw txcom_cdevsw = {
180 1.47 dholland .d_open = txcomopen,
181 1.47 dholland .d_close = txcomclose,
182 1.47 dholland .d_read = txcomread,
183 1.47 dholland .d_write = txcomwrite,
184 1.47 dholland .d_ioctl = txcomioctl,
185 1.47 dholland .d_stop = txcomstop,
186 1.47 dholland .d_tty = txcomtty,
187 1.47 dholland .d_poll = txcompoll,
188 1.47 dholland .d_mmap = nommap,
189 1.47 dholland .d_kqfilter = ttykqfilter,
190 1.48 dholland .d_discard = nodiscard,
191 1.47 dholland .d_flag = D_TTY
192 1.17 gehenna };
193 1.17 gehenna
194 1.1 uch int
195 1.46 chs txcom_match(device_t parent, cfdata_t cf, void *aux)
196 1.1 uch {
197 1.1 uch /* if the autoconfiguration got this far, there's a slot here */
198 1.1 uch return 1;
199 1.1 uch }
200 1.1 uch
201 1.1 uch void
202 1.46 chs txcom_attach(device_t parent, device_t self, void *aux)
203 1.1 uch {
204 1.1 uch struct tx39uart_attach_args *ua = aux;
205 1.46 chs struct txcom_softc *sc = device_private(self);
206 1.1 uch tx_chipset_tag_t tc;
207 1.1 uch struct tty *tp;
208 1.3 uch struct txcom_chip *chip;
209 1.6 uch int slot, console;
210 1.1 uch
211 1.1 uch /* Check this slot used as serial console */
212 1.6 uch console = (ua->ua_slot == txcom_chip.sc_slot) &&
213 1.14 uch (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE);
214 1.6 uch
215 1.6 uch if (console) {
216 1.3 uch sc->sc_chip = &txcom_chip;
217 1.3 uch } else {
218 1.3 uch if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip),
219 1.14 uch M_DEVBUF, M_WAITOK))) {
220 1.3 uch printf(": can't allocate chip\n");
221 1.3 uch return;
222 1.3 uch }
223 1.3 uch memset(sc->sc_chip, 0, sizeof(struct txcom_chip));
224 1.1 uch }
225 1.1 uch
226 1.3 uch chip = sc->sc_chip;
227 1.3 uch tc = chip->sc_tc = ua->ua_tc;
228 1.3 uch slot = chip->sc_slot = ua->ua_slot;
229 1.3 uch
230 1.6 uch #ifdef TX39UARTDEBUG
231 1.6 uch txcom_dump(chip);
232 1.6 uch #endif
233 1.6 uch if (!console)
234 1.6 uch txcom_reset(chip);
235 1.6 uch
236 1.3 uch if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) {
237 1.3 uch printf(": can't allocate buffer.\n");
238 1.3 uch return;
239 1.3 uch }
240 1.3 uch memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE);
241 1.1 uch
242 1.45 rmind tp = tty_alloc();
243 1.1 uch tp->t_oproc = txcomstart;
244 1.1 uch tp->t_param = txcomparam;
245 1.1 uch tp->t_hwiflow = NULL;
246 1.1 uch sc->sc_tty = tp;
247 1.1 uch tty_attach(tp);
248 1.1 uch
249 1.3 uch if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
250 1.1 uch int maj;
251 1.1 uch /* locate the major number */
252 1.17 gehenna maj = cdevsw_lookup_major(&txcom_cdevsw);
253 1.1 uch
254 1.46 chs cn_tab->cn_dev = makedev(maj, device_unit(self));
255 1.1 uch
256 1.3 uch printf(": console");
257 1.1 uch }
258 1.1 uch
259 1.3 uch printf("\n");
260 1.1 uch
261 1.1 uch /*
262 1.1 uch * Enable interrupt
263 1.1 uch */
264 1.3 uch #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s))
265 1.3 uch
266 1.3 uch tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY,
267 1.14 uch txcom_rxintr, sc);
268 1.3 uch tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY,
269 1.14 uch txcom_txintr, sc);
270 1.3 uch tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY,
271 1.14 uch txcom_rxintr, sc);
272 1.3 uch tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY,
273 1.14 uch txcom_txintr, sc);
274 1.3 uch tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY,
275 1.14 uch txcom_frameerr_intr, sc);
276 1.3 uch tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY,
277 1.14 uch txcom_parityerr_intr, sc);
278 1.3 uch tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY,
279 1.14 uch txcom_break_intr, sc);
280 1.5 uch
281 1.44 tsutsui sc->sc_txsoft_cookie =
282 1.44 tsutsui softint_establish(SOFTINT_SERIAL, txcom_txsoft, sc);
283 1.44 tsutsui sc->sc_rxsoft_cookie =
284 1.44 tsutsui softint_establish(SOFTINT_SERIAL, txcom_rxsoft, sc);
285 1.44 tsutsui
286 1.9 uch /*
287 1.9 uch * UARTA has external signal line. (its wiring is platform dependent)
288 1.9 uch */
289 1.9 uch if (IS_COM0(slot)) {
290 1.9 uch /* install DCD, CTS hooks. */
291 1.11 sato config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_DCD,
292 1.14 uch CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc);
293 1.11 sato config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_CTS,
294 1.14 uch CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc);
295 1.9 uch }
296 1.6 uch
297 1.5 uch /*
298 1.5 uch * UARTB can connect IR module
299 1.5 uch */
300 1.9 uch if (IS_COM1(slot)) {
301 1.5 uch struct txcom_attach_args tca;
302 1.5 uch tca.tca_tc = tc;
303 1.5 uch tca.tca_parent = self;
304 1.5 uch config_found(self, &tca, txcom_print);
305 1.5 uch }
306 1.5 uch }
307 1.5 uch
308 1.5 uch int
309 1.9 uch txcom_print(void *aux, const char *pnp)
310 1.5 uch {
311 1.5 uch return pnp ? QUIET : UNCONF;
312 1.1 uch }
313 1.1 uch
314 1.6 uch void
315 1.9 uch txcom_reset(struct txcom_chip *chip)
316 1.6 uch {
317 1.6 uch tx_chipset_tag_t tc;
318 1.6 uch int slot, ofs;
319 1.6 uch txreg_t reg;
320 1.6 uch
321 1.6 uch tc = chip->sc_tc;
322 1.6 uch slot = chip->sc_slot;
323 1.6 uch ofs = TX39_UARTCTRL1_REG(slot);
324 1.6 uch
325 1.6 uch /* Supply clock */
326 1.6 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
327 1.6 uch reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
328 1.6 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
329 1.6 uch
330 1.6 uch /* reset UART module */
331 1.6 uch tx_conf_write(tc, ofs, 0);
332 1.6 uch }
333 1.6 uch
334 1.1 uch int
335 1.35 thorpej txcom_enable(struct txcom_chip *chip, bool console)
336 1.1 uch {
337 1.1 uch tx_chipset_tag_t tc;
338 1.1 uch txreg_t reg;
339 1.3 uch int slot, ofs, timeout;
340 1.1 uch
341 1.3 uch tc = chip->sc_tc;
342 1.3 uch slot = chip->sc_slot;
343 1.3 uch ofs = TX39_UARTCTRL1_REG(slot);
344 1.1 uch
345 1.24 uch /*
346 1.24 uch * External power supply (if any)
347 1.24 uch * When serial console, Windows CE already powered on it.
348 1.24 uch */
349 1.24 uch if (!console) {
350 1.24 uch config_hook_call(CONFIG_HOOK_POWERCONTROL,
351 1.24 uch CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON);
352 1.24 uch delay(3);
353 1.24 uch }
354 1.9 uch
355 1.6 uch /* Supply clock */
356 1.5 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
357 1.5 uch reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
358 1.5 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
359 1.5 uch
360 1.6 uch /*
361 1.6 uch * XXX Disable DMA (DMA not coded yet)
362 1.6 uch */
363 1.6 uch reg = tx_conf_read(tc, ofs);
364 1.6 uch reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
365 1.6 uch tx_conf_write(tc, ofs, reg);
366 1.6 uch
367 1.6 uch /* enable */
368 1.3 uch reg = tx_conf_read(tc, ofs);
369 1.1 uch reg |= TX39_UARTCTRL1_ENUART;
370 1.1 uch reg &= ~TX39_UARTCTRL1_ENBREAHALT;
371 1.3 uch tx_conf_write(tc, ofs, reg);
372 1.3 uch
373 1.9 uch timeout = 100000;
374 1.3 uch
375 1.3 uch while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) &&
376 1.14 uch --timeout > 0)
377 1.3 uch ;
378 1.3 uch
379 1.5 uch if (timeout == 0 && !cold) {
380 1.6 uch printf("%s never power up\n", __txcom_slotname(slot));
381 1.3 uch return 1;
382 1.3 uch }
383 1.3 uch
384 1.1 uch return 0;
385 1.1 uch }
386 1.1 uch
387 1.1 uch void
388 1.9 uch txcom_disable(struct txcom_chip *chip)
389 1.1 uch {
390 1.1 uch tx_chipset_tag_t tc;
391 1.1 uch txreg_t reg;
392 1.1 uch int slot;
393 1.1 uch
394 1.3 uch tc = chip->sc_tc;
395 1.3 uch slot = chip->sc_slot;
396 1.1 uch
397 1.1 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
398 1.1 uch /* DMA */
399 1.1 uch reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
400 1.3 uch
401 1.6 uch /* disable module */
402 1.1 uch reg &= ~TX39_UARTCTRL1_ENUART;
403 1.1 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
404 1.3 uch
405 1.1 uch /* Clock */
406 1.1 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
407 1.1 uch reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
408 1.1 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
409 1.1 uch
410 1.1 uch }
411 1.1 uch
412 1.27 perry inline int
413 1.9 uch __txcom_txbufready(struct txcom_chip *chip, int retry)
414 1.3 uch {
415 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
416 1.3 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
417 1.3 uch
418 1.3 uch do {
419 1.3 uch if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY)
420 1.3 uch return 1;
421 1.3 uch } while(--retry != 0);
422 1.3 uch
423 1.1 uch return 0;
424 1.1 uch }
425 1.1 uch
426 1.5 uch void
427 1.46 chs txcom_pulse_mode(device_t dev)
428 1.5 uch {
429 1.46 chs struct txcom_softc *sc = device_private(dev);
430 1.5 uch struct txcom_chip *chip = sc->sc_chip;
431 1.5 uch tx_chipset_tag_t tc = chip->sc_tc;
432 1.5 uch int ofs;
433 1.5 uch txreg_t reg;
434 1.5 uch
435 1.5 uch ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
436 1.5 uch
437 1.5 uch reg = tx_conf_read(tc, ofs);
438 1.6 uch /* WindowsCE use this setting */
439 1.6 uch reg |= TX39_UARTCTRL1_PULSEOPT1;
440 1.6 uch reg &= ~TX39_UARTCTRL1_PULSEOPT2;
441 1.6 uch reg |= TX39_UARTCTRL1_DTINVERT;
442 1.6 uch
443 1.5 uch tx_conf_write(tc, ofs, reg);
444 1.5 uch }
445 1.5 uch
446 1.3 uch /*
447 1.3 uch * console
448 1.3 uch */
449 1.1 uch int
450 1.9 uch txcom_cngetc(dev_t dev)
451 1.1 uch {
452 1.1 uch tx_chipset_tag_t tc;
453 1.2 uch int ofs, c, s;
454 1.2 uch
455 1.3 uch s = spltty();
456 1.2 uch
457 1.3 uch tc = txcom_chip.sc_tc;
458 1.3 uch ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot);
459 1.1 uch
460 1.1 uch while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs)))
461 1.1 uch ;
462 1.2 uch
463 1.3 uch c = TX39_UARTRXHOLD_RXDATA(
464 1.3 uch tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot)));
465 1.2 uch
466 1.3 uch if (c == '\r')
467 1.1 uch c = '\n';
468 1.1 uch
469 1.2 uch splx(s);
470 1.2 uch
471 1.1 uch return c;
472 1.1 uch }
473 1.1 uch
474 1.1 uch void
475 1.9 uch txcom_cnputc(dev_t dev, int c)
476 1.1 uch {
477 1.3 uch struct txcom_chip *chip = &txcom_chip;
478 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
479 1.3 uch int s;
480 1.2 uch
481 1.3 uch s = spltty();
482 1.1 uch
483 1.3 uch /* Wait for transmitter to empty */
484 1.3 uch __txcom_txbufready(chip, -1);
485 1.1 uch
486 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
487 1.14 uch (c & TX39_UARTTXHOLD_TXDATA_MASK));
488 1.1 uch
489 1.3 uch __txcom_txbufready(chip, -1);
490 1.3 uch
491 1.2 uch splx(s);
492 1.1 uch }
493 1.1 uch
494 1.1 uch void
495 1.9 uch txcom_cnpollc(dev_t dev, int on)
496 1.1 uch {
497 1.1 uch }
498 1.1 uch
499 1.1 uch void
500 1.9 uch txcom_setmode(struct txcom_chip *chip)
501 1.1 uch {
502 1.3 uch tcflag_t cflag = chip->sc_cflag;
503 1.3 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
504 1.1 uch txreg_t reg;
505 1.1 uch
506 1.3 uch reg = tx_conf_read(chip->sc_tc, ofs);
507 1.6 uch reg &= ~TX39_UARTCTRL1_ENUART;
508 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg);
509 1.6 uch
510 1.1 uch switch (ISSET(cflag, CSIZE)) {
511 1.1 uch default:
512 1.1 uch printf("txcom_setmode: CS7, CS8 only. use CS7");
513 1.1 uch /* FALL THROUGH */
514 1.1 uch case CS7:
515 1.1 uch reg |= TX39_UARTCTRL1_BIT7;
516 1.1 uch break;
517 1.1 uch case CS8:
518 1.1 uch reg &= ~TX39_UARTCTRL1_BIT7;
519 1.1 uch break;
520 1.1 uch }
521 1.3 uch
522 1.1 uch if (ISSET(cflag, PARENB)) {
523 1.1 uch reg |= TX39_UARTCTRL1_ENPARITY;
524 1.1 uch if (ISSET(cflag, PARODD)) {
525 1.1 uch reg &= ~TX39_UARTCTRL1_EVENPARITY;
526 1.1 uch } else {
527 1.1 uch reg |= TX39_UARTCTRL1_EVENPARITY;
528 1.1 uch }
529 1.1 uch } else {
530 1.1 uch reg &= ~TX39_UARTCTRL1_ENPARITY;
531 1.1 uch }
532 1.3 uch
533 1.6 uch if (ISSET(cflag, CSTOPB))
534 1.1 uch reg |= TX39_UARTCTRL1_TWOSTOP;
535 1.6 uch else
536 1.6 uch reg &= ~TX39_UARTCTRL1_TWOSTOP;
537 1.6 uch
538 1.6 uch reg |= TX39_UARTCTRL1_ENUART;
539 1.3 uch tx_conf_write(chip->sc_tc, ofs, reg);
540 1.3 uch }
541 1.3 uch
542 1.3 uch void
543 1.9 uch txcom_setbaudrate(struct txcom_chip *chip)
544 1.3 uch {
545 1.3 uch int baudrate;
546 1.6 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
547 1.6 uch txreg_t reg, reg1;
548 1.3 uch
549 1.3 uch if (chip->sc_speed == 0)
550 1.3 uch return;
551 1.3 uch
552 1.5 uch if (!cold)
553 1.15 uch DPRINTF("%d\n", chip->sc_speed);
554 1.5 uch
555 1.6 uch reg1 = tx_conf_read(chip->sc_tc, ofs);
556 1.6 uch reg1 &= ~TX39_UARTCTRL1_ENUART;
557 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg1);
558 1.6 uch
559 1.3 uch baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1;
560 1.3 uch reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate);
561 1.3 uch
562 1.3 uch tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg);
563 1.6 uch
564 1.6 uch reg1 |= TX39_UARTCTRL1_ENUART;
565 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg1);
566 1.3 uch }
567 1.3 uch
568 1.3 uch int
569 1.9 uch txcom_cnattach(int slot, int speed, int cflag)
570 1.3 uch {
571 1.3 uch cn_tab = &txcomcons;
572 1.3 uch
573 1.3 uch txcom_chip.sc_tc = tx_conf_get_tag();
574 1.3 uch txcom_chip.sc_slot = slot;
575 1.3 uch txcom_chip.sc_cflag = cflag;
576 1.3 uch txcom_chip.sc_speed = speed;
577 1.3 uch txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE;
578 1.6 uch #if notyet
579 1.6 uch txcom_reset(&txcom_chip);
580 1.6 uch #endif
581 1.6 uch txcom_setmode(&txcom_chip);
582 1.6 uch txcom_setbaudrate(&txcom_chip);
583 1.3 uch
584 1.36 thorpej if (txcom_enable(&txcom_chip, true) != 0)
585 1.5 uch return 1;
586 1.5 uch
587 1.3 uch return 0;
588 1.3 uch }
589 1.3 uch
590 1.3 uch /*
591 1.3 uch * tty
592 1.3 uch */
593 1.3 uch void
594 1.9 uch txcom_break(struct txcom_softc *sc, int on)
595 1.3 uch {
596 1.3 uch struct txcom_chip *chip = sc->sc_chip;
597 1.1 uch
598 1.3 uch tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
599 1.14 uch on ? TX39_UARTTXHOLD_BREAK : 0);
600 1.1 uch }
601 1.1 uch
602 1.1 uch void
603 1.9 uch txcom_modem(struct txcom_softc *sc, int on)
604 1.1 uch {
605 1.3 uch struct txcom_chip *chip = sc->sc_chip;
606 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
607 1.3 uch int slot = chip->sc_slot;
608 1.1 uch txreg_t reg;
609 1.1 uch
610 1.9 uch /* assert DTR */
611 1.9 uch if (IS_COM0(slot)) {
612 1.11 sato config_hook_call(CONFIG_HOOK_SET,
613 1.14 uch CONFIG_HOOK_COM0_DTR,
614 1.14 uch (void *)on);
615 1.9 uch }
616 1.9 uch
617 1.3 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
618 1.6 uch reg &= ~TX39_UARTCTRL1_ENUART;
619 1.6 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
620 1.3 uch
621 1.3 uch if (on) {
622 1.3 uch reg &= ~TX39_UARTCTRL1_DISTXD;
623 1.3 uch } else {
624 1.6 uch reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */
625 1.3 uch }
626 1.6 uch
627 1.6 uch reg |= TX39_UARTCTRL1_ENUART;
628 1.6 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
629 1.1 uch }
630 1.1 uch
631 1.1 uch void
632 1.9 uch txcom_shutdown(struct txcom_softc *sc)
633 1.1 uch {
634 1.1 uch struct tty *tp = sc->sc_tty;
635 1.3 uch int s = spltty();
636 1.1 uch
637 1.3 uch /* Clear any break condition set with TIOCSBRK. */
638 1.3 uch txcom_break(sc, 0);
639 1.3 uch
640 1.3 uch /*
641 1.3 uch * Hang up if necessary. Wait a bit, so the other side has time to
642 1.3 uch * notice even if we immediately open the port again.
643 1.3 uch */
644 1.3 uch if (ISSET(tp->t_cflag, HUPCL)) {
645 1.3 uch txcom_modem(sc, 0);
646 1.3 uch (void) tsleep(sc, TTIPRI, ttclos, hz);
647 1.3 uch }
648 1.3 uch
649 1.3 uch
650 1.3 uch /* Turn off interrupts if not the console. */
651 1.3 uch if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
652 1.3 uch txcom_disable(sc->sc_chip);
653 1.3 uch }
654 1.1 uch
655 1.3 uch splx(s);
656 1.3 uch }
657 1.1 uch
658 1.9 uch const char *
659 1.9 uch __txcom_slotname(int slot)
660 1.3 uch {
661 1.9 uch static const char *slotname[] = {"UARTA", "UARTB", "unknown"};
662 1.9 uch
663 1.9 uch if (slot != 0 && slot != 1)
664 1.9 uch return slotname[2];
665 1.9 uch
666 1.9 uch return slotname[slot];
667 1.2 uch }
668 1.2 uch
669 1.2 uch int
670 1.9 uch txcom_frameerr_intr(void *arg)
671 1.3 uch {
672 1.3 uch struct txcom_softc *sc = arg;
673 1.3 uch
674 1.3 uch printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot));
675 1.3 uch
676 1.3 uch return 0;
677 1.3 uch }
678 1.3 uch
679 1.3 uch int
680 1.9 uch txcom_parityerr_intr(void *arg)
681 1.3 uch {
682 1.3 uch struct txcom_softc *sc = arg;
683 1.3 uch
684 1.3 uch printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot));
685 1.2 uch
686 1.2 uch return 0;
687 1.1 uch }
688 1.1 uch
689 1.1 uch int
690 1.9 uch txcom_break_intr(void *arg)
691 1.1 uch {
692 1.1 uch struct txcom_softc *sc = arg;
693 1.3 uch
694 1.3 uch printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot));
695 1.3 uch
696 1.3 uch return 0;
697 1.3 uch }
698 1.3 uch
699 1.3 uch int
700 1.9 uch txcom_rxintr(void *arg)
701 1.3 uch {
702 1.3 uch struct txcom_softc *sc = arg;
703 1.3 uch struct txcom_chip *chip = sc->sc_chip;
704 1.1 uch u_int8_t c;
705 1.1 uch
706 1.3 uch c = TX39_UARTRXHOLD_RXDATA(
707 1.3 uch tx_conf_read(chip->sc_tc,
708 1.14 uch TX39_UARTRXHOLD_REG(chip->sc_slot)));
709 1.3 uch
710 1.3 uch sc->sc_rbuf[sc->sc_rbput] = c;
711 1.3 uch sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK;
712 1.3 uch
713 1.44 tsutsui softint_schedule(sc->sc_rxsoft_cookie);
714 1.1 uch
715 1.1 uch return 0;
716 1.1 uch }
717 1.1 uch
718 1.3 uch void
719 1.9 uch txcom_rxsoft(void *arg)
720 1.3 uch {
721 1.3 uch struct txcom_softc *sc = arg;
722 1.3 uch struct tty *tp = sc->sc_tty;
723 1.14 uch int (*rint)(int, struct tty *);
724 1.3 uch int code;
725 1.3 uch int s, end, get;
726 1.3 uch
727 1.10 eeh rint = tp->t_linesw->l_rint;
728 1.3 uch
729 1.3 uch s = spltty();
730 1.3 uch end = sc->sc_rbput;
731 1.3 uch get = sc->sc_rbget;
732 1.3 uch
733 1.3 uch while (get != end) {
734 1.3 uch code = sc->sc_rbuf[get];
735 1.3 uch
736 1.3 uch if ((*rint)(code, tp) == -1) {
737 1.3 uch /*
738 1.3 uch * The line discipline's buffer is out of space.
739 1.3 uch */
740 1.3 uch }
741 1.3 uch get = (get + 1) % TXCOM_RING_MASK;
742 1.3 uch }
743 1.3 uch sc->sc_rbget = get;
744 1.3 uch
745 1.3 uch splx(s);
746 1.3 uch }
747 1.3 uch
748 1.1 uch int
749 1.9 uch txcom_txintr(void *arg)
750 1.1 uch {
751 1.1 uch struct txcom_softc *sc = arg;
752 1.3 uch struct txcom_chip *chip = sc->sc_chip;
753 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
754 1.1 uch
755 1.3 uch if (sc->sc_tbc > 0) {
756 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
757 1.14 uch (*sc->sc_tba &
758 1.14 uch TX39_UARTTXHOLD_TXDATA_MASK));
759 1.3 uch sc->sc_tbc--;
760 1.3 uch sc->sc_tba++;
761 1.3 uch } else {
762 1.44 tsutsui softint_schedule(sc->sc_txsoft_cookie);
763 1.3 uch }
764 1.1 uch
765 1.1 uch return 0;
766 1.1 uch }
767 1.1 uch
768 1.3 uch void
769 1.9 uch txcom_txsoft(void *arg)
770 1.3 uch {
771 1.3 uch struct txcom_softc *sc = arg;
772 1.3 uch struct tty *tp = sc->sc_tty;
773 1.3 uch int s = spltty();
774 1.3 uch
775 1.3 uch CLR(tp->t_state, TS_BUSY);
776 1.3 uch if (ISSET(tp->t_state, TS_FLUSH)) {
777 1.3 uch CLR(tp->t_state, TS_FLUSH);
778 1.3 uch } else {
779 1.3 uch ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
780 1.3 uch }
781 1.3 uch
782 1.10 eeh (*tp->t_linesw->l_start)(tp);
783 1.3 uch
784 1.3 uch splx(s);
785 1.3 uch }
786 1.1 uch
787 1.1 uch int
788 1.26 christos txcomopen(dev_t dev, int flag, int mode, struct lwp *l)
789 1.1 uch {
790 1.40 tsutsui struct txcom_softc *sc;
791 1.3 uch struct txcom_chip *chip;
792 1.3 uch struct tty *tp;
793 1.23 shin int s, err = ENXIO;
794 1.1 uch
795 1.40 tsutsui sc = device_lookup_private(&txcom_cd, minor(dev));
796 1.40 tsutsui if (sc == NULL)
797 1.23 shin return err;
798 1.3 uch
799 1.3 uch chip = sc->sc_chip;
800 1.3 uch tp = sc->sc_tty;
801 1.3 uch
802 1.32 elad if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp))
803 1.3 uch return (EBUSY);
804 1.3 uch
805 1.3 uch s = spltty();
806 1.3 uch
807 1.36 thorpej if (txcom_enable(sc->sc_chip, false)) {
808 1.6 uch splx(s);
809 1.5 uch goto out;
810 1.6 uch }
811 1.5 uch /*
812 1.5 uch * Do the following iff this is a first open.
813 1.5 uch */
814 1.5 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
815 1.5 uch struct termios t;
816 1.5 uch
817 1.5 uch tp->t_dev = dev;
818 1.1 uch
819 1.5 uch t.c_ispeed = 0;
820 1.5 uch if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
821 1.5 uch t.c_ospeed = chip->sc_speed;
822 1.5 uch t.c_cflag = chip->sc_cflag;
823 1.5 uch } else {
824 1.5 uch t.c_ospeed = TTYDEF_SPEED;
825 1.5 uch t.c_cflag = TTYDEF_CFLAG;
826 1.5 uch }
827 1.3 uch
828 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL))
829 1.5 uch SET(t.c_cflag, CLOCAL);
830 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS))
831 1.5 uch SET(t.c_cflag, CRTSCTS);
832 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF))
833 1.5 uch SET(t.c_cflag, MDMBUF);
834 1.5 uch
835 1.5 uch /* Make sure txcomparam() will do something. */
836 1.5 uch tp->t_ospeed = 0;
837 1.5 uch txcomparam(tp, &t);
838 1.5 uch
839 1.5 uch tp->t_iflag = TTYDEF_IFLAG;
840 1.5 uch tp->t_oflag = TTYDEF_OFLAG;
841 1.5 uch tp->t_lflag = TTYDEF_LFLAG;
842 1.1 uch
843 1.5 uch ttychars(tp);
844 1.5 uch ttsetwater(tp);
845 1.3 uch
846 1.5 uch /*
847 1.5 uch * Turn on DTR. We must always do this, even if carrier is not
848 1.5 uch * present, because otherwise we'd have to use TIOCSDTR
849 1.5 uch * immediately after setting CLOCAL, which applications do not
850 1.5 uch * expect. We always assert DTR while the device is open
851 1.5 uch * unless explicitly requested to deassert it.
852 1.5 uch */
853 1.5 uch txcom_modem(sc, 1);
854 1.3 uch
855 1.5 uch /* Clear the input ring, and unblock. */
856 1.5 uch sc->sc_rbget = sc->sc_rbput = 0;
857 1.5 uch }
858 1.3 uch
859 1.3 uch splx(s);
860 1.6 uch #define TXCOMDIALOUT(x) (minor(x) & 0x80000)
861 1.6 uch if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) {
862 1.15 uch DPRINTF("ttyopen failed\n");
863 1.3 uch goto out;
864 1.1 uch }
865 1.10 eeh if ((err = (*tp->t_linesw->l_open)(dev, tp))) {
866 1.15 uch DPRINTF("line dicipline open failed\n");
867 1.3 uch goto out;
868 1.3 uch }
869 1.3 uch
870 1.3 uch return err;
871 1.3 uch
872 1.3 uch out:
873 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
874 1.3 uch /*
875 1.3 uch * We failed to open the device, and nobody else had it opened.
876 1.3 uch * Clean up the state as appropriate.
877 1.3 uch */
878 1.3 uch txcom_shutdown(sc);
879 1.1 uch }
880 1.1 uch
881 1.1 uch return err;
882 1.3 uch
883 1.1 uch }
884 1.1 uch
885 1.1 uch int
886 1.26 christos txcomclose(dev_t dev, int flag, int mode, struct lwp *l)
887 1.1 uch {
888 1.40 tsutsui struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
889 1.1 uch struct tty *tp = sc->sc_tty;
890 1.1 uch
891 1.3 uch /* XXX This is for cons.c. */
892 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN))
893 1.3 uch return 0;
894 1.3 uch
895 1.10 eeh (*tp->t_linesw->l_close)(tp, flag);
896 1.1 uch ttyclose(tp);
897 1.1 uch
898 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
899 1.3 uch /*
900 1.3 uch * Although we got a last close, the device may still be in
901 1.3 uch * use; e.g. if this was the dialout node, and there are still
902 1.3 uch * processes waiting for carrier on the non-dialout node.
903 1.3 uch */
904 1.3 uch txcom_shutdown(sc);
905 1.3 uch }
906 1.3 uch
907 1.1 uch return 0;
908 1.1 uch }
909 1.1 uch
910 1.1 uch int
911 1.9 uch txcomread(dev_t dev, struct uio *uio, int flag)
912 1.1 uch {
913 1.40 tsutsui struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
914 1.1 uch struct tty *tp = sc->sc_tty;
915 1.3 uch
916 1.10 eeh return ((*tp->t_linesw->l_read)(tp, uio, flag));
917 1.1 uch }
918 1.1 uch
919 1.1 uch int
920 1.9 uch txcomwrite(dev_t dev, struct uio *uio, int flag)
921 1.1 uch {
922 1.40 tsutsui struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
923 1.1 uch struct tty *tp = sc->sc_tty;
924 1.1 uch
925 1.10 eeh return ((*tp->t_linesw->l_write)(tp, uio, flag));
926 1.12 scw }
927 1.12 scw
928 1.12 scw int
929 1.26 christos txcompoll(dev_t dev, int events, struct lwp *l)
930 1.12 scw {
931 1.40 tsutsui struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
932 1.12 scw struct tty *tp = sc->sc_tty;
933 1.12 scw
934 1.26 christos return ((*tp->t_linesw->l_poll)(tp, events, l));
935 1.1 uch }
936 1.1 uch
937 1.1 uch struct tty *
938 1.9 uch txcomtty(dev_t dev)
939 1.1 uch {
940 1.40 tsutsui struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
941 1.3 uch
942 1.3 uch return sc->sc_tty;
943 1.1 uch }
944 1.1 uch
945 1.1 uch int
946 1.37 christos txcomioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
947 1.1 uch {
948 1.40 tsutsui struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
949 1.1 uch struct tty *tp = sc->sc_tty;
950 1.3 uch int s, err;
951 1.3 uch
952 1.26 christos err = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
953 1.16 atatat if (err != EPASSTHROUGH) {
954 1.3 uch return err;
955 1.3 uch }
956 1.3 uch
957 1.26 christos err = ttioctl(tp, cmd, data, flag, l);
958 1.16 atatat if (err != EPASSTHROUGH) {
959 1.3 uch return err;
960 1.3 uch }
961 1.3 uch
962 1.3 uch err = 0;
963 1.3 uch
964 1.3 uch s = spltty();
965 1.3 uch
966 1.3 uch switch (cmd) {
967 1.5 uch default:
968 1.16 atatat err = EPASSTHROUGH;
969 1.5 uch break;
970 1.5 uch
971 1.3 uch case TIOCSBRK:
972 1.3 uch txcom_break(sc, 1);
973 1.3 uch break;
974 1.3 uch
975 1.3 uch case TIOCCBRK:
976 1.3 uch txcom_break(sc, 0);
977 1.3 uch break;
978 1.3 uch
979 1.3 uch case TIOCSDTR:
980 1.3 uch txcom_modem(sc, 1);
981 1.3 uch break;
982 1.3 uch
983 1.3 uch case TIOCCDTR:
984 1.3 uch txcom_modem(sc, 0);
985 1.3 uch break;
986 1.3 uch
987 1.3 uch case TIOCGFLAGS:
988 1.3 uch *(int *)data = sc->sc_chip->sc_swflags;
989 1.3 uch break;
990 1.3 uch
991 1.3 uch case TIOCSFLAGS:
992 1.34 elad err = kauth_authorize_device_tty(l->l_cred,
993 1.34 elad KAUTH_DEVICE_TTY_PRIVSET, tp);
994 1.3 uch if (err) {
995 1.3 uch break;
996 1.3 uch }
997 1.3 uch sc->sc_chip->sc_swflags = *(int *)data;
998 1.3 uch break;
999 1.3 uch
1000 1.3 uch }
1001 1.1 uch
1002 1.3 uch splx(s);
1003 1.1 uch
1004 1.3 uch return err;
1005 1.1 uch }
1006 1.1 uch
1007 1.1 uch void
1008 1.9 uch txcomstop(struct tty *tp, int flag)
1009 1.1 uch {
1010 1.40 tsutsui struct txcom_softc *sc;
1011 1.1 uch int s;
1012 1.1 uch
1013 1.40 tsutsui sc = device_lookup_private(&txcom_cd, minor(tp->t_dev));
1014 1.40 tsutsui
1015 1.1 uch s = spltty();
1016 1.1 uch
1017 1.1 uch if (ISSET(tp->t_state, TS_BUSY)) {
1018 1.1 uch /* Stop transmitting at the next chunk. */
1019 1.1 uch sc->sc_tbc = 0;
1020 1.1 uch sc->sc_heldtbc = 0;
1021 1.1 uch if (!ISSET(tp->t_state, TS_TTSTOP))
1022 1.1 uch SET(tp->t_state, TS_FLUSH);
1023 1.1 uch }
1024 1.3 uch
1025 1.1 uch splx(s);
1026 1.1 uch }
1027 1.1 uch
1028 1.1 uch void
1029 1.9 uch txcomstart(struct tty *tp)
1030 1.1 uch {
1031 1.40 tsutsui struct txcom_softc *sc;
1032 1.40 tsutsui struct txcom_chip *chip;
1033 1.40 tsutsui tx_chipset_tag_t tc;
1034 1.40 tsutsui int slot;
1035 1.1 uch int s;
1036 1.1 uch
1037 1.40 tsutsui sc = device_lookup_private(&txcom_cd, minor(tp->t_dev));
1038 1.40 tsutsui chip = sc->sc_chip;
1039 1.40 tsutsui tc = chip->sc_tc;
1040 1.40 tsutsui slot = chip->sc_slot;
1041 1.40 tsutsui
1042 1.1 uch s = spltty();
1043 1.3 uch
1044 1.3 uch if (!__txcom_txbufready(chip, 0) ||
1045 1.3 uch ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
1046 1.3 uch goto out;
1047 1.1 uch
1048 1.38 ad if (!ttypull(tp))
1049 1.38 ad goto out;
1050 1.3 uch
1051 1.1 uch sc->sc_tba = tp->t_outq.c_cf;
1052 1.1 uch sc->sc_tbc = ndqb(&tp->t_outq, 0);
1053 1.3 uch SET(tp->t_state, TS_BUSY);
1054 1.3 uch
1055 1.3 uch /* Output the first character of the contiguous buffer. */
1056 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot),
1057 1.14 uch (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK));
1058 1.3 uch
1059 1.3 uch sc->sc_tbc--;
1060 1.3 uch sc->sc_tba++;
1061 1.1 uch
1062 1.3 uch out:
1063 1.1 uch splx(s);
1064 1.1 uch }
1065 1.1 uch
1066 1.3 uch /*
1067 1.3 uch * Set TXcom tty parameters from termios.
1068 1.3 uch */
1069 1.1 uch int
1070 1.9 uch txcomparam(struct tty *tp, struct termios *t)
1071 1.1 uch {
1072 1.40 tsutsui struct txcom_softc *sc;
1073 1.3 uch struct txcom_chip *chip;
1074 1.5 uch int ospeed;
1075 1.3 uch int s;
1076 1.3 uch
1077 1.40 tsutsui sc = device_lookup_private(&txcom_cd, minor(tp->t_dev));
1078 1.40 tsutsui if (sc == NULL)
1079 1.3 uch return ENXIO;
1080 1.3 uch
1081 1.3 uch ospeed = t->c_ospeed;
1082 1.3 uch
1083 1.3 uch /* Check requested parameters. */
1084 1.3 uch if (ospeed < 0) {
1085 1.3 uch return EINVAL;
1086 1.3 uch }
1087 1.3 uch if (t->c_ispeed && t->c_ispeed != ospeed) {
1088 1.3 uch return EINVAL;
1089 1.3 uch }
1090 1.3 uch
1091 1.3 uch s = spltty();
1092 1.3 uch chip = sc->sc_chip;
1093 1.3 uch /*
1094 1.3 uch * For the console, always force CLOCAL and !HUPCL, so that the port
1095 1.3 uch * is always active.
1096 1.3 uch */
1097 1.3 uch if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) ||
1098 1.3 uch ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
1099 1.5 uch SET(t->c_cflag, CLOCAL);
1100 1.5 uch CLR(t->c_cflag, HUPCL);
1101 1.3 uch }
1102 1.3 uch splx(s);
1103 1.3 uch
1104 1.3 uch /*
1105 1.6 uch * If we're not in a mode that assumes a connection is present, then
1106 1.6 uch * ignore carrier changes.
1107 1.6 uch */
1108 1.6 uch if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
1109 1.6 uch chip->sc_dcd = 0;
1110 1.6 uch else
1111 1.6 uch chip->sc_dcd = 1;
1112 1.6 uch
1113 1.6 uch /*
1114 1.3 uch * Only whack the UART when params change.
1115 1.3 uch * Some callers need to clear tp->t_ospeed
1116 1.3 uch * to make sure initialization gets done.
1117 1.3 uch */
1118 1.5 uch if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) {
1119 1.3 uch return 0;
1120 1.3 uch }
1121 1.3 uch
1122 1.3 uch s = spltty();
1123 1.3 uch chip = sc->sc_chip;
1124 1.3 uch chip->sc_speed = ospeed;
1125 1.5 uch chip->sc_cflag = t->c_cflag;
1126 1.3 uch
1127 1.3 uch txcom_setmode(chip);
1128 1.3 uch txcom_setbaudrate(chip);
1129 1.6 uch
1130 1.3 uch /* And copy to tty. */
1131 1.3 uch tp->t_ispeed = 0;
1132 1.3 uch tp->t_ospeed = chip->sc_speed;
1133 1.3 uch tp->t_cflag = chip->sc_cflag;
1134 1.3 uch
1135 1.3 uch /*
1136 1.6 uch * Update the tty layer's idea of the carrier bit, in case we changed
1137 1.6 uch * CLOCAL or MDMBUF. We don't hang up here; we only do that by
1138 1.6 uch * explicit request.
1139 1.6 uch */
1140 1.10 eeh (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd);
1141 1.6 uch
1142 1.6 uch /*
1143 1.3 uch * If hardware flow control is disabled, unblock any hard flow
1144 1.3 uch * control state.
1145 1.3 uch */
1146 1.3 uch if (!ISSET(chip->sc_cflag, CHWFLOW)) {
1147 1.3 uch txcomstart(tp);
1148 1.3 uch }
1149 1.3 uch
1150 1.3 uch splx(s);
1151 1.6 uch
1152 1.6 uch return 0;
1153 1.6 uch }
1154 1.6 uch
1155 1.9 uch int
1156 1.9 uch txcom_dcd_hook(void *arg, int type, long id, void *msg)
1157 1.9 uch {
1158 1.9 uch struct txcom_softc *sc = arg;
1159 1.9 uch struct tty *tp = sc->sc_tty;
1160 1.9 uch struct txcom_chip *chip = sc->sc_chip;
1161 1.9 uch int modem = !(int)msg; /* p-edge 1, n-edge 0 */
1162 1.9 uch
1163 1.15 uch DPRINTF("DCD %s\n", modem ? "ON" : "OFF");
1164 1.9 uch
1165 1.9 uch if (modem && chip->sc_dcd)
1166 1.10 eeh (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd);
1167 1.9 uch
1168 1.9 uch return 0;
1169 1.9 uch }
1170 1.9 uch
1171 1.9 uch int
1172 1.9 uch txcom_cts_hook(void *arg, int type, long id, void *msg)
1173 1.9 uch {
1174 1.9 uch struct txcom_softc *sc = arg;
1175 1.9 uch struct tty *tp = sc->sc_tty;
1176 1.9 uch struct txcom_chip *chip = sc->sc_chip;
1177 1.9 uch int clear = !(int)msg; /* p-edge 1, n-edge 0 */
1178 1.9 uch
1179 1.15 uch DPRINTF("CTS %s\n", clear ? "ON" : "OFF");
1180 1.9 uch
1181 1.9 uch if (chip->sc_msr_cts) {
1182 1.9 uch if (!clear) {
1183 1.9 uch chip->sc_tx_stopped = 1;
1184 1.9 uch } else {
1185 1.9 uch chip->sc_tx_stopped = 0;
1186 1.10 eeh (*tp->t_linesw->l_start)(tp);
1187 1.9 uch }
1188 1.9 uch }
1189 1.9 uch
1190 1.9 uch return 0;
1191 1.9 uch }
1192 1.9 uch
1193 1.9 uch #ifdef TX39UARTDEBUG
1194 1.6 uch void
1195 1.9 uch txcom_dump(struct txcom_chip *chip)
1196 1.6 uch {
1197 1.6 uch tx_chipset_tag_t tc = chip->sc_tc;
1198 1.6 uch int slot = chip->sc_slot;
1199 1.6 uch txreg_t reg;
1200 1.6 uch
1201 1.6 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
1202 1.6 uch #define ISSETPRINT(r, m) \
1203 1.15 uch dbg_bitmask_print(r, TX39_UARTCTRL1_##m, #m)
1204 1.6 uch ISSETPRINT(reg, UARTON);
1205 1.6 uch ISSETPRINT(reg, EMPTY);
1206 1.6 uch ISSETPRINT(reg, PRXHOLDFULL);
1207 1.6 uch ISSETPRINT(reg, RXHOLDFULL);
1208 1.6 uch ISSETPRINT(reg, ENDMARX);
1209 1.6 uch ISSETPRINT(reg, ENDMATX);
1210 1.6 uch ISSETPRINT(reg, TESTMODE);
1211 1.6 uch ISSETPRINT(reg, ENBREAHALT);
1212 1.6 uch ISSETPRINT(reg, ENDMATEST);
1213 1.6 uch ISSETPRINT(reg, ENDMALOOP);
1214 1.6 uch ISSETPRINT(reg, PULSEOPT2);
1215 1.6 uch ISSETPRINT(reg, PULSEOPT1);
1216 1.6 uch ISSETPRINT(reg, DTINVERT);
1217 1.6 uch ISSETPRINT(reg, DISTXD);
1218 1.6 uch ISSETPRINT(reg, TWOSTOP);
1219 1.6 uch ISSETPRINT(reg, LOOPBACK);
1220 1.6 uch ISSETPRINT(reg, BIT7);
1221 1.6 uch ISSETPRINT(reg, EVENPARITY);
1222 1.6 uch ISSETPRINT(reg, ENPARITY);
1223 1.6 uch ISSETPRINT(reg, ENUART);
1224 1.6 uch }
1225 1.9 uch #endif /* TX39UARTDEBUG */
1226