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txcom.c revision 1.5
      1  1.5  uch /*	$NetBSD: txcom.c,v 1.5 2000/01/13 17:53:37 uch Exp $ */
      2  1.1  uch 
      3  1.1  uch /*
      4  1.5  uch  * Copyright (c) 1999, 2000, by UCHIYAMA Yasushi
      5  1.1  uch  * All rights reserved.
      6  1.1  uch  *
      7  1.1  uch  * Redistribution and use in source and binary forms, with or without
      8  1.1  uch  * modification, are permitted provided that the following conditions
      9  1.1  uch  * are met:
     10  1.1  uch  * 1. Redistributions of source code must retain the above copyright
     11  1.1  uch  *    notice, this list of conditions and the following disclaimer.
     12  1.1  uch  * 2. The name of the developer may NOT be used to endorse or promote products
     13  1.1  uch  *    derived from this software without specific prior written permission.
     14  1.1  uch  *
     15  1.1  uch  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     16  1.1  uch  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     17  1.1  uch  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     18  1.1  uch  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     19  1.1  uch  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     20  1.1  uch  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     21  1.1  uch  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     22  1.1  uch  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     23  1.1  uch  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     24  1.1  uch  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     25  1.1  uch  * SUCH DAMAGE.
     26  1.1  uch  *
     27  1.1  uch  */
     28  1.1  uch #include "opt_tx39_debug.h"
     29  1.1  uch #include "opt_tx39uartdebug.h"
     30  1.1  uch 
     31  1.1  uch #include <sys/param.h>
     32  1.1  uch #include <sys/systm.h>
     33  1.3  uch #include <sys/kernel.h>
     34  1.1  uch #include <sys/device.h>
     35  1.3  uch #include <sys/malloc.h>
     36  1.1  uch 
     37  1.1  uch #include <sys/proc.h> /* tsleep/wakeup */
     38  1.1  uch 
     39  1.1  uch #include <sys/ioctl.h>
     40  1.1  uch #include <sys/select.h>
     41  1.1  uch #include <sys/file.h>
     42  1.1  uch 
     43  1.1  uch #include <sys/tty.h>
     44  1.1  uch #include <sys/conf.h>
     45  1.1  uch #include <dev/cons.h> /* consdev */
     46  1.1  uch 
     47  1.1  uch #include <machine/bus.h>
     48  1.1  uch 
     49  1.1  uch #include <hpcmips/tx/tx39var.h>
     50  1.1  uch #include <hpcmips/tx/tx39icureg.h>
     51  1.1  uch #include <hpcmips/tx/tx39uartvar.h>
     52  1.1  uch #include <hpcmips/tx/tx39uartreg.h>
     53  1.1  uch 
     54  1.5  uch #include <hpcmips/tx/tx39irvar.h>
     55  1.5  uch 
     56  1.1  uch #include <hpcmips/tx/tx39clockreg.h> /* XXX */
     57  1.1  uch 
     58  1.1  uch #define SET(t, f)	(t) |= (f)
     59  1.1  uch #define CLR(t, f)	(t) &= ~(f)
     60  1.1  uch #define ISSET(t, f)	((t) & (f))
     61  1.1  uch 
     62  1.1  uch #ifdef TX39UARTDEBUG
     63  1.1  uch #define	DPRINTF(arg) printf arg
     64  1.1  uch #else
     65  1.1  uch #define	DPRINTF(arg)
     66  1.1  uch #endif
     67  1.1  uch 
     68  1.3  uch #define TXCOM_HW_CONSOLE	0x40
     69  1.3  uch #define	TXCOM_RING_SIZE		256 /* must be a power of two! */
     70  1.3  uch #define TXCOM_RING_MASK		(TXCOM_RING_SIZE - 1)
     71  1.1  uch 
     72  1.3  uch struct txcom_chip {
     73  1.1  uch 	tx_chipset_tag_t sc_tc;
     74  1.1  uch 	int sc_slot;	/* UARTA or UARTB */
     75  1.1  uch 	int sc_cflag;
     76  1.1  uch 	int sc_speed;
     77  1.3  uch 	int sc_swflags;
     78  1.1  uch 	int sc_hwflags;
     79  1.3  uch };
     80  1.1  uch 
     81  1.3  uch struct txcom_softc {
     82  1.3  uch 	struct	device		sc_dev;
     83  1.3  uch 	struct tty		*sc_tty;
     84  1.3  uch 	struct txcom_chip	*sc_chip;
     85  1.3  uch 
     86  1.3  uch  	u_int8_t	*sc_tba;	/* transmit buffer address */
     87  1.3  uch  	int		sc_tbc;		/* transmit byte count */
     88  1.3  uch 	int		sc_heldtbc;
     89  1.3  uch 	u_int8_t	*sc_rbuf;	/* receive buffer address */
     90  1.3  uch 	int		sc_rbput;	/* receive byte count */
     91  1.3  uch 	int		sc_rbget;
     92  1.1  uch };
     93  1.1  uch 
     94  1.1  uch extern struct cfdriver txcom_cd;
     95  1.1  uch 
     96  1.1  uch int	txcom_match	__P((struct device*, struct cfdata*, void*));
     97  1.1  uch void	txcom_attach	__P((struct device*, struct device*, void*));
     98  1.5  uch int	txcom_print	__P((void*, const char*));
     99  1.3  uch 
    100  1.3  uch int	txcom_txintr		__P((void*));
    101  1.3  uch int	txcom_rxintr		__P((void*));
    102  1.2  uch int	txcom_overrun_intr	__P((void*));
    103  1.3  uch int	txcom_frameerr_intr	__P((void*));
    104  1.3  uch int	txcom_parityerr_intr	__P((void*));
    105  1.3  uch int	txcom_break_intr	__P((void*));
    106  1.3  uch 
    107  1.1  uch void	txcom_rxsoft	__P((void*));
    108  1.3  uch void	txcom_txsoft	__P((void*));
    109  1.3  uch 
    110  1.3  uch void	txcom_shutdown	__P((struct txcom_softc*));
    111  1.3  uch void	txcom_break	__P((struct txcom_softc*, int));
    112  1.3  uch void	txcom_modem	__P((struct txcom_softc*, int));
    113  1.3  uch void	txcomstart	__P((struct tty*));
    114  1.3  uch int	txcomparam	__P((struct tty*, struct termios*));
    115  1.3  uch 
    116  1.3  uch int	txcom_enable		__P((struct txcom_chip*));
    117  1.3  uch void	txcom_disable		__P((struct txcom_chip*));
    118  1.3  uch void	txcom_setmode		__P((struct txcom_chip*));
    119  1.3  uch void	txcom_setbaudrate	__P((struct txcom_chip*));
    120  1.1  uch int	txcom_cngetc		__P((dev_t));
    121  1.1  uch void	txcom_cnputc		__P((dev_t, int));
    122  1.3  uch void	txcom_cnpollc		__P((dev_t, int));
    123  1.3  uch 
    124  1.3  uch __inline int	__txcom_txbufready __P((struct txcom_chip*, int));
    125  1.3  uch __inline const char *__txcom_slotname __P((int));
    126  1.1  uch 
    127  1.1  uch cdev_decl(txcom);
    128  1.1  uch 
    129  1.3  uch struct consdev txcomcons = {
    130  1.3  uch 	NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc,
    131  1.3  uch 	NODEV, CN_NORMAL
    132  1.3  uch };
    133  1.3  uch 
    134  1.1  uch /* Serial console */
    135  1.3  uch struct txcom_chip txcom_chip;
    136  1.1  uch 
    137  1.1  uch struct cfattach txcom_ca = {
    138  1.1  uch 	sizeof(struct txcom_softc), txcom_match, txcom_attach
    139  1.1  uch };
    140  1.1  uch 
    141  1.1  uch int
    142  1.1  uch txcom_match(parent, cf, aux)
    143  1.1  uch 	struct device *parent;
    144  1.1  uch 	struct cfdata *cf;
    145  1.1  uch 	void *aux;
    146  1.1  uch {
    147  1.1  uch 	/* if the autoconfiguration got this far, there's a slot here */
    148  1.1  uch 	return 1;
    149  1.1  uch }
    150  1.1  uch 
    151  1.1  uch void
    152  1.1  uch txcom_attach(parent, self, aux)
    153  1.1  uch 	struct device *parent;
    154  1.1  uch 	struct device *self;
    155  1.1  uch 	void *aux;
    156  1.1  uch {
    157  1.1  uch 	struct tx39uart_attach_args *ua = aux;
    158  1.1  uch 	struct txcom_softc *sc = (void*)self;
    159  1.1  uch 	tx_chipset_tag_t tc;
    160  1.1  uch 	struct tty *tp;
    161  1.3  uch 	struct txcom_chip *chip;
    162  1.3  uch 	int slot;
    163  1.1  uch 
    164  1.1  uch 	/* Check this slot used as serial console */
    165  1.3  uch 	if (ua->ua_slot == txcom_chip.sc_slot &&
    166  1.3  uch 	    (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE)) {
    167  1.3  uch 		sc->sc_chip = &txcom_chip;
    168  1.3  uch 	} else {
    169  1.3  uch 		if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip),
    170  1.3  uch 					   M_DEVBUF, M_WAITOK))) {
    171  1.3  uch 			printf(": can't allocate chip\n");
    172  1.3  uch 			return;
    173  1.3  uch 		}
    174  1.3  uch 		memset(sc->sc_chip, 0, sizeof(struct txcom_chip));
    175  1.1  uch 	}
    176  1.1  uch 
    177  1.3  uch 	chip = sc->sc_chip;
    178  1.3  uch 	tc = chip->sc_tc = ua->ua_tc;
    179  1.3  uch 	slot = chip->sc_slot = ua->ua_slot;
    180  1.3  uch 
    181  1.3  uch 	if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) {
    182  1.3  uch 		printf(": can't allocate buffer.\n");
    183  1.3  uch 		return;
    184  1.3  uch 	}
    185  1.3  uch 	memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE);
    186  1.1  uch 
    187  1.1  uch 	tp = ttymalloc();
    188  1.1  uch 	tp->t_oproc = txcomstart;
    189  1.1  uch 	tp->t_param = txcomparam;
    190  1.1  uch 	tp->t_hwiflow = NULL;
    191  1.1  uch 	sc->sc_tty = tp;
    192  1.1  uch 	tty_attach(tp);
    193  1.1  uch 
    194  1.3  uch 	if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
    195  1.1  uch 		int maj;
    196  1.1  uch 		/* locate the major number */
    197  1.1  uch 		for (maj = 0; maj < nchrdev; maj++)
    198  1.1  uch 			if (cdevsw[maj].d_open == txcomopen)
    199  1.1  uch 				break;
    200  1.1  uch 
    201  1.1  uch 		cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit);
    202  1.1  uch 
    203  1.3  uch 		printf(": console");
    204  1.1  uch 	}
    205  1.1  uch 
    206  1.3  uch 	printf("\n");
    207  1.1  uch 
    208  1.1  uch 	/*
    209  1.1  uch 	 * Enable interrupt
    210  1.1  uch 	 */
    211  1.3  uch #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s))
    212  1.3  uch 
    213  1.3  uch 	tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY,
    214  1.3  uch 			  txcom_rxintr, sc);
    215  1.3  uch 	tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY,
    216  1.3  uch 			  txcom_txintr, sc);
    217  1.3  uch 	tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY,
    218  1.4  uch 			  txcom_rxintr, sc);
    219  1.3  uch 	tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY,
    220  1.4  uch 			  txcom_txintr, sc);
    221  1.3  uch 	tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY,
    222  1.3  uch 			  txcom_frameerr_intr, sc);
    223  1.3  uch 	tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY,
    224  1.3  uch 			  txcom_parityerr_intr, sc);
    225  1.3  uch 	tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY,
    226  1.3  uch 			  txcom_break_intr, sc);
    227  1.5  uch 
    228  1.5  uch 	/*
    229  1.5  uch 	 * UARTB can connect IR module
    230  1.5  uch 	 */
    231  1.5  uch 	if (ua->ua_slot == 1) {
    232  1.5  uch 		struct txcom_attach_args tca;
    233  1.5  uch 		tca.tca_tc = tc;
    234  1.5  uch 		tca.tca_parent = self;
    235  1.5  uch 		config_found(self, &tca, txcom_print);
    236  1.5  uch 	}
    237  1.5  uch }
    238  1.5  uch 
    239  1.5  uch int
    240  1.5  uch txcom_print(aux, pnp)
    241  1.5  uch 	void *aux;
    242  1.5  uch 	const char *pnp;
    243  1.5  uch {
    244  1.5  uch 	return pnp ? QUIET : UNCONF;
    245  1.1  uch }
    246  1.1  uch 
    247  1.1  uch int
    248  1.3  uch txcom_enable(chip)
    249  1.3  uch 	struct txcom_chip *chip;
    250  1.1  uch {
    251  1.1  uch 	tx_chipset_tag_t tc;
    252  1.3  uch 
    253  1.1  uch 	txreg_t reg;
    254  1.3  uch 	int slot, ofs, timeout;
    255  1.1  uch 
    256  1.3  uch 	tc = chip->sc_tc;
    257  1.3  uch 	slot = chip->sc_slot;
    258  1.3  uch 	ofs = TX39_UARTCTRL1_REG(slot);
    259  1.1  uch 
    260  1.5  uch 	/* Supply clock XXX should call clock module routine. */
    261  1.5  uch 	reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
    262  1.5  uch 	reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
    263  1.5  uch 	tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
    264  1.5  uch 
    265  1.3  uch 	/* Power on */
    266  1.3  uch 	reg = tx_conf_read(tc, ofs);
    267  1.1  uch 	reg |= TX39_UARTCTRL1_ENUART;
    268  1.1  uch 	reg &= ~TX39_UARTCTRL1_ENBREAHALT;
    269  1.3  uch 	tx_conf_write(tc, ofs, reg);
    270  1.3  uch 
    271  1.3  uch 	timeout = 100;
    272  1.3  uch 
    273  1.3  uch 	while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) &&
    274  1.3  uch 	      --timeout > 0)
    275  1.3  uch 		;
    276  1.3  uch 
    277  1.5  uch 	if (timeout == 0 && !cold) {
    278  1.3  uch 		printf("UART%c never power up\n", "AB"[chip->sc_slot]);
    279  1.3  uch 		return 1;
    280  1.3  uch 	}
    281  1.3  uch 
    282  1.1  uch 	/*
    283  1.1  uch 	 * XXX Disable DMA (DMA not coded yet)
    284  1.1  uch 	 */
    285  1.1  uch 	reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
    286  1.3  uch 	tx_conf_write(tc, ofs, reg);
    287  1.1  uch 
    288  1.1  uch 	return 0;
    289  1.1  uch }
    290  1.1  uch 
    291  1.1  uch void
    292  1.3  uch txcom_disable(chip)
    293  1.3  uch 	struct txcom_chip *chip;
    294  1.1  uch {
    295  1.1  uch 	tx_chipset_tag_t tc;
    296  1.1  uch 	txreg_t reg;
    297  1.1  uch 	int slot;
    298  1.1  uch 
    299  1.3  uch 	tc = chip->sc_tc;
    300  1.3  uch 	slot = chip->sc_slot;
    301  1.1  uch 
    302  1.1  uch 	reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
    303  1.1  uch 	/* DMA */
    304  1.1  uch 	reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
    305  1.3  uch 
    306  1.1  uch 	/* Power */
    307  1.1  uch 	reg &= ~TX39_UARTCTRL1_ENUART;
    308  1.1  uch 	tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
    309  1.3  uch 
    310  1.1  uch 	/* Clock */
    311  1.1  uch 	reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
    312  1.1  uch 	reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
    313  1.1  uch 	tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
    314  1.1  uch 
    315  1.1  uch }
    316  1.1  uch 
    317  1.3  uch __inline int
    318  1.3  uch __txcom_txbufready(chip, retry)
    319  1.3  uch 	struct txcom_chip *chip;
    320  1.3  uch 	int retry;
    321  1.3  uch {
    322  1.3  uch 	tx_chipset_tag_t tc = chip->sc_tc;
    323  1.3  uch 	int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
    324  1.3  uch 
    325  1.3  uch 	do {
    326  1.3  uch 		if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY)
    327  1.3  uch 			return 1;
    328  1.3  uch 	} while(--retry != 0);
    329  1.3  uch 
    330  1.1  uch 	return 0;
    331  1.1  uch }
    332  1.1  uch 
    333  1.5  uch void
    334  1.5  uch txcom_pulse_mode(dev)
    335  1.5  uch 	struct device *dev;
    336  1.5  uch {
    337  1.5  uch 	struct txcom_softc *sc = (void*)dev;
    338  1.5  uch 	struct txcom_chip *chip = sc->sc_chip;
    339  1.5  uch 	tx_chipset_tag_t tc = chip->sc_tc;
    340  1.5  uch 	int ofs;
    341  1.5  uch 	txreg_t reg;
    342  1.5  uch 
    343  1.5  uch 	ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
    344  1.5  uch 
    345  1.5  uch 	reg = tx_conf_read(tc, ofs);
    346  1.5  uch 	reg |= (TX39_UARTCTRL1_PULSEOPT2 | TX39_UARTCTRL1_PULSEOPT1);
    347  1.5  uch 	tx_conf_write(tc, ofs, reg);
    348  1.5  uch }
    349  1.5  uch 
    350  1.3  uch /*
    351  1.3  uch  * console
    352  1.3  uch  */
    353  1.1  uch int
    354  1.1  uch txcom_cngetc(dev)
    355  1.1  uch 	dev_t dev;
    356  1.1  uch {
    357  1.1  uch 	tx_chipset_tag_t tc;
    358  1.2  uch 	int ofs, c, s;
    359  1.2  uch 
    360  1.3  uch 	s = spltty();
    361  1.2  uch 
    362  1.3  uch 	tc = txcom_chip.sc_tc;
    363  1.3  uch 	ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot);
    364  1.1  uch 
    365  1.1  uch 	while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs)))
    366  1.1  uch 		;
    367  1.2  uch 
    368  1.3  uch 	c = TX39_UARTRXHOLD_RXDATA(
    369  1.3  uch 		tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot)));
    370  1.2  uch 
    371  1.3  uch 	if (c == '\r')
    372  1.1  uch 		c = '\n';
    373  1.1  uch 
    374  1.2  uch 	splx(s);
    375  1.2  uch 
    376  1.1  uch 	return c;
    377  1.1  uch }
    378  1.1  uch 
    379  1.1  uch void
    380  1.1  uch txcom_cnputc(dev, c)
    381  1.1  uch 	dev_t dev;
    382  1.1  uch 	int c;
    383  1.1  uch {
    384  1.3  uch 	struct txcom_chip *chip = &txcom_chip;
    385  1.3  uch 	tx_chipset_tag_t tc = chip->sc_tc;
    386  1.3  uch 	int s;
    387  1.2  uch 
    388  1.3  uch 	s = spltty();
    389  1.1  uch 
    390  1.3  uch 	/* Wait for transmitter to empty */
    391  1.3  uch 	__txcom_txbufready(chip, -1);
    392  1.1  uch 
    393  1.3  uch 	tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
    394  1.1  uch 		      (c & TX39_UARTTXHOLD_TXDATA_MASK));
    395  1.1  uch 
    396  1.3  uch 	__txcom_txbufready(chip, -1);
    397  1.3  uch 
    398  1.2  uch 	splx(s);
    399  1.1  uch }
    400  1.1  uch 
    401  1.1  uch void
    402  1.1  uch txcom_cnpollc(dev, on)
    403  1.1  uch 	dev_t dev;
    404  1.1  uch 	int on;
    405  1.1  uch {
    406  1.1  uch }
    407  1.1  uch 
    408  1.1  uch void
    409  1.3  uch txcom_setmode(chip)
    410  1.3  uch 	struct txcom_chip *chip;
    411  1.1  uch {
    412  1.3  uch 	tcflag_t cflag = chip->sc_cflag;
    413  1.3  uch 	int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
    414  1.1  uch 	txreg_t reg;
    415  1.1  uch 
    416  1.3  uch 	reg = tx_conf_read(chip->sc_tc, ofs);
    417  1.1  uch 
    418  1.1  uch 	switch (ISSET(cflag, CSIZE)) {
    419  1.1  uch 	default:
    420  1.1  uch 		printf("txcom_setmode: CS7, CS8 only. use CS7");
    421  1.1  uch 		/* FALL THROUGH */
    422  1.1  uch 	case CS7:
    423  1.1  uch 		reg |= TX39_UARTCTRL1_BIT7;
    424  1.1  uch 		break;
    425  1.1  uch 	case CS8:
    426  1.1  uch 		reg &= ~TX39_UARTCTRL1_BIT7;
    427  1.1  uch 		break;
    428  1.1  uch 	}
    429  1.3  uch 
    430  1.1  uch 	if (ISSET(cflag, PARENB)) {
    431  1.1  uch 		reg |= TX39_UARTCTRL1_ENPARITY;
    432  1.1  uch 		if (ISSET(cflag, PARODD)) {
    433  1.1  uch 			reg &= ~TX39_UARTCTRL1_EVENPARITY;
    434  1.1  uch 		} else {
    435  1.1  uch 			reg |= TX39_UARTCTRL1_EVENPARITY;
    436  1.1  uch 		}
    437  1.1  uch 	} else {
    438  1.1  uch 		reg &= ~TX39_UARTCTRL1_ENPARITY;
    439  1.1  uch 	}
    440  1.3  uch 
    441  1.1  uch 	if (ISSET(cflag, CSTOPB)) {
    442  1.1  uch 		reg |= TX39_UARTCTRL1_TWOSTOP;
    443  1.1  uch 	}
    444  1.3  uch 
    445  1.3  uch 	tx_conf_write(chip->sc_tc, ofs, reg);
    446  1.3  uch }
    447  1.3  uch 
    448  1.3  uch void
    449  1.3  uch txcom_setbaudrate(chip)
    450  1.3  uch 	struct txcom_chip *chip;
    451  1.3  uch {
    452  1.3  uch 	int baudrate;
    453  1.3  uch 	txreg_t reg;
    454  1.3  uch 
    455  1.3  uch 	if (chip->sc_speed == 0)
    456  1.3  uch 		return;
    457  1.3  uch 
    458  1.5  uch 	if (!cold)
    459  1.5  uch 		DPRINTF(("txcom_setbaudrate: %d\n", chip->sc_speed));
    460  1.5  uch 
    461  1.3  uch 	baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1;
    462  1.3  uch 	reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate);
    463  1.3  uch 
    464  1.3  uch 	tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg);
    465  1.3  uch }
    466  1.3  uch 
    467  1.3  uch int
    468  1.3  uch txcom_cnattach(slot, speed, cflag)
    469  1.3  uch 	int slot, speed, cflag;
    470  1.3  uch {
    471  1.3  uch 	cn_tab = &txcomcons;
    472  1.3  uch 
    473  1.3  uch 	txcom_chip.sc_tc	= tx_conf_get_tag();
    474  1.3  uch 	txcom_chip.sc_slot	= slot;
    475  1.3  uch 	txcom_chip.sc_cflag	= cflag;
    476  1.3  uch 	txcom_chip.sc_speed	= speed;
    477  1.3  uch 	txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE;
    478  1.3  uch 
    479  1.5  uch 	if (txcom_enable(&txcom_chip))
    480  1.5  uch 		return 1;
    481  1.5  uch 
    482  1.3  uch 	txcom_setmode(&txcom_chip);
    483  1.3  uch 	txcom_setbaudrate(&txcom_chip);
    484  1.3  uch 
    485  1.3  uch 	return 0;
    486  1.3  uch }
    487  1.3  uch 
    488  1.3  uch /*
    489  1.3  uch  * tty
    490  1.3  uch  */
    491  1.3  uch void
    492  1.3  uch txcom_break(sc, on)
    493  1.3  uch 	struct txcom_softc *sc;
    494  1.3  uch 	int on;
    495  1.3  uch {
    496  1.3  uch 	struct txcom_chip *chip = sc->sc_chip;
    497  1.1  uch 
    498  1.3  uch 	tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
    499  1.3  uch 		      on ? TX39_UARTTXHOLD_BREAK : 0);
    500  1.1  uch }
    501  1.1  uch 
    502  1.1  uch void
    503  1.3  uch txcom_modem(sc, on)
    504  1.1  uch 	struct txcom_softc *sc;
    505  1.3  uch 	int on;
    506  1.1  uch {
    507  1.3  uch 	struct txcom_chip *chip = sc->sc_chip;
    508  1.3  uch 	tx_chipset_tag_t tc = chip->sc_tc;
    509  1.3  uch 	int slot = chip->sc_slot;
    510  1.1  uch 	txreg_t reg;
    511  1.1  uch 
    512  1.3  uch 	reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
    513  1.3  uch 
    514  1.3  uch 	if (on) {
    515  1.3  uch 		reg &= ~TX39_UARTCTRL1_DISTXD;
    516  1.3  uch 	} else {
    517  1.3  uch 		reg |= TX39_UARTCTRL1_DISTXD;
    518  1.3  uch 	}
    519  1.1  uch 
    520  1.3  uch 	reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
    521  1.1  uch }
    522  1.1  uch 
    523  1.1  uch void
    524  1.3  uch txcom_shutdown(sc)
    525  1.3  uch 	struct txcom_softc *sc;
    526  1.1  uch {
    527  1.1  uch 	struct tty *tp = sc->sc_tty;
    528  1.3  uch 	int s = spltty();
    529  1.1  uch 
    530  1.3  uch 	/* Clear any break condition set with TIOCSBRK. */
    531  1.3  uch 	txcom_break(sc, 0);
    532  1.3  uch 
    533  1.3  uch 	/*
    534  1.3  uch 	 * Hang up if necessary.  Wait a bit, so the other side has time to
    535  1.3  uch 	 * notice even if we immediately open the port again.
    536  1.3  uch 	 */
    537  1.3  uch 	if (ISSET(tp->t_cflag, HUPCL)) {
    538  1.3  uch 		txcom_modem(sc, 0);
    539  1.3  uch 		(void) tsleep(sc, TTIPRI, ttclos, hz);
    540  1.3  uch 	}
    541  1.3  uch 
    542  1.3  uch 
    543  1.3  uch 	/* Turn off interrupts if not the console. */
    544  1.3  uch 	if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
    545  1.3  uch 		txcom_disable(sc->sc_chip);
    546  1.3  uch 	}
    547  1.1  uch 
    548  1.3  uch 	splx(s);
    549  1.3  uch }
    550  1.1  uch 
    551  1.3  uch __inline const char *
    552  1.3  uch __txcom_slotname(slot)
    553  1.3  uch 	int slot;
    554  1.3  uch {
    555  1.3  uch 	static const char *slotname[] = {"UARTA", "UARTB"};
    556  1.3  uch 	if (slot != 0 && slot != 1) {
    557  1.3  uch 		return "bogus slot";
    558  1.3  uch 	} else {
    559  1.3  uch 		return slotname[slot];
    560  1.1  uch 	}
    561  1.2  uch }
    562  1.2  uch 
    563  1.2  uch int
    564  1.2  uch txcom_overrun_intr(arg)
    565  1.2  uch 	void *arg;
    566  1.2  uch {
    567  1.2  uch 	struct txcom_softc *sc = arg;
    568  1.2  uch 
    569  1.3  uch 	printf("%s overrun\n", __txcom_slotname(sc->sc_chip->sc_slot));
    570  1.3  uch 
    571  1.3  uch 	return 0;
    572  1.3  uch }
    573  1.3  uch 
    574  1.3  uch int
    575  1.3  uch txcom_frameerr_intr(arg)
    576  1.3  uch 	void *arg;
    577  1.3  uch {
    578  1.3  uch 	struct txcom_softc *sc = arg;
    579  1.3  uch 
    580  1.3  uch 	printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot));
    581  1.3  uch 
    582  1.3  uch 	return 0;
    583  1.3  uch }
    584  1.3  uch 
    585  1.3  uch int
    586  1.3  uch txcom_parityerr_intr(arg)
    587  1.3  uch 	void *arg;
    588  1.3  uch {
    589  1.3  uch 	struct txcom_softc *sc = arg;
    590  1.3  uch 
    591  1.3  uch 	printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot));
    592  1.2  uch 
    593  1.2  uch 	return 0;
    594  1.1  uch }
    595  1.1  uch 
    596  1.1  uch int
    597  1.3  uch txcom_break_intr(arg)
    598  1.1  uch 	void *arg;
    599  1.1  uch {
    600  1.1  uch 	struct txcom_softc *sc = arg;
    601  1.3  uch 
    602  1.3  uch 	printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot));
    603  1.3  uch 
    604  1.3  uch 	return 0;
    605  1.3  uch }
    606  1.3  uch 
    607  1.3  uch int
    608  1.3  uch txcom_rxintr(arg)
    609  1.3  uch 	void *arg;
    610  1.3  uch {
    611  1.3  uch 	struct txcom_softc *sc = arg;
    612  1.3  uch 	struct txcom_chip *chip = sc->sc_chip;
    613  1.1  uch 	u_int8_t c;
    614  1.1  uch 
    615  1.3  uch 	c = TX39_UARTRXHOLD_RXDATA(
    616  1.3  uch 		tx_conf_read(chip->sc_tc,
    617  1.3  uch 			     TX39_UARTRXHOLD_REG(chip->sc_slot)));
    618  1.3  uch 
    619  1.3  uch 	sc->sc_rbuf[sc->sc_rbput] = c;
    620  1.3  uch 	sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK;
    621  1.3  uch 
    622  1.3  uch 	timeout(txcom_rxsoft, arg, 1);
    623  1.1  uch 
    624  1.1  uch 	return 0;
    625  1.1  uch }
    626  1.1  uch 
    627  1.3  uch void
    628  1.3  uch txcom_rxsoft(arg)
    629  1.3  uch 	void *arg;
    630  1.3  uch {
    631  1.3  uch 	struct txcom_softc *sc = arg;
    632  1.3  uch 	struct tty *tp = sc->sc_tty;
    633  1.3  uch 	int (*rint) __P((int c, struct tty *tp));
    634  1.3  uch 	int code;
    635  1.3  uch 	int s, end, get;
    636  1.3  uch 
    637  1.3  uch 	rint = linesw[tp->t_line].l_rint;
    638  1.3  uch 
    639  1.3  uch 	s = spltty();
    640  1.3  uch 	end = sc->sc_rbput;
    641  1.3  uch 	get = sc->sc_rbget;
    642  1.3  uch 
    643  1.3  uch 	while (get != end) {
    644  1.3  uch 		code = sc->sc_rbuf[get];
    645  1.3  uch 
    646  1.3  uch 		if ((*rint)(code, tp) == -1) {
    647  1.3  uch 			/*
    648  1.3  uch 			 * The line discipline's buffer is out of space.
    649  1.3  uch 			 */
    650  1.3  uch 		}
    651  1.3  uch 		get = (get + 1) % TXCOM_RING_MASK;
    652  1.3  uch 	}
    653  1.3  uch 	sc->sc_rbget = get;
    654  1.3  uch 
    655  1.3  uch 	splx(s);
    656  1.3  uch }
    657  1.3  uch 
    658  1.1  uch int
    659  1.3  uch txcom_txintr(arg)
    660  1.1  uch 	void *arg;
    661  1.1  uch {
    662  1.1  uch 	struct txcom_softc *sc = arg;
    663  1.3  uch 	struct txcom_chip *chip = sc->sc_chip;
    664  1.3  uch 	tx_chipset_tag_t tc = chip->sc_tc;
    665  1.1  uch 
    666  1.3  uch 	if (sc->sc_tbc > 0) {
    667  1.3  uch 		tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
    668  1.3  uch 			      (*sc->sc_tba &
    669  1.3  uch 			       TX39_UARTTXHOLD_TXDATA_MASK));
    670  1.3  uch 		sc->sc_tbc--;
    671  1.3  uch 		sc->sc_tba++;
    672  1.3  uch 	} else {
    673  1.3  uch 		timeout(txcom_txsoft, arg, 1);
    674  1.3  uch 	}
    675  1.1  uch 
    676  1.1  uch 	return 0;
    677  1.1  uch }
    678  1.1  uch 
    679  1.3  uch void
    680  1.3  uch txcom_txsoft(arg)
    681  1.3  uch 	void *arg;
    682  1.3  uch {
    683  1.3  uch 	struct txcom_softc *sc = arg;
    684  1.3  uch 	struct tty *tp = sc->sc_tty;
    685  1.3  uch 	int s = spltty();
    686  1.3  uch 
    687  1.3  uch 	CLR(tp->t_state, TS_BUSY);
    688  1.3  uch 	if (ISSET(tp->t_state, TS_FLUSH)) {
    689  1.3  uch 		CLR(tp->t_state, TS_FLUSH);
    690  1.3  uch 	} else {
    691  1.3  uch 		ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
    692  1.3  uch 	}
    693  1.3  uch 
    694  1.3  uch 	(*linesw[tp->t_line].l_start)(tp);
    695  1.3  uch 
    696  1.3  uch 	splx(s);
    697  1.3  uch }
    698  1.1  uch 
    699  1.1  uch int
    700  1.1  uch txcomopen(dev, flag, mode, p)
    701  1.1  uch 	dev_t dev;
    702  1.1  uch 	int flag, mode;
    703  1.1  uch 	struct proc *p;
    704  1.1  uch {
    705  1.1  uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
    706  1.3  uch 	struct txcom_chip *chip;
    707  1.3  uch 	struct tty *tp;
    708  1.3  uch 	int s, err;
    709  1.1  uch 
    710  1.3  uch 	if (!sc)
    711  1.3  uch 		return ENXIO;
    712  1.3  uch 
    713  1.3  uch 	chip = sc->sc_chip;
    714  1.3  uch 	tp = sc->sc_tty;
    715  1.3  uch 
    716  1.3  uch 	if (ISSET(tp->t_state, TS_ISOPEN) &&
    717  1.3  uch 	    ISSET(tp->t_state, TS_XCLUDE) &&
    718  1.3  uch 	    p->p_ucred->cr_uid != 0)
    719  1.3  uch 		return (EBUSY);
    720  1.3  uch 
    721  1.3  uch 	s = spltty();
    722  1.3  uch 
    723  1.5  uch 	if (txcom_enable(sc->sc_chip))
    724  1.5  uch 		goto out;
    725  1.3  uch 
    726  1.5  uch 	/*
    727  1.5  uch 	 * Do the following iff this is a first open.
    728  1.5  uch 	 */
    729  1.5  uch 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    730  1.5  uch 		struct termios t;
    731  1.5  uch 
    732  1.5  uch 		tp->t_dev = dev;
    733  1.1  uch 
    734  1.5  uch 		t.c_ispeed = 0;
    735  1.5  uch 		if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
    736  1.5  uch 			t.c_ospeed = chip->sc_speed;
    737  1.5  uch 			t.c_cflag = chip->sc_cflag;
    738  1.5  uch 		} else {
    739  1.5  uch 			t.c_ospeed = TTYDEF_SPEED;
    740  1.5  uch 			t.c_cflag = TTYDEF_CFLAG;
    741  1.5  uch 		}
    742  1.3  uch 
    743  1.5  uch 		if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL))
    744  1.5  uch 			SET(t.c_cflag, CLOCAL);
    745  1.5  uch 		if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS))
    746  1.5  uch 			SET(t.c_cflag, CRTSCTS);
    747  1.5  uch 		if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF))
    748  1.5  uch 			SET(t.c_cflag, MDMBUF);
    749  1.5  uch 
    750  1.5  uch 		/* Make sure txcomparam() will do something. */
    751  1.5  uch 		tp->t_ospeed = 0;
    752  1.5  uch 		txcomparam(tp, &t);
    753  1.5  uch 
    754  1.5  uch 		tp->t_iflag = TTYDEF_IFLAG;
    755  1.5  uch 		tp->t_oflag = TTYDEF_OFLAG;
    756  1.5  uch 		tp->t_lflag = TTYDEF_LFLAG;
    757  1.1  uch 
    758  1.5  uch 		ttychars(tp);
    759  1.5  uch 		ttsetwater(tp);
    760  1.3  uch 
    761  1.5  uch 		/*
    762  1.5  uch 		 * Turn on DTR.  We must always do this, even if carrier is not
    763  1.5  uch 		 * present, because otherwise we'd have to use TIOCSDTR
    764  1.5  uch 		 * immediately after setting CLOCAL, which applications do not
    765  1.5  uch 		 * expect.  We always assert DTR while the device is open
    766  1.5  uch 		 * unless explicitly requested to deassert it.
    767  1.5  uch 		 */
    768  1.5  uch 		txcom_modem(sc, 1);
    769  1.3  uch 
    770  1.5  uch 		/* Clear the input ring, and unblock. */
    771  1.5  uch 		sc->sc_rbget = sc->sc_rbput = 0;
    772  1.5  uch 	}
    773  1.3  uch 
    774  1.3  uch 	splx(s);
    775  1.3  uch 
    776  1.1  uch 	if ((err = ttyopen(tp, minor(dev), ISSET(flag, O_NONBLOCK)))) {
    777  1.1  uch 		DPRINTF(("txcomopen: ttyopen failed\n"));
    778  1.3  uch 		goto out;
    779  1.1  uch 	}
    780  1.1  uch 	if ((err = (*linesw[tp->t_line].l_open)(dev, tp))) {
    781  1.1  uch 		DPRINTF(("txcomopen: line dicipline open failed\n"));
    782  1.3  uch 		goto out;
    783  1.3  uch 	}
    784  1.3  uch 
    785  1.3  uch 	return err;
    786  1.3  uch 
    787  1.3  uch  out:
    788  1.3  uch 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    789  1.3  uch 		/*
    790  1.3  uch 		 * We failed to open the device, and nobody else had it opened.
    791  1.3  uch 		 * Clean up the state as appropriate.
    792  1.3  uch 		 */
    793  1.3  uch 		txcom_shutdown(sc);
    794  1.1  uch 	}
    795  1.1  uch 
    796  1.1  uch 	return err;
    797  1.3  uch 
    798  1.1  uch }
    799  1.1  uch 
    800  1.1  uch int
    801  1.1  uch txcomclose(dev, flag, mode, p)
    802  1.1  uch 	dev_t dev;
    803  1.1  uch 	int flag, mode;
    804  1.1  uch 	struct proc *p;
    805  1.1  uch {
    806  1.1  uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
    807  1.1  uch 	struct tty *tp = sc->sc_tty;
    808  1.1  uch 
    809  1.3  uch 	/* XXX This is for cons.c. */
    810  1.3  uch 	if (!ISSET(tp->t_state, TS_ISOPEN))
    811  1.3  uch 		return 0;
    812  1.3  uch 
    813  1.1  uch 	(*linesw[tp->t_line].l_close)(tp, flag);
    814  1.1  uch 	ttyclose(tp);
    815  1.1  uch 
    816  1.3  uch 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    817  1.3  uch 		/*
    818  1.3  uch 		 * Although we got a last close, the device may still be in
    819  1.3  uch 		 * use; e.g. if this was the dialout node, and there are still
    820  1.3  uch 		 * processes waiting for carrier on the non-dialout node.
    821  1.3  uch 		 */
    822  1.3  uch 		txcom_shutdown(sc);
    823  1.3  uch 	}
    824  1.3  uch 
    825  1.1  uch 	return 0;
    826  1.1  uch }
    827  1.1  uch 
    828  1.1  uch int
    829  1.1  uch txcomread(dev, uio, flag)
    830  1.1  uch 	dev_t dev;
    831  1.1  uch 	struct uio *uio;
    832  1.1  uch 	int flag;
    833  1.1  uch {
    834  1.1  uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
    835  1.1  uch 	struct tty *tp = sc->sc_tty;
    836  1.3  uch 
    837  1.1  uch 	return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
    838  1.1  uch }
    839  1.1  uch 
    840  1.1  uch int
    841  1.1  uch txcomwrite(dev, uio, flag)
    842  1.1  uch 	dev_t dev;
    843  1.1  uch 	struct uio *uio;
    844  1.1  uch 	int flag;
    845  1.1  uch {
    846  1.1  uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
    847  1.1  uch 	struct tty *tp = sc->sc_tty;
    848  1.1  uch 
    849  1.1  uch 	return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
    850  1.1  uch }
    851  1.1  uch 
    852  1.1  uch struct tty *
    853  1.1  uch txcomtty(dev)
    854  1.1  uch 	dev_t dev;
    855  1.1  uch {
    856  1.1  uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
    857  1.3  uch 
    858  1.3  uch 	return sc->sc_tty;
    859  1.1  uch }
    860  1.1  uch 
    861  1.1  uch int
    862  1.1  uch txcomioctl(dev, cmd, data, flag, p)
    863  1.1  uch 	dev_t dev;
    864  1.1  uch 	u_long cmd;
    865  1.1  uch 	caddr_t data;
    866  1.1  uch 	int flag;
    867  1.1  uch 	struct proc *p;
    868  1.1  uch {
    869  1.1  uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
    870  1.1  uch 	struct tty *tp = sc->sc_tty;
    871  1.3  uch 	int s, err;
    872  1.3  uch 
    873  1.3  uch 	err = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
    874  1.3  uch 	if (err >= 0) {
    875  1.3  uch 		return err;
    876  1.3  uch 	}
    877  1.3  uch 
    878  1.3  uch 	err = ttioctl(tp, cmd, data, flag, p);
    879  1.3  uch 	if (err >= 0) {
    880  1.3  uch 		return err;
    881  1.3  uch 	}
    882  1.3  uch 
    883  1.3  uch 	err = 0;
    884  1.3  uch 
    885  1.3  uch 	s = spltty();
    886  1.3  uch 
    887  1.3  uch 	switch (cmd) {
    888  1.5  uch 	default:
    889  1.5  uch 		err = ENOTTY;
    890  1.5  uch 		break;
    891  1.5  uch 
    892  1.3  uch 	case TIOCSBRK:
    893  1.3  uch 		txcom_break(sc, 1);
    894  1.3  uch 		break;
    895  1.3  uch 
    896  1.3  uch 	case TIOCCBRK:
    897  1.3  uch 		txcom_break(sc, 0);
    898  1.3  uch 		break;
    899  1.3  uch 
    900  1.3  uch 	case TIOCSDTR:
    901  1.3  uch 		txcom_modem(sc, 1);
    902  1.3  uch 		break;
    903  1.3  uch 
    904  1.3  uch 	case TIOCCDTR:
    905  1.3  uch 		txcom_modem(sc, 0);
    906  1.3  uch 		break;
    907  1.3  uch 
    908  1.3  uch 	case TIOCGFLAGS:
    909  1.3  uch 		*(int *)data = sc->sc_chip->sc_swflags;
    910  1.3  uch 		break;
    911  1.3  uch 
    912  1.3  uch 	case TIOCSFLAGS:
    913  1.3  uch 		err = suser(p->p_ucred, &p->p_acflag);
    914  1.3  uch 		if (err) {
    915  1.3  uch 			break;
    916  1.3  uch 		}
    917  1.3  uch 		sc->sc_chip->sc_swflags = *(int *)data;
    918  1.3  uch 		break;
    919  1.3  uch 
    920  1.3  uch 	}
    921  1.1  uch 
    922  1.3  uch 	splx(s);
    923  1.1  uch 
    924  1.3  uch 	return err;
    925  1.1  uch }
    926  1.1  uch 
    927  1.1  uch void
    928  1.1  uch txcomstop(tp, flag)
    929  1.1  uch 	struct tty *tp;
    930  1.1  uch 	int flag;
    931  1.1  uch {
    932  1.1  uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
    933  1.1  uch 	int s;
    934  1.1  uch 
    935  1.1  uch 	s = spltty();
    936  1.1  uch 
    937  1.1  uch 	if (ISSET(tp->t_state, TS_BUSY)) {
    938  1.1  uch 		/* Stop transmitting at the next chunk. */
    939  1.1  uch 		sc->sc_tbc = 0;
    940  1.1  uch 		sc->sc_heldtbc = 0;
    941  1.1  uch 		if (!ISSET(tp->t_state, TS_TTSTOP))
    942  1.1  uch 			SET(tp->t_state, TS_FLUSH);
    943  1.1  uch 	}
    944  1.3  uch 
    945  1.1  uch 	splx(s);
    946  1.1  uch }
    947  1.1  uch 
    948  1.1  uch void
    949  1.1  uch txcomstart(tp)
    950  1.1  uch 	struct tty *tp;
    951  1.1  uch {
    952  1.1  uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
    953  1.3  uch 	struct txcom_chip *chip = sc->sc_chip;
    954  1.3  uch 	tx_chipset_tag_t tc = chip->sc_tc;
    955  1.3  uch 	int slot = chip->sc_slot;
    956  1.1  uch 	int s;
    957  1.1  uch 
    958  1.1  uch 	s = spltty();
    959  1.3  uch 
    960  1.3  uch 	if (!__txcom_txbufready(chip, 0) ||
    961  1.3  uch 	    ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
    962  1.3  uch 		goto out;
    963  1.1  uch 
    964  1.1  uch 	if (tp->t_outq.c_cc <= tp->t_lowat) {
    965  1.1  uch 		if (ISSET(tp->t_state, TS_ASLEEP)) {
    966  1.1  uch 			CLR(tp->t_state, TS_ASLEEP);
    967  1.1  uch 			wakeup(&tp->t_outq);
    968  1.1  uch 		}
    969  1.1  uch 		selwakeup(&tp->t_wsel);
    970  1.1  uch 		if (tp->t_outq.c_cc == 0)
    971  1.3  uch 			goto out;
    972  1.1  uch 	}
    973  1.3  uch 
    974  1.1  uch 	sc->sc_tba = tp->t_outq.c_cf;
    975  1.1  uch 	sc->sc_tbc = ndqb(&tp->t_outq, 0);
    976  1.3  uch 	SET(tp->t_state, TS_BUSY);
    977  1.3  uch 
    978  1.3  uch 	/* Output the first character of the contiguous buffer. */
    979  1.3  uch 	tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot),
    980  1.3  uch 		      (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK));
    981  1.3  uch 
    982  1.3  uch 	sc->sc_tbc--;
    983  1.3  uch 	sc->sc_tba++;
    984  1.1  uch 
    985  1.3  uch  out:
    986  1.1  uch 	splx(s);
    987  1.1  uch }
    988  1.1  uch 
    989  1.3  uch /*
    990  1.3  uch  * Set TXcom tty parameters from termios.
    991  1.3  uch  */
    992  1.1  uch int
    993  1.1  uch txcomparam(tp, t)
    994  1.1  uch 	struct tty *tp;
    995  1.1  uch 	struct termios *t;
    996  1.1  uch {
    997  1.3  uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
    998  1.3  uch 	struct txcom_chip *chip;
    999  1.5  uch 	int ospeed;
   1000  1.3  uch 	int s;
   1001  1.3  uch 
   1002  1.3  uch 	if (!sc)
   1003  1.3  uch 		return ENXIO;
   1004  1.3  uch 
   1005  1.3  uch 	ospeed = t->c_ospeed;
   1006  1.3  uch 
   1007  1.3  uch 	/* Check requested parameters. */
   1008  1.3  uch 	if (ospeed < 0) {
   1009  1.3  uch 		return EINVAL;
   1010  1.3  uch 	}
   1011  1.3  uch 	if (t->c_ispeed && t->c_ispeed != ospeed) {
   1012  1.3  uch 		return EINVAL;
   1013  1.3  uch 	}
   1014  1.3  uch 
   1015  1.3  uch 	s = spltty();
   1016  1.3  uch 	chip = sc->sc_chip;
   1017  1.3  uch 	/*
   1018  1.3  uch 	 * For the console, always force CLOCAL and !HUPCL, so that the port
   1019  1.3  uch 	 * is always active.
   1020  1.3  uch 	 */
   1021  1.3  uch 	if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) ||
   1022  1.3  uch 	    ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
   1023  1.5  uch 		SET(t->c_cflag, CLOCAL);
   1024  1.5  uch 		CLR(t->c_cflag, HUPCL);
   1025  1.3  uch 	}
   1026  1.3  uch 	splx(s);
   1027  1.3  uch 
   1028  1.3  uch 	/*
   1029  1.3  uch 	 * Only whack the UART when params change.
   1030  1.3  uch 	 * Some callers need to clear tp->t_ospeed
   1031  1.3  uch 	 * to make sure initialization gets done.
   1032  1.3  uch 	 */
   1033  1.5  uch 	if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) {
   1034  1.3  uch 		return 0;
   1035  1.3  uch 	}
   1036  1.3  uch 
   1037  1.3  uch 	s = spltty();
   1038  1.3  uch 	chip = sc->sc_chip;
   1039  1.3  uch 	chip->sc_speed = ospeed;
   1040  1.5  uch 	chip->sc_cflag = t->c_cflag;
   1041  1.3  uch 
   1042  1.3  uch 	txcom_setmode(chip);
   1043  1.3  uch 	txcom_setbaudrate(chip);
   1044  1.3  uch 
   1045  1.3  uch 	/* And copy to tty. */
   1046  1.3  uch 	tp->t_ispeed = 0;
   1047  1.3  uch 	tp->t_ospeed = chip->sc_speed;
   1048  1.3  uch 	tp->t_cflag = chip->sc_cflag;
   1049  1.3  uch 
   1050  1.3  uch 	/*
   1051  1.3  uch 	 * If hardware flow control is disabled, unblock any hard flow
   1052  1.3  uch 	 * control state.
   1053  1.3  uch 	 */
   1054  1.3  uch 	if (!ISSET(chip->sc_cflag, CHWFLOW)) {
   1055  1.3  uch 		txcomstart(tp);
   1056  1.3  uch 	}
   1057  1.3  uch 
   1058  1.3  uch 	splx(s);
   1059  1.3  uch 
   1060  1.1  uch 	return 0;
   1061  1.1  uch }
   1062