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txcom.c revision 1.7
      1  1.7  thorpej /*	$NetBSD: txcom.c,v 1.7 2000/03/06 21:36:07 thorpej Exp $ */
      2  1.1      uch 
      3  1.1      uch /*
      4  1.5      uch  * Copyright (c) 1999, 2000, by UCHIYAMA Yasushi
      5  1.1      uch  * All rights reserved.
      6  1.1      uch  *
      7  1.1      uch  * Redistribution and use in source and binary forms, with or without
      8  1.1      uch  * modification, are permitted provided that the following conditions
      9  1.1      uch  * are met:
     10  1.1      uch  * 1. Redistributions of source code must retain the above copyright
     11  1.1      uch  *    notice, this list of conditions and the following disclaimer.
     12  1.1      uch  * 2. The name of the developer may NOT be used to endorse or promote products
     13  1.1      uch  *    derived from this software without specific prior written permission.
     14  1.1      uch  *
     15  1.1      uch  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     16  1.1      uch  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     17  1.1      uch  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     18  1.1      uch  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     19  1.1      uch  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     20  1.1      uch  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     21  1.1      uch  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     22  1.1      uch  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     23  1.1      uch  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     24  1.1      uch  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     25  1.1      uch  * SUCH DAMAGE.
     26  1.1      uch  *
     27  1.1      uch  */
     28  1.1      uch #include "opt_tx39_debug.h"
     29  1.1      uch #include "opt_tx39uartdebug.h"
     30  1.1      uch 
     31  1.1      uch #include <sys/param.h>
     32  1.1      uch #include <sys/systm.h>
     33  1.3      uch #include <sys/kernel.h>
     34  1.1      uch #include <sys/device.h>
     35  1.3      uch #include <sys/malloc.h>
     36  1.1      uch 
     37  1.1      uch #include <sys/proc.h> /* tsleep/wakeup */
     38  1.1      uch 
     39  1.1      uch #include <sys/ioctl.h>
     40  1.1      uch #include <sys/select.h>
     41  1.1      uch #include <sys/file.h>
     42  1.1      uch 
     43  1.1      uch #include <sys/tty.h>
     44  1.1      uch #include <sys/conf.h>
     45  1.1      uch #include <dev/cons.h> /* consdev */
     46  1.1      uch 
     47  1.1      uch #include <machine/bus.h>
     48  1.1      uch 
     49  1.1      uch #include <hpcmips/tx/tx39var.h>
     50  1.1      uch #include <hpcmips/tx/tx39icureg.h>
     51  1.1      uch #include <hpcmips/tx/tx39uartvar.h>
     52  1.1      uch #include <hpcmips/tx/tx39uartreg.h>
     53  1.1      uch 
     54  1.5      uch #include <hpcmips/tx/tx39irvar.h>
     55  1.5      uch 
     56  1.1      uch #include <hpcmips/tx/tx39clockreg.h> /* XXX */
     57  1.1      uch 
     58  1.6      uch #include <hpcmips/tx/txiomanvar.h>
     59  1.6      uch 
     60  1.1      uch #define SET(t, f)	(t) |= (f)
     61  1.1      uch #define CLR(t, f)	(t) &= ~(f)
     62  1.1      uch #define ISSET(t, f)	((t) & (f))
     63  1.1      uch 
     64  1.1      uch #ifdef TX39UARTDEBUG
     65  1.1      uch #define	DPRINTF(arg) printf arg
     66  1.1      uch #else
     67  1.1      uch #define	DPRINTF(arg)
     68  1.1      uch #endif
     69  1.1      uch 
     70  1.3      uch #define TXCOM_HW_CONSOLE	0x40
     71  1.3      uch #define	TXCOM_RING_SIZE		256 /* must be a power of two! */
     72  1.3      uch #define TXCOM_RING_MASK		(TXCOM_RING_SIZE - 1)
     73  1.1      uch 
     74  1.3      uch struct txcom_chip {
     75  1.1      uch 	tx_chipset_tag_t sc_tc;
     76  1.1      uch 	int sc_slot;	/* UARTA or UARTB */
     77  1.1      uch 	int sc_cflag;
     78  1.1      uch 	int sc_speed;
     79  1.3      uch 	int sc_swflags;
     80  1.1      uch 	int sc_hwflags;
     81  1.6      uch 
     82  1.6      uch 	int sc_dcd;
     83  1.3      uch };
     84  1.1      uch 
     85  1.3      uch struct txcom_softc {
     86  1.3      uch 	struct	device		sc_dev;
     87  1.3      uch 	struct tty		*sc_tty;
     88  1.3      uch 	struct txcom_chip	*sc_chip;
     89  1.3      uch 
     90  1.3      uch  	u_int8_t	*sc_tba;	/* transmit buffer address */
     91  1.3      uch  	int		sc_tbc;		/* transmit byte count */
     92  1.3      uch 	int		sc_heldtbc;
     93  1.3      uch 	u_int8_t	*sc_rbuf;	/* receive buffer address */
     94  1.3      uch 	int		sc_rbput;	/* receive byte count */
     95  1.3      uch 	int		sc_rbget;
     96  1.1      uch };
     97  1.1      uch 
     98  1.1      uch extern struct cfdriver txcom_cd;
     99  1.1      uch 
    100  1.1      uch int	txcom_match	__P((struct device*, struct cfdata*, void*));
    101  1.1      uch void	txcom_attach	__P((struct device*, struct device*, void*));
    102  1.5      uch int	txcom_print	__P((void*, const char*));
    103  1.3      uch 
    104  1.3      uch int	txcom_txintr		__P((void*));
    105  1.3      uch int	txcom_rxintr		__P((void*));
    106  1.3      uch int	txcom_frameerr_intr	__P((void*));
    107  1.3      uch int	txcom_parityerr_intr	__P((void*));
    108  1.3      uch int	txcom_break_intr	__P((void*));
    109  1.3      uch 
    110  1.1      uch void	txcom_rxsoft	__P((void*));
    111  1.3      uch void	txcom_txsoft	__P((void*));
    112  1.3      uch 
    113  1.6      uch int	txcom_stsoft	__P((void*));
    114  1.6      uch int	txcom_stsoft2	__P((void*));
    115  1.6      uch int	txcom_stsoft3	__P((void*));
    116  1.6      uch int	txcom_stsoft4	__P((void*));
    117  1.6      uch 
    118  1.6      uch 
    119  1.3      uch void	txcom_shutdown	__P((struct txcom_softc*));
    120  1.3      uch void	txcom_break	__P((struct txcom_softc*, int));
    121  1.3      uch void	txcom_modem	__P((struct txcom_softc*, int));
    122  1.3      uch void	txcomstart	__P((struct tty*));
    123  1.3      uch int	txcomparam	__P((struct tty*, struct termios*));
    124  1.3      uch 
    125  1.6      uch void	txcom_reset		__P((struct txcom_chip*));
    126  1.3      uch int	txcom_enable		__P((struct txcom_chip*));
    127  1.3      uch void	txcom_disable		__P((struct txcom_chip*));
    128  1.3      uch void	txcom_setmode		__P((struct txcom_chip*));
    129  1.3      uch void	txcom_setbaudrate	__P((struct txcom_chip*));
    130  1.1      uch int	txcom_cngetc		__P((dev_t));
    131  1.1      uch void	txcom_cnputc		__P((dev_t, int));
    132  1.3      uch void	txcom_cnpollc		__P((dev_t, int));
    133  1.3      uch 
    134  1.3      uch __inline int	__txcom_txbufready __P((struct txcom_chip*, int));
    135  1.3      uch __inline const char *__txcom_slotname __P((int));
    136  1.1      uch 
    137  1.6      uch void	txcom_dump	__P((struct txcom_chip*));
    138  1.6      uch 
    139  1.1      uch cdev_decl(txcom);
    140  1.1      uch 
    141  1.3      uch struct consdev txcomcons = {
    142  1.3      uch 	NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc,
    143  1.7  thorpej 	    NULL, NODEV, CN_NORMAL
    144  1.3      uch };
    145  1.3      uch 
    146  1.1      uch /* Serial console */
    147  1.3      uch struct txcom_chip txcom_chip;
    148  1.1      uch 
    149  1.1      uch struct cfattach txcom_ca = {
    150  1.1      uch 	sizeof(struct txcom_softc), txcom_match, txcom_attach
    151  1.1      uch };
    152  1.1      uch 
    153  1.1      uch int
    154  1.1      uch txcom_match(parent, cf, aux)
    155  1.1      uch 	struct device *parent;
    156  1.1      uch 	struct cfdata *cf;
    157  1.1      uch 	void *aux;
    158  1.1      uch {
    159  1.1      uch 	/* if the autoconfiguration got this far, there's a slot here */
    160  1.1      uch 	return 1;
    161  1.1      uch }
    162  1.1      uch 
    163  1.1      uch void
    164  1.1      uch txcom_attach(parent, self, aux)
    165  1.1      uch 	struct device *parent;
    166  1.1      uch 	struct device *self;
    167  1.1      uch 	void *aux;
    168  1.1      uch {
    169  1.1      uch 	struct tx39uart_attach_args *ua = aux;
    170  1.1      uch 	struct txcom_softc *sc = (void*)self;
    171  1.1      uch 	tx_chipset_tag_t tc;
    172  1.1      uch 	struct tty *tp;
    173  1.3      uch 	struct txcom_chip *chip;
    174  1.6      uch 	int slot, console;
    175  1.1      uch 
    176  1.1      uch 	/* Check this slot used as serial console */
    177  1.6      uch 	console = (ua->ua_slot == txcom_chip.sc_slot) &&
    178  1.6      uch 		(txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE);
    179  1.6      uch 
    180  1.6      uch 	if (console) {
    181  1.3      uch 		sc->sc_chip = &txcom_chip;
    182  1.3      uch 	} else {
    183  1.3      uch 		if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip),
    184  1.3      uch 					   M_DEVBUF, M_WAITOK))) {
    185  1.3      uch 			printf(": can't allocate chip\n");
    186  1.3      uch 			return;
    187  1.3      uch 		}
    188  1.3      uch 		memset(sc->sc_chip, 0, sizeof(struct txcom_chip));
    189  1.1      uch 	}
    190  1.1      uch 
    191  1.3      uch 	chip = sc->sc_chip;
    192  1.3      uch 	tc = chip->sc_tc = ua->ua_tc;
    193  1.3      uch 	slot = chip->sc_slot = ua->ua_slot;
    194  1.3      uch 
    195  1.6      uch #ifdef TX39UARTDEBUG
    196  1.6      uch 	txcom_dump(chip);
    197  1.6      uch #endif
    198  1.6      uch 	if (!console)
    199  1.6      uch 		txcom_reset(chip);
    200  1.6      uch 
    201  1.3      uch 	if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) {
    202  1.3      uch 		printf(": can't allocate buffer.\n");
    203  1.3      uch 		return;
    204  1.3      uch 	}
    205  1.3      uch 	memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE);
    206  1.1      uch 
    207  1.1      uch 	tp = ttymalloc();
    208  1.1      uch 	tp->t_oproc = txcomstart;
    209  1.1      uch 	tp->t_param = txcomparam;
    210  1.1      uch 	tp->t_hwiflow = NULL;
    211  1.1      uch 	sc->sc_tty = tp;
    212  1.1      uch 	tty_attach(tp);
    213  1.1      uch 
    214  1.3      uch 	if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
    215  1.1      uch 		int maj;
    216  1.1      uch 		/* locate the major number */
    217  1.1      uch 		for (maj = 0; maj < nchrdev; maj++)
    218  1.1      uch 			if (cdevsw[maj].d_open == txcomopen)
    219  1.1      uch 				break;
    220  1.1      uch 
    221  1.1      uch 		cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit);
    222  1.1      uch 
    223  1.3      uch 		printf(": console");
    224  1.1      uch 	}
    225  1.1      uch 
    226  1.3      uch 	printf("\n");
    227  1.1      uch 
    228  1.1      uch 	/*
    229  1.1      uch 	 * Enable interrupt
    230  1.1      uch 	 */
    231  1.3      uch #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s))
    232  1.3      uch 
    233  1.3      uch 	tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY,
    234  1.3      uch 			  txcom_rxintr, sc);
    235  1.3      uch 	tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY,
    236  1.3      uch 			  txcom_txintr, sc);
    237  1.3      uch 	tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY,
    238  1.4      uch 			  txcom_rxintr, sc);
    239  1.3      uch 	tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY,
    240  1.4      uch 			  txcom_txintr, sc);
    241  1.3      uch 	tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY,
    242  1.3      uch 			  txcom_frameerr_intr, sc);
    243  1.3      uch 	tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY,
    244  1.3      uch 			  txcom_parityerr_intr, sc);
    245  1.3      uch 	tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY,
    246  1.3      uch 			  txcom_break_intr, sc);
    247  1.5      uch 
    248  1.6      uch 	if (ua->ua_slot == 0)
    249  1.6      uch 		txioman_uarta_init(tc, self);
    250  1.6      uch 
    251  1.5      uch 	/*
    252  1.5      uch 	 * UARTB can connect IR module
    253  1.5      uch 	 */
    254  1.5      uch 	if (ua->ua_slot == 1) {
    255  1.5      uch 		struct txcom_attach_args tca;
    256  1.5      uch 		tca.tca_tc = tc;
    257  1.5      uch 		tca.tca_parent = self;
    258  1.5      uch 		config_found(self, &tca, txcom_print);
    259  1.5      uch 	}
    260  1.5      uch }
    261  1.5      uch 
    262  1.5      uch int
    263  1.5      uch txcom_print(aux, pnp)
    264  1.5      uch 	void *aux;
    265  1.5      uch 	const char *pnp;
    266  1.5      uch {
    267  1.5      uch 	return pnp ? QUIET : UNCONF;
    268  1.1      uch }
    269  1.1      uch 
    270  1.6      uch void
    271  1.6      uch txcom_reset(chip)
    272  1.6      uch 	struct txcom_chip *chip;
    273  1.6      uch {
    274  1.6      uch 	tx_chipset_tag_t tc;
    275  1.6      uch 	int slot, ofs;
    276  1.6      uch 	txreg_t reg;
    277  1.6      uch 
    278  1.6      uch 	tc = chip->sc_tc;
    279  1.6      uch 	slot = chip->sc_slot;
    280  1.6      uch 	ofs = TX39_UARTCTRL1_REG(slot);
    281  1.6      uch 
    282  1.6      uch 	/* Supply clock */
    283  1.6      uch 	reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
    284  1.6      uch 	reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
    285  1.6      uch 	tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
    286  1.6      uch 
    287  1.6      uch 	/* reset UART module */
    288  1.6      uch 	tx_conf_write(tc, ofs, 0);
    289  1.6      uch }
    290  1.6      uch 
    291  1.1      uch int
    292  1.3      uch txcom_enable(chip)
    293  1.3      uch 	struct txcom_chip *chip;
    294  1.1      uch {
    295  1.1      uch 	tx_chipset_tag_t tc;
    296  1.1      uch 	txreg_t reg;
    297  1.3      uch 	int slot, ofs, timeout;
    298  1.1      uch 
    299  1.3      uch 	tc = chip->sc_tc;
    300  1.3      uch 	slot = chip->sc_slot;
    301  1.3      uch 	ofs = TX39_UARTCTRL1_REG(slot);
    302  1.1      uch 
    303  1.6      uch 	/* Supply clock */
    304  1.5      uch 	reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
    305  1.5      uch 	reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
    306  1.5      uch 	tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
    307  1.5      uch 
    308  1.6      uch 	/*
    309  1.6      uch 	 * XXX Disable DMA (DMA not coded yet)
    310  1.6      uch 	 */
    311  1.6      uch 	reg = tx_conf_read(tc, ofs);
    312  1.6      uch 	reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
    313  1.6      uch 	tx_conf_write(tc, ofs, reg);
    314  1.6      uch 
    315  1.6      uch 	/* enable */
    316  1.3      uch 	reg = tx_conf_read(tc, ofs);
    317  1.1      uch 	reg |= TX39_UARTCTRL1_ENUART;
    318  1.1      uch 	reg &= ~TX39_UARTCTRL1_ENBREAHALT;
    319  1.3      uch 	tx_conf_write(tc, ofs, reg);
    320  1.3      uch 
    321  1.3      uch 	timeout = 100;
    322  1.3      uch 
    323  1.3      uch 	while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) &&
    324  1.3      uch 	      --timeout > 0)
    325  1.3      uch 		;
    326  1.3      uch 
    327  1.5      uch 	if (timeout == 0 && !cold) {
    328  1.6      uch 		printf("%s never power up\n", __txcom_slotname(slot));
    329  1.3      uch 		return 1;
    330  1.3      uch 	}
    331  1.3      uch 
    332  1.1      uch 	return 0;
    333  1.1      uch }
    334  1.1      uch 
    335  1.1      uch void
    336  1.3      uch txcom_disable(chip)
    337  1.3      uch 	struct txcom_chip *chip;
    338  1.1      uch {
    339  1.1      uch 	tx_chipset_tag_t tc;
    340  1.1      uch 	txreg_t reg;
    341  1.1      uch 	int slot;
    342  1.1      uch 
    343  1.3      uch 	tc = chip->sc_tc;
    344  1.3      uch 	slot = chip->sc_slot;
    345  1.1      uch 
    346  1.1      uch 	reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
    347  1.1      uch 	/* DMA */
    348  1.1      uch 	reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
    349  1.3      uch 
    350  1.6      uch 	/* disable module */
    351  1.1      uch 	reg &= ~TX39_UARTCTRL1_ENUART;
    352  1.1      uch 	tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
    353  1.3      uch 
    354  1.1      uch 	/* Clock */
    355  1.1      uch 	reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
    356  1.1      uch 	reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
    357  1.1      uch 	tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
    358  1.1      uch 
    359  1.1      uch }
    360  1.1      uch 
    361  1.3      uch __inline int
    362  1.3      uch __txcom_txbufready(chip, retry)
    363  1.3      uch 	struct txcom_chip *chip;
    364  1.3      uch 	int retry;
    365  1.3      uch {
    366  1.3      uch 	tx_chipset_tag_t tc = chip->sc_tc;
    367  1.3      uch 	int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
    368  1.3      uch 
    369  1.3      uch 	do {
    370  1.3      uch 		if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY)
    371  1.3      uch 			return 1;
    372  1.3      uch 	} while(--retry != 0);
    373  1.3      uch 
    374  1.1      uch 	return 0;
    375  1.1      uch }
    376  1.1      uch 
    377  1.5      uch void
    378  1.5      uch txcom_pulse_mode(dev)
    379  1.5      uch 	struct device *dev;
    380  1.5      uch {
    381  1.5      uch 	struct txcom_softc *sc = (void*)dev;
    382  1.5      uch 	struct txcom_chip *chip = sc->sc_chip;
    383  1.5      uch 	tx_chipset_tag_t tc = chip->sc_tc;
    384  1.5      uch 	int ofs;
    385  1.5      uch 	txreg_t reg;
    386  1.5      uch 
    387  1.5      uch 	ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
    388  1.5      uch 
    389  1.5      uch 	reg = tx_conf_read(tc, ofs);
    390  1.6      uch 	/* WindowsCE use this setting */
    391  1.6      uch 	reg |= TX39_UARTCTRL1_PULSEOPT1;
    392  1.6      uch 	reg &= ~TX39_UARTCTRL1_PULSEOPT2;
    393  1.6      uch 	reg |= TX39_UARTCTRL1_DTINVERT;
    394  1.6      uch 
    395  1.5      uch 	tx_conf_write(tc, ofs, reg);
    396  1.5      uch }
    397  1.5      uch 
    398  1.3      uch /*
    399  1.3      uch  * console
    400  1.3      uch  */
    401  1.1      uch int
    402  1.1      uch txcom_cngetc(dev)
    403  1.1      uch 	dev_t dev;
    404  1.1      uch {
    405  1.1      uch 	tx_chipset_tag_t tc;
    406  1.2      uch 	int ofs, c, s;
    407  1.2      uch 
    408  1.3      uch 	s = spltty();
    409  1.2      uch 
    410  1.3      uch 	tc = txcom_chip.sc_tc;
    411  1.3      uch 	ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot);
    412  1.1      uch 
    413  1.1      uch 	while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs)))
    414  1.1      uch 		;
    415  1.2      uch 
    416  1.3      uch 	c = TX39_UARTRXHOLD_RXDATA(
    417  1.3      uch 		tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot)));
    418  1.2      uch 
    419  1.3      uch 	if (c == '\r')
    420  1.1      uch 		c = '\n';
    421  1.1      uch 
    422  1.2      uch 	splx(s);
    423  1.2      uch 
    424  1.1      uch 	return c;
    425  1.1      uch }
    426  1.1      uch 
    427  1.1      uch void
    428  1.1      uch txcom_cnputc(dev, c)
    429  1.1      uch 	dev_t dev;
    430  1.1      uch 	int c;
    431  1.1      uch {
    432  1.3      uch 	struct txcom_chip *chip = &txcom_chip;
    433  1.3      uch 	tx_chipset_tag_t tc = chip->sc_tc;
    434  1.3      uch 	int s;
    435  1.2      uch 
    436  1.3      uch 	s = spltty();
    437  1.1      uch 
    438  1.3      uch 	/* Wait for transmitter to empty */
    439  1.3      uch 	__txcom_txbufready(chip, -1);
    440  1.1      uch 
    441  1.3      uch 	tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
    442  1.1      uch 		      (c & TX39_UARTTXHOLD_TXDATA_MASK));
    443  1.1      uch 
    444  1.3      uch 	__txcom_txbufready(chip, -1);
    445  1.3      uch 
    446  1.2      uch 	splx(s);
    447  1.1      uch }
    448  1.1      uch 
    449  1.1      uch void
    450  1.1      uch txcom_cnpollc(dev, on)
    451  1.1      uch 	dev_t dev;
    452  1.1      uch 	int on;
    453  1.1      uch {
    454  1.1      uch }
    455  1.1      uch 
    456  1.1      uch void
    457  1.3      uch txcom_setmode(chip)
    458  1.3      uch 	struct txcom_chip *chip;
    459  1.1      uch {
    460  1.3      uch 	tcflag_t cflag = chip->sc_cflag;
    461  1.3      uch 	int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
    462  1.1      uch 	txreg_t reg;
    463  1.1      uch 
    464  1.3      uch 	reg = tx_conf_read(chip->sc_tc, ofs);
    465  1.6      uch 	reg &= ~TX39_UARTCTRL1_ENUART;
    466  1.6      uch 	tx_conf_write(chip->sc_tc, ofs, reg);
    467  1.6      uch 
    468  1.1      uch 	switch (ISSET(cflag, CSIZE)) {
    469  1.1      uch 	default:
    470  1.1      uch 		printf("txcom_setmode: CS7, CS8 only. use CS7");
    471  1.1      uch 		/* FALL THROUGH */
    472  1.1      uch 	case CS7:
    473  1.1      uch 		reg |= TX39_UARTCTRL1_BIT7;
    474  1.1      uch 		break;
    475  1.1      uch 	case CS8:
    476  1.1      uch 		reg &= ~TX39_UARTCTRL1_BIT7;
    477  1.1      uch 		break;
    478  1.1      uch 	}
    479  1.3      uch 
    480  1.1      uch 	if (ISSET(cflag, PARENB)) {
    481  1.1      uch 		reg |= TX39_UARTCTRL1_ENPARITY;
    482  1.1      uch 		if (ISSET(cflag, PARODD)) {
    483  1.1      uch 			reg &= ~TX39_UARTCTRL1_EVENPARITY;
    484  1.1      uch 		} else {
    485  1.1      uch 			reg |= TX39_UARTCTRL1_EVENPARITY;
    486  1.1      uch 		}
    487  1.1      uch 	} else {
    488  1.1      uch 		reg &= ~TX39_UARTCTRL1_ENPARITY;
    489  1.1      uch 	}
    490  1.3      uch 
    491  1.6      uch 	if (ISSET(cflag, CSTOPB))
    492  1.1      uch 		reg |= TX39_UARTCTRL1_TWOSTOP;
    493  1.6      uch 	else
    494  1.6      uch 		reg &= ~TX39_UARTCTRL1_TWOSTOP;
    495  1.6      uch 
    496  1.6      uch 	reg |= TX39_UARTCTRL1_ENUART;
    497  1.3      uch 	tx_conf_write(chip->sc_tc, ofs, reg);
    498  1.3      uch }
    499  1.3      uch 
    500  1.3      uch void
    501  1.3      uch txcom_setbaudrate(chip)
    502  1.3      uch 	struct txcom_chip *chip;
    503  1.3      uch {
    504  1.3      uch 	int baudrate;
    505  1.6      uch 	int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
    506  1.6      uch 	txreg_t reg, reg1;
    507  1.3      uch 
    508  1.3      uch 	if (chip->sc_speed == 0)
    509  1.3      uch 		return;
    510  1.3      uch 
    511  1.5      uch 	if (!cold)
    512  1.5      uch 		DPRINTF(("txcom_setbaudrate: %d\n", chip->sc_speed));
    513  1.5      uch 
    514  1.6      uch 	reg1 = tx_conf_read(chip->sc_tc, ofs);
    515  1.6      uch 	reg1 &= ~TX39_UARTCTRL1_ENUART;
    516  1.6      uch 	tx_conf_write(chip->sc_tc, ofs, reg1);
    517  1.6      uch 
    518  1.3      uch 	baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1;
    519  1.3      uch 	reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate);
    520  1.3      uch 
    521  1.3      uch 	tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg);
    522  1.6      uch 
    523  1.6      uch 	reg1 |= TX39_UARTCTRL1_ENUART;
    524  1.6      uch 	tx_conf_write(chip->sc_tc, ofs, reg1);
    525  1.3      uch }
    526  1.3      uch 
    527  1.3      uch int
    528  1.3      uch txcom_cnattach(slot, speed, cflag)
    529  1.3      uch 	int slot, speed, cflag;
    530  1.3      uch {
    531  1.3      uch 	cn_tab = &txcomcons;
    532  1.3      uch 
    533  1.3      uch 	txcom_chip.sc_tc	= tx_conf_get_tag();
    534  1.3      uch 	txcom_chip.sc_slot	= slot;
    535  1.3      uch 	txcom_chip.sc_cflag	= cflag;
    536  1.3      uch 	txcom_chip.sc_speed	= speed;
    537  1.3      uch 	txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE;
    538  1.6      uch #if notyet
    539  1.6      uch 	txcom_reset(&txcom_chip);
    540  1.6      uch #endif
    541  1.6      uch 	txcom_setmode(&txcom_chip);
    542  1.6      uch 	txcom_setbaudrate(&txcom_chip);
    543  1.3      uch 
    544  1.5      uch 	if (txcom_enable(&txcom_chip))
    545  1.5      uch 		return 1;
    546  1.5      uch 
    547  1.3      uch 	return 0;
    548  1.3      uch }
    549  1.3      uch 
    550  1.3      uch /*
    551  1.3      uch  * tty
    552  1.3      uch  */
    553  1.3      uch void
    554  1.3      uch txcom_break(sc, on)
    555  1.3      uch 	struct txcom_softc *sc;
    556  1.3      uch 	int on;
    557  1.3      uch {
    558  1.3      uch 	struct txcom_chip *chip = sc->sc_chip;
    559  1.1      uch 
    560  1.3      uch 	tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
    561  1.3      uch 		      on ? TX39_UARTTXHOLD_BREAK : 0);
    562  1.1      uch }
    563  1.1      uch 
    564  1.1      uch void
    565  1.3      uch txcom_modem(sc, on)
    566  1.1      uch 	struct txcom_softc *sc;
    567  1.3      uch 	int on;
    568  1.1      uch {
    569  1.3      uch 	struct txcom_chip *chip = sc->sc_chip;
    570  1.3      uch 	tx_chipset_tag_t tc = chip->sc_tc;
    571  1.3      uch 	int slot = chip->sc_slot;
    572  1.1      uch 	txreg_t reg;
    573  1.1      uch 
    574  1.3      uch 	reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
    575  1.6      uch 	reg &= ~TX39_UARTCTRL1_ENUART;
    576  1.6      uch 	tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
    577  1.3      uch 
    578  1.3      uch 	if (on) {
    579  1.3      uch 		reg &= ~TX39_UARTCTRL1_DISTXD;
    580  1.3      uch 	} else {
    581  1.6      uch 		reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */
    582  1.3      uch 	}
    583  1.6      uch 
    584  1.6      uch 	reg |= TX39_UARTCTRL1_ENUART;
    585  1.6      uch 	tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
    586  1.1      uch }
    587  1.1      uch 
    588  1.1      uch void
    589  1.3      uch txcom_shutdown(sc)
    590  1.3      uch 	struct txcom_softc *sc;
    591  1.1      uch {
    592  1.1      uch 	struct tty *tp = sc->sc_tty;
    593  1.3      uch 	int s = spltty();
    594  1.1      uch 
    595  1.3      uch 	/* Clear any break condition set with TIOCSBRK. */
    596  1.3      uch 	txcom_break(sc, 0);
    597  1.3      uch 
    598  1.3      uch 	/*
    599  1.3      uch 	 * Hang up if necessary.  Wait a bit, so the other side has time to
    600  1.3      uch 	 * notice even if we immediately open the port again.
    601  1.3      uch 	 */
    602  1.3      uch 	if (ISSET(tp->t_cflag, HUPCL)) {
    603  1.3      uch 		txcom_modem(sc, 0);
    604  1.3      uch 		(void) tsleep(sc, TTIPRI, ttclos, hz);
    605  1.3      uch 	}
    606  1.3      uch 
    607  1.3      uch 
    608  1.3      uch 	/* Turn off interrupts if not the console. */
    609  1.3      uch 	if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
    610  1.3      uch 		txcom_disable(sc->sc_chip);
    611  1.3      uch 	}
    612  1.1      uch 
    613  1.3      uch 	splx(s);
    614  1.3      uch }
    615  1.1      uch 
    616  1.3      uch __inline const char *
    617  1.3      uch __txcom_slotname(slot)
    618  1.3      uch 	int slot;
    619  1.3      uch {
    620  1.3      uch 	static const char *slotname[] = {"UARTA", "UARTB"};
    621  1.3      uch 	if (slot != 0 && slot != 1) {
    622  1.3      uch 		return "bogus slot";
    623  1.3      uch 	} else {
    624  1.3      uch 		return slotname[slot];
    625  1.1      uch 	}
    626  1.2      uch }
    627  1.2      uch 
    628  1.2      uch int
    629  1.3      uch txcom_frameerr_intr(arg)
    630  1.3      uch 	void *arg;
    631  1.3      uch {
    632  1.3      uch 	struct txcom_softc *sc = arg;
    633  1.3      uch 
    634  1.3      uch 	printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot));
    635  1.3      uch 
    636  1.3      uch 	return 0;
    637  1.3      uch }
    638  1.3      uch 
    639  1.3      uch int
    640  1.3      uch txcom_parityerr_intr(arg)
    641  1.3      uch 	void *arg;
    642  1.3      uch {
    643  1.3      uch 	struct txcom_softc *sc = arg;
    644  1.3      uch 
    645  1.3      uch 	printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot));
    646  1.2      uch 
    647  1.2      uch 	return 0;
    648  1.1      uch }
    649  1.1      uch 
    650  1.1      uch int
    651  1.3      uch txcom_break_intr(arg)
    652  1.1      uch 	void *arg;
    653  1.1      uch {
    654  1.1      uch 	struct txcom_softc *sc = arg;
    655  1.3      uch 
    656  1.3      uch 	printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot));
    657  1.3      uch 
    658  1.3      uch 	return 0;
    659  1.3      uch }
    660  1.3      uch 
    661  1.3      uch int
    662  1.3      uch txcom_rxintr(arg)
    663  1.3      uch 	void *arg;
    664  1.3      uch {
    665  1.3      uch 	struct txcom_softc *sc = arg;
    666  1.3      uch 	struct txcom_chip *chip = sc->sc_chip;
    667  1.1      uch 	u_int8_t c;
    668  1.1      uch 
    669  1.3      uch 	c = TX39_UARTRXHOLD_RXDATA(
    670  1.3      uch 		tx_conf_read(chip->sc_tc,
    671  1.3      uch 			     TX39_UARTRXHOLD_REG(chip->sc_slot)));
    672  1.3      uch 
    673  1.3      uch 	sc->sc_rbuf[sc->sc_rbput] = c;
    674  1.3      uch 	sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK;
    675  1.3      uch 
    676  1.3      uch 	timeout(txcom_rxsoft, arg, 1);
    677  1.1      uch 
    678  1.1      uch 	return 0;
    679  1.1      uch }
    680  1.1      uch 
    681  1.3      uch void
    682  1.3      uch txcom_rxsoft(arg)
    683  1.3      uch 	void *arg;
    684  1.3      uch {
    685  1.3      uch 	struct txcom_softc *sc = arg;
    686  1.3      uch 	struct tty *tp = sc->sc_tty;
    687  1.3      uch 	int (*rint) __P((int c, struct tty *tp));
    688  1.3      uch 	int code;
    689  1.3      uch 	int s, end, get;
    690  1.3      uch 
    691  1.3      uch 	rint = linesw[tp->t_line].l_rint;
    692  1.3      uch 
    693  1.3      uch 	s = spltty();
    694  1.3      uch 	end = sc->sc_rbput;
    695  1.3      uch 	get = sc->sc_rbget;
    696  1.3      uch 
    697  1.3      uch 	while (get != end) {
    698  1.3      uch 		code = sc->sc_rbuf[get];
    699  1.3      uch 
    700  1.3      uch 		if ((*rint)(code, tp) == -1) {
    701  1.3      uch 			/*
    702  1.3      uch 			 * The line discipline's buffer is out of space.
    703  1.3      uch 			 */
    704  1.3      uch 		}
    705  1.3      uch 		get = (get + 1) % TXCOM_RING_MASK;
    706  1.3      uch 	}
    707  1.3      uch 	sc->sc_rbget = get;
    708  1.3      uch 
    709  1.3      uch 	splx(s);
    710  1.3      uch }
    711  1.3      uch 
    712  1.1      uch int
    713  1.3      uch txcom_txintr(arg)
    714  1.1      uch 	void *arg;
    715  1.1      uch {
    716  1.1      uch 	struct txcom_softc *sc = arg;
    717  1.3      uch 	struct txcom_chip *chip = sc->sc_chip;
    718  1.3      uch 	tx_chipset_tag_t tc = chip->sc_tc;
    719  1.1      uch 
    720  1.3      uch 	if (sc->sc_tbc > 0) {
    721  1.3      uch 		tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
    722  1.3      uch 			      (*sc->sc_tba &
    723  1.3      uch 			       TX39_UARTTXHOLD_TXDATA_MASK));
    724  1.3      uch 		sc->sc_tbc--;
    725  1.3      uch 		sc->sc_tba++;
    726  1.3      uch 	} else {
    727  1.3      uch 		timeout(txcom_txsoft, arg, 1);
    728  1.3      uch 	}
    729  1.1      uch 
    730  1.1      uch 	return 0;
    731  1.1      uch }
    732  1.1      uch 
    733  1.3      uch void
    734  1.3      uch txcom_txsoft(arg)
    735  1.3      uch 	void *arg;
    736  1.3      uch {
    737  1.3      uch 	struct txcom_softc *sc = arg;
    738  1.3      uch 	struct tty *tp = sc->sc_tty;
    739  1.3      uch 	int s = spltty();
    740  1.3      uch 
    741  1.3      uch 	CLR(tp->t_state, TS_BUSY);
    742  1.3      uch 	if (ISSET(tp->t_state, TS_FLUSH)) {
    743  1.3      uch 		CLR(tp->t_state, TS_FLUSH);
    744  1.3      uch 	} else {
    745  1.3      uch 		ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
    746  1.3      uch 	}
    747  1.3      uch 
    748  1.3      uch 	(*linesw[tp->t_line].l_start)(tp);
    749  1.3      uch 
    750  1.3      uch 	splx(s);
    751  1.3      uch }
    752  1.1      uch 
    753  1.1      uch int
    754  1.1      uch txcomopen(dev, flag, mode, p)
    755  1.1      uch 	dev_t dev;
    756  1.1      uch 	int flag, mode;
    757  1.1      uch 	struct proc *p;
    758  1.1      uch {
    759  1.1      uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
    760  1.3      uch 	struct txcom_chip *chip;
    761  1.3      uch 	struct tty *tp;
    762  1.3      uch 	int s, err;
    763  1.1      uch 
    764  1.3      uch 	if (!sc)
    765  1.3      uch 		return ENXIO;
    766  1.3      uch 
    767  1.3      uch 	chip = sc->sc_chip;
    768  1.3      uch 	tp = sc->sc_tty;
    769  1.3      uch 
    770  1.3      uch 	if (ISSET(tp->t_state, TS_ISOPEN) &&
    771  1.3      uch 	    ISSET(tp->t_state, TS_XCLUDE) &&
    772  1.3      uch 	    p->p_ucred->cr_uid != 0)
    773  1.3      uch 		return (EBUSY);
    774  1.3      uch 
    775  1.3      uch 	s = spltty();
    776  1.3      uch 
    777  1.6      uch 	if (txcom_enable(sc->sc_chip)) {
    778  1.6      uch 		splx(s);
    779  1.5      uch 		goto out;
    780  1.6      uch 	}
    781  1.5      uch 	/*
    782  1.5      uch 	 * Do the following iff this is a first open.
    783  1.5      uch 	 */
    784  1.5      uch 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    785  1.5      uch 		struct termios t;
    786  1.5      uch 
    787  1.5      uch 		tp->t_dev = dev;
    788  1.1      uch 
    789  1.5      uch 		t.c_ispeed = 0;
    790  1.5      uch 		if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
    791  1.5      uch 			t.c_ospeed = chip->sc_speed;
    792  1.5      uch 			t.c_cflag = chip->sc_cflag;
    793  1.5      uch 		} else {
    794  1.5      uch 			t.c_ospeed = TTYDEF_SPEED;
    795  1.5      uch 			t.c_cflag = TTYDEF_CFLAG;
    796  1.5      uch 		}
    797  1.3      uch 
    798  1.5      uch 		if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL))
    799  1.5      uch 			SET(t.c_cflag, CLOCAL);
    800  1.5      uch 		if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS))
    801  1.5      uch 			SET(t.c_cflag, CRTSCTS);
    802  1.5      uch 		if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF))
    803  1.5      uch 			SET(t.c_cflag, MDMBUF);
    804  1.5      uch 
    805  1.5      uch 		/* Make sure txcomparam() will do something. */
    806  1.5      uch 		tp->t_ospeed = 0;
    807  1.5      uch 		txcomparam(tp, &t);
    808  1.5      uch 
    809  1.5      uch 		tp->t_iflag = TTYDEF_IFLAG;
    810  1.5      uch 		tp->t_oflag = TTYDEF_OFLAG;
    811  1.5      uch 		tp->t_lflag = TTYDEF_LFLAG;
    812  1.1      uch 
    813  1.5      uch 		ttychars(tp);
    814  1.5      uch 		ttsetwater(tp);
    815  1.3      uch 
    816  1.5      uch 		/*
    817  1.5      uch 		 * Turn on DTR.  We must always do this, even if carrier is not
    818  1.5      uch 		 * present, because otherwise we'd have to use TIOCSDTR
    819  1.5      uch 		 * immediately after setting CLOCAL, which applications do not
    820  1.5      uch 		 * expect.  We always assert DTR while the device is open
    821  1.5      uch 		 * unless explicitly requested to deassert it.
    822  1.5      uch 		 */
    823  1.5      uch 		txcom_modem(sc, 1);
    824  1.3      uch 
    825  1.5      uch 		/* Clear the input ring, and unblock. */
    826  1.5      uch 		sc->sc_rbget = sc->sc_rbput = 0;
    827  1.5      uch 	}
    828  1.3      uch 
    829  1.3      uch 	splx(s);
    830  1.6      uch #define	TXCOMDIALOUT(x)	(minor(x) & 0x80000)
    831  1.6      uch 	if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) {
    832  1.1      uch 		DPRINTF(("txcomopen: ttyopen failed\n"));
    833  1.3      uch 		goto out;
    834  1.1      uch 	}
    835  1.1      uch 	if ((err = (*linesw[tp->t_line].l_open)(dev, tp))) {
    836  1.1      uch 		DPRINTF(("txcomopen: line dicipline open failed\n"));
    837  1.3      uch 		goto out;
    838  1.3      uch 	}
    839  1.3      uch 
    840  1.3      uch 	return err;
    841  1.3      uch 
    842  1.3      uch  out:
    843  1.3      uch 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    844  1.3      uch 		/*
    845  1.3      uch 		 * We failed to open the device, and nobody else had it opened.
    846  1.3      uch 		 * Clean up the state as appropriate.
    847  1.3      uch 		 */
    848  1.3      uch 		txcom_shutdown(sc);
    849  1.1      uch 	}
    850  1.1      uch 
    851  1.1      uch 	return err;
    852  1.3      uch 
    853  1.1      uch }
    854  1.1      uch 
    855  1.1      uch int
    856  1.1      uch txcomclose(dev, flag, mode, p)
    857  1.1      uch 	dev_t dev;
    858  1.1      uch 	int flag, mode;
    859  1.1      uch 	struct proc *p;
    860  1.1      uch {
    861  1.1      uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
    862  1.1      uch 	struct tty *tp = sc->sc_tty;
    863  1.1      uch 
    864  1.3      uch 	/* XXX This is for cons.c. */
    865  1.3      uch 	if (!ISSET(tp->t_state, TS_ISOPEN))
    866  1.3      uch 		return 0;
    867  1.3      uch 
    868  1.1      uch 	(*linesw[tp->t_line].l_close)(tp, flag);
    869  1.1      uch 	ttyclose(tp);
    870  1.1      uch 
    871  1.3      uch 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    872  1.3      uch 		/*
    873  1.3      uch 		 * Although we got a last close, the device may still be in
    874  1.3      uch 		 * use; e.g. if this was the dialout node, and there are still
    875  1.3      uch 		 * processes waiting for carrier on the non-dialout node.
    876  1.3      uch 		 */
    877  1.3      uch 		txcom_shutdown(sc);
    878  1.3      uch 	}
    879  1.3      uch 
    880  1.1      uch 	return 0;
    881  1.1      uch }
    882  1.1      uch 
    883  1.1      uch int
    884  1.1      uch txcomread(dev, uio, flag)
    885  1.1      uch 	dev_t dev;
    886  1.1      uch 	struct uio *uio;
    887  1.1      uch 	int flag;
    888  1.1      uch {
    889  1.1      uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
    890  1.1      uch 	struct tty *tp = sc->sc_tty;
    891  1.3      uch 
    892  1.1      uch 	return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
    893  1.1      uch }
    894  1.1      uch 
    895  1.1      uch int
    896  1.1      uch txcomwrite(dev, uio, flag)
    897  1.1      uch 	dev_t dev;
    898  1.1      uch 	struct uio *uio;
    899  1.1      uch 	int flag;
    900  1.1      uch {
    901  1.1      uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
    902  1.1      uch 	struct tty *tp = sc->sc_tty;
    903  1.1      uch 
    904  1.1      uch 	return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
    905  1.1      uch }
    906  1.1      uch 
    907  1.1      uch struct tty *
    908  1.1      uch txcomtty(dev)
    909  1.1      uch 	dev_t dev;
    910  1.1      uch {
    911  1.1      uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
    912  1.3      uch 
    913  1.3      uch 	return sc->sc_tty;
    914  1.1      uch }
    915  1.1      uch 
    916  1.1      uch int
    917  1.1      uch txcomioctl(dev, cmd, data, flag, p)
    918  1.1      uch 	dev_t dev;
    919  1.1      uch 	u_long cmd;
    920  1.1      uch 	caddr_t data;
    921  1.1      uch 	int flag;
    922  1.1      uch 	struct proc *p;
    923  1.1      uch {
    924  1.1      uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
    925  1.1      uch 	struct tty *tp = sc->sc_tty;
    926  1.3      uch 	int s, err;
    927  1.3      uch 
    928  1.3      uch 	err = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
    929  1.3      uch 	if (err >= 0) {
    930  1.3      uch 		return err;
    931  1.3      uch 	}
    932  1.3      uch 
    933  1.3      uch 	err = ttioctl(tp, cmd, data, flag, p);
    934  1.3      uch 	if (err >= 0) {
    935  1.3      uch 		return err;
    936  1.3      uch 	}
    937  1.3      uch 
    938  1.3      uch 	err = 0;
    939  1.3      uch 
    940  1.3      uch 	s = spltty();
    941  1.3      uch 
    942  1.3      uch 	switch (cmd) {
    943  1.5      uch 	default:
    944  1.5      uch 		err = ENOTTY;
    945  1.5      uch 		break;
    946  1.5      uch 
    947  1.3      uch 	case TIOCSBRK:
    948  1.3      uch 		txcom_break(sc, 1);
    949  1.3      uch 		break;
    950  1.3      uch 
    951  1.3      uch 	case TIOCCBRK:
    952  1.3      uch 		txcom_break(sc, 0);
    953  1.3      uch 		break;
    954  1.3      uch 
    955  1.3      uch 	case TIOCSDTR:
    956  1.3      uch 		txcom_modem(sc, 1);
    957  1.3      uch 		break;
    958  1.3      uch 
    959  1.3      uch 	case TIOCCDTR:
    960  1.3      uch 		txcom_modem(sc, 0);
    961  1.3      uch 		break;
    962  1.3      uch 
    963  1.3      uch 	case TIOCGFLAGS:
    964  1.3      uch 		*(int *)data = sc->sc_chip->sc_swflags;
    965  1.3      uch 		break;
    966  1.3      uch 
    967  1.3      uch 	case TIOCSFLAGS:
    968  1.3      uch 		err = suser(p->p_ucred, &p->p_acflag);
    969  1.3      uch 		if (err) {
    970  1.3      uch 			break;
    971  1.3      uch 		}
    972  1.3      uch 		sc->sc_chip->sc_swflags = *(int *)data;
    973  1.3      uch 		break;
    974  1.3      uch 
    975  1.3      uch 	}
    976  1.1      uch 
    977  1.3      uch 	splx(s);
    978  1.1      uch 
    979  1.3      uch 	return err;
    980  1.1      uch }
    981  1.1      uch 
    982  1.1      uch void
    983  1.1      uch txcomstop(tp, flag)
    984  1.1      uch 	struct tty *tp;
    985  1.1      uch 	int flag;
    986  1.1      uch {
    987  1.1      uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
    988  1.1      uch 	int s;
    989  1.1      uch 
    990  1.1      uch 	s = spltty();
    991  1.1      uch 
    992  1.1      uch 	if (ISSET(tp->t_state, TS_BUSY)) {
    993  1.1      uch 		/* Stop transmitting at the next chunk. */
    994  1.1      uch 		sc->sc_tbc = 0;
    995  1.1      uch 		sc->sc_heldtbc = 0;
    996  1.1      uch 		if (!ISSET(tp->t_state, TS_TTSTOP))
    997  1.1      uch 			SET(tp->t_state, TS_FLUSH);
    998  1.1      uch 	}
    999  1.3      uch 
   1000  1.1      uch 	splx(s);
   1001  1.1      uch }
   1002  1.1      uch 
   1003  1.1      uch void
   1004  1.1      uch txcomstart(tp)
   1005  1.1      uch 	struct tty *tp;
   1006  1.1      uch {
   1007  1.1      uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
   1008  1.3      uch 	struct txcom_chip *chip = sc->sc_chip;
   1009  1.3      uch 	tx_chipset_tag_t tc = chip->sc_tc;
   1010  1.3      uch 	int slot = chip->sc_slot;
   1011  1.1      uch 	int s;
   1012  1.1      uch 
   1013  1.1      uch 	s = spltty();
   1014  1.3      uch 
   1015  1.3      uch 	if (!__txcom_txbufready(chip, 0) ||
   1016  1.3      uch 	    ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
   1017  1.3      uch 		goto out;
   1018  1.1      uch 
   1019  1.1      uch 	if (tp->t_outq.c_cc <= tp->t_lowat) {
   1020  1.1      uch 		if (ISSET(tp->t_state, TS_ASLEEP)) {
   1021  1.1      uch 			CLR(tp->t_state, TS_ASLEEP);
   1022  1.1      uch 			wakeup(&tp->t_outq);
   1023  1.1      uch 		}
   1024  1.1      uch 		selwakeup(&tp->t_wsel);
   1025  1.1      uch 		if (tp->t_outq.c_cc == 0)
   1026  1.3      uch 			goto out;
   1027  1.1      uch 	}
   1028  1.3      uch 
   1029  1.1      uch 	sc->sc_tba = tp->t_outq.c_cf;
   1030  1.1      uch 	sc->sc_tbc = ndqb(&tp->t_outq, 0);
   1031  1.3      uch 	SET(tp->t_state, TS_BUSY);
   1032  1.3      uch 
   1033  1.3      uch 	/* Output the first character of the contiguous buffer. */
   1034  1.3      uch 	tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot),
   1035  1.3      uch 		      (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK));
   1036  1.3      uch 
   1037  1.3      uch 	sc->sc_tbc--;
   1038  1.3      uch 	sc->sc_tba++;
   1039  1.1      uch 
   1040  1.3      uch  out:
   1041  1.1      uch 	splx(s);
   1042  1.1      uch }
   1043  1.1      uch 
   1044  1.3      uch /*
   1045  1.3      uch  * Set TXcom tty parameters from termios.
   1046  1.3      uch  */
   1047  1.1      uch int
   1048  1.1      uch txcomparam(tp, t)
   1049  1.1      uch 	struct tty *tp;
   1050  1.1      uch 	struct termios *t;
   1051  1.1      uch {
   1052  1.3      uch 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
   1053  1.3      uch 	struct txcom_chip *chip;
   1054  1.5      uch 	int ospeed;
   1055  1.3      uch 	int s;
   1056  1.3      uch 
   1057  1.3      uch 	if (!sc)
   1058  1.3      uch 		return ENXIO;
   1059  1.3      uch 
   1060  1.3      uch 	ospeed = t->c_ospeed;
   1061  1.3      uch 
   1062  1.3      uch 	/* Check requested parameters. */
   1063  1.3      uch 	if (ospeed < 0) {
   1064  1.3      uch 		return EINVAL;
   1065  1.3      uch 	}
   1066  1.3      uch 	if (t->c_ispeed && t->c_ispeed != ospeed) {
   1067  1.3      uch 		return EINVAL;
   1068  1.3      uch 	}
   1069  1.3      uch 
   1070  1.3      uch 	s = spltty();
   1071  1.3      uch 	chip = sc->sc_chip;
   1072  1.3      uch 	/*
   1073  1.3      uch 	 * For the console, always force CLOCAL and !HUPCL, so that the port
   1074  1.3      uch 	 * is always active.
   1075  1.3      uch 	 */
   1076  1.3      uch 	if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) ||
   1077  1.3      uch 	    ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
   1078  1.5      uch 		SET(t->c_cflag, CLOCAL);
   1079  1.5      uch 		CLR(t->c_cflag, HUPCL);
   1080  1.3      uch 	}
   1081  1.3      uch 	splx(s);
   1082  1.3      uch 
   1083  1.3      uch 	/*
   1084  1.6      uch 	 * If we're not in a mode that assumes a connection is present, then
   1085  1.6      uch 	 * ignore carrier changes.
   1086  1.6      uch 	 */
   1087  1.6      uch 	if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
   1088  1.6      uch 		chip->sc_dcd = 0;
   1089  1.6      uch 	else
   1090  1.6      uch 		chip->sc_dcd = 1;
   1091  1.6      uch 
   1092  1.6      uch 	/*
   1093  1.3      uch 	 * Only whack the UART when params change.
   1094  1.3      uch 	 * Some callers need to clear tp->t_ospeed
   1095  1.3      uch 	 * to make sure initialization gets done.
   1096  1.3      uch 	 */
   1097  1.5      uch 	if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) {
   1098  1.3      uch 		return 0;
   1099  1.3      uch 	}
   1100  1.3      uch 
   1101  1.3      uch 	s = spltty();
   1102  1.3      uch 	chip = sc->sc_chip;
   1103  1.3      uch 	chip->sc_speed = ospeed;
   1104  1.5      uch 	chip->sc_cflag = t->c_cflag;
   1105  1.3      uch 
   1106  1.3      uch 	txcom_setmode(chip);
   1107  1.3      uch 	txcom_setbaudrate(chip);
   1108  1.6      uch 
   1109  1.3      uch 	/* And copy to tty. */
   1110  1.3      uch 	tp->t_ispeed = 0;
   1111  1.3      uch 	tp->t_ospeed = chip->sc_speed;
   1112  1.3      uch 	tp->t_cflag = chip->sc_cflag;
   1113  1.3      uch 
   1114  1.3      uch 	/*
   1115  1.6      uch 	 * Update the tty layer's idea of the carrier bit, in case we changed
   1116  1.6      uch 	 * CLOCAL or MDMBUF.  We don't hang up here; we only do that by
   1117  1.6      uch 	 * explicit request.
   1118  1.6      uch 	 */
   1119  1.6      uch 	(void) (*linesw[tp->t_line].l_modem)(tp, chip->sc_dcd);
   1120  1.6      uch 
   1121  1.6      uch 	/*
   1122  1.3      uch 	 * If hardware flow control is disabled, unblock any hard flow
   1123  1.3      uch 	 * control state.
   1124  1.3      uch 	 */
   1125  1.3      uch 	if (!ISSET(chip->sc_cflag, CHWFLOW)) {
   1126  1.3      uch 		txcomstart(tp);
   1127  1.3      uch 	}
   1128  1.3      uch 
   1129  1.3      uch 	splx(s);
   1130  1.6      uch 
   1131  1.6      uch 	return 0;
   1132  1.6      uch }
   1133  1.6      uch 
   1134  1.6      uch void
   1135  1.6      uch txcom_dump(chip)
   1136  1.6      uch 	struct txcom_chip *chip;
   1137  1.6      uch {
   1138  1.6      uch 	tx_chipset_tag_t tc = chip->sc_tc;
   1139  1.6      uch 	int slot = chip->sc_slot;
   1140  1.6      uch 	txreg_t reg;
   1141  1.6      uch 
   1142  1.6      uch 	reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
   1143  1.6      uch #define ISSETPRINT(r, m) \
   1144  1.6      uch 	__is_set_print(r, TX39_UARTCTRL1_##m, #m)
   1145  1.6      uch 	ISSETPRINT(reg, UARTON);
   1146  1.6      uch 	ISSETPRINT(reg, EMPTY);
   1147  1.6      uch 	ISSETPRINT(reg, PRXHOLDFULL);
   1148  1.6      uch 	ISSETPRINT(reg, RXHOLDFULL);
   1149  1.6      uch 	ISSETPRINT(reg, ENDMARX);
   1150  1.6      uch 	ISSETPRINT(reg, ENDMATX);
   1151  1.6      uch 	ISSETPRINT(reg, TESTMODE);
   1152  1.6      uch 	ISSETPRINT(reg, ENBREAHALT);
   1153  1.6      uch 	ISSETPRINT(reg, ENDMATEST);
   1154  1.6      uch 	ISSETPRINT(reg, ENDMALOOP);
   1155  1.6      uch 	ISSETPRINT(reg, PULSEOPT2);
   1156  1.6      uch 	ISSETPRINT(reg, PULSEOPT1);
   1157  1.6      uch 	ISSETPRINT(reg, DTINVERT);
   1158  1.6      uch 	ISSETPRINT(reg, DISTXD);
   1159  1.6      uch 	ISSETPRINT(reg, TWOSTOP);
   1160  1.6      uch 	ISSETPRINT(reg, LOOPBACK);
   1161  1.6      uch 	ISSETPRINT(reg, BIT7);
   1162  1.6      uch 	ISSETPRINT(reg, EVENPARITY);
   1163  1.6      uch 	ISSETPRINT(reg, ENPARITY);
   1164  1.6      uch 	ISSETPRINT(reg, ENUART);
   1165  1.6      uch }
   1166  1.6      uch 
   1167  1.6      uch /*
   1168  1.6      uch  * Compaq-C function.
   1169  1.6      uch  */
   1170  1.6      uch #include <hpcmips/tx/tx39iovar.h>
   1171  1.6      uch 
   1172  1.6      uch int	__compaq_uart_dcd	__P((void*));
   1173  1.6      uch int	__mobilon_uart_dcd	__P((void*));
   1174  1.6      uch 
   1175  1.6      uch int
   1176  1.6      uch __compaq_uart_dcd(arg)
   1177  1.6      uch 	void *arg;
   1178  1.6      uch {
   1179  1.6      uch 	struct txcom_softc *sc = arg;
   1180  1.6      uch 	struct tty *tp = sc->sc_tty;
   1181  1.6      uch 	struct txcom_chip *chip = sc->sc_chip;
   1182  1.6      uch 	int modem;
   1183  1.6      uch 
   1184  1.6      uch 	switch (tx39intrvec) {
   1185  1.6      uch 	default:
   1186  1.6      uch 		return 0;
   1187  1.6      uch 	case ((3 << 16) | 30): /* MFIO 30 positive edge */
   1188  1.6      uch 		tx39io_portout(chip->sc_tc, TXPORT(TXMFIO, 31), TXON);
   1189  1.6      uch 		modem = 1;
   1190  1.6      uch 		break;
   1191  1.6      uch 	case ((4 << 16) | 30): /* MFIO 30 negative edge */
   1192  1.6      uch 		tx39io_portout(chip->sc_tc, TXPORT(TXMFIO, 31), TXOFF);
   1193  1.6      uch 		modem = 1;
   1194  1.6      uch 		break;
   1195  1.6      uch 	case ((3 << 16) | 5): /* MFIO 5 positive edge */
   1196  1.6      uch 		tx39io_portout(chip->sc_tc, TXPORT(TXMFIO, 6), TXON);
   1197  1.6      uch 		modem = 0;
   1198  1.6      uch 		break;
   1199  1.6      uch 	case ((4 << 16) | 5): /* MFIO 5 negative edge */
   1200  1.6      uch 		tx39io_portout(chip->sc_tc, TXPORT(TXMFIO, 6), TXOFF);
   1201  1.6      uch 		modem = 0;
   1202  1.6      uch 		break;
   1203  1.6      uch 	}
   1204  1.6      uch 
   1205  1.6      uch 	if (modem && chip->sc_dcd)
   1206  1.6      uch 		(void) (*linesw[tp->t_line].l_modem)(tp, chip->sc_dcd);
   1207  1.6      uch 
   1208  1.6      uch 	return 0;
   1209  1.6      uch }
   1210  1.6      uch 
   1211  1.6      uch int
   1212  1.6      uch __mobilon_uart_dcd(arg)
   1213  1.6      uch 	void *arg;
   1214  1.6      uch {
   1215  1.6      uch 	struct txcom_softc *sc = arg;
   1216  1.6      uch 	struct tty *tp = sc->sc_tty;
   1217  1.6      uch 	struct txcom_chip *chip = sc->sc_chip;
   1218  1.6      uch 	int modem;
   1219  1.6      uch 
   1220  1.6      uch 	switch (tx39intrvec) {
   1221  1.6      uch 	default:
   1222  1.6      uch 		return 0;
   1223  1.6      uch 	case ((5 << 16) | 4): /* IO 4 positive edge */
   1224  1.6      uch 		modem = 1;
   1225  1.6      uch 		break;
   1226  1.6      uch 	case ((5 << 16) | 11): /* IO 4 negative edge */
   1227  1.6      uch 		modem = 1;
   1228  1.6      uch 		break;
   1229  1.6      uch 	case ((5 << 16) | 6): /* IO 6 positive edge */
   1230  1.6      uch 		modem = 0;
   1231  1.6      uch 		break;
   1232  1.6      uch 	case ((5 << 16) | 13): /* IO 6 negative edge */
   1233  1.6      uch 		modem = 0;
   1234  1.6      uch 		break;
   1235  1.6      uch 	}
   1236  1.6      uch 
   1237  1.6      uch 	if (modem && chip->sc_dcd)
   1238  1.6      uch 		(void) (*linesw[tp->t_line].l_modem)(tp, chip->sc_dcd);
   1239  1.3      uch 
   1240  1.1      uch 	return 0;
   1241  1.1      uch }
   1242