txcom.c revision 1.8 1 1.8 thorpej /* $NetBSD: txcom.c,v 1.8 2000/03/23 06:38:03 thorpej Exp $ */
2 1.1 uch
3 1.1 uch /*
4 1.5 uch * Copyright (c) 1999, 2000, by UCHIYAMA Yasushi
5 1.1 uch * All rights reserved.
6 1.1 uch *
7 1.1 uch * Redistribution and use in source and binary forms, with or without
8 1.1 uch * modification, are permitted provided that the following conditions
9 1.1 uch * are met:
10 1.1 uch * 1. Redistributions of source code must retain the above copyright
11 1.1 uch * notice, this list of conditions and the following disclaimer.
12 1.1 uch * 2. The name of the developer may NOT be used to endorse or promote products
13 1.1 uch * derived from this software without specific prior written permission.
14 1.1 uch *
15 1.1 uch * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 1.1 uch * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 1.1 uch * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 1.1 uch * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 1.1 uch * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 1.1 uch * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 1.1 uch * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 1.1 uch * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 1.1 uch * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 1.1 uch * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 1.1 uch * SUCH DAMAGE.
26 1.1 uch *
27 1.1 uch */
28 1.1 uch #include "opt_tx39_debug.h"
29 1.1 uch #include "opt_tx39uartdebug.h"
30 1.1 uch
31 1.1 uch #include <sys/param.h>
32 1.1 uch #include <sys/systm.h>
33 1.3 uch #include <sys/kernel.h>
34 1.1 uch #include <sys/device.h>
35 1.3 uch #include <sys/malloc.h>
36 1.1 uch
37 1.1 uch #include <sys/proc.h> /* tsleep/wakeup */
38 1.1 uch
39 1.1 uch #include <sys/ioctl.h>
40 1.1 uch #include <sys/select.h>
41 1.1 uch #include <sys/file.h>
42 1.1 uch
43 1.1 uch #include <sys/tty.h>
44 1.1 uch #include <sys/conf.h>
45 1.1 uch #include <dev/cons.h> /* consdev */
46 1.1 uch
47 1.1 uch #include <machine/bus.h>
48 1.1 uch
49 1.1 uch #include <hpcmips/tx/tx39var.h>
50 1.1 uch #include <hpcmips/tx/tx39icureg.h>
51 1.1 uch #include <hpcmips/tx/tx39uartvar.h>
52 1.1 uch #include <hpcmips/tx/tx39uartreg.h>
53 1.1 uch
54 1.5 uch #include <hpcmips/tx/tx39irvar.h>
55 1.5 uch
56 1.1 uch #include <hpcmips/tx/tx39clockreg.h> /* XXX */
57 1.1 uch
58 1.6 uch #include <hpcmips/tx/txiomanvar.h>
59 1.6 uch
60 1.1 uch #define SET(t, f) (t) |= (f)
61 1.1 uch #define CLR(t, f) (t) &= ~(f)
62 1.1 uch #define ISSET(t, f) ((t) & (f))
63 1.1 uch
64 1.1 uch #ifdef TX39UARTDEBUG
65 1.1 uch #define DPRINTF(arg) printf arg
66 1.1 uch #else
67 1.1 uch #define DPRINTF(arg)
68 1.1 uch #endif
69 1.1 uch
70 1.3 uch #define TXCOM_HW_CONSOLE 0x40
71 1.3 uch #define TXCOM_RING_SIZE 256 /* must be a power of two! */
72 1.3 uch #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1)
73 1.1 uch
74 1.3 uch struct txcom_chip {
75 1.1 uch tx_chipset_tag_t sc_tc;
76 1.1 uch int sc_slot; /* UARTA or UARTB */
77 1.1 uch int sc_cflag;
78 1.1 uch int sc_speed;
79 1.3 uch int sc_swflags;
80 1.1 uch int sc_hwflags;
81 1.6 uch
82 1.6 uch int sc_dcd;
83 1.3 uch };
84 1.1 uch
85 1.3 uch struct txcom_softc {
86 1.3 uch struct device sc_dev;
87 1.3 uch struct tty *sc_tty;
88 1.3 uch struct txcom_chip *sc_chip;
89 1.3 uch
90 1.8 thorpej struct callout sc_txsoft_ch;
91 1.8 thorpej struct callout sc_rxsoft_ch;
92 1.8 thorpej
93 1.3 uch u_int8_t *sc_tba; /* transmit buffer address */
94 1.3 uch int sc_tbc; /* transmit byte count */
95 1.3 uch int sc_heldtbc;
96 1.3 uch u_int8_t *sc_rbuf; /* receive buffer address */
97 1.3 uch int sc_rbput; /* receive byte count */
98 1.3 uch int sc_rbget;
99 1.1 uch };
100 1.1 uch
101 1.1 uch extern struct cfdriver txcom_cd;
102 1.1 uch
103 1.1 uch int txcom_match __P((struct device*, struct cfdata*, void*));
104 1.1 uch void txcom_attach __P((struct device*, struct device*, void*));
105 1.5 uch int txcom_print __P((void*, const char*));
106 1.3 uch
107 1.3 uch int txcom_txintr __P((void*));
108 1.3 uch int txcom_rxintr __P((void*));
109 1.3 uch int txcom_frameerr_intr __P((void*));
110 1.3 uch int txcom_parityerr_intr __P((void*));
111 1.3 uch int txcom_break_intr __P((void*));
112 1.3 uch
113 1.1 uch void txcom_rxsoft __P((void*));
114 1.3 uch void txcom_txsoft __P((void*));
115 1.3 uch
116 1.6 uch int txcom_stsoft __P((void*));
117 1.6 uch int txcom_stsoft2 __P((void*));
118 1.6 uch int txcom_stsoft3 __P((void*));
119 1.6 uch int txcom_stsoft4 __P((void*));
120 1.6 uch
121 1.6 uch
122 1.3 uch void txcom_shutdown __P((struct txcom_softc*));
123 1.3 uch void txcom_break __P((struct txcom_softc*, int));
124 1.3 uch void txcom_modem __P((struct txcom_softc*, int));
125 1.3 uch void txcomstart __P((struct tty*));
126 1.3 uch int txcomparam __P((struct tty*, struct termios*));
127 1.3 uch
128 1.6 uch void txcom_reset __P((struct txcom_chip*));
129 1.3 uch int txcom_enable __P((struct txcom_chip*));
130 1.3 uch void txcom_disable __P((struct txcom_chip*));
131 1.3 uch void txcom_setmode __P((struct txcom_chip*));
132 1.3 uch void txcom_setbaudrate __P((struct txcom_chip*));
133 1.1 uch int txcom_cngetc __P((dev_t));
134 1.1 uch void txcom_cnputc __P((dev_t, int));
135 1.3 uch void txcom_cnpollc __P((dev_t, int));
136 1.3 uch
137 1.3 uch __inline int __txcom_txbufready __P((struct txcom_chip*, int));
138 1.3 uch __inline const char *__txcom_slotname __P((int));
139 1.1 uch
140 1.6 uch void txcom_dump __P((struct txcom_chip*));
141 1.6 uch
142 1.1 uch cdev_decl(txcom);
143 1.1 uch
144 1.3 uch struct consdev txcomcons = {
145 1.3 uch NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc,
146 1.7 thorpej NULL, NODEV, CN_NORMAL
147 1.3 uch };
148 1.3 uch
149 1.1 uch /* Serial console */
150 1.3 uch struct txcom_chip txcom_chip;
151 1.1 uch
152 1.1 uch struct cfattach txcom_ca = {
153 1.1 uch sizeof(struct txcom_softc), txcom_match, txcom_attach
154 1.1 uch };
155 1.1 uch
156 1.1 uch int
157 1.1 uch txcom_match(parent, cf, aux)
158 1.1 uch struct device *parent;
159 1.1 uch struct cfdata *cf;
160 1.1 uch void *aux;
161 1.1 uch {
162 1.1 uch /* if the autoconfiguration got this far, there's a slot here */
163 1.1 uch return 1;
164 1.1 uch }
165 1.1 uch
166 1.1 uch void
167 1.1 uch txcom_attach(parent, self, aux)
168 1.1 uch struct device *parent;
169 1.1 uch struct device *self;
170 1.1 uch void *aux;
171 1.1 uch {
172 1.1 uch struct tx39uart_attach_args *ua = aux;
173 1.1 uch struct txcom_softc *sc = (void*)self;
174 1.1 uch tx_chipset_tag_t tc;
175 1.1 uch struct tty *tp;
176 1.3 uch struct txcom_chip *chip;
177 1.6 uch int slot, console;
178 1.1 uch
179 1.1 uch /* Check this slot used as serial console */
180 1.6 uch console = (ua->ua_slot == txcom_chip.sc_slot) &&
181 1.6 uch (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE);
182 1.6 uch
183 1.6 uch if (console) {
184 1.3 uch sc->sc_chip = &txcom_chip;
185 1.3 uch } else {
186 1.3 uch if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip),
187 1.3 uch M_DEVBUF, M_WAITOK))) {
188 1.3 uch printf(": can't allocate chip\n");
189 1.3 uch return;
190 1.3 uch }
191 1.3 uch memset(sc->sc_chip, 0, sizeof(struct txcom_chip));
192 1.1 uch }
193 1.1 uch
194 1.3 uch chip = sc->sc_chip;
195 1.3 uch tc = chip->sc_tc = ua->ua_tc;
196 1.3 uch slot = chip->sc_slot = ua->ua_slot;
197 1.3 uch
198 1.6 uch #ifdef TX39UARTDEBUG
199 1.6 uch txcom_dump(chip);
200 1.6 uch #endif
201 1.6 uch if (!console)
202 1.6 uch txcom_reset(chip);
203 1.6 uch
204 1.3 uch if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) {
205 1.3 uch printf(": can't allocate buffer.\n");
206 1.3 uch return;
207 1.3 uch }
208 1.3 uch memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE);
209 1.1 uch
210 1.1 uch tp = ttymalloc();
211 1.1 uch tp->t_oproc = txcomstart;
212 1.1 uch tp->t_param = txcomparam;
213 1.1 uch tp->t_hwiflow = NULL;
214 1.1 uch sc->sc_tty = tp;
215 1.1 uch tty_attach(tp);
216 1.1 uch
217 1.3 uch if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
218 1.1 uch int maj;
219 1.1 uch /* locate the major number */
220 1.1 uch for (maj = 0; maj < nchrdev; maj++)
221 1.1 uch if (cdevsw[maj].d_open == txcomopen)
222 1.1 uch break;
223 1.1 uch
224 1.1 uch cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit);
225 1.1 uch
226 1.3 uch printf(": console");
227 1.1 uch }
228 1.1 uch
229 1.3 uch printf("\n");
230 1.1 uch
231 1.1 uch /*
232 1.1 uch * Enable interrupt
233 1.1 uch */
234 1.3 uch #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s))
235 1.3 uch
236 1.3 uch tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY,
237 1.3 uch txcom_rxintr, sc);
238 1.3 uch tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY,
239 1.3 uch txcom_txintr, sc);
240 1.3 uch tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY,
241 1.4 uch txcom_rxintr, sc);
242 1.3 uch tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY,
243 1.4 uch txcom_txintr, sc);
244 1.3 uch tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY,
245 1.3 uch txcom_frameerr_intr, sc);
246 1.3 uch tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY,
247 1.3 uch txcom_parityerr_intr, sc);
248 1.3 uch tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY,
249 1.3 uch txcom_break_intr, sc);
250 1.5 uch
251 1.6 uch if (ua->ua_slot == 0)
252 1.6 uch txioman_uarta_init(tc, self);
253 1.6 uch
254 1.5 uch /*
255 1.5 uch * UARTB can connect IR module
256 1.5 uch */
257 1.5 uch if (ua->ua_slot == 1) {
258 1.5 uch struct txcom_attach_args tca;
259 1.5 uch tca.tca_tc = tc;
260 1.5 uch tca.tca_parent = self;
261 1.5 uch config_found(self, &tca, txcom_print);
262 1.5 uch }
263 1.5 uch }
264 1.5 uch
265 1.5 uch int
266 1.5 uch txcom_print(aux, pnp)
267 1.5 uch void *aux;
268 1.5 uch const char *pnp;
269 1.5 uch {
270 1.5 uch return pnp ? QUIET : UNCONF;
271 1.1 uch }
272 1.1 uch
273 1.6 uch void
274 1.6 uch txcom_reset(chip)
275 1.6 uch struct txcom_chip *chip;
276 1.6 uch {
277 1.6 uch tx_chipset_tag_t tc;
278 1.6 uch int slot, ofs;
279 1.6 uch txreg_t reg;
280 1.6 uch
281 1.6 uch tc = chip->sc_tc;
282 1.6 uch slot = chip->sc_slot;
283 1.6 uch ofs = TX39_UARTCTRL1_REG(slot);
284 1.6 uch
285 1.6 uch /* Supply clock */
286 1.6 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
287 1.6 uch reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
288 1.6 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
289 1.6 uch
290 1.6 uch /* reset UART module */
291 1.6 uch tx_conf_write(tc, ofs, 0);
292 1.6 uch }
293 1.6 uch
294 1.1 uch int
295 1.3 uch txcom_enable(chip)
296 1.3 uch struct txcom_chip *chip;
297 1.1 uch {
298 1.1 uch tx_chipset_tag_t tc;
299 1.1 uch txreg_t reg;
300 1.3 uch int slot, ofs, timeout;
301 1.1 uch
302 1.3 uch tc = chip->sc_tc;
303 1.3 uch slot = chip->sc_slot;
304 1.3 uch ofs = TX39_UARTCTRL1_REG(slot);
305 1.1 uch
306 1.6 uch /* Supply clock */
307 1.5 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
308 1.5 uch reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
309 1.5 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
310 1.5 uch
311 1.6 uch /*
312 1.6 uch * XXX Disable DMA (DMA not coded yet)
313 1.6 uch */
314 1.6 uch reg = tx_conf_read(tc, ofs);
315 1.6 uch reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
316 1.6 uch tx_conf_write(tc, ofs, reg);
317 1.6 uch
318 1.6 uch /* enable */
319 1.3 uch reg = tx_conf_read(tc, ofs);
320 1.1 uch reg |= TX39_UARTCTRL1_ENUART;
321 1.1 uch reg &= ~TX39_UARTCTRL1_ENBREAHALT;
322 1.3 uch tx_conf_write(tc, ofs, reg);
323 1.3 uch
324 1.3 uch timeout = 100;
325 1.3 uch
326 1.3 uch while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) &&
327 1.3 uch --timeout > 0)
328 1.3 uch ;
329 1.3 uch
330 1.5 uch if (timeout == 0 && !cold) {
331 1.6 uch printf("%s never power up\n", __txcom_slotname(slot));
332 1.3 uch return 1;
333 1.3 uch }
334 1.3 uch
335 1.1 uch return 0;
336 1.1 uch }
337 1.1 uch
338 1.1 uch void
339 1.3 uch txcom_disable(chip)
340 1.3 uch struct txcom_chip *chip;
341 1.1 uch {
342 1.1 uch tx_chipset_tag_t tc;
343 1.1 uch txreg_t reg;
344 1.1 uch int slot;
345 1.1 uch
346 1.3 uch tc = chip->sc_tc;
347 1.3 uch slot = chip->sc_slot;
348 1.1 uch
349 1.1 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
350 1.1 uch /* DMA */
351 1.1 uch reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
352 1.3 uch
353 1.6 uch /* disable module */
354 1.1 uch reg &= ~TX39_UARTCTRL1_ENUART;
355 1.1 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
356 1.3 uch
357 1.1 uch /* Clock */
358 1.1 uch reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
359 1.1 uch reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
360 1.1 uch tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
361 1.1 uch
362 1.1 uch }
363 1.1 uch
364 1.3 uch __inline int
365 1.3 uch __txcom_txbufready(chip, retry)
366 1.3 uch struct txcom_chip *chip;
367 1.3 uch int retry;
368 1.3 uch {
369 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
370 1.3 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
371 1.3 uch
372 1.3 uch do {
373 1.3 uch if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY)
374 1.3 uch return 1;
375 1.3 uch } while(--retry != 0);
376 1.3 uch
377 1.1 uch return 0;
378 1.1 uch }
379 1.1 uch
380 1.5 uch void
381 1.5 uch txcom_pulse_mode(dev)
382 1.5 uch struct device *dev;
383 1.5 uch {
384 1.5 uch struct txcom_softc *sc = (void*)dev;
385 1.5 uch struct txcom_chip *chip = sc->sc_chip;
386 1.5 uch tx_chipset_tag_t tc = chip->sc_tc;
387 1.5 uch int ofs;
388 1.5 uch txreg_t reg;
389 1.5 uch
390 1.5 uch ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
391 1.5 uch
392 1.5 uch reg = tx_conf_read(tc, ofs);
393 1.6 uch /* WindowsCE use this setting */
394 1.6 uch reg |= TX39_UARTCTRL1_PULSEOPT1;
395 1.6 uch reg &= ~TX39_UARTCTRL1_PULSEOPT2;
396 1.6 uch reg |= TX39_UARTCTRL1_DTINVERT;
397 1.6 uch
398 1.5 uch tx_conf_write(tc, ofs, reg);
399 1.5 uch }
400 1.5 uch
401 1.3 uch /*
402 1.3 uch * console
403 1.3 uch */
404 1.1 uch int
405 1.1 uch txcom_cngetc(dev)
406 1.1 uch dev_t dev;
407 1.1 uch {
408 1.1 uch tx_chipset_tag_t tc;
409 1.2 uch int ofs, c, s;
410 1.2 uch
411 1.3 uch s = spltty();
412 1.2 uch
413 1.3 uch tc = txcom_chip.sc_tc;
414 1.3 uch ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot);
415 1.1 uch
416 1.1 uch while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs)))
417 1.1 uch ;
418 1.2 uch
419 1.3 uch c = TX39_UARTRXHOLD_RXDATA(
420 1.3 uch tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot)));
421 1.2 uch
422 1.3 uch if (c == '\r')
423 1.1 uch c = '\n';
424 1.1 uch
425 1.2 uch splx(s);
426 1.2 uch
427 1.1 uch return c;
428 1.1 uch }
429 1.1 uch
430 1.1 uch void
431 1.1 uch txcom_cnputc(dev, c)
432 1.1 uch dev_t dev;
433 1.1 uch int c;
434 1.1 uch {
435 1.3 uch struct txcom_chip *chip = &txcom_chip;
436 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
437 1.3 uch int s;
438 1.2 uch
439 1.3 uch s = spltty();
440 1.1 uch
441 1.3 uch /* Wait for transmitter to empty */
442 1.3 uch __txcom_txbufready(chip, -1);
443 1.1 uch
444 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
445 1.1 uch (c & TX39_UARTTXHOLD_TXDATA_MASK));
446 1.1 uch
447 1.3 uch __txcom_txbufready(chip, -1);
448 1.3 uch
449 1.2 uch splx(s);
450 1.1 uch }
451 1.1 uch
452 1.1 uch void
453 1.1 uch txcom_cnpollc(dev, on)
454 1.1 uch dev_t dev;
455 1.1 uch int on;
456 1.1 uch {
457 1.1 uch }
458 1.1 uch
459 1.1 uch void
460 1.3 uch txcom_setmode(chip)
461 1.3 uch struct txcom_chip *chip;
462 1.1 uch {
463 1.3 uch tcflag_t cflag = chip->sc_cflag;
464 1.3 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
465 1.1 uch txreg_t reg;
466 1.1 uch
467 1.3 uch reg = tx_conf_read(chip->sc_tc, ofs);
468 1.6 uch reg &= ~TX39_UARTCTRL1_ENUART;
469 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg);
470 1.6 uch
471 1.1 uch switch (ISSET(cflag, CSIZE)) {
472 1.1 uch default:
473 1.1 uch printf("txcom_setmode: CS7, CS8 only. use CS7");
474 1.1 uch /* FALL THROUGH */
475 1.1 uch case CS7:
476 1.1 uch reg |= TX39_UARTCTRL1_BIT7;
477 1.1 uch break;
478 1.1 uch case CS8:
479 1.1 uch reg &= ~TX39_UARTCTRL1_BIT7;
480 1.1 uch break;
481 1.1 uch }
482 1.3 uch
483 1.1 uch if (ISSET(cflag, PARENB)) {
484 1.1 uch reg |= TX39_UARTCTRL1_ENPARITY;
485 1.1 uch if (ISSET(cflag, PARODD)) {
486 1.1 uch reg &= ~TX39_UARTCTRL1_EVENPARITY;
487 1.1 uch } else {
488 1.1 uch reg |= TX39_UARTCTRL1_EVENPARITY;
489 1.1 uch }
490 1.1 uch } else {
491 1.1 uch reg &= ~TX39_UARTCTRL1_ENPARITY;
492 1.1 uch }
493 1.3 uch
494 1.6 uch if (ISSET(cflag, CSTOPB))
495 1.1 uch reg |= TX39_UARTCTRL1_TWOSTOP;
496 1.6 uch else
497 1.6 uch reg &= ~TX39_UARTCTRL1_TWOSTOP;
498 1.6 uch
499 1.6 uch reg |= TX39_UARTCTRL1_ENUART;
500 1.3 uch tx_conf_write(chip->sc_tc, ofs, reg);
501 1.3 uch }
502 1.3 uch
503 1.3 uch void
504 1.3 uch txcom_setbaudrate(chip)
505 1.3 uch struct txcom_chip *chip;
506 1.3 uch {
507 1.3 uch int baudrate;
508 1.6 uch int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
509 1.6 uch txreg_t reg, reg1;
510 1.3 uch
511 1.3 uch if (chip->sc_speed == 0)
512 1.3 uch return;
513 1.3 uch
514 1.5 uch if (!cold)
515 1.5 uch DPRINTF(("txcom_setbaudrate: %d\n", chip->sc_speed));
516 1.5 uch
517 1.6 uch reg1 = tx_conf_read(chip->sc_tc, ofs);
518 1.6 uch reg1 &= ~TX39_UARTCTRL1_ENUART;
519 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg1);
520 1.6 uch
521 1.3 uch baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1;
522 1.3 uch reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate);
523 1.3 uch
524 1.3 uch tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg);
525 1.6 uch
526 1.6 uch reg1 |= TX39_UARTCTRL1_ENUART;
527 1.6 uch tx_conf_write(chip->sc_tc, ofs, reg1);
528 1.3 uch }
529 1.3 uch
530 1.3 uch int
531 1.3 uch txcom_cnattach(slot, speed, cflag)
532 1.3 uch int slot, speed, cflag;
533 1.3 uch {
534 1.3 uch cn_tab = &txcomcons;
535 1.3 uch
536 1.3 uch txcom_chip.sc_tc = tx_conf_get_tag();
537 1.3 uch txcom_chip.sc_slot = slot;
538 1.3 uch txcom_chip.sc_cflag = cflag;
539 1.3 uch txcom_chip.sc_speed = speed;
540 1.3 uch txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE;
541 1.6 uch #if notyet
542 1.6 uch txcom_reset(&txcom_chip);
543 1.6 uch #endif
544 1.6 uch txcom_setmode(&txcom_chip);
545 1.6 uch txcom_setbaudrate(&txcom_chip);
546 1.3 uch
547 1.5 uch if (txcom_enable(&txcom_chip))
548 1.5 uch return 1;
549 1.5 uch
550 1.3 uch return 0;
551 1.3 uch }
552 1.3 uch
553 1.3 uch /*
554 1.3 uch * tty
555 1.3 uch */
556 1.3 uch void
557 1.3 uch txcom_break(sc, on)
558 1.3 uch struct txcom_softc *sc;
559 1.3 uch int on;
560 1.3 uch {
561 1.3 uch struct txcom_chip *chip = sc->sc_chip;
562 1.1 uch
563 1.3 uch tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
564 1.3 uch on ? TX39_UARTTXHOLD_BREAK : 0);
565 1.1 uch }
566 1.1 uch
567 1.1 uch void
568 1.3 uch txcom_modem(sc, on)
569 1.1 uch struct txcom_softc *sc;
570 1.3 uch int on;
571 1.1 uch {
572 1.3 uch struct txcom_chip *chip = sc->sc_chip;
573 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
574 1.3 uch int slot = chip->sc_slot;
575 1.1 uch txreg_t reg;
576 1.1 uch
577 1.3 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
578 1.6 uch reg &= ~TX39_UARTCTRL1_ENUART;
579 1.6 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
580 1.3 uch
581 1.3 uch if (on) {
582 1.3 uch reg &= ~TX39_UARTCTRL1_DISTXD;
583 1.3 uch } else {
584 1.6 uch reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */
585 1.3 uch }
586 1.6 uch
587 1.6 uch reg |= TX39_UARTCTRL1_ENUART;
588 1.6 uch tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
589 1.1 uch }
590 1.1 uch
591 1.1 uch void
592 1.3 uch txcom_shutdown(sc)
593 1.3 uch struct txcom_softc *sc;
594 1.1 uch {
595 1.1 uch struct tty *tp = sc->sc_tty;
596 1.3 uch int s = spltty();
597 1.1 uch
598 1.3 uch /* Clear any break condition set with TIOCSBRK. */
599 1.3 uch txcom_break(sc, 0);
600 1.3 uch
601 1.3 uch /*
602 1.3 uch * Hang up if necessary. Wait a bit, so the other side has time to
603 1.3 uch * notice even if we immediately open the port again.
604 1.3 uch */
605 1.3 uch if (ISSET(tp->t_cflag, HUPCL)) {
606 1.3 uch txcom_modem(sc, 0);
607 1.3 uch (void) tsleep(sc, TTIPRI, ttclos, hz);
608 1.3 uch }
609 1.3 uch
610 1.3 uch
611 1.3 uch /* Turn off interrupts if not the console. */
612 1.3 uch if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
613 1.3 uch txcom_disable(sc->sc_chip);
614 1.3 uch }
615 1.1 uch
616 1.3 uch splx(s);
617 1.3 uch }
618 1.1 uch
619 1.3 uch __inline const char *
620 1.3 uch __txcom_slotname(slot)
621 1.3 uch int slot;
622 1.3 uch {
623 1.3 uch static const char *slotname[] = {"UARTA", "UARTB"};
624 1.3 uch if (slot != 0 && slot != 1) {
625 1.3 uch return "bogus slot";
626 1.3 uch } else {
627 1.3 uch return slotname[slot];
628 1.1 uch }
629 1.2 uch }
630 1.2 uch
631 1.2 uch int
632 1.3 uch txcom_frameerr_intr(arg)
633 1.3 uch void *arg;
634 1.3 uch {
635 1.3 uch struct txcom_softc *sc = arg;
636 1.3 uch
637 1.3 uch printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot));
638 1.3 uch
639 1.3 uch return 0;
640 1.3 uch }
641 1.3 uch
642 1.3 uch int
643 1.3 uch txcom_parityerr_intr(arg)
644 1.3 uch void *arg;
645 1.3 uch {
646 1.3 uch struct txcom_softc *sc = arg;
647 1.3 uch
648 1.3 uch printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot));
649 1.2 uch
650 1.2 uch return 0;
651 1.1 uch }
652 1.1 uch
653 1.1 uch int
654 1.3 uch txcom_break_intr(arg)
655 1.1 uch void *arg;
656 1.1 uch {
657 1.1 uch struct txcom_softc *sc = arg;
658 1.3 uch
659 1.3 uch printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot));
660 1.3 uch
661 1.3 uch return 0;
662 1.3 uch }
663 1.3 uch
664 1.3 uch int
665 1.3 uch txcom_rxintr(arg)
666 1.3 uch void *arg;
667 1.3 uch {
668 1.3 uch struct txcom_softc *sc = arg;
669 1.3 uch struct txcom_chip *chip = sc->sc_chip;
670 1.1 uch u_int8_t c;
671 1.1 uch
672 1.3 uch c = TX39_UARTRXHOLD_RXDATA(
673 1.3 uch tx_conf_read(chip->sc_tc,
674 1.3 uch TX39_UARTRXHOLD_REG(chip->sc_slot)));
675 1.3 uch
676 1.3 uch sc->sc_rbuf[sc->sc_rbput] = c;
677 1.3 uch sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK;
678 1.3 uch
679 1.8 thorpej callout_reset(&sc->sc_rxsoft_ch, 1, txcom_rxsoft, sc);
680 1.1 uch
681 1.1 uch return 0;
682 1.1 uch }
683 1.1 uch
684 1.3 uch void
685 1.3 uch txcom_rxsoft(arg)
686 1.3 uch void *arg;
687 1.3 uch {
688 1.3 uch struct txcom_softc *sc = arg;
689 1.3 uch struct tty *tp = sc->sc_tty;
690 1.3 uch int (*rint) __P((int c, struct tty *tp));
691 1.3 uch int code;
692 1.3 uch int s, end, get;
693 1.3 uch
694 1.3 uch rint = linesw[tp->t_line].l_rint;
695 1.3 uch
696 1.3 uch s = spltty();
697 1.3 uch end = sc->sc_rbput;
698 1.3 uch get = sc->sc_rbget;
699 1.3 uch
700 1.3 uch while (get != end) {
701 1.3 uch code = sc->sc_rbuf[get];
702 1.3 uch
703 1.3 uch if ((*rint)(code, tp) == -1) {
704 1.3 uch /*
705 1.3 uch * The line discipline's buffer is out of space.
706 1.3 uch */
707 1.3 uch }
708 1.3 uch get = (get + 1) % TXCOM_RING_MASK;
709 1.3 uch }
710 1.3 uch sc->sc_rbget = get;
711 1.3 uch
712 1.3 uch splx(s);
713 1.3 uch }
714 1.3 uch
715 1.1 uch int
716 1.3 uch txcom_txintr(arg)
717 1.1 uch void *arg;
718 1.1 uch {
719 1.1 uch struct txcom_softc *sc = arg;
720 1.3 uch struct txcom_chip *chip = sc->sc_chip;
721 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
722 1.1 uch
723 1.3 uch if (sc->sc_tbc > 0) {
724 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
725 1.3 uch (*sc->sc_tba &
726 1.3 uch TX39_UARTTXHOLD_TXDATA_MASK));
727 1.3 uch sc->sc_tbc--;
728 1.3 uch sc->sc_tba++;
729 1.3 uch } else {
730 1.8 thorpej callout_reset(&sc->sc_rxsoft_ch, 1, txcom_txsoft, sc);
731 1.3 uch }
732 1.1 uch
733 1.1 uch return 0;
734 1.1 uch }
735 1.1 uch
736 1.3 uch void
737 1.3 uch txcom_txsoft(arg)
738 1.3 uch void *arg;
739 1.3 uch {
740 1.3 uch struct txcom_softc *sc = arg;
741 1.3 uch struct tty *tp = sc->sc_tty;
742 1.3 uch int s = spltty();
743 1.3 uch
744 1.3 uch CLR(tp->t_state, TS_BUSY);
745 1.3 uch if (ISSET(tp->t_state, TS_FLUSH)) {
746 1.3 uch CLR(tp->t_state, TS_FLUSH);
747 1.3 uch } else {
748 1.3 uch ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
749 1.3 uch }
750 1.3 uch
751 1.3 uch (*linesw[tp->t_line].l_start)(tp);
752 1.3 uch
753 1.3 uch splx(s);
754 1.3 uch }
755 1.1 uch
756 1.1 uch int
757 1.1 uch txcomopen(dev, flag, mode, p)
758 1.1 uch dev_t dev;
759 1.1 uch int flag, mode;
760 1.1 uch struct proc *p;
761 1.1 uch {
762 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
763 1.3 uch struct txcom_chip *chip;
764 1.3 uch struct tty *tp;
765 1.3 uch int s, err;
766 1.1 uch
767 1.3 uch if (!sc)
768 1.3 uch return ENXIO;
769 1.3 uch
770 1.3 uch chip = sc->sc_chip;
771 1.3 uch tp = sc->sc_tty;
772 1.3 uch
773 1.3 uch if (ISSET(tp->t_state, TS_ISOPEN) &&
774 1.3 uch ISSET(tp->t_state, TS_XCLUDE) &&
775 1.3 uch p->p_ucred->cr_uid != 0)
776 1.3 uch return (EBUSY);
777 1.3 uch
778 1.3 uch s = spltty();
779 1.3 uch
780 1.6 uch if (txcom_enable(sc->sc_chip)) {
781 1.6 uch splx(s);
782 1.5 uch goto out;
783 1.6 uch }
784 1.5 uch /*
785 1.5 uch * Do the following iff this is a first open.
786 1.5 uch */
787 1.5 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
788 1.5 uch struct termios t;
789 1.5 uch
790 1.5 uch tp->t_dev = dev;
791 1.1 uch
792 1.5 uch t.c_ispeed = 0;
793 1.5 uch if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
794 1.5 uch t.c_ospeed = chip->sc_speed;
795 1.5 uch t.c_cflag = chip->sc_cflag;
796 1.5 uch } else {
797 1.5 uch t.c_ospeed = TTYDEF_SPEED;
798 1.5 uch t.c_cflag = TTYDEF_CFLAG;
799 1.5 uch }
800 1.3 uch
801 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL))
802 1.5 uch SET(t.c_cflag, CLOCAL);
803 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS))
804 1.5 uch SET(t.c_cflag, CRTSCTS);
805 1.5 uch if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF))
806 1.5 uch SET(t.c_cflag, MDMBUF);
807 1.5 uch
808 1.5 uch /* Make sure txcomparam() will do something. */
809 1.5 uch tp->t_ospeed = 0;
810 1.5 uch txcomparam(tp, &t);
811 1.5 uch
812 1.5 uch tp->t_iflag = TTYDEF_IFLAG;
813 1.5 uch tp->t_oflag = TTYDEF_OFLAG;
814 1.5 uch tp->t_lflag = TTYDEF_LFLAG;
815 1.1 uch
816 1.5 uch ttychars(tp);
817 1.5 uch ttsetwater(tp);
818 1.3 uch
819 1.5 uch /*
820 1.5 uch * Turn on DTR. We must always do this, even if carrier is not
821 1.5 uch * present, because otherwise we'd have to use TIOCSDTR
822 1.5 uch * immediately after setting CLOCAL, which applications do not
823 1.5 uch * expect. We always assert DTR while the device is open
824 1.5 uch * unless explicitly requested to deassert it.
825 1.5 uch */
826 1.5 uch txcom_modem(sc, 1);
827 1.3 uch
828 1.5 uch /* Clear the input ring, and unblock. */
829 1.5 uch sc->sc_rbget = sc->sc_rbput = 0;
830 1.5 uch }
831 1.3 uch
832 1.3 uch splx(s);
833 1.6 uch #define TXCOMDIALOUT(x) (minor(x) & 0x80000)
834 1.6 uch if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) {
835 1.1 uch DPRINTF(("txcomopen: ttyopen failed\n"));
836 1.3 uch goto out;
837 1.1 uch }
838 1.1 uch if ((err = (*linesw[tp->t_line].l_open)(dev, tp))) {
839 1.1 uch DPRINTF(("txcomopen: line dicipline open failed\n"));
840 1.3 uch goto out;
841 1.3 uch }
842 1.3 uch
843 1.3 uch return err;
844 1.3 uch
845 1.3 uch out:
846 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
847 1.3 uch /*
848 1.3 uch * We failed to open the device, and nobody else had it opened.
849 1.3 uch * Clean up the state as appropriate.
850 1.3 uch */
851 1.3 uch txcom_shutdown(sc);
852 1.1 uch }
853 1.1 uch
854 1.1 uch return err;
855 1.3 uch
856 1.1 uch }
857 1.1 uch
858 1.1 uch int
859 1.1 uch txcomclose(dev, flag, mode, p)
860 1.1 uch dev_t dev;
861 1.1 uch int flag, mode;
862 1.1 uch struct proc *p;
863 1.1 uch {
864 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
865 1.1 uch struct tty *tp = sc->sc_tty;
866 1.1 uch
867 1.3 uch /* XXX This is for cons.c. */
868 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN))
869 1.3 uch return 0;
870 1.3 uch
871 1.1 uch (*linesw[tp->t_line].l_close)(tp, flag);
872 1.1 uch ttyclose(tp);
873 1.1 uch
874 1.3 uch if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
875 1.3 uch /*
876 1.3 uch * Although we got a last close, the device may still be in
877 1.3 uch * use; e.g. if this was the dialout node, and there are still
878 1.3 uch * processes waiting for carrier on the non-dialout node.
879 1.3 uch */
880 1.3 uch txcom_shutdown(sc);
881 1.3 uch }
882 1.3 uch
883 1.1 uch return 0;
884 1.1 uch }
885 1.1 uch
886 1.1 uch int
887 1.1 uch txcomread(dev, uio, flag)
888 1.1 uch dev_t dev;
889 1.1 uch struct uio *uio;
890 1.1 uch int flag;
891 1.1 uch {
892 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
893 1.1 uch struct tty *tp = sc->sc_tty;
894 1.3 uch
895 1.1 uch return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
896 1.1 uch }
897 1.1 uch
898 1.1 uch int
899 1.1 uch txcomwrite(dev, uio, flag)
900 1.1 uch dev_t dev;
901 1.1 uch struct uio *uio;
902 1.1 uch int flag;
903 1.1 uch {
904 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
905 1.1 uch struct tty *tp = sc->sc_tty;
906 1.1 uch
907 1.1 uch return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
908 1.1 uch }
909 1.1 uch
910 1.1 uch struct tty *
911 1.1 uch txcomtty(dev)
912 1.1 uch dev_t dev;
913 1.1 uch {
914 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
915 1.3 uch
916 1.3 uch return sc->sc_tty;
917 1.1 uch }
918 1.1 uch
919 1.1 uch int
920 1.1 uch txcomioctl(dev, cmd, data, flag, p)
921 1.1 uch dev_t dev;
922 1.1 uch u_long cmd;
923 1.1 uch caddr_t data;
924 1.1 uch int flag;
925 1.1 uch struct proc *p;
926 1.1 uch {
927 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
928 1.1 uch struct tty *tp = sc->sc_tty;
929 1.3 uch int s, err;
930 1.3 uch
931 1.3 uch err = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
932 1.3 uch if (err >= 0) {
933 1.3 uch return err;
934 1.3 uch }
935 1.3 uch
936 1.3 uch err = ttioctl(tp, cmd, data, flag, p);
937 1.3 uch if (err >= 0) {
938 1.3 uch return err;
939 1.3 uch }
940 1.3 uch
941 1.3 uch err = 0;
942 1.3 uch
943 1.3 uch s = spltty();
944 1.3 uch
945 1.3 uch switch (cmd) {
946 1.5 uch default:
947 1.5 uch err = ENOTTY;
948 1.5 uch break;
949 1.5 uch
950 1.3 uch case TIOCSBRK:
951 1.3 uch txcom_break(sc, 1);
952 1.3 uch break;
953 1.3 uch
954 1.3 uch case TIOCCBRK:
955 1.3 uch txcom_break(sc, 0);
956 1.3 uch break;
957 1.3 uch
958 1.3 uch case TIOCSDTR:
959 1.3 uch txcom_modem(sc, 1);
960 1.3 uch break;
961 1.3 uch
962 1.3 uch case TIOCCDTR:
963 1.3 uch txcom_modem(sc, 0);
964 1.3 uch break;
965 1.3 uch
966 1.3 uch case TIOCGFLAGS:
967 1.3 uch *(int *)data = sc->sc_chip->sc_swflags;
968 1.3 uch break;
969 1.3 uch
970 1.3 uch case TIOCSFLAGS:
971 1.3 uch err = suser(p->p_ucred, &p->p_acflag);
972 1.3 uch if (err) {
973 1.3 uch break;
974 1.3 uch }
975 1.3 uch sc->sc_chip->sc_swflags = *(int *)data;
976 1.3 uch break;
977 1.3 uch
978 1.3 uch }
979 1.1 uch
980 1.3 uch splx(s);
981 1.1 uch
982 1.3 uch return err;
983 1.1 uch }
984 1.1 uch
985 1.1 uch void
986 1.1 uch txcomstop(tp, flag)
987 1.1 uch struct tty *tp;
988 1.1 uch int flag;
989 1.1 uch {
990 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
991 1.1 uch int s;
992 1.1 uch
993 1.1 uch s = spltty();
994 1.1 uch
995 1.1 uch if (ISSET(tp->t_state, TS_BUSY)) {
996 1.1 uch /* Stop transmitting at the next chunk. */
997 1.1 uch sc->sc_tbc = 0;
998 1.1 uch sc->sc_heldtbc = 0;
999 1.1 uch if (!ISSET(tp->t_state, TS_TTSTOP))
1000 1.1 uch SET(tp->t_state, TS_FLUSH);
1001 1.1 uch }
1002 1.3 uch
1003 1.1 uch splx(s);
1004 1.1 uch }
1005 1.1 uch
1006 1.1 uch void
1007 1.1 uch txcomstart(tp)
1008 1.1 uch struct tty *tp;
1009 1.1 uch {
1010 1.1 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
1011 1.3 uch struct txcom_chip *chip = sc->sc_chip;
1012 1.3 uch tx_chipset_tag_t tc = chip->sc_tc;
1013 1.3 uch int slot = chip->sc_slot;
1014 1.1 uch int s;
1015 1.1 uch
1016 1.1 uch s = spltty();
1017 1.3 uch
1018 1.3 uch if (!__txcom_txbufready(chip, 0) ||
1019 1.3 uch ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
1020 1.3 uch goto out;
1021 1.1 uch
1022 1.1 uch if (tp->t_outq.c_cc <= tp->t_lowat) {
1023 1.1 uch if (ISSET(tp->t_state, TS_ASLEEP)) {
1024 1.1 uch CLR(tp->t_state, TS_ASLEEP);
1025 1.1 uch wakeup(&tp->t_outq);
1026 1.1 uch }
1027 1.1 uch selwakeup(&tp->t_wsel);
1028 1.1 uch if (tp->t_outq.c_cc == 0)
1029 1.3 uch goto out;
1030 1.1 uch }
1031 1.3 uch
1032 1.1 uch sc->sc_tba = tp->t_outq.c_cf;
1033 1.1 uch sc->sc_tbc = ndqb(&tp->t_outq, 0);
1034 1.3 uch SET(tp->t_state, TS_BUSY);
1035 1.3 uch
1036 1.3 uch /* Output the first character of the contiguous buffer. */
1037 1.3 uch tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot),
1038 1.3 uch (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK));
1039 1.3 uch
1040 1.3 uch sc->sc_tbc--;
1041 1.3 uch sc->sc_tba++;
1042 1.1 uch
1043 1.3 uch out:
1044 1.1 uch splx(s);
1045 1.1 uch }
1046 1.1 uch
1047 1.3 uch /*
1048 1.3 uch * Set TXcom tty parameters from termios.
1049 1.3 uch */
1050 1.1 uch int
1051 1.1 uch txcomparam(tp, t)
1052 1.1 uch struct tty *tp;
1053 1.1 uch struct termios *t;
1054 1.1 uch {
1055 1.3 uch struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
1056 1.3 uch struct txcom_chip *chip;
1057 1.5 uch int ospeed;
1058 1.3 uch int s;
1059 1.3 uch
1060 1.3 uch if (!sc)
1061 1.3 uch return ENXIO;
1062 1.3 uch
1063 1.3 uch ospeed = t->c_ospeed;
1064 1.3 uch
1065 1.3 uch /* Check requested parameters. */
1066 1.3 uch if (ospeed < 0) {
1067 1.3 uch return EINVAL;
1068 1.3 uch }
1069 1.3 uch if (t->c_ispeed && t->c_ispeed != ospeed) {
1070 1.3 uch return EINVAL;
1071 1.3 uch }
1072 1.3 uch
1073 1.3 uch s = spltty();
1074 1.3 uch chip = sc->sc_chip;
1075 1.3 uch /*
1076 1.3 uch * For the console, always force CLOCAL and !HUPCL, so that the port
1077 1.3 uch * is always active.
1078 1.3 uch */
1079 1.3 uch if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) ||
1080 1.3 uch ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
1081 1.5 uch SET(t->c_cflag, CLOCAL);
1082 1.5 uch CLR(t->c_cflag, HUPCL);
1083 1.3 uch }
1084 1.3 uch splx(s);
1085 1.3 uch
1086 1.3 uch /*
1087 1.6 uch * If we're not in a mode that assumes a connection is present, then
1088 1.6 uch * ignore carrier changes.
1089 1.6 uch */
1090 1.6 uch if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
1091 1.6 uch chip->sc_dcd = 0;
1092 1.6 uch else
1093 1.6 uch chip->sc_dcd = 1;
1094 1.6 uch
1095 1.6 uch /*
1096 1.3 uch * Only whack the UART when params change.
1097 1.3 uch * Some callers need to clear tp->t_ospeed
1098 1.3 uch * to make sure initialization gets done.
1099 1.3 uch */
1100 1.5 uch if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) {
1101 1.3 uch return 0;
1102 1.3 uch }
1103 1.3 uch
1104 1.3 uch s = spltty();
1105 1.3 uch chip = sc->sc_chip;
1106 1.3 uch chip->sc_speed = ospeed;
1107 1.5 uch chip->sc_cflag = t->c_cflag;
1108 1.3 uch
1109 1.3 uch txcom_setmode(chip);
1110 1.3 uch txcom_setbaudrate(chip);
1111 1.6 uch
1112 1.3 uch /* And copy to tty. */
1113 1.3 uch tp->t_ispeed = 0;
1114 1.3 uch tp->t_ospeed = chip->sc_speed;
1115 1.3 uch tp->t_cflag = chip->sc_cflag;
1116 1.3 uch
1117 1.3 uch /*
1118 1.6 uch * Update the tty layer's idea of the carrier bit, in case we changed
1119 1.6 uch * CLOCAL or MDMBUF. We don't hang up here; we only do that by
1120 1.6 uch * explicit request.
1121 1.6 uch */
1122 1.6 uch (void) (*linesw[tp->t_line].l_modem)(tp, chip->sc_dcd);
1123 1.6 uch
1124 1.6 uch /*
1125 1.3 uch * If hardware flow control is disabled, unblock any hard flow
1126 1.3 uch * control state.
1127 1.3 uch */
1128 1.3 uch if (!ISSET(chip->sc_cflag, CHWFLOW)) {
1129 1.3 uch txcomstart(tp);
1130 1.3 uch }
1131 1.3 uch
1132 1.3 uch splx(s);
1133 1.6 uch
1134 1.6 uch return 0;
1135 1.6 uch }
1136 1.6 uch
1137 1.6 uch void
1138 1.6 uch txcom_dump(chip)
1139 1.6 uch struct txcom_chip *chip;
1140 1.6 uch {
1141 1.6 uch tx_chipset_tag_t tc = chip->sc_tc;
1142 1.6 uch int slot = chip->sc_slot;
1143 1.6 uch txreg_t reg;
1144 1.6 uch
1145 1.6 uch reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
1146 1.6 uch #define ISSETPRINT(r, m) \
1147 1.6 uch __is_set_print(r, TX39_UARTCTRL1_##m, #m)
1148 1.6 uch ISSETPRINT(reg, UARTON);
1149 1.6 uch ISSETPRINT(reg, EMPTY);
1150 1.6 uch ISSETPRINT(reg, PRXHOLDFULL);
1151 1.6 uch ISSETPRINT(reg, RXHOLDFULL);
1152 1.6 uch ISSETPRINT(reg, ENDMARX);
1153 1.6 uch ISSETPRINT(reg, ENDMATX);
1154 1.6 uch ISSETPRINT(reg, TESTMODE);
1155 1.6 uch ISSETPRINT(reg, ENBREAHALT);
1156 1.6 uch ISSETPRINT(reg, ENDMATEST);
1157 1.6 uch ISSETPRINT(reg, ENDMALOOP);
1158 1.6 uch ISSETPRINT(reg, PULSEOPT2);
1159 1.6 uch ISSETPRINT(reg, PULSEOPT1);
1160 1.6 uch ISSETPRINT(reg, DTINVERT);
1161 1.6 uch ISSETPRINT(reg, DISTXD);
1162 1.6 uch ISSETPRINT(reg, TWOSTOP);
1163 1.6 uch ISSETPRINT(reg, LOOPBACK);
1164 1.6 uch ISSETPRINT(reg, BIT7);
1165 1.6 uch ISSETPRINT(reg, EVENPARITY);
1166 1.6 uch ISSETPRINT(reg, ENPARITY);
1167 1.6 uch ISSETPRINT(reg, ENUART);
1168 1.6 uch }
1169 1.6 uch
1170 1.6 uch /*
1171 1.6 uch * Compaq-C function.
1172 1.6 uch */
1173 1.6 uch #include <hpcmips/tx/tx39iovar.h>
1174 1.6 uch
1175 1.6 uch int __compaq_uart_dcd __P((void*));
1176 1.6 uch int __mobilon_uart_dcd __P((void*));
1177 1.6 uch
1178 1.6 uch int
1179 1.6 uch __compaq_uart_dcd(arg)
1180 1.6 uch void *arg;
1181 1.6 uch {
1182 1.6 uch struct txcom_softc *sc = arg;
1183 1.6 uch struct tty *tp = sc->sc_tty;
1184 1.6 uch struct txcom_chip *chip = sc->sc_chip;
1185 1.6 uch int modem;
1186 1.6 uch
1187 1.6 uch switch (tx39intrvec) {
1188 1.6 uch default:
1189 1.6 uch return 0;
1190 1.6 uch case ((3 << 16) | 30): /* MFIO 30 positive edge */
1191 1.6 uch tx39io_portout(chip->sc_tc, TXPORT(TXMFIO, 31), TXON);
1192 1.6 uch modem = 1;
1193 1.6 uch break;
1194 1.6 uch case ((4 << 16) | 30): /* MFIO 30 negative edge */
1195 1.6 uch tx39io_portout(chip->sc_tc, TXPORT(TXMFIO, 31), TXOFF);
1196 1.6 uch modem = 1;
1197 1.6 uch break;
1198 1.6 uch case ((3 << 16) | 5): /* MFIO 5 positive edge */
1199 1.6 uch tx39io_portout(chip->sc_tc, TXPORT(TXMFIO, 6), TXON);
1200 1.6 uch modem = 0;
1201 1.6 uch break;
1202 1.6 uch case ((4 << 16) | 5): /* MFIO 5 negative edge */
1203 1.6 uch tx39io_portout(chip->sc_tc, TXPORT(TXMFIO, 6), TXOFF);
1204 1.6 uch modem = 0;
1205 1.6 uch break;
1206 1.6 uch }
1207 1.6 uch
1208 1.6 uch if (modem && chip->sc_dcd)
1209 1.6 uch (void) (*linesw[tp->t_line].l_modem)(tp, chip->sc_dcd);
1210 1.6 uch
1211 1.6 uch return 0;
1212 1.6 uch }
1213 1.6 uch
1214 1.6 uch int
1215 1.6 uch __mobilon_uart_dcd(arg)
1216 1.6 uch void *arg;
1217 1.6 uch {
1218 1.6 uch struct txcom_softc *sc = arg;
1219 1.6 uch struct tty *tp = sc->sc_tty;
1220 1.6 uch struct txcom_chip *chip = sc->sc_chip;
1221 1.6 uch int modem;
1222 1.6 uch
1223 1.6 uch switch (tx39intrvec) {
1224 1.6 uch default:
1225 1.6 uch return 0;
1226 1.6 uch case ((5 << 16) | 4): /* IO 4 positive edge */
1227 1.6 uch modem = 1;
1228 1.6 uch break;
1229 1.6 uch case ((5 << 16) | 11): /* IO 4 negative edge */
1230 1.6 uch modem = 1;
1231 1.6 uch break;
1232 1.6 uch case ((5 << 16) | 6): /* IO 6 positive edge */
1233 1.6 uch modem = 0;
1234 1.6 uch break;
1235 1.6 uch case ((5 << 16) | 13): /* IO 6 negative edge */
1236 1.6 uch modem = 0;
1237 1.6 uch break;
1238 1.6 uch }
1239 1.6 uch
1240 1.6 uch if (modem && chip->sc_dcd)
1241 1.6 uch (void) (*linesw[tp->t_line].l_modem)(tp, chip->sc_dcd);
1242 1.3 uch
1243 1.1 uch return 0;
1244 1.1 uch }
1245