txcom.c revision 1.1
1 /* $NetBSD: txcom.c,v 1.1 1999/11/20 19:56:39 uch Exp $ */ 2 3 /* 4 * Copyright (c) 1999, by UCHIYAMA Yasushi 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. The name of the developer may NOT be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 #include "opt_tx39_debug.h" 29 #include "opt_tx39uartdebug.h" 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/device.h> 34 35 #include <sys/proc.h> /* tsleep/wakeup */ 36 37 #include <sys/ioctl.h> 38 #include <sys/select.h> 39 #include <sys/file.h> 40 41 #include <sys/tty.h> 42 #include <sys/conf.h> 43 #include <dev/cons.h> /* consdev */ 44 45 #include <machine/bus.h> 46 47 #include <hpcmips/tx/tx39var.h> 48 #include <hpcmips/tx/tx39icureg.h> 49 #include <hpcmips/tx/tx39uartvar.h> 50 #include <hpcmips/tx/tx39uartreg.h> 51 52 #include <hpcmips/tx/tx39clockreg.h> /* XXX */ 53 54 #define SET(t, f) (t) |= (f) 55 #define CLR(t, f) (t) &= ~(f) 56 #define ISSET(t, f) ((t) & (f)) 57 58 #ifdef TX39UARTDEBUG 59 #define DPRINTF(arg) printf arg 60 #else 61 #define DPRINTF(arg) 62 #endif 63 64 #define MAXBUF 16 65 struct txcom_buf { 66 int b_cnt; 67 int b_in; 68 int b_out; 69 char b_buf[MAXBUF]; 70 }; 71 72 #define TXCOM_HW_CONSOLE 0x40 73 struct txcom_softc { 74 struct device sc_dev; 75 struct tty *sc_tty; 76 tx_chipset_tag_t sc_tc; 77 int sc_slot; /* UARTA or UARTB */ 78 int sc_cflag; 79 int sc_speed; 80 struct txcom_buf *sc_rxbuf; 81 struct txcom_buf *sc_txbuf; 82 char **sc_msg; 83 int sc_hwflags; 84 u_int8_t *sc_tba; /* transmit buffer address */ 85 int sc_tbc, sc_heldtbc; /* transmit byte count */ 86 u_int8_t sc_rbuf; /* XXX */ 87 88 }; 89 volatile int com_softrxintr_scheduled; 90 91 extern struct cfdriver txcom_cd; 92 93 int txcom_match __P((struct device*, struct cfdata*, void*)); 94 void txcom_attach __P((struct device*, struct device*, void*)); 95 int txcom_txintr __P((void*)); 96 int txcom_a_rxintr __P((void*)); 97 int txcom_b_rxintr __P((void*)); 98 void txcom_rxsoft __P((void*)); 99 100 int txcom_cngetc __P((dev_t)); 101 void txcom_cnputc __P((dev_t, int)); 102 void txcom_cnpollc __P((dev_t, int)); 103 104 void txcomstart __P((struct tty*)); 105 int txcomparam __P((struct tty*, struct termios*)); 106 cdev_decl(txcom); 107 108 /* Serial console */ 109 static struct consdev txcomcons = { 110 NULL, NULL, txcom_cngetc, txcom_cnputc, 111 txcom_cnpollc, NODEV, CN_NORMAL 112 }; 113 static struct txcom_softc cn_sc; 114 115 struct cfattach txcom_ca = { 116 sizeof(struct txcom_softc), txcom_match, txcom_attach 117 }; 118 119 int txcom_enable __P((struct txcom_softc*)); 120 void txcom_disable __P((struct txcom_softc*)); 121 void txcom_setmode __P((struct txcom_softc*)); 122 void txcom_setbaudrate __P((struct txcom_softc*)); 123 124 int 125 txcom_match(parent, cf, aux) 126 struct device *parent; 127 struct cfdata *cf; 128 void *aux; 129 { 130 /* if the autoconfiguration got this far, there's a slot here */ 131 return 1; 132 } 133 134 void 135 txcom_attach(parent, self, aux) 136 struct device *parent; 137 struct device *self; 138 void *aux; 139 { 140 struct tx39uart_attach_args *ua = aux; 141 struct txcom_softc *sc = (void*)self; 142 tx_chipset_tag_t tc; 143 struct tty *tp; 144 145 printf("\n"); 146 147 /* Check this slot used as serial console */ 148 if (ua->ua_slot == cn_sc.sc_slot && 149 (cn_sc.sc_hwflags & TXCOM_HW_CONSOLE)) { 150 memcpy(&cn_sc, self, sizeof(struct device)); 151 memcpy(self, &cn_sc, sizeof(struct txcom_softc)); 152 } 153 154 tc = sc->sc_tc = ua->ua_tc; 155 sc->sc_slot = ua->ua_slot; 156 157 tp = ttymalloc(); 158 tp->t_oproc = txcomstart; 159 tp->t_param = txcomparam; 160 tp->t_hwiflow = NULL; 161 sc->sc_tty = tp; 162 cn_sc.sc_tty = tp; 163 tty_attach(tp); 164 165 if (ISSET(sc->sc_hwflags, TXCOM_HW_CONSOLE)) { 166 int maj; 167 /* locate the major number */ 168 for (maj = 0; maj < nchrdev; maj++) 169 if (cdevsw[maj].d_open == txcomopen) 170 break; 171 172 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 173 174 printf("%s: console\n", sc->sc_dev.dv_xname); 175 } 176 177 178 /* 179 * Enable interrupt 180 */ 181 switch (sc->sc_slot) { 182 case TX39_UARTA: 183 tx_intr_establish(tc, MAKEINTR(2, TX39_INTRSTATUS2_UARTARXINT), 184 IST_EDGE, IPL_TTY, 185 txcom_a_rxintr, sc); 186 break; 187 case TX39_UARTB: 188 tx_intr_establish(tc, MAKEINTR(2, TX39_INTRSTATUS2_UARTBRXINT), 189 IST_EDGE, IPL_TTY, 190 txcom_b_rxintr, sc); 191 break; 192 } 193 } 194 195 int 196 txcom_enable(sc) 197 struct txcom_softc *sc; 198 { 199 tx_chipset_tag_t tc; 200 txreg_t reg; 201 int slot; 202 203 tc = sc->sc_tc; 204 slot = sc->sc_slot; 205 206 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 207 /* Power */ 208 reg |= TX39_UARTCTRL1_ENUART; 209 reg &= ~TX39_UARTCTRL1_ENBREAHALT; 210 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 211 /* 212 * XXX Disable DMA (DMA not coded yet) 213 */ 214 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 215 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 216 217 /* XXX Clock */ 218 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 219 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 220 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 221 222 223 return 0; 224 } 225 226 void 227 txcom_disable(sc) 228 struct txcom_softc *sc; 229 { 230 tx_chipset_tag_t tc; 231 txreg_t reg; 232 int slot; 233 234 tc = sc->sc_tc; 235 slot = sc->sc_slot; 236 237 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 238 /* DMA */ 239 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 240 /* Power */ 241 reg &= ~TX39_UARTCTRL1_ENUART; 242 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 243 /* Clock */ 244 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 245 reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 246 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 247 248 } 249 250 int 251 txcom_cnattach(slot, speed, cflag) 252 int slot, speed, cflag; 253 { 254 cn_tab = &txcomcons; 255 256 cn_sc.sc_tc = tx_conf_get_tag(); 257 cn_sc.sc_slot = slot; 258 cn_sc.sc_cflag = cflag; 259 cn_sc.sc_speed = speed; 260 cn_sc.sc_hwflags |= TXCOM_HW_CONSOLE; 261 #ifdef WINCE_DEFAULT_SETTING 262 #warning WINCE_DEFAULT_SETTING 263 #else 264 txcom_enable(&cn_sc); 265 txcom_setmode(&cn_sc); 266 txcom_setbaudrate(&cn_sc); 267 #endif 268 return 0; 269 } 270 271 int 272 txcom_cngetc(dev) 273 dev_t dev; 274 { 275 tx_chipset_tag_t tc; 276 int ofs, c; 277 tc = cn_sc.sc_tc; 278 279 ofs = TX39_UARTCTRL1_REG(cn_sc.sc_slot); 280 281 while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs))) 282 ; 283 ofs = TX39_UARTRXHOLD_REG(cn_sc.sc_slot); 284 c = TX39_UARTRXHOLD_RXDATA(tx_conf_read(tc, ofs)); 285 if (c == '\r') { 286 c = '\n'; 287 } 288 289 return c; 290 } 291 292 void 293 txcom_cnputc(dev, c) 294 dev_t dev; 295 int c; 296 { 297 tx_chipset_tag_t tc; 298 int ofs; 299 300 tc = cn_sc.sc_tc; 301 ofs = TX39_UARTCTRL1_REG(cn_sc.sc_slot); 302 303 while (!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY)) 304 delay(20); 305 306 tx_conf_write(tc, TX39_UARTTXHOLD_REG(cn_sc.sc_slot), 307 (c & TX39_UARTTXHOLD_TXDATA_MASK)); 308 309 while (!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY)) 310 delay(20); 311 312 } 313 314 void 315 txcom_cnpollc(dev, on) 316 dev_t dev; 317 int on; 318 { 319 } 320 321 void 322 txcom_setmode(sc) 323 struct txcom_softc *sc; 324 { 325 tcflag_t cflag; 326 txreg_t reg; 327 328 cflag = sc->sc_cflag; 329 reg = tx_conf_read(sc->sc_tc, TX39_UARTCTRL1_REG(sc->sc_slot)); 330 331 switch (ISSET(cflag, CSIZE)) { 332 default: 333 printf("txcom_setmode: CS7, CS8 only. use CS7"); 334 /* FALL THROUGH */ 335 case CS7: 336 reg |= TX39_UARTCTRL1_BIT7; 337 break; 338 case CS8: 339 reg &= ~TX39_UARTCTRL1_BIT7; 340 break; 341 } 342 if (ISSET(cflag, PARENB)) { 343 reg |= TX39_UARTCTRL1_ENPARITY; 344 if (ISSET(cflag, PARODD)) { 345 reg &= ~TX39_UARTCTRL1_EVENPARITY; 346 } else { 347 reg |= TX39_UARTCTRL1_EVENPARITY; 348 } 349 } else { 350 reg &= ~TX39_UARTCTRL1_ENPARITY; 351 } 352 if (ISSET(cflag, CSTOPB)) { 353 reg |= TX39_UARTCTRL1_TWOSTOP; 354 } 355 tx_conf_write(sc->sc_tc, TX39_UARTCTRL1_REG(sc->sc_slot), reg); 356 357 } 358 359 void 360 txcom_setbaudrate(sc) 361 struct txcom_softc *sc; 362 { 363 int baudrate; 364 txreg_t reg; 365 366 baudrate = TX39_UARTCLOCKHZ / (sc->sc_speed * 16) - 1; 367 reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate); 368 369 tx_conf_write(sc->sc_tc, TX39_UARTCTRL2_REG(sc->sc_slot), reg); 370 } 371 372 void 373 txcom_rxsoft(arg) 374 void *arg; 375 { 376 struct txcom_softc *sc = arg; 377 struct tty *tp = sc->sc_tty; 378 int (*rint) __P((int c, struct tty *tp)) = linesw[tp->t_line].l_rint; 379 int code = sc->sc_rbuf; 380 381 DPRINTF(("txcom_rxsoft %c %08x\n", code, code)); 382 com_softrxintr_scheduled = 0; 383 384 if ((*rint)(code, tp) == -1) { 385 386 } 387 } 388 389 int 390 txcom_a_rxintr(arg) 391 void *arg; 392 { 393 struct txcom_softc *sc = arg; 394 u_int8_t c; 395 396 if (!com_softrxintr_scheduled) { 397 com_softrxintr_scheduled = 1; 398 timeout(txcom_rxsoft, arg, 1); 399 } 400 DPRINTF(("txcom_rxintr\n")); 401 c = 0xff & tx_conf_read(sc->sc_tc, TX39_UARTRXHOLD_REG(sc->sc_slot)); 402 sc->sc_rbuf = c; 403 404 return 0; 405 } 406 407 int 408 txcom_b_rxintr(arg) 409 void *arg; 410 { 411 struct txcom_softc *sc = arg; 412 u_int8_t c; 413 414 if (!com_softrxintr_scheduled) { 415 com_softrxintr_scheduled = 1; 416 timeout(txcom_rxsoft, arg, 1); 417 } 418 DPRINTF(("txcom_rxintr\n")); 419 c = 0xff & tx_conf_read(sc->sc_tc, TX39_UARTRXHOLD_REG(sc->sc_slot)); 420 sc->sc_rbuf = c; 421 422 return 0; 423 } 424 425 426 int 427 txcomopen(dev, flag, mode, p) 428 dev_t dev; 429 int flag, mode; 430 struct proc *p; 431 { 432 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 433 struct tty *tp = sc->sc_tty; 434 int err; 435 struct termios t; 436 437 tp->t_dev = dev; 438 439 /* XXX XXX XXX */ 440 tp->t_ispeed = 0; 441 tp->t_ospeed = 9600; 442 tp->t_cflag = (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8 | CLOCAL | HUPCL; 443 txcomparam(tp, &t); /* not yet */ 444 /* XXX XXX XXX */ 445 446 tp->t_iflag = TTYDEF_IFLAG; 447 tp->t_oflag = TTYDEF_OFLAG; 448 tp->t_lflag = TTYDEF_LFLAG; 449 ttychars(tp); 450 ttsetwater(tp); 451 452 if ((err = ttyopen(tp, minor(dev), ISSET(flag, O_NONBLOCK)))) { 453 DPRINTF(("txcomopen: ttyopen failed\n")); 454 return err; 455 } 456 if ((err = (*linesw[tp->t_line].l_open)(dev, tp))) { 457 DPRINTF(("txcomopen: line dicipline open failed\n")); 458 return err; 459 } 460 461 return err; 462 } 463 464 int 465 txcomclose(dev, flag, mode, p) 466 dev_t dev; 467 int flag, mode; 468 struct proc *p; 469 { 470 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 471 struct tty *tp = sc->sc_tty; 472 473 DPRINTF(("txcomclose\n")); 474 (*linesw[tp->t_line].l_close)(tp, flag); 475 ttyclose(tp); 476 477 return 0; 478 } 479 480 int 481 txcomread(dev, uio, flag) 482 dev_t dev; 483 struct uio *uio; 484 int flag; 485 { 486 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 487 struct tty *tp = sc->sc_tty; 488 DPRINTF(("txcomread\n")); 489 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 490 } 491 492 int 493 txcomwrite(dev, uio, flag) 494 dev_t dev; 495 struct uio *uio; 496 int flag; 497 { 498 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 499 struct tty *tp = sc->sc_tty; 500 501 DPRINTF(("txcomwrite\n")); 502 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 503 } 504 505 struct tty * 506 txcomtty(dev) 507 dev_t dev; 508 { 509 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 510 struct tty *tp = sc->sc_tty; 511 DPRINTF(("txcomtty\n")); 512 return tp; 513 } 514 515 int 516 txcomioctl(dev, cmd, data, flag, p) 517 dev_t dev; 518 u_long cmd; 519 caddr_t data; 520 int flag; 521 struct proc *p; 522 { 523 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 524 struct tty *tp = sc->sc_tty; 525 int error; 526 527 DPRINTF(("txcomioctl\n")); 528 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 529 if (error >= 0) 530 return (error); 531 532 error = ttioctl(tp, cmd, data, flag, p); 533 if (error >= 0) 534 return (error); 535 536 return 0; 537 } 538 539 void 540 txcomstop(tp, flag) 541 struct tty *tp; 542 int flag; 543 { 544 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 545 int s; 546 547 DPRINTF(("txcomstop\n")); 548 s = spltty(); 549 550 if (ISSET(tp->t_state, TS_BUSY)) { 551 /* Stop transmitting at the next chunk. */ 552 sc->sc_tbc = 0; 553 sc->sc_heldtbc = 0; 554 if (!ISSET(tp->t_state, TS_TTSTOP)) 555 SET(tp->t_state, TS_FLUSH); 556 } 557 splx(s); 558 } 559 560 void 561 txcomstart(tp) 562 struct tty *tp; 563 { 564 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 565 int s; 566 567 DPRINTF(("txcomstart\n")); 568 s = spltty(); 569 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 570 return; 571 572 if (tp->t_outq.c_cc <= tp->t_lowat) { 573 if (ISSET(tp->t_state, TS_ASLEEP)) { 574 CLR(tp->t_state, TS_ASLEEP); 575 wakeup(&tp->t_outq); 576 } 577 selwakeup(&tp->t_wsel); 578 if (tp->t_outq.c_cc == 0) 579 return; 580 } 581 sc->sc_tba = tp->t_outq.c_cf; 582 sc->sc_tbc = ndqb(&tp->t_outq, 0); 583 while (sc->sc_tbc-- > 0) { 584 txcom_cnputc(tp->t_dev, *sc->sc_tba++); 585 } 586 sc->sc_tbc = 0; 587 588 CLR(tp->t_state, TS_BUSY); 589 if (ISSET(tp->t_state, TS_FLUSH)) { 590 CLR(tp->t_state, TS_FLUSH); 591 } else { 592 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 593 } 594 splx(s); 595 } 596 597 int 598 txcomparam(tp, t) 599 struct tty *tp; 600 struct termios *t; 601 { 602 DPRINTF(("txcomparam\n")); 603 return 0; 604 } 605
Indexes created Fri Oct 31 04:09:52 GMT 2025