txcom.c revision 1.12
1 /* $NetBSD: txcom.c,v 1.12 2001/05/02 10:32:16 scw Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 #include "opt_tx39_debug.h" 39 #include "opt_tx39uartdebug.h" 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/kernel.h> 44 #include <sys/device.h> 45 #include <sys/malloc.h> 46 47 #include <sys/proc.h> /* tsleep/wakeup */ 48 49 #include <sys/ioctl.h> 50 #include <sys/select.h> 51 #include <sys/file.h> 52 53 #include <sys/tty.h> 54 #include <sys/conf.h> 55 #include <dev/cons.h> /* consdev */ 56 57 #include <machine/bus.h> 58 #include <machine/config_hook.h> 59 60 #include <hpcmips/tx/tx39var.h> 61 #include <hpcmips/tx/tx39icureg.h> 62 #include <hpcmips/tx/tx39uartvar.h> 63 #include <hpcmips/tx/tx39uartreg.h> 64 65 #include <hpcmips/tx/tx39irvar.h> 66 67 #include <hpcmips/tx/tx39clockreg.h> /* XXX */ 68 69 #include <hpcmips/tx/txiomanvar.h> 70 71 #define SET(t, f) (t) |= (f) 72 #define CLR(t, f) (t) &= ~(f) 73 #define ISSET(t, f) ((t) & (f)) 74 /* 75 * UARTA channel has DTR, DSR, RTS, CTS lines. and they wired to MFIO/IO port. 76 */ 77 #define IS_COM0(s) ((s) == 0) 78 #define IS_COM1(s) ((s) == 1) 79 #define ON ((void *)1) 80 #define OFF ((void *)0) 81 82 #ifdef TX39UARTDEBUG 83 #define DPRINTF(arg) printf arg 84 #else 85 #define DPRINTF(arg) 86 #endif 87 88 #define TXCOM_HW_CONSOLE 0x40 89 #define TXCOM_RING_SIZE 256 /* must be a power of two! */ 90 #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1) 91 92 struct txcom_chip { 93 tx_chipset_tag_t sc_tc; 94 int sc_slot; /* UARTA or UARTB */ 95 int sc_cflag; 96 int sc_speed; 97 int sc_swflags; 98 int sc_hwflags; 99 100 int sc_dcd; 101 int sc_msr_cts; 102 int sc_tx_stopped; 103 }; 104 105 struct txcom_softc { 106 struct device sc_dev; 107 struct tty *sc_tty; 108 struct txcom_chip *sc_chip; 109 110 struct callout sc_txsoft_ch; 111 struct callout sc_rxsoft_ch; 112 113 u_int8_t *sc_tba; /* transmit buffer address */ 114 int sc_tbc; /* transmit byte count */ 115 int sc_heldtbc; 116 u_int8_t *sc_rbuf; /* receive buffer address */ 117 int sc_rbput; /* receive byte count */ 118 int sc_rbget; 119 }; 120 121 extern struct cfdriver txcom_cd; 122 123 int txcom_match(struct device *, struct cfdata *, void *); 124 void txcom_attach(struct device *, struct device *, void *); 125 int txcom_print(void*, const char *); 126 127 int txcom_txintr(void *); 128 int txcom_rxintr(void *); 129 int txcom_frameerr_intr(void *); 130 int txcom_parityerr_intr(void *); 131 int txcom_break_intr(void *); 132 133 void txcom_rxsoft(void *); 134 void txcom_txsoft(void *); 135 136 int txcom_stsoft(void *); 137 int txcom_stsoft2(void *); 138 int txcom_stsoft3(void *); 139 int txcom_stsoft4(void *); 140 141 142 void txcom_shutdown(struct txcom_softc *); 143 void txcom_break(struct txcom_softc *, int); 144 void txcom_modem(struct txcom_softc *, int); 145 void txcomstart(struct tty *); 146 int txcomparam(struct tty *, struct termios *); 147 148 void txcom_reset (struct txcom_chip *); 149 int txcom_enable (struct txcom_chip *); 150 void txcom_disable (struct txcom_chip *); 151 void txcom_setmode (struct txcom_chip *); 152 void txcom_setbaudrate(struct txcom_chip *); 153 int txcom_cngetc (dev_t); 154 void txcom_cnputc (dev_t, int); 155 void txcom_cnpollc (dev_t, int); 156 157 int txcom_dcd_hook(void *, int, long, void *); 158 int txcom_cts_hook(void *, int, long, void *); 159 160 161 __inline__ int __txcom_txbufready(struct txcom_chip *, int); 162 const char *__txcom_slotname(int); 163 164 #ifdef TX39UARTDEBUG 165 void txcom_dump(struct txcom_chip *); 166 #endif 167 168 cdev_decl(txcom); 169 170 struct consdev txcomcons = { 171 NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc, 172 NULL, NODEV, CN_NORMAL 173 }; 174 175 /* Serial console */ 176 struct txcom_chip txcom_chip; 177 178 struct cfattach txcom_ca = { 179 sizeof(struct txcom_softc), txcom_match, txcom_attach 180 }; 181 182 int 183 txcom_match(parent, cf, aux) 184 struct device *parent; 185 struct cfdata *cf; 186 void *aux; 187 { 188 /* if the autoconfiguration got this far, there's a slot here */ 189 return 1; 190 } 191 192 void 193 txcom_attach(struct device *parent, struct device *self, void *aux) 194 { 195 struct tx39uart_attach_args *ua = aux; 196 struct txcom_softc *sc = (void*)self; 197 tx_chipset_tag_t tc; 198 struct tty *tp; 199 struct txcom_chip *chip; 200 int slot, console; 201 202 /* Check this slot used as serial console */ 203 console = (ua->ua_slot == txcom_chip.sc_slot) && 204 (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE); 205 206 if (console) { 207 sc->sc_chip = &txcom_chip; 208 } else { 209 if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip), 210 M_DEVBUF, M_WAITOK))) { 211 printf(": can't allocate chip\n"); 212 return; 213 } 214 memset(sc->sc_chip, 0, sizeof(struct txcom_chip)); 215 } 216 217 chip = sc->sc_chip; 218 tc = chip->sc_tc = ua->ua_tc; 219 slot = chip->sc_slot = ua->ua_slot; 220 221 #ifdef TX39UARTDEBUG 222 txcom_dump(chip); 223 #endif 224 if (!console) 225 txcom_reset(chip); 226 227 if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) { 228 printf(": can't allocate buffer.\n"); 229 return; 230 } 231 memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE); 232 233 tp = ttymalloc(); 234 tp->t_oproc = txcomstart; 235 tp->t_param = txcomparam; 236 tp->t_hwiflow = NULL; 237 sc->sc_tty = tp; 238 tty_attach(tp); 239 240 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 241 int maj; 242 /* locate the major number */ 243 for (maj = 0; maj < nchrdev; maj++) 244 if (cdevsw[maj].d_open == txcomopen) 245 break; 246 247 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 248 249 printf(": console"); 250 } 251 252 printf("\n"); 253 254 /* 255 * Enable interrupt 256 */ 257 #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s)) 258 259 tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY, 260 txcom_rxintr, sc); 261 tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY, 262 txcom_txintr, sc); 263 tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY, 264 txcom_rxintr, sc); 265 tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY, 266 txcom_txintr, sc); 267 tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY, 268 txcom_frameerr_intr, sc); 269 tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY, 270 txcom_parityerr_intr, sc); 271 tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY, 272 txcom_break_intr, sc); 273 274 /* 275 * UARTA has external signal line. (its wiring is platform dependent) 276 */ 277 if (IS_COM0(slot)) { 278 /* install DCD, CTS hooks. */ 279 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_DCD, 280 CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc); 281 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_CTS, 282 CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc); 283 } 284 285 /* 286 * UARTB can connect IR module 287 */ 288 if (IS_COM1(slot)) { 289 struct txcom_attach_args tca; 290 tca.tca_tc = tc; 291 tca.tca_parent = self; 292 config_found(self, &tca, txcom_print); 293 } 294 } 295 296 int 297 txcom_print(void *aux, const char *pnp) 298 { 299 return pnp ? QUIET : UNCONF; 300 } 301 302 void 303 txcom_reset(struct txcom_chip *chip) 304 { 305 tx_chipset_tag_t tc; 306 int slot, ofs; 307 txreg_t reg; 308 309 tc = chip->sc_tc; 310 slot = chip->sc_slot; 311 ofs = TX39_UARTCTRL1_REG(slot); 312 313 /* Supply clock */ 314 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 315 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 316 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 317 318 /* reset UART module */ 319 tx_conf_write(tc, ofs, 0); 320 } 321 322 int 323 txcom_enable(struct txcom_chip *chip) 324 { 325 tx_chipset_tag_t tc; 326 txreg_t reg; 327 int slot, ofs, timeout; 328 329 tc = chip->sc_tc; 330 slot = chip->sc_slot; 331 ofs = TX39_UARTCTRL1_REG(slot); 332 333 /* External power supply (if any) */ 334 config_hook_call(CONFIG_HOOK_POWERCONTROL, 335 CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON); 336 delay(3); 337 338 /* Supply clock */ 339 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 340 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 341 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 342 343 /* 344 * XXX Disable DMA (DMA not coded yet) 345 */ 346 reg = tx_conf_read(tc, ofs); 347 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 348 tx_conf_write(tc, ofs, reg); 349 350 /* enable */ 351 reg = tx_conf_read(tc, ofs); 352 reg |= TX39_UARTCTRL1_ENUART; 353 reg &= ~TX39_UARTCTRL1_ENBREAHALT; 354 tx_conf_write(tc, ofs, reg); 355 356 timeout = 100000; 357 358 while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) && 359 --timeout > 0) 360 ; 361 362 if (timeout == 0 && !cold) { 363 printf("%s never power up\n", __txcom_slotname(slot)); 364 return 1; 365 } 366 367 return 0; 368 } 369 370 void 371 txcom_disable(struct txcom_chip *chip) 372 { 373 tx_chipset_tag_t tc; 374 txreg_t reg; 375 int slot; 376 377 tc = chip->sc_tc; 378 slot = chip->sc_slot; 379 380 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 381 /* DMA */ 382 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 383 384 /* disable module */ 385 reg &= ~TX39_UARTCTRL1_ENUART; 386 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 387 388 /* Clock */ 389 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 390 reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 391 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 392 393 } 394 395 __inline__ int 396 __txcom_txbufready(struct txcom_chip *chip, int retry) 397 { 398 tx_chipset_tag_t tc = chip->sc_tc; 399 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 400 401 do { 402 if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY) 403 return 1; 404 } while(--retry != 0); 405 406 return 0; 407 } 408 409 void 410 txcom_pulse_mode(struct device *dev) 411 { 412 struct txcom_softc *sc = (void*)dev; 413 struct txcom_chip *chip = sc->sc_chip; 414 tx_chipset_tag_t tc = chip->sc_tc; 415 int ofs; 416 txreg_t reg; 417 418 ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 419 420 reg = tx_conf_read(tc, ofs); 421 /* WindowsCE use this setting */ 422 reg |= TX39_UARTCTRL1_PULSEOPT1; 423 reg &= ~TX39_UARTCTRL1_PULSEOPT2; 424 reg |= TX39_UARTCTRL1_DTINVERT; 425 426 tx_conf_write(tc, ofs, reg); 427 } 428 429 /* 430 * console 431 */ 432 int 433 txcom_cngetc(dev_t dev) 434 { 435 tx_chipset_tag_t tc; 436 int ofs, c, s; 437 438 s = spltty(); 439 440 tc = txcom_chip.sc_tc; 441 ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot); 442 443 while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs))) 444 ; 445 446 c = TX39_UARTRXHOLD_RXDATA( 447 tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot))); 448 449 if (c == '\r') 450 c = '\n'; 451 452 splx(s); 453 454 return c; 455 } 456 457 void 458 txcom_cnputc(dev_t dev, int c) 459 { 460 struct txcom_chip *chip = &txcom_chip; 461 tx_chipset_tag_t tc = chip->sc_tc; 462 int s; 463 464 s = spltty(); 465 466 /* Wait for transmitter to empty */ 467 __txcom_txbufready(chip, -1); 468 469 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 470 (c & TX39_UARTTXHOLD_TXDATA_MASK)); 471 472 __txcom_txbufready(chip, -1); 473 474 splx(s); 475 } 476 477 void 478 txcom_cnpollc(dev_t dev, int on) 479 { 480 } 481 482 void 483 txcom_setmode(struct txcom_chip *chip) 484 { 485 tcflag_t cflag = chip->sc_cflag; 486 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 487 txreg_t reg; 488 489 reg = tx_conf_read(chip->sc_tc, ofs); 490 reg &= ~TX39_UARTCTRL1_ENUART; 491 tx_conf_write(chip->sc_tc, ofs, reg); 492 493 switch (ISSET(cflag, CSIZE)) { 494 default: 495 printf("txcom_setmode: CS7, CS8 only. use CS7"); 496 /* FALL THROUGH */ 497 case CS7: 498 reg |= TX39_UARTCTRL1_BIT7; 499 break; 500 case CS8: 501 reg &= ~TX39_UARTCTRL1_BIT7; 502 break; 503 } 504 505 if (ISSET(cflag, PARENB)) { 506 reg |= TX39_UARTCTRL1_ENPARITY; 507 if (ISSET(cflag, PARODD)) { 508 reg &= ~TX39_UARTCTRL1_EVENPARITY; 509 } else { 510 reg |= TX39_UARTCTRL1_EVENPARITY; 511 } 512 } else { 513 reg &= ~TX39_UARTCTRL1_ENPARITY; 514 } 515 516 if (ISSET(cflag, CSTOPB)) 517 reg |= TX39_UARTCTRL1_TWOSTOP; 518 else 519 reg &= ~TX39_UARTCTRL1_TWOSTOP; 520 521 reg |= TX39_UARTCTRL1_ENUART; 522 tx_conf_write(chip->sc_tc, ofs, reg); 523 } 524 525 void 526 txcom_setbaudrate(struct txcom_chip *chip) 527 { 528 int baudrate; 529 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 530 txreg_t reg, reg1; 531 532 if (chip->sc_speed == 0) 533 return; 534 535 if (!cold) 536 DPRINTF(("txcom_setbaudrate: %d\n", chip->sc_speed)); 537 538 reg1 = tx_conf_read(chip->sc_tc, ofs); 539 reg1 &= ~TX39_UARTCTRL1_ENUART; 540 tx_conf_write(chip->sc_tc, ofs, reg1); 541 542 baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1; 543 reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate); 544 545 tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg); 546 547 reg1 |= TX39_UARTCTRL1_ENUART; 548 tx_conf_write(chip->sc_tc, ofs, reg1); 549 } 550 551 int 552 txcom_cnattach(int slot, int speed, int cflag) 553 { 554 cn_tab = &txcomcons; 555 556 txcom_chip.sc_tc = tx_conf_get_tag(); 557 txcom_chip.sc_slot = slot; 558 txcom_chip.sc_cflag = cflag; 559 txcom_chip.sc_speed = speed; 560 txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE; 561 #if notyet 562 txcom_reset(&txcom_chip); 563 #endif 564 txcom_setmode(&txcom_chip); 565 txcom_setbaudrate(&txcom_chip); 566 567 if (txcom_enable(&txcom_chip)) 568 return 1; 569 570 return 0; 571 } 572 573 /* 574 * tty 575 */ 576 void 577 txcom_break(struct txcom_softc *sc, int on) 578 { 579 struct txcom_chip *chip = sc->sc_chip; 580 581 tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 582 on ? TX39_UARTTXHOLD_BREAK : 0); 583 } 584 585 void 586 txcom_modem(struct txcom_softc *sc, int on) 587 { 588 struct txcom_chip *chip = sc->sc_chip; 589 tx_chipset_tag_t tc = chip->sc_tc; 590 int slot = chip->sc_slot; 591 txreg_t reg; 592 593 /* assert DTR */ 594 if (IS_COM0(slot)) { 595 config_hook_call(CONFIG_HOOK_SET, 596 CONFIG_HOOK_COM0_DTR, 597 (void *)on); 598 } 599 600 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 601 reg &= ~TX39_UARTCTRL1_ENUART; 602 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 603 604 if (on) { 605 reg &= ~TX39_UARTCTRL1_DISTXD; 606 } else { 607 reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */ 608 } 609 610 reg |= TX39_UARTCTRL1_ENUART; 611 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 612 } 613 614 void 615 txcom_shutdown(struct txcom_softc *sc) 616 { 617 struct tty *tp = sc->sc_tty; 618 int s = spltty(); 619 620 /* Clear any break condition set with TIOCSBRK. */ 621 txcom_break(sc, 0); 622 623 /* 624 * Hang up if necessary. Wait a bit, so the other side has time to 625 * notice even if we immediately open the port again. 626 */ 627 if (ISSET(tp->t_cflag, HUPCL)) { 628 txcom_modem(sc, 0); 629 (void) tsleep(sc, TTIPRI, ttclos, hz); 630 } 631 632 633 /* Turn off interrupts if not the console. */ 634 if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 635 txcom_disable(sc->sc_chip); 636 } 637 638 splx(s); 639 } 640 641 const char * 642 __txcom_slotname(int slot) 643 { 644 static const char *slotname[] = {"UARTA", "UARTB", "unknown"}; 645 646 if (slot != 0 && slot != 1) 647 return slotname[2]; 648 649 return slotname[slot]; 650 } 651 652 int 653 txcom_frameerr_intr(void *arg) 654 { 655 struct txcom_softc *sc = arg; 656 657 printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 658 659 return 0; 660 } 661 662 int 663 txcom_parityerr_intr(void *arg) 664 { 665 struct txcom_softc *sc = arg; 666 667 printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 668 669 return 0; 670 } 671 672 int 673 txcom_break_intr(void *arg) 674 { 675 struct txcom_softc *sc = arg; 676 677 printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot)); 678 679 return 0; 680 } 681 682 int 683 txcom_rxintr(void *arg) 684 { 685 struct txcom_softc *sc = arg; 686 struct txcom_chip *chip = sc->sc_chip; 687 u_int8_t c; 688 689 c = TX39_UARTRXHOLD_RXDATA( 690 tx_conf_read(chip->sc_tc, 691 TX39_UARTRXHOLD_REG(chip->sc_slot))); 692 693 sc->sc_rbuf[sc->sc_rbput] = c; 694 sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK; 695 696 callout_reset(&sc->sc_rxsoft_ch, 1, txcom_rxsoft, sc); 697 698 return 0; 699 } 700 701 void 702 txcom_rxsoft(void *arg) 703 { 704 struct txcom_softc *sc = arg; 705 struct tty *tp = sc->sc_tty; 706 int (*rint) __P((int c, struct tty *tp)); 707 int code; 708 int s, end, get; 709 710 rint = tp->t_linesw->l_rint; 711 712 s = spltty(); 713 end = sc->sc_rbput; 714 get = sc->sc_rbget; 715 716 while (get != end) { 717 code = sc->sc_rbuf[get]; 718 719 if ((*rint)(code, tp) == -1) { 720 /* 721 * The line discipline's buffer is out of space. 722 */ 723 } 724 get = (get + 1) % TXCOM_RING_MASK; 725 } 726 sc->sc_rbget = get; 727 728 splx(s); 729 } 730 731 int 732 txcom_txintr(void *arg) 733 { 734 struct txcom_softc *sc = arg; 735 struct txcom_chip *chip = sc->sc_chip; 736 tx_chipset_tag_t tc = chip->sc_tc; 737 738 if (sc->sc_tbc > 0) { 739 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 740 (*sc->sc_tba & 741 TX39_UARTTXHOLD_TXDATA_MASK)); 742 sc->sc_tbc--; 743 sc->sc_tba++; 744 } else { 745 callout_reset(&sc->sc_rxsoft_ch, 1, txcom_txsoft, sc); 746 } 747 748 return 0; 749 } 750 751 void 752 txcom_txsoft(void *arg) 753 { 754 struct txcom_softc *sc = arg; 755 struct tty *tp = sc->sc_tty; 756 int s = spltty(); 757 758 CLR(tp->t_state, TS_BUSY); 759 if (ISSET(tp->t_state, TS_FLUSH)) { 760 CLR(tp->t_state, TS_FLUSH); 761 } else { 762 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 763 } 764 765 (*tp->t_linesw->l_start)(tp); 766 767 splx(s); 768 } 769 770 int 771 txcomopen(dev_t dev, int flag, int mode, struct proc *p) 772 { 773 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 774 struct txcom_chip *chip; 775 struct tty *tp; 776 int s, err; 777 778 if (!sc) 779 return ENXIO; 780 781 chip = sc->sc_chip; 782 tp = sc->sc_tty; 783 784 if (ISSET(tp->t_state, TS_ISOPEN) && 785 ISSET(tp->t_state, TS_XCLUDE) && 786 p->p_ucred->cr_uid != 0) 787 return (EBUSY); 788 789 s = spltty(); 790 791 if (txcom_enable(sc->sc_chip)) { 792 splx(s); 793 goto out; 794 } 795 /* 796 * Do the following iff this is a first open. 797 */ 798 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 799 struct termios t; 800 801 tp->t_dev = dev; 802 803 t.c_ispeed = 0; 804 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 805 t.c_ospeed = chip->sc_speed; 806 t.c_cflag = chip->sc_cflag; 807 } else { 808 t.c_ospeed = TTYDEF_SPEED; 809 t.c_cflag = TTYDEF_CFLAG; 810 } 811 812 if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL)) 813 SET(t.c_cflag, CLOCAL); 814 if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS)) 815 SET(t.c_cflag, CRTSCTS); 816 if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF)) 817 SET(t.c_cflag, MDMBUF); 818 819 /* Make sure txcomparam() will do something. */ 820 tp->t_ospeed = 0; 821 txcomparam(tp, &t); 822 823 tp->t_iflag = TTYDEF_IFLAG; 824 tp->t_oflag = TTYDEF_OFLAG; 825 tp->t_lflag = TTYDEF_LFLAG; 826 827 ttychars(tp); 828 ttsetwater(tp); 829 830 /* 831 * Turn on DTR. We must always do this, even if carrier is not 832 * present, because otherwise we'd have to use TIOCSDTR 833 * immediately after setting CLOCAL, which applications do not 834 * expect. We always assert DTR while the device is open 835 * unless explicitly requested to deassert it. 836 */ 837 txcom_modem(sc, 1); 838 839 /* Clear the input ring, and unblock. */ 840 sc->sc_rbget = sc->sc_rbput = 0; 841 } 842 843 splx(s); 844 #define TXCOMDIALOUT(x) (minor(x) & 0x80000) 845 if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) { 846 DPRINTF(("txcomopen: ttyopen failed\n")); 847 goto out; 848 } 849 if ((err = (*tp->t_linesw->l_open)(dev, tp))) { 850 DPRINTF(("txcomopen: line dicipline open failed\n")); 851 goto out; 852 } 853 854 return err; 855 856 out: 857 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 858 /* 859 * We failed to open the device, and nobody else had it opened. 860 * Clean up the state as appropriate. 861 */ 862 txcom_shutdown(sc); 863 } 864 865 return err; 866 867 } 868 869 int 870 txcomclose(dev_t dev, int flag, int mode, struct proc *p) 871 { 872 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 873 struct tty *tp = sc->sc_tty; 874 875 /* XXX This is for cons.c. */ 876 if (!ISSET(tp->t_state, TS_ISOPEN)) 877 return 0; 878 879 (*tp->t_linesw->l_close)(tp, flag); 880 ttyclose(tp); 881 882 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 883 /* 884 * Although we got a last close, the device may still be in 885 * use; e.g. if this was the dialout node, and there are still 886 * processes waiting for carrier on the non-dialout node. 887 */ 888 txcom_shutdown(sc); 889 } 890 891 return 0; 892 } 893 894 int 895 txcomread(dev_t dev, struct uio *uio, int flag) 896 { 897 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 898 struct tty *tp = sc->sc_tty; 899 900 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 901 } 902 903 int 904 txcomwrite(dev_t dev, struct uio *uio, int flag) 905 { 906 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 907 struct tty *tp = sc->sc_tty; 908 909 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 910 } 911 912 int 913 txcompoll(dev_t dev, int events, struct proc *p) 914 { 915 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 916 struct tty *tp = sc->sc_tty; 917 918 return ((*tp->t_linesw->l_poll)(tp, events, p)); 919 } 920 921 struct tty * 922 txcomtty(dev_t dev) 923 { 924 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 925 926 return sc->sc_tty; 927 } 928 929 int 930 txcomioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p) 931 { 932 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 933 struct tty *tp = sc->sc_tty; 934 int s, err; 935 936 err = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 937 if (err >= 0) { 938 return err; 939 } 940 941 err = ttioctl(tp, cmd, data, flag, p); 942 if (err >= 0) { 943 return err; 944 } 945 946 err = 0; 947 948 s = spltty(); 949 950 switch (cmd) { 951 default: 952 err = ENOTTY; 953 break; 954 955 case TIOCSBRK: 956 txcom_break(sc, 1); 957 break; 958 959 case TIOCCBRK: 960 txcom_break(sc, 0); 961 break; 962 963 case TIOCSDTR: 964 txcom_modem(sc, 1); 965 break; 966 967 case TIOCCDTR: 968 txcom_modem(sc, 0); 969 break; 970 971 case TIOCGFLAGS: 972 *(int *)data = sc->sc_chip->sc_swflags; 973 break; 974 975 case TIOCSFLAGS: 976 err = suser(p->p_ucred, &p->p_acflag); 977 if (err) { 978 break; 979 } 980 sc->sc_chip->sc_swflags = *(int *)data; 981 break; 982 983 } 984 985 splx(s); 986 987 return err; 988 } 989 990 void 991 txcomstop(struct tty *tp, int flag) 992 { 993 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 994 int s; 995 996 s = spltty(); 997 998 if (ISSET(tp->t_state, TS_BUSY)) { 999 /* Stop transmitting at the next chunk. */ 1000 sc->sc_tbc = 0; 1001 sc->sc_heldtbc = 0; 1002 if (!ISSET(tp->t_state, TS_TTSTOP)) 1003 SET(tp->t_state, TS_FLUSH); 1004 } 1005 1006 splx(s); 1007 } 1008 1009 void 1010 txcomstart(struct tty *tp) 1011 { 1012 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 1013 struct txcom_chip *chip = sc->sc_chip; 1014 tx_chipset_tag_t tc = chip->sc_tc; 1015 int slot = chip->sc_slot; 1016 int s; 1017 1018 s = spltty(); 1019 1020 if (!__txcom_txbufready(chip, 0) || 1021 ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1022 goto out; 1023 1024 if (tp->t_outq.c_cc <= tp->t_lowat) { 1025 if (ISSET(tp->t_state, TS_ASLEEP)) { 1026 CLR(tp->t_state, TS_ASLEEP); 1027 wakeup(&tp->t_outq); 1028 } 1029 selwakeup(&tp->t_wsel); 1030 if (tp->t_outq.c_cc == 0) 1031 goto out; 1032 } 1033 1034 sc->sc_tba = tp->t_outq.c_cf; 1035 sc->sc_tbc = ndqb(&tp->t_outq, 0); 1036 SET(tp->t_state, TS_BUSY); 1037 1038 /* Output the first character of the contiguous buffer. */ 1039 tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot), 1040 (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK)); 1041 1042 sc->sc_tbc--; 1043 sc->sc_tba++; 1044 1045 out: 1046 splx(s); 1047 } 1048 1049 /* 1050 * Set TXcom tty parameters from termios. 1051 */ 1052 int 1053 txcomparam(struct tty *tp, struct termios *t) 1054 { 1055 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 1056 struct txcom_chip *chip; 1057 int ospeed; 1058 int s; 1059 1060 if (!sc) 1061 return ENXIO; 1062 1063 ospeed = t->c_ospeed; 1064 1065 /* Check requested parameters. */ 1066 if (ospeed < 0) { 1067 return EINVAL; 1068 } 1069 if (t->c_ispeed && t->c_ispeed != ospeed) { 1070 return EINVAL; 1071 } 1072 1073 s = spltty(); 1074 chip = sc->sc_chip; 1075 /* 1076 * For the console, always force CLOCAL and !HUPCL, so that the port 1077 * is always active. 1078 */ 1079 if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) || 1080 ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 1081 SET(t->c_cflag, CLOCAL); 1082 CLR(t->c_cflag, HUPCL); 1083 } 1084 splx(s); 1085 1086 /* 1087 * If we're not in a mode that assumes a connection is present, then 1088 * ignore carrier changes. 1089 */ 1090 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1091 chip->sc_dcd = 0; 1092 else 1093 chip->sc_dcd = 1; 1094 1095 /* 1096 * Only whack the UART when params change. 1097 * Some callers need to clear tp->t_ospeed 1098 * to make sure initialization gets done. 1099 */ 1100 if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) { 1101 return 0; 1102 } 1103 1104 s = spltty(); 1105 chip = sc->sc_chip; 1106 chip->sc_speed = ospeed; 1107 chip->sc_cflag = t->c_cflag; 1108 1109 txcom_setmode(chip); 1110 txcom_setbaudrate(chip); 1111 1112 /* And copy to tty. */ 1113 tp->t_ispeed = 0; 1114 tp->t_ospeed = chip->sc_speed; 1115 tp->t_cflag = chip->sc_cflag; 1116 1117 /* 1118 * Update the tty layer's idea of the carrier bit, in case we changed 1119 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1120 * explicit request. 1121 */ 1122 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd); 1123 1124 /* 1125 * If hardware flow control is disabled, unblock any hard flow 1126 * control state. 1127 */ 1128 if (!ISSET(chip->sc_cflag, CHWFLOW)) { 1129 txcomstart(tp); 1130 } 1131 1132 splx(s); 1133 1134 return 0; 1135 } 1136 1137 int 1138 txcom_dcd_hook(void *arg, int type, long id, void *msg) 1139 { 1140 struct txcom_softc *sc = arg; 1141 struct tty *tp = sc->sc_tty; 1142 struct txcom_chip *chip = sc->sc_chip; 1143 int modem = !(int)msg; /* p-edge 1, n-edge 0 */ 1144 1145 DPRINTF(("%s: DCD %s\n", __FUNCTION__, modem ? "ON" : "OFF")); 1146 1147 if (modem && chip->sc_dcd) 1148 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd); 1149 1150 return 0; 1151 } 1152 1153 int 1154 txcom_cts_hook(void *arg, int type, long id, void *msg) 1155 { 1156 struct txcom_softc *sc = arg; 1157 struct tty *tp = sc->sc_tty; 1158 struct txcom_chip *chip = sc->sc_chip; 1159 int clear = !(int)msg; /* p-edge 1, n-edge 0 */ 1160 1161 DPRINTF(("%s: CTS %s\n", __FUNCTION__, clear ? "ON" : "OFF")); 1162 1163 if (chip->sc_msr_cts) { 1164 if (!clear) { 1165 chip->sc_tx_stopped = 1; 1166 } else { 1167 chip->sc_tx_stopped = 0; 1168 (*tp->t_linesw->l_start)(tp); 1169 } 1170 } 1171 1172 return 0; 1173 } 1174 1175 #ifdef TX39UARTDEBUG 1176 void 1177 txcom_dump(struct txcom_chip *chip) 1178 { 1179 tx_chipset_tag_t tc = chip->sc_tc; 1180 int slot = chip->sc_slot; 1181 txreg_t reg; 1182 1183 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 1184 #define ISSETPRINT(r, m) \ 1185 __is_set_print(r, TX39_UARTCTRL1_##m, #m) 1186 ISSETPRINT(reg, UARTON); 1187 ISSETPRINT(reg, EMPTY); 1188 ISSETPRINT(reg, PRXHOLDFULL); 1189 ISSETPRINT(reg, RXHOLDFULL); 1190 ISSETPRINT(reg, ENDMARX); 1191 ISSETPRINT(reg, ENDMATX); 1192 ISSETPRINT(reg, TESTMODE); 1193 ISSETPRINT(reg, ENBREAHALT); 1194 ISSETPRINT(reg, ENDMATEST); 1195 ISSETPRINT(reg, ENDMALOOP); 1196 ISSETPRINT(reg, PULSEOPT2); 1197 ISSETPRINT(reg, PULSEOPT1); 1198 ISSETPRINT(reg, DTINVERT); 1199 ISSETPRINT(reg, DISTXD); 1200 ISSETPRINT(reg, TWOSTOP); 1201 ISSETPRINT(reg, LOOPBACK); 1202 ISSETPRINT(reg, BIT7); 1203 ISSETPRINT(reg, EVENPARITY); 1204 ISSETPRINT(reg, ENPARITY); 1205 ISSETPRINT(reg, ENUART); 1206 } 1207 #endif /* TX39UARTDEBUG */ 1208
Indexes created Thu Oct 30 22:09:55 GMT 2025