txcom.c revision 1.17
1 /* $NetBSD: txcom.c,v 1.17 2002/09/06 13:18:43 gehenna Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include "opt_tx39uart_debug.h" 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/kernel.h> 44 #include <sys/device.h> 45 #include <sys/malloc.h> 46 47 #include <sys/proc.h> /* tsleep/wakeup */ 48 49 #include <sys/ioctl.h> 50 #include <sys/select.h> 51 #include <sys/file.h> 52 53 #include <sys/tty.h> 54 #include <sys/conf.h> 55 #include <dev/cons.h> /* consdev */ 56 57 #include <machine/bus.h> 58 #include <machine/config_hook.h> 59 60 #include <hpcmips/tx/tx39var.h> 61 #include <hpcmips/tx/tx39icureg.h> 62 #include <hpcmips/tx/tx39uartvar.h> 63 #include <hpcmips/tx/tx39uartreg.h> 64 65 #include <hpcmips/tx/tx39irvar.h> 66 67 #include <hpcmips/tx/tx39clockreg.h> /* XXX */ 68 69 #define SET(t, f) (t) |= (f) 70 #define CLR(t, f) (t) &= ~(f) 71 #define ISSET(t, f) ((t) & (f)) 72 /* 73 * UARTA channel has DTR, DSR, RTS, CTS lines. and they wired to MFIO/IO port. 74 */ 75 #define IS_COM0(s) ((s) == 0) 76 #define IS_COM1(s) ((s) == 1) 77 #define ON ((void *)1) 78 #define OFF ((void *)0) 79 80 #ifdef TX39UART_DEBUG 81 #define DPRINTF_ENABLE 82 #define DPRINTF_DEBUG tx39uart_debug 83 #endif 84 #include <machine/debug.h> 85 86 #define TXCOM_HW_CONSOLE 0x40 87 #define TXCOM_RING_SIZE 256 /* must be a power of two! */ 88 #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1) 89 90 struct txcom_chip { 91 tx_chipset_tag_t sc_tc; 92 int sc_slot; /* UARTA or UARTB */ 93 int sc_cflag; 94 int sc_speed; 95 int sc_swflags; 96 int sc_hwflags; 97 98 int sc_dcd; 99 int sc_msr_cts; 100 int sc_tx_stopped; 101 }; 102 103 struct txcom_softc { 104 struct device sc_dev; 105 struct tty *sc_tty; 106 struct txcom_chip *sc_chip; 107 108 struct callout sc_txsoft_ch; 109 struct callout sc_rxsoft_ch; 110 111 u_int8_t *sc_tba; /* transmit buffer address */ 112 int sc_tbc; /* transmit byte count */ 113 int sc_heldtbc; 114 u_int8_t *sc_rbuf; /* receive buffer address */ 115 int sc_rbput; /* receive byte count */ 116 int sc_rbget; 117 }; 118 119 extern struct cfdriver txcom_cd; 120 121 int txcom_match(struct device *, struct cfdata *, void *); 122 void txcom_attach(struct device *, struct device *, void *); 123 int txcom_print(void*, const char *); 124 125 int txcom_txintr(void *); 126 int txcom_rxintr(void *); 127 int txcom_frameerr_intr(void *); 128 int txcom_parityerr_intr(void *); 129 int txcom_break_intr(void *); 130 131 void txcom_rxsoft(void *); 132 void txcom_txsoft(void *); 133 134 int txcom_stsoft(void *); 135 int txcom_stsoft2(void *); 136 int txcom_stsoft3(void *); 137 int txcom_stsoft4(void *); 138 139 140 void txcom_shutdown(struct txcom_softc *); 141 void txcom_break(struct txcom_softc *, int); 142 void txcom_modem(struct txcom_softc *, int); 143 void txcomstart(struct tty *); 144 int txcomparam(struct tty *, struct termios *); 145 146 void txcom_reset (struct txcom_chip *); 147 int txcom_enable (struct txcom_chip *); 148 void txcom_disable (struct txcom_chip *); 149 void txcom_setmode (struct txcom_chip *); 150 void txcom_setbaudrate(struct txcom_chip *); 151 int txcom_cngetc (dev_t); 152 void txcom_cnputc (dev_t, int); 153 void txcom_cnpollc (dev_t, int); 154 155 int txcom_dcd_hook(void *, int, long, void *); 156 int txcom_cts_hook(void *, int, long, void *); 157 158 159 __inline__ int __txcom_txbufready(struct txcom_chip *, int); 160 const char *__txcom_slotname(int); 161 162 #ifdef TX39UARTDEBUG 163 void txcom_dump(struct txcom_chip *); 164 #endif 165 166 struct consdev txcomcons = { 167 NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc, 168 NULL, NODEV, CN_NORMAL 169 }; 170 171 /* Serial console */ 172 struct txcom_chip txcom_chip; 173 174 struct cfattach txcom_ca = { 175 sizeof(struct txcom_softc), txcom_match, txcom_attach 176 }; 177 178 dev_type_open(txcomopen); 179 dev_type_close(txcomclose); 180 dev_type_read(txcomread); 181 dev_type_write(txcomwrite); 182 dev_type_ioctl(txcomioctl); 183 dev_type_stop(txcomstop); 184 dev_type_tty(txcomtty); 185 dev_type_poll(txcompoll); 186 187 const struct cdevsw txcom_cdevsw = { 188 txcomopen, txcomclose, txcomread, txcomwrite, txcomioctl, 189 txcomstop, txcomtty, txcompoll, nommap, D_TTY 190 }; 191 192 int 193 txcom_match(parent, cf, aux) 194 struct device *parent; 195 struct cfdata *cf; 196 void *aux; 197 { 198 /* if the autoconfiguration got this far, there's a slot here */ 199 return 1; 200 } 201 202 void 203 txcom_attach(struct device *parent, struct device *self, void *aux) 204 { 205 struct tx39uart_attach_args *ua = aux; 206 struct txcom_softc *sc = (void*)self; 207 tx_chipset_tag_t tc; 208 struct tty *tp; 209 struct txcom_chip *chip; 210 int slot, console; 211 212 /* Check this slot used as serial console */ 213 console = (ua->ua_slot == txcom_chip.sc_slot) && 214 (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE); 215 216 if (console) { 217 sc->sc_chip = &txcom_chip; 218 } else { 219 if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip), 220 M_DEVBUF, M_WAITOK))) { 221 printf(": can't allocate chip\n"); 222 return; 223 } 224 memset(sc->sc_chip, 0, sizeof(struct txcom_chip)); 225 } 226 227 chip = sc->sc_chip; 228 tc = chip->sc_tc = ua->ua_tc; 229 slot = chip->sc_slot = ua->ua_slot; 230 231 #ifdef TX39UARTDEBUG 232 txcom_dump(chip); 233 #endif 234 if (!console) 235 txcom_reset(chip); 236 237 if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) { 238 printf(": can't allocate buffer.\n"); 239 return; 240 } 241 memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE); 242 243 tp = ttymalloc(); 244 tp->t_oproc = txcomstart; 245 tp->t_param = txcomparam; 246 tp->t_hwiflow = NULL; 247 sc->sc_tty = tp; 248 tty_attach(tp); 249 250 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 251 int maj; 252 /* locate the major number */ 253 maj = cdevsw_lookup_major(&txcom_cdevsw); 254 255 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 256 257 printf(": console"); 258 } 259 260 printf("\n"); 261 262 /* 263 * Enable interrupt 264 */ 265 #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s)) 266 267 tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY, 268 txcom_rxintr, sc); 269 tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY, 270 txcom_txintr, sc); 271 tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY, 272 txcom_rxintr, sc); 273 tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY, 274 txcom_txintr, sc); 275 tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY, 276 txcom_frameerr_intr, sc); 277 tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY, 278 txcom_parityerr_intr, sc); 279 tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY, 280 txcom_break_intr, sc); 281 282 /* 283 * UARTA has external signal line. (its wiring is platform dependent) 284 */ 285 if (IS_COM0(slot)) { 286 /* install DCD, CTS hooks. */ 287 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_DCD, 288 CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc); 289 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_CTS, 290 CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc); 291 } 292 293 /* 294 * UARTB can connect IR module 295 */ 296 if (IS_COM1(slot)) { 297 struct txcom_attach_args tca; 298 tca.tca_tc = tc; 299 tca.tca_parent = self; 300 config_found(self, &tca, txcom_print); 301 } 302 } 303 304 int 305 txcom_print(void *aux, const char *pnp) 306 { 307 return pnp ? QUIET : UNCONF; 308 } 309 310 void 311 txcom_reset(struct txcom_chip *chip) 312 { 313 tx_chipset_tag_t tc; 314 int slot, ofs; 315 txreg_t reg; 316 317 tc = chip->sc_tc; 318 slot = chip->sc_slot; 319 ofs = TX39_UARTCTRL1_REG(slot); 320 321 /* Supply clock */ 322 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 323 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 324 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 325 326 /* reset UART module */ 327 tx_conf_write(tc, ofs, 0); 328 } 329 330 int 331 txcom_enable(struct txcom_chip *chip) 332 { 333 tx_chipset_tag_t tc; 334 txreg_t reg; 335 int slot, ofs, timeout; 336 337 tc = chip->sc_tc; 338 slot = chip->sc_slot; 339 ofs = TX39_UARTCTRL1_REG(slot); 340 341 /* External power supply (if any) */ 342 config_hook_call(CONFIG_HOOK_POWERCONTROL, 343 CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON); 344 delay(3); 345 346 /* Supply clock */ 347 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 348 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 349 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 350 351 /* 352 * XXX Disable DMA (DMA not coded yet) 353 */ 354 reg = tx_conf_read(tc, ofs); 355 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 356 tx_conf_write(tc, ofs, reg); 357 358 /* enable */ 359 reg = tx_conf_read(tc, ofs); 360 reg |= TX39_UARTCTRL1_ENUART; 361 reg &= ~TX39_UARTCTRL1_ENBREAHALT; 362 tx_conf_write(tc, ofs, reg); 363 364 timeout = 100000; 365 366 while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) && 367 --timeout > 0) 368 ; 369 370 if (timeout == 0 && !cold) { 371 printf("%s never power up\n", __txcom_slotname(slot)); 372 return 1; 373 } 374 375 return 0; 376 } 377 378 void 379 txcom_disable(struct txcom_chip *chip) 380 { 381 tx_chipset_tag_t tc; 382 txreg_t reg; 383 int slot; 384 385 tc = chip->sc_tc; 386 slot = chip->sc_slot; 387 388 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 389 /* DMA */ 390 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 391 392 /* disable module */ 393 reg &= ~TX39_UARTCTRL1_ENUART; 394 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 395 396 /* Clock */ 397 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 398 reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 399 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 400 401 } 402 403 __inline__ int 404 __txcom_txbufready(struct txcom_chip *chip, int retry) 405 { 406 tx_chipset_tag_t tc = chip->sc_tc; 407 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 408 409 do { 410 if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY) 411 return 1; 412 } while(--retry != 0); 413 414 return 0; 415 } 416 417 void 418 txcom_pulse_mode(struct device *dev) 419 { 420 struct txcom_softc *sc = (void*)dev; 421 struct txcom_chip *chip = sc->sc_chip; 422 tx_chipset_tag_t tc = chip->sc_tc; 423 int ofs; 424 txreg_t reg; 425 426 ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 427 428 reg = tx_conf_read(tc, ofs); 429 /* WindowsCE use this setting */ 430 reg |= TX39_UARTCTRL1_PULSEOPT1; 431 reg &= ~TX39_UARTCTRL1_PULSEOPT2; 432 reg |= TX39_UARTCTRL1_DTINVERT; 433 434 tx_conf_write(tc, ofs, reg); 435 } 436 437 /* 438 * console 439 */ 440 int 441 txcom_cngetc(dev_t dev) 442 { 443 tx_chipset_tag_t tc; 444 int ofs, c, s; 445 446 s = spltty(); 447 448 tc = txcom_chip.sc_tc; 449 ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot); 450 451 while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs))) 452 ; 453 454 c = TX39_UARTRXHOLD_RXDATA( 455 tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot))); 456 457 if (c == '\r') 458 c = '\n'; 459 460 splx(s); 461 462 return c; 463 } 464 465 void 466 txcom_cnputc(dev_t dev, int c) 467 { 468 struct txcom_chip *chip = &txcom_chip; 469 tx_chipset_tag_t tc = chip->sc_tc; 470 int s; 471 472 s = spltty(); 473 474 /* Wait for transmitter to empty */ 475 __txcom_txbufready(chip, -1); 476 477 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 478 (c & TX39_UARTTXHOLD_TXDATA_MASK)); 479 480 __txcom_txbufready(chip, -1); 481 482 splx(s); 483 } 484 485 void 486 txcom_cnpollc(dev_t dev, int on) 487 { 488 } 489 490 void 491 txcom_setmode(struct txcom_chip *chip) 492 { 493 tcflag_t cflag = chip->sc_cflag; 494 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 495 txreg_t reg; 496 497 reg = tx_conf_read(chip->sc_tc, ofs); 498 reg &= ~TX39_UARTCTRL1_ENUART; 499 tx_conf_write(chip->sc_tc, ofs, reg); 500 501 switch (ISSET(cflag, CSIZE)) { 502 default: 503 printf("txcom_setmode: CS7, CS8 only. use CS7"); 504 /* FALL THROUGH */ 505 case CS7: 506 reg |= TX39_UARTCTRL1_BIT7; 507 break; 508 case CS8: 509 reg &= ~TX39_UARTCTRL1_BIT7; 510 break; 511 } 512 513 if (ISSET(cflag, PARENB)) { 514 reg |= TX39_UARTCTRL1_ENPARITY; 515 if (ISSET(cflag, PARODD)) { 516 reg &= ~TX39_UARTCTRL1_EVENPARITY; 517 } else { 518 reg |= TX39_UARTCTRL1_EVENPARITY; 519 } 520 } else { 521 reg &= ~TX39_UARTCTRL1_ENPARITY; 522 } 523 524 if (ISSET(cflag, CSTOPB)) 525 reg |= TX39_UARTCTRL1_TWOSTOP; 526 else 527 reg &= ~TX39_UARTCTRL1_TWOSTOP; 528 529 reg |= TX39_UARTCTRL1_ENUART; 530 tx_conf_write(chip->sc_tc, ofs, reg); 531 } 532 533 void 534 txcom_setbaudrate(struct txcom_chip *chip) 535 { 536 int baudrate; 537 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 538 txreg_t reg, reg1; 539 540 if (chip->sc_speed == 0) 541 return; 542 543 if (!cold) 544 DPRINTF("%d\n", chip->sc_speed); 545 546 reg1 = tx_conf_read(chip->sc_tc, ofs); 547 reg1 &= ~TX39_UARTCTRL1_ENUART; 548 tx_conf_write(chip->sc_tc, ofs, reg1); 549 550 baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1; 551 reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate); 552 553 tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg); 554 555 reg1 |= TX39_UARTCTRL1_ENUART; 556 tx_conf_write(chip->sc_tc, ofs, reg1); 557 } 558 559 int 560 txcom_cnattach(int slot, int speed, int cflag) 561 { 562 cn_tab = &txcomcons; 563 564 txcom_chip.sc_tc = tx_conf_get_tag(); 565 txcom_chip.sc_slot = slot; 566 txcom_chip.sc_cflag = cflag; 567 txcom_chip.sc_speed = speed; 568 txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE; 569 #if notyet 570 txcom_reset(&txcom_chip); 571 #endif 572 txcom_setmode(&txcom_chip); 573 txcom_setbaudrate(&txcom_chip); 574 575 if (txcom_enable(&txcom_chip)) 576 return 1; 577 578 return 0; 579 } 580 581 /* 582 * tty 583 */ 584 void 585 txcom_break(struct txcom_softc *sc, int on) 586 { 587 struct txcom_chip *chip = sc->sc_chip; 588 589 tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 590 on ? TX39_UARTTXHOLD_BREAK : 0); 591 } 592 593 void 594 txcom_modem(struct txcom_softc *sc, int on) 595 { 596 struct txcom_chip *chip = sc->sc_chip; 597 tx_chipset_tag_t tc = chip->sc_tc; 598 int slot = chip->sc_slot; 599 txreg_t reg; 600 601 /* assert DTR */ 602 if (IS_COM0(slot)) { 603 config_hook_call(CONFIG_HOOK_SET, 604 CONFIG_HOOK_COM0_DTR, 605 (void *)on); 606 } 607 608 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 609 reg &= ~TX39_UARTCTRL1_ENUART; 610 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 611 612 if (on) { 613 reg &= ~TX39_UARTCTRL1_DISTXD; 614 } else { 615 reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */ 616 } 617 618 reg |= TX39_UARTCTRL1_ENUART; 619 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 620 } 621 622 void 623 txcom_shutdown(struct txcom_softc *sc) 624 { 625 struct tty *tp = sc->sc_tty; 626 int s = spltty(); 627 628 /* Clear any break condition set with TIOCSBRK. */ 629 txcom_break(sc, 0); 630 631 /* 632 * Hang up if necessary. Wait a bit, so the other side has time to 633 * notice even if we immediately open the port again. 634 */ 635 if (ISSET(tp->t_cflag, HUPCL)) { 636 txcom_modem(sc, 0); 637 (void) tsleep(sc, TTIPRI, ttclos, hz); 638 } 639 640 641 /* Turn off interrupts if not the console. */ 642 if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 643 txcom_disable(sc->sc_chip); 644 } 645 646 splx(s); 647 } 648 649 const char * 650 __txcom_slotname(int slot) 651 { 652 static const char *slotname[] = {"UARTA", "UARTB", "unknown"}; 653 654 if (slot != 0 && slot != 1) 655 return slotname[2]; 656 657 return slotname[slot]; 658 } 659 660 int 661 txcom_frameerr_intr(void *arg) 662 { 663 struct txcom_softc *sc = arg; 664 665 printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 666 667 return 0; 668 } 669 670 int 671 txcom_parityerr_intr(void *arg) 672 { 673 struct txcom_softc *sc = arg; 674 675 printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 676 677 return 0; 678 } 679 680 int 681 txcom_break_intr(void *arg) 682 { 683 struct txcom_softc *sc = arg; 684 685 printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot)); 686 687 return 0; 688 } 689 690 int 691 txcom_rxintr(void *arg) 692 { 693 struct txcom_softc *sc = arg; 694 struct txcom_chip *chip = sc->sc_chip; 695 u_int8_t c; 696 697 c = TX39_UARTRXHOLD_RXDATA( 698 tx_conf_read(chip->sc_tc, 699 TX39_UARTRXHOLD_REG(chip->sc_slot))); 700 701 sc->sc_rbuf[sc->sc_rbput] = c; 702 sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK; 703 704 callout_reset(&sc->sc_rxsoft_ch, 1, txcom_rxsoft, sc); 705 706 return 0; 707 } 708 709 void 710 txcom_rxsoft(void *arg) 711 { 712 struct txcom_softc *sc = arg; 713 struct tty *tp = sc->sc_tty; 714 int (*rint)(int, struct tty *); 715 int code; 716 int s, end, get; 717 718 rint = tp->t_linesw->l_rint; 719 720 s = spltty(); 721 end = sc->sc_rbput; 722 get = sc->sc_rbget; 723 724 while (get != end) { 725 code = sc->sc_rbuf[get]; 726 727 if ((*rint)(code, tp) == -1) { 728 /* 729 * The line discipline's buffer is out of space. 730 */ 731 } 732 get = (get + 1) % TXCOM_RING_MASK; 733 } 734 sc->sc_rbget = get; 735 736 splx(s); 737 } 738 739 int 740 txcom_txintr(void *arg) 741 { 742 struct txcom_softc *sc = arg; 743 struct txcom_chip *chip = sc->sc_chip; 744 tx_chipset_tag_t tc = chip->sc_tc; 745 746 if (sc->sc_tbc > 0) { 747 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 748 (*sc->sc_tba & 749 TX39_UARTTXHOLD_TXDATA_MASK)); 750 sc->sc_tbc--; 751 sc->sc_tba++; 752 } else { 753 callout_reset(&sc->sc_rxsoft_ch, 1, txcom_txsoft, sc); 754 } 755 756 return 0; 757 } 758 759 void 760 txcom_txsoft(void *arg) 761 { 762 struct txcom_softc *sc = arg; 763 struct tty *tp = sc->sc_tty; 764 int s = spltty(); 765 766 CLR(tp->t_state, TS_BUSY); 767 if (ISSET(tp->t_state, TS_FLUSH)) { 768 CLR(tp->t_state, TS_FLUSH); 769 } else { 770 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 771 } 772 773 (*tp->t_linesw->l_start)(tp); 774 775 splx(s); 776 } 777 778 int 779 txcomopen(dev_t dev, int flag, int mode, struct proc *p) 780 { 781 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 782 struct txcom_chip *chip; 783 struct tty *tp; 784 int s, err; 785 786 if (!sc) 787 return ENXIO; 788 789 chip = sc->sc_chip; 790 tp = sc->sc_tty; 791 792 if (ISSET(tp->t_state, TS_ISOPEN) && 793 ISSET(tp->t_state, TS_XCLUDE) && 794 p->p_ucred->cr_uid != 0) 795 return (EBUSY); 796 797 s = spltty(); 798 799 if (txcom_enable(sc->sc_chip)) { 800 splx(s); 801 goto out; 802 } 803 /* 804 * Do the following iff this is a first open. 805 */ 806 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 807 struct termios t; 808 809 tp->t_dev = dev; 810 811 t.c_ispeed = 0; 812 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 813 t.c_ospeed = chip->sc_speed; 814 t.c_cflag = chip->sc_cflag; 815 } else { 816 t.c_ospeed = TTYDEF_SPEED; 817 t.c_cflag = TTYDEF_CFLAG; 818 } 819 820 if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL)) 821 SET(t.c_cflag, CLOCAL); 822 if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS)) 823 SET(t.c_cflag, CRTSCTS); 824 if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF)) 825 SET(t.c_cflag, MDMBUF); 826 827 /* Make sure txcomparam() will do something. */ 828 tp->t_ospeed = 0; 829 txcomparam(tp, &t); 830 831 tp->t_iflag = TTYDEF_IFLAG; 832 tp->t_oflag = TTYDEF_OFLAG; 833 tp->t_lflag = TTYDEF_LFLAG; 834 835 ttychars(tp); 836 ttsetwater(tp); 837 838 /* 839 * Turn on DTR. We must always do this, even if carrier is not 840 * present, because otherwise we'd have to use TIOCSDTR 841 * immediately after setting CLOCAL, which applications do not 842 * expect. We always assert DTR while the device is open 843 * unless explicitly requested to deassert it. 844 */ 845 txcom_modem(sc, 1); 846 847 /* Clear the input ring, and unblock. */ 848 sc->sc_rbget = sc->sc_rbput = 0; 849 } 850 851 splx(s); 852 #define TXCOMDIALOUT(x) (minor(x) & 0x80000) 853 if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) { 854 DPRINTF("ttyopen failed\n"); 855 goto out; 856 } 857 if ((err = (*tp->t_linesw->l_open)(dev, tp))) { 858 DPRINTF("line dicipline open failed\n"); 859 goto out; 860 } 861 862 return err; 863 864 out: 865 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 866 /* 867 * We failed to open the device, and nobody else had it opened. 868 * Clean up the state as appropriate. 869 */ 870 txcom_shutdown(sc); 871 } 872 873 return err; 874 875 } 876 877 int 878 txcomclose(dev_t dev, int flag, int mode, struct proc *p) 879 { 880 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 881 struct tty *tp = sc->sc_tty; 882 883 /* XXX This is for cons.c. */ 884 if (!ISSET(tp->t_state, TS_ISOPEN)) 885 return 0; 886 887 (*tp->t_linesw->l_close)(tp, flag); 888 ttyclose(tp); 889 890 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 891 /* 892 * Although we got a last close, the device may still be in 893 * use; e.g. if this was the dialout node, and there are still 894 * processes waiting for carrier on the non-dialout node. 895 */ 896 txcom_shutdown(sc); 897 } 898 899 return 0; 900 } 901 902 int 903 txcomread(dev_t dev, struct uio *uio, int flag) 904 { 905 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 906 struct tty *tp = sc->sc_tty; 907 908 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 909 } 910 911 int 912 txcomwrite(dev_t dev, struct uio *uio, int flag) 913 { 914 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 915 struct tty *tp = sc->sc_tty; 916 917 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 918 } 919 920 int 921 txcompoll(dev_t dev, int events, struct proc *p) 922 { 923 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 924 struct tty *tp = sc->sc_tty; 925 926 return ((*tp->t_linesw->l_poll)(tp, events, p)); 927 } 928 929 struct tty * 930 txcomtty(dev_t dev) 931 { 932 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 933 934 return sc->sc_tty; 935 } 936 937 int 938 txcomioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p) 939 { 940 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 941 struct tty *tp = sc->sc_tty; 942 int s, err; 943 944 err = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 945 if (err != EPASSTHROUGH) { 946 return err; 947 } 948 949 err = ttioctl(tp, cmd, data, flag, p); 950 if (err != EPASSTHROUGH) { 951 return err; 952 } 953 954 err = 0; 955 956 s = spltty(); 957 958 switch (cmd) { 959 default: 960 err = EPASSTHROUGH; 961 break; 962 963 case TIOCSBRK: 964 txcom_break(sc, 1); 965 break; 966 967 case TIOCCBRK: 968 txcom_break(sc, 0); 969 break; 970 971 case TIOCSDTR: 972 txcom_modem(sc, 1); 973 break; 974 975 case TIOCCDTR: 976 txcom_modem(sc, 0); 977 break; 978 979 case TIOCGFLAGS: 980 *(int *)data = sc->sc_chip->sc_swflags; 981 break; 982 983 case TIOCSFLAGS: 984 err = suser(p->p_ucred, &p->p_acflag); 985 if (err) { 986 break; 987 } 988 sc->sc_chip->sc_swflags = *(int *)data; 989 break; 990 991 } 992 993 splx(s); 994 995 return err; 996 } 997 998 void 999 txcomstop(struct tty *tp, int flag) 1000 { 1001 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 1002 int s; 1003 1004 s = spltty(); 1005 1006 if (ISSET(tp->t_state, TS_BUSY)) { 1007 /* Stop transmitting at the next chunk. */ 1008 sc->sc_tbc = 0; 1009 sc->sc_heldtbc = 0; 1010 if (!ISSET(tp->t_state, TS_TTSTOP)) 1011 SET(tp->t_state, TS_FLUSH); 1012 } 1013 1014 splx(s); 1015 } 1016 1017 void 1018 txcomstart(struct tty *tp) 1019 { 1020 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 1021 struct txcom_chip *chip = sc->sc_chip; 1022 tx_chipset_tag_t tc = chip->sc_tc; 1023 int slot = chip->sc_slot; 1024 int s; 1025 1026 s = spltty(); 1027 1028 if (!__txcom_txbufready(chip, 0) || 1029 ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1030 goto out; 1031 1032 if (tp->t_outq.c_cc <= tp->t_lowat) { 1033 if (ISSET(tp->t_state, TS_ASLEEP)) { 1034 CLR(tp->t_state, TS_ASLEEP); 1035 wakeup(&tp->t_outq); 1036 } 1037 selwakeup(&tp->t_wsel); 1038 if (tp->t_outq.c_cc == 0) 1039 goto out; 1040 } 1041 1042 sc->sc_tba = tp->t_outq.c_cf; 1043 sc->sc_tbc = ndqb(&tp->t_outq, 0); 1044 SET(tp->t_state, TS_BUSY); 1045 1046 /* Output the first character of the contiguous buffer. */ 1047 tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot), 1048 (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK)); 1049 1050 sc->sc_tbc--; 1051 sc->sc_tba++; 1052 1053 out: 1054 splx(s); 1055 } 1056 1057 /* 1058 * Set TXcom tty parameters from termios. 1059 */ 1060 int 1061 txcomparam(struct tty *tp, struct termios *t) 1062 { 1063 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 1064 struct txcom_chip *chip; 1065 int ospeed; 1066 int s; 1067 1068 if (!sc) 1069 return ENXIO; 1070 1071 ospeed = t->c_ospeed; 1072 1073 /* Check requested parameters. */ 1074 if (ospeed < 0) { 1075 return EINVAL; 1076 } 1077 if (t->c_ispeed && t->c_ispeed != ospeed) { 1078 return EINVAL; 1079 } 1080 1081 s = spltty(); 1082 chip = sc->sc_chip; 1083 /* 1084 * For the console, always force CLOCAL and !HUPCL, so that the port 1085 * is always active. 1086 */ 1087 if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) || 1088 ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 1089 SET(t->c_cflag, CLOCAL); 1090 CLR(t->c_cflag, HUPCL); 1091 } 1092 splx(s); 1093 1094 /* 1095 * If we're not in a mode that assumes a connection is present, then 1096 * ignore carrier changes. 1097 */ 1098 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1099 chip->sc_dcd = 0; 1100 else 1101 chip->sc_dcd = 1; 1102 1103 /* 1104 * Only whack the UART when params change. 1105 * Some callers need to clear tp->t_ospeed 1106 * to make sure initialization gets done. 1107 */ 1108 if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) { 1109 return 0; 1110 } 1111 1112 s = spltty(); 1113 chip = sc->sc_chip; 1114 chip->sc_speed = ospeed; 1115 chip->sc_cflag = t->c_cflag; 1116 1117 txcom_setmode(chip); 1118 txcom_setbaudrate(chip); 1119 1120 /* And copy to tty. */ 1121 tp->t_ispeed = 0; 1122 tp->t_ospeed = chip->sc_speed; 1123 tp->t_cflag = chip->sc_cflag; 1124 1125 /* 1126 * Update the tty layer's idea of the carrier bit, in case we changed 1127 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1128 * explicit request. 1129 */ 1130 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd); 1131 1132 /* 1133 * If hardware flow control is disabled, unblock any hard flow 1134 * control state. 1135 */ 1136 if (!ISSET(chip->sc_cflag, CHWFLOW)) { 1137 txcomstart(tp); 1138 } 1139 1140 splx(s); 1141 1142 return 0; 1143 } 1144 1145 int 1146 txcom_dcd_hook(void *arg, int type, long id, void *msg) 1147 { 1148 struct txcom_softc *sc = arg; 1149 struct tty *tp = sc->sc_tty; 1150 struct txcom_chip *chip = sc->sc_chip; 1151 int modem = !(int)msg; /* p-edge 1, n-edge 0 */ 1152 1153 DPRINTF("DCD %s\n", modem ? "ON" : "OFF"); 1154 1155 if (modem && chip->sc_dcd) 1156 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd); 1157 1158 return 0; 1159 } 1160 1161 int 1162 txcom_cts_hook(void *arg, int type, long id, void *msg) 1163 { 1164 struct txcom_softc *sc = arg; 1165 struct tty *tp = sc->sc_tty; 1166 struct txcom_chip *chip = sc->sc_chip; 1167 int clear = !(int)msg; /* p-edge 1, n-edge 0 */ 1168 1169 DPRINTF("CTS %s\n", clear ? "ON" : "OFF"); 1170 1171 if (chip->sc_msr_cts) { 1172 if (!clear) { 1173 chip->sc_tx_stopped = 1; 1174 } else { 1175 chip->sc_tx_stopped = 0; 1176 (*tp->t_linesw->l_start)(tp); 1177 } 1178 } 1179 1180 return 0; 1181 } 1182 1183 #ifdef TX39UARTDEBUG 1184 void 1185 txcom_dump(struct txcom_chip *chip) 1186 { 1187 tx_chipset_tag_t tc = chip->sc_tc; 1188 int slot = chip->sc_slot; 1189 txreg_t reg; 1190 1191 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 1192 #define ISSETPRINT(r, m) \ 1193 dbg_bitmask_print(r, TX39_UARTCTRL1_##m, #m) 1194 ISSETPRINT(reg, UARTON); 1195 ISSETPRINT(reg, EMPTY); 1196 ISSETPRINT(reg, PRXHOLDFULL); 1197 ISSETPRINT(reg, RXHOLDFULL); 1198 ISSETPRINT(reg, ENDMARX); 1199 ISSETPRINT(reg, ENDMATX); 1200 ISSETPRINT(reg, TESTMODE); 1201 ISSETPRINT(reg, ENBREAHALT); 1202 ISSETPRINT(reg, ENDMATEST); 1203 ISSETPRINT(reg, ENDMALOOP); 1204 ISSETPRINT(reg, PULSEOPT2); 1205 ISSETPRINT(reg, PULSEOPT1); 1206 ISSETPRINT(reg, DTINVERT); 1207 ISSETPRINT(reg, DISTXD); 1208 ISSETPRINT(reg, TWOSTOP); 1209 ISSETPRINT(reg, LOOPBACK); 1210 ISSETPRINT(reg, BIT7); 1211 ISSETPRINT(reg, EVENPARITY); 1212 ISSETPRINT(reg, ENPARITY); 1213 ISSETPRINT(reg, ENUART); 1214 } 1215 #endif /* TX39UARTDEBUG */ 1216
Indexes created Thu Oct 30 22:09:55 GMT 2025