txcom.c revision 1.2
1 /* $NetBSD: txcom.c,v 1.2 1999/12/23 16:57:14 uch Exp $ */ 2 3 /* 4 * Copyright (c) 1999, by UCHIYAMA Yasushi 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. The name of the developer may NOT be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 #include "opt_tx39_debug.h" 29 #include "opt_tx39uartdebug.h" 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/device.h> 34 35 #include <sys/proc.h> /* tsleep/wakeup */ 36 37 #include <sys/ioctl.h> 38 #include <sys/select.h> 39 #include <sys/file.h> 40 41 #include <sys/tty.h> 42 #include <sys/conf.h> 43 #include <dev/cons.h> /* consdev */ 44 45 #include <machine/bus.h> 46 47 #include <hpcmips/tx/tx39var.h> 48 #include <hpcmips/tx/tx39icureg.h> 49 #include <hpcmips/tx/tx39uartvar.h> 50 #include <hpcmips/tx/tx39uartreg.h> 51 52 #include <hpcmips/tx/tx39clockreg.h> /* XXX */ 53 54 #define SET(t, f) (t) |= (f) 55 #define CLR(t, f) (t) &= ~(f) 56 #define ISSET(t, f) ((t) & (f)) 57 58 #ifdef TX39UARTDEBUG 59 #define DPRINTF(arg) printf arg 60 #else 61 #define DPRINTF(arg) 62 #endif 63 64 #define MAXBUF 16 65 struct txcom_buf { 66 int b_cnt; 67 int b_in; 68 int b_out; 69 char b_buf[MAXBUF]; 70 }; 71 72 #define TXCOM_HW_CONSOLE 0x40 73 struct txcom_softc { 74 struct device sc_dev; 75 struct tty *sc_tty; 76 tx_chipset_tag_t sc_tc; 77 int sc_slot; /* UARTA or UARTB */ 78 int sc_cflag; 79 int sc_speed; 80 struct txcom_buf *sc_rxbuf; 81 struct txcom_buf *sc_txbuf; 82 char **sc_msg; 83 int sc_hwflags; 84 u_int8_t *sc_tba; /* transmit buffer address */ 85 int sc_tbc, sc_heldtbc; /* transmit byte count */ 86 u_int8_t sc_rbuf; /* XXX */ 87 88 }; 89 volatile int com_softrxintr_scheduled; 90 91 extern struct cfdriver txcom_cd; 92 93 int txcom_match __P((struct device*, struct cfdata*, void*)); 94 void txcom_attach __P((struct device*, struct device*, void*)); 95 int txcom_txintr __P((void*)); 96 int txcom_a_rxintr __P((void*)); 97 int txcom_b_rxintr __P((void*)); 98 int txcom_overrun_intr __P((void*)); 99 void txcom_rxsoft __P((void*)); 100 101 int txcom_cngetc __P((dev_t)); 102 void txcom_cnputc __P((dev_t, int)); 103 void txcom_cnpollc __P((dev_t, int)); 104 105 void txcomstart __P((struct tty*)); 106 int txcomparam __P((struct tty*, struct termios*)); 107 cdev_decl(txcom); 108 109 /* Serial console */ 110 static struct consdev txcomcons = { 111 NULL, NULL, txcom_cngetc, txcom_cnputc, 112 txcom_cnpollc, NODEV, CN_NORMAL 113 }; 114 static struct txcom_softc cn_sc; 115 116 struct cfattach txcom_ca = { 117 sizeof(struct txcom_softc), txcom_match, txcom_attach 118 }; 119 120 int txcom_enable __P((struct txcom_softc*)); 121 void txcom_disable __P((struct txcom_softc*)); 122 void txcom_setmode __P((struct txcom_softc*)); 123 void txcom_setbaudrate __P((struct txcom_softc*)); 124 125 int 126 txcom_match(parent, cf, aux) 127 struct device *parent; 128 struct cfdata *cf; 129 void *aux; 130 { 131 /* if the autoconfiguration got this far, there's a slot here */ 132 return 1; 133 } 134 135 void 136 txcom_attach(parent, self, aux) 137 struct device *parent; 138 struct device *self; 139 void *aux; 140 { 141 struct tx39uart_attach_args *ua = aux; 142 struct txcom_softc *sc = (void*)self; 143 tx_chipset_tag_t tc; 144 struct tty *tp; 145 146 printf("\n"); 147 148 /* Check this slot used as serial console */ 149 if (ua->ua_slot == cn_sc.sc_slot && 150 (cn_sc.sc_hwflags & TXCOM_HW_CONSOLE)) { 151 memcpy(&cn_sc, self, sizeof(struct device)); 152 memcpy(self, &cn_sc, sizeof(struct txcom_softc)); 153 } 154 155 tc = sc->sc_tc = ua->ua_tc; 156 sc->sc_slot = ua->ua_slot; 157 158 tp = ttymalloc(); 159 tp->t_oproc = txcomstart; 160 tp->t_param = txcomparam; 161 tp->t_hwiflow = NULL; 162 sc->sc_tty = tp; 163 cn_sc.sc_tty = tp; 164 tty_attach(tp); 165 166 if (ISSET(sc->sc_hwflags, TXCOM_HW_CONSOLE)) { 167 int maj; 168 /* locate the major number */ 169 for (maj = 0; maj < nchrdev; maj++) 170 if (cdevsw[maj].d_open == txcomopen) 171 break; 172 173 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 174 175 printf("%s: console\n", sc->sc_dev.dv_xname); 176 } 177 178 179 /* 180 * Enable interrupt 181 */ 182 switch (sc->sc_slot) { 183 case TX39_UARTA: 184 tx_intr_establish(tc, MAKEINTR(2, 185 TX39_INTRSTATUS2_UARTARXINT), 186 IST_EDGE, IPL_TTY, 187 txcom_a_rxintr, sc); 188 tx_intr_establish( 189 tc, MAKEINTR(2, TX39_INTRSTATUS2_UARTARXOVERRUNINT), 190 IST_EDGE, IPL_TTY, txcom_overrun_intr, sc); 191 break; 192 case TX39_UARTB: 193 tx_intr_establish(tc, MAKEINTR(2, 194 TX39_INTRSTATUS2_UARTBRXINT), 195 IST_EDGE, IPL_TTY, 196 txcom_b_rxintr, sc); 197 tx_intr_establish( 198 tc, MAKEINTR(2, TX39_INTRSTATUS2_UARTBRXOVERRUNINT), 199 IST_EDGE, IPL_TTY, txcom_overrun_intr, sc); 200 break; 201 } 202 } 203 204 int 205 txcom_enable(sc) 206 struct txcom_softc *sc; 207 { 208 tx_chipset_tag_t tc; 209 txreg_t reg; 210 int slot; 211 212 tc = sc->sc_tc; 213 slot = sc->sc_slot; 214 215 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 216 /* Power */ 217 reg |= TX39_UARTCTRL1_ENUART; 218 reg &= ~TX39_UARTCTRL1_ENBREAHALT; 219 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 220 /* 221 * XXX Disable DMA (DMA not coded yet) 222 */ 223 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 224 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 225 226 /* XXX Clock */ 227 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 228 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 229 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 230 231 232 return 0; 233 } 234 235 void 236 txcom_disable(sc) 237 struct txcom_softc *sc; 238 { 239 tx_chipset_tag_t tc; 240 txreg_t reg; 241 int slot; 242 243 tc = sc->sc_tc; 244 slot = sc->sc_slot; 245 246 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 247 /* DMA */ 248 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 249 /* Power */ 250 reg &= ~TX39_UARTCTRL1_ENUART; 251 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 252 /* Clock */ 253 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 254 reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 255 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 256 257 } 258 259 int 260 txcom_cnattach(slot, speed, cflag) 261 int slot, speed, cflag; 262 { 263 cn_tab = &txcomcons; 264 265 cn_sc.sc_tc = tx_conf_get_tag(); 266 cn_sc.sc_slot = slot; 267 cn_sc.sc_cflag = cflag; 268 cn_sc.sc_speed = speed; 269 cn_sc.sc_hwflags |= TXCOM_HW_CONSOLE; 270 #ifdef WINCE_DEFAULT_SETTING 271 #warning WINCE_DEFAULT_SETTING 272 #else 273 txcom_enable(&cn_sc); 274 txcom_setmode(&cn_sc); 275 txcom_setbaudrate(&cn_sc); 276 #endif 277 return 0; 278 } 279 280 int 281 txcom_cngetc(dev) 282 dev_t dev; 283 { 284 tx_chipset_tag_t tc; 285 int ofs, c, s; 286 287 s = splhigh(); 288 289 tc = cn_sc.sc_tc; 290 ofs = TX39_UARTCTRL1_REG(cn_sc.sc_slot); 291 292 while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs))) 293 ; 294 295 ofs = TX39_UARTRXHOLD_REG(cn_sc.sc_slot); 296 c = TX39_UARTRXHOLD_RXDATA(tx_conf_read(tc, ofs)); 297 298 if (c == '\r') { 299 c = '\n'; 300 } 301 302 splx(s); 303 304 return c; 305 } 306 307 void 308 txcom_cnputc(dev, c) 309 dev_t dev; 310 int c; 311 { 312 tx_chipset_tag_t tc; 313 int ofs, s; 314 315 s = splhigh(); 316 317 tc = cn_sc.sc_tc; 318 ofs = TX39_UARTCTRL1_REG(cn_sc.sc_slot); 319 320 while (!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY)) 321 ; 322 323 tx_conf_write(tc, TX39_UARTTXHOLD_REG(cn_sc.sc_slot), 324 (c & TX39_UARTTXHOLD_TXDATA_MASK)); 325 326 while (!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY)) 327 ; 328 329 splx(s); 330 331 } 332 333 void 334 txcom_cnpollc(dev, on) 335 dev_t dev; 336 int on; 337 { 338 } 339 340 void 341 txcom_setmode(sc) 342 struct txcom_softc *sc; 343 { 344 tcflag_t cflag; 345 txreg_t reg; 346 347 cflag = sc->sc_cflag; 348 reg = tx_conf_read(sc->sc_tc, TX39_UARTCTRL1_REG(sc->sc_slot)); 349 350 switch (ISSET(cflag, CSIZE)) { 351 default: 352 printf("txcom_setmode: CS7, CS8 only. use CS7"); 353 /* FALL THROUGH */ 354 case CS7: 355 reg |= TX39_UARTCTRL1_BIT7; 356 break; 357 case CS8: 358 reg &= ~TX39_UARTCTRL1_BIT7; 359 break; 360 } 361 if (ISSET(cflag, PARENB)) { 362 reg |= TX39_UARTCTRL1_ENPARITY; 363 if (ISSET(cflag, PARODD)) { 364 reg &= ~TX39_UARTCTRL1_EVENPARITY; 365 } else { 366 reg |= TX39_UARTCTRL1_EVENPARITY; 367 } 368 } else { 369 reg &= ~TX39_UARTCTRL1_ENPARITY; 370 } 371 if (ISSET(cflag, CSTOPB)) { 372 reg |= TX39_UARTCTRL1_TWOSTOP; 373 } 374 tx_conf_write(sc->sc_tc, TX39_UARTCTRL1_REG(sc->sc_slot), reg); 375 376 } 377 378 void 379 txcom_setbaudrate(sc) 380 struct txcom_softc *sc; 381 { 382 int baudrate; 383 txreg_t reg; 384 385 baudrate = TX39_UARTCLOCKHZ / (sc->sc_speed * 16) - 1; 386 reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate); 387 388 tx_conf_write(sc->sc_tc, TX39_UARTCTRL2_REG(sc->sc_slot), reg); 389 } 390 391 void 392 txcom_rxsoft(arg) 393 void *arg; 394 { 395 struct txcom_softc *sc = arg; 396 struct tty *tp = sc->sc_tty; 397 int (*rint) __P((int c, struct tty *tp)) = linesw[tp->t_line].l_rint; 398 int code = sc->sc_rbuf; 399 400 DPRINTF(("txcom_rxsoft %c %08x\n", code, code)); 401 com_softrxintr_scheduled = 0; 402 403 if ((*rint)(code, tp) == -1) { 404 405 } 406 } 407 408 int 409 txcom_overrun_intr(arg) 410 void *arg; 411 { 412 struct txcom_softc *sc = arg; 413 414 printf("UART%c overrun\n", sc->sc_slot ? 'B' : 'A'); 415 416 return 0; 417 } 418 419 int 420 txcom_a_rxintr(arg) 421 void *arg; 422 { 423 struct txcom_softc *sc = arg; 424 u_int8_t c; 425 426 if (!com_softrxintr_scheduled) { 427 com_softrxintr_scheduled = 1; 428 timeout(txcom_rxsoft, arg, 1); 429 } 430 DPRINTF(("txcom_rxintr\n")); 431 c = 0xff & tx_conf_read(sc->sc_tc, TX39_UARTRXHOLD_REG(sc->sc_slot)); 432 sc->sc_rbuf = c; 433 434 return 0; 435 } 436 437 int 438 txcom_b_rxintr(arg) 439 void *arg; 440 { 441 struct txcom_softc *sc = arg; 442 u_int8_t c; 443 444 if (!com_softrxintr_scheduled) { 445 com_softrxintr_scheduled = 1; 446 timeout(txcom_rxsoft, arg, 1); 447 } 448 DPRINTF(("txcom_rxintr\n")); 449 c = 0xff & tx_conf_read(sc->sc_tc, TX39_UARTRXHOLD_REG(sc->sc_slot)); 450 sc->sc_rbuf = c; 451 452 return 0; 453 } 454 455 456 int 457 txcomopen(dev, flag, mode, p) 458 dev_t dev; 459 int flag, mode; 460 struct proc *p; 461 { 462 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 463 struct tty *tp = sc->sc_tty; 464 int err; 465 struct termios t; 466 467 tp->t_dev = dev; 468 469 /* XXX XXX XXX */ 470 tp->t_ispeed = 0; 471 tp->t_ospeed = 9600; 472 tp->t_cflag = (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8 | CLOCAL | HUPCL; 473 txcomparam(tp, &t); /* not yet */ 474 /* XXX XXX XXX */ 475 476 tp->t_iflag = TTYDEF_IFLAG; 477 tp->t_oflag = TTYDEF_OFLAG; 478 tp->t_lflag = TTYDEF_LFLAG; 479 ttychars(tp); 480 ttsetwater(tp); 481 482 if ((err = ttyopen(tp, minor(dev), ISSET(flag, O_NONBLOCK)))) { 483 DPRINTF(("txcomopen: ttyopen failed\n")); 484 return err; 485 } 486 if ((err = (*linesw[tp->t_line].l_open)(dev, tp))) { 487 DPRINTF(("txcomopen: line dicipline open failed\n")); 488 return err; 489 } 490 491 return err; 492 } 493 494 int 495 txcomclose(dev, flag, mode, p) 496 dev_t dev; 497 int flag, mode; 498 struct proc *p; 499 { 500 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 501 struct tty *tp = sc->sc_tty; 502 503 DPRINTF(("txcomclose\n")); 504 (*linesw[tp->t_line].l_close)(tp, flag); 505 ttyclose(tp); 506 507 return 0; 508 } 509 510 int 511 txcomread(dev, uio, flag) 512 dev_t dev; 513 struct uio *uio; 514 int flag; 515 { 516 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 517 struct tty *tp = sc->sc_tty; 518 DPRINTF(("txcomread\n")); 519 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 520 } 521 522 int 523 txcomwrite(dev, uio, flag) 524 dev_t dev; 525 struct uio *uio; 526 int flag; 527 { 528 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 529 struct tty *tp = sc->sc_tty; 530 531 DPRINTF(("txcomwrite\n")); 532 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 533 } 534 535 struct tty * 536 txcomtty(dev) 537 dev_t dev; 538 { 539 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 540 struct tty *tp = sc->sc_tty; 541 DPRINTF(("txcomtty\n")); 542 return tp; 543 } 544 545 int 546 txcomioctl(dev, cmd, data, flag, p) 547 dev_t dev; 548 u_long cmd; 549 caddr_t data; 550 int flag; 551 struct proc *p; 552 { 553 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 554 struct tty *tp = sc->sc_tty; 555 int error; 556 557 DPRINTF(("txcomioctl\n")); 558 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 559 if (error >= 0) 560 return (error); 561 562 error = ttioctl(tp, cmd, data, flag, p); 563 if (error >= 0) 564 return (error); 565 566 return 0; 567 } 568 569 void 570 txcomstop(tp, flag) 571 struct tty *tp; 572 int flag; 573 { 574 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 575 int s; 576 577 DPRINTF(("txcomstop\n")); 578 s = spltty(); 579 580 if (ISSET(tp->t_state, TS_BUSY)) { 581 /* Stop transmitting at the next chunk. */ 582 sc->sc_tbc = 0; 583 sc->sc_heldtbc = 0; 584 if (!ISSET(tp->t_state, TS_TTSTOP)) 585 SET(tp->t_state, TS_FLUSH); 586 } 587 splx(s); 588 } 589 590 void 591 txcomstart(tp) 592 struct tty *tp; 593 { 594 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 595 int s; 596 597 DPRINTF(("txcomstart\n")); 598 s = spltty(); 599 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 600 return; 601 602 if (tp->t_outq.c_cc <= tp->t_lowat) { 603 if (ISSET(tp->t_state, TS_ASLEEP)) { 604 CLR(tp->t_state, TS_ASLEEP); 605 wakeup(&tp->t_outq); 606 } 607 selwakeup(&tp->t_wsel); 608 if (tp->t_outq.c_cc == 0) 609 return; 610 } 611 sc->sc_tba = tp->t_outq.c_cf; 612 sc->sc_tbc = ndqb(&tp->t_outq, 0); 613 while (sc->sc_tbc-- > 0) { 614 txcom_cnputc(tp->t_dev, *sc->sc_tba++); 615 } 616 sc->sc_tbc = 0; 617 618 CLR(tp->t_state, TS_BUSY); 619 if (ISSET(tp->t_state, TS_FLUSH)) { 620 CLR(tp->t_state, TS_FLUSH); 621 } else { 622 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 623 } 624 splx(s); 625 } 626 627 int 628 txcomparam(tp, t) 629 struct tty *tp; 630 struct termios *t; 631 { 632 DPRINTF(("txcomparam\n")); 633 return 0; 634 } 635
Indexes created Tue Oct 28 12:10:06 GMT 2025