txcom.c revision 1.23
1 /* $NetBSD: txcom.c,v 1.23 2003/12/26 11:10:08 shin Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: txcom.c,v 1.23 2003/12/26 11:10:08 shin Exp $"); 41 42 #include "opt_tx39uart_debug.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/kernel.h> 47 #include <sys/device.h> 48 #include <sys/malloc.h> 49 50 #include <sys/proc.h> /* tsleep/wakeup */ 51 52 #include <sys/ioctl.h> 53 #include <sys/select.h> 54 #include <sys/file.h> 55 56 #include <sys/tty.h> 57 #include <sys/conf.h> 58 #include <dev/cons.h> /* consdev */ 59 60 #include <machine/bus.h> 61 #include <machine/config_hook.h> 62 63 #include <hpcmips/tx/tx39var.h> 64 #include <hpcmips/tx/tx39icureg.h> 65 #include <hpcmips/tx/tx39uartvar.h> 66 #include <hpcmips/tx/tx39uartreg.h> 67 68 #include <hpcmips/tx/tx39irvar.h> 69 70 #include <hpcmips/tx/tx39clockreg.h> /* XXX */ 71 72 #define SET(t, f) (t) |= (f) 73 #define CLR(t, f) (t) &= ~(f) 74 #define ISSET(t, f) ((t) & (f)) 75 /* 76 * UARTA channel has DTR, DSR, RTS, CTS lines. and they wired to MFIO/IO port. 77 */ 78 #define IS_COM0(s) ((s) == 0) 79 #define IS_COM1(s) ((s) == 1) 80 #define ON ((void *)1) 81 #define OFF ((void *)0) 82 83 #ifdef TX39UART_DEBUG 84 #define DPRINTF_ENABLE 85 #define DPRINTF_DEBUG tx39uart_debug 86 #endif 87 #include <machine/debug.h> 88 89 #define TXCOM_HW_CONSOLE 0x40 90 #define TXCOM_RING_SIZE 256 /* must be a power of two! */ 91 #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1) 92 93 struct txcom_chip { 94 tx_chipset_tag_t sc_tc; 95 int sc_slot; /* UARTA or UARTB */ 96 int sc_cflag; 97 int sc_speed; 98 int sc_swflags; 99 int sc_hwflags; 100 101 int sc_dcd; 102 int sc_msr_cts; 103 int sc_tx_stopped; 104 }; 105 106 struct txcom_softc { 107 struct device sc_dev; 108 struct tty *sc_tty; 109 struct txcom_chip *sc_chip; 110 111 struct callout sc_txsoft_ch; 112 struct callout sc_rxsoft_ch; 113 114 u_int8_t *sc_tba; /* transmit buffer address */ 115 int sc_tbc; /* transmit byte count */ 116 int sc_heldtbc; 117 u_int8_t *sc_rbuf; /* receive buffer address */ 118 int sc_rbput; /* receive byte count */ 119 int sc_rbget; 120 }; 121 122 extern struct cfdriver txcom_cd; 123 124 int txcom_match(struct device *, struct cfdata *, void *); 125 void txcom_attach(struct device *, struct device *, void *); 126 int txcom_print(void*, const char *); 127 128 int txcom_txintr(void *); 129 int txcom_rxintr(void *); 130 int txcom_frameerr_intr(void *); 131 int txcom_parityerr_intr(void *); 132 int txcom_break_intr(void *); 133 134 void txcom_rxsoft(void *); 135 void txcom_txsoft(void *); 136 137 int txcom_stsoft(void *); 138 int txcom_stsoft2(void *); 139 int txcom_stsoft3(void *); 140 int txcom_stsoft4(void *); 141 142 143 void txcom_shutdown(struct txcom_softc *); 144 void txcom_break(struct txcom_softc *, int); 145 void txcom_modem(struct txcom_softc *, int); 146 void txcomstart(struct tty *); 147 int txcomparam(struct tty *, struct termios *); 148 149 void txcom_reset (struct txcom_chip *); 150 int txcom_enable (struct txcom_chip *); 151 void txcom_disable (struct txcom_chip *); 152 void txcom_setmode (struct txcom_chip *); 153 void txcom_setbaudrate(struct txcom_chip *); 154 int txcom_cngetc (dev_t); 155 void txcom_cnputc (dev_t, int); 156 void txcom_cnpollc (dev_t, int); 157 158 int txcom_dcd_hook(void *, int, long, void *); 159 int txcom_cts_hook(void *, int, long, void *); 160 161 162 __inline__ int __txcom_txbufready(struct txcom_chip *, int); 163 const char *__txcom_slotname(int); 164 165 #ifdef TX39UARTDEBUG 166 void txcom_dump(struct txcom_chip *); 167 #endif 168 169 struct consdev txcomcons = { 170 NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc, NULL, NULL, 171 NULL, NODEV, CN_NORMAL 172 }; 173 174 /* Serial console */ 175 struct txcom_chip txcom_chip; 176 177 CFATTACH_DECL(txcom, sizeof(struct txcom_softc), 178 txcom_match, txcom_attach, NULL, NULL); 179 180 dev_type_open(txcomopen); 181 dev_type_close(txcomclose); 182 dev_type_read(txcomread); 183 dev_type_write(txcomwrite); 184 dev_type_ioctl(txcomioctl); 185 dev_type_stop(txcomstop); 186 dev_type_tty(txcomtty); 187 dev_type_poll(txcompoll); 188 189 const struct cdevsw txcom_cdevsw = { 190 txcomopen, txcomclose, txcomread, txcomwrite, txcomioctl, 191 txcomstop, txcomtty, txcompoll, nommap, ttykqfilter, D_TTY 192 }; 193 194 int 195 txcom_match(parent, cf, aux) 196 struct device *parent; 197 struct cfdata *cf; 198 void *aux; 199 { 200 /* if the autoconfiguration got this far, there's a slot here */ 201 return 1; 202 } 203 204 void 205 txcom_attach(struct device *parent, struct device *self, void *aux) 206 { 207 struct tx39uart_attach_args *ua = aux; 208 struct txcom_softc *sc = (void*)self; 209 tx_chipset_tag_t tc; 210 struct tty *tp; 211 struct txcom_chip *chip; 212 int slot, console; 213 214 /* Check this slot used as serial console */ 215 console = (ua->ua_slot == txcom_chip.sc_slot) && 216 (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE); 217 218 if (console) { 219 sc->sc_chip = &txcom_chip; 220 } else { 221 if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip), 222 M_DEVBUF, M_WAITOK))) { 223 printf(": can't allocate chip\n"); 224 return; 225 } 226 memset(sc->sc_chip, 0, sizeof(struct txcom_chip)); 227 } 228 229 chip = sc->sc_chip; 230 tc = chip->sc_tc = ua->ua_tc; 231 slot = chip->sc_slot = ua->ua_slot; 232 233 #ifdef TX39UARTDEBUG 234 txcom_dump(chip); 235 #endif 236 if (!console) 237 txcom_reset(chip); 238 239 if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) { 240 printf(": can't allocate buffer.\n"); 241 return; 242 } 243 memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE); 244 245 tp = ttymalloc(); 246 tp->t_oproc = txcomstart; 247 tp->t_param = txcomparam; 248 tp->t_hwiflow = NULL; 249 sc->sc_tty = tp; 250 tty_attach(tp); 251 252 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 253 int maj; 254 /* locate the major number */ 255 maj = cdevsw_lookup_major(&txcom_cdevsw); 256 257 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 258 259 printf(": console"); 260 } 261 262 printf("\n"); 263 264 /* 265 * Enable interrupt 266 */ 267 #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s)) 268 269 tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY, 270 txcom_rxintr, sc); 271 tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY, 272 txcom_txintr, sc); 273 tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY, 274 txcom_rxintr, sc); 275 tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY, 276 txcom_txintr, sc); 277 tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY, 278 txcom_frameerr_intr, sc); 279 tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY, 280 txcom_parityerr_intr, sc); 281 tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY, 282 txcom_break_intr, sc); 283 284 /* 285 * UARTA has external signal line. (its wiring is platform dependent) 286 */ 287 if (IS_COM0(slot)) { 288 /* install DCD, CTS hooks. */ 289 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_DCD, 290 CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc); 291 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_CTS, 292 CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc); 293 } 294 295 /* 296 * UARTB can connect IR module 297 */ 298 if (IS_COM1(slot)) { 299 struct txcom_attach_args tca; 300 tca.tca_tc = tc; 301 tca.tca_parent = self; 302 config_found(self, &tca, txcom_print); 303 } 304 } 305 306 int 307 txcom_print(void *aux, const char *pnp) 308 { 309 return pnp ? QUIET : UNCONF; 310 } 311 312 void 313 txcom_reset(struct txcom_chip *chip) 314 { 315 tx_chipset_tag_t tc; 316 int slot, ofs; 317 txreg_t reg; 318 319 tc = chip->sc_tc; 320 slot = chip->sc_slot; 321 ofs = TX39_UARTCTRL1_REG(slot); 322 323 /* Supply clock */ 324 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 325 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 326 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 327 328 /* reset UART module */ 329 tx_conf_write(tc, ofs, 0); 330 } 331 332 int 333 txcom_enable(struct txcom_chip *chip) 334 { 335 tx_chipset_tag_t tc; 336 txreg_t reg; 337 int slot, ofs, timeout; 338 339 tc = chip->sc_tc; 340 slot = chip->sc_slot; 341 ofs = TX39_UARTCTRL1_REG(slot); 342 343 /* External power supply (if any) */ 344 config_hook_call(CONFIG_HOOK_POWERCONTROL, 345 CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON); 346 delay(3); 347 348 /* Supply clock */ 349 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 350 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 351 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 352 353 /* 354 * XXX Disable DMA (DMA not coded yet) 355 */ 356 reg = tx_conf_read(tc, ofs); 357 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 358 tx_conf_write(tc, ofs, reg); 359 360 /* enable */ 361 reg = tx_conf_read(tc, ofs); 362 reg |= TX39_UARTCTRL1_ENUART; 363 reg &= ~TX39_UARTCTRL1_ENBREAHALT; 364 tx_conf_write(tc, ofs, reg); 365 366 timeout = 100000; 367 368 while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) && 369 --timeout > 0) 370 ; 371 372 if (timeout == 0 && !cold) { 373 printf("%s never power up\n", __txcom_slotname(slot)); 374 return 1; 375 } 376 377 return 0; 378 } 379 380 void 381 txcom_disable(struct txcom_chip *chip) 382 { 383 tx_chipset_tag_t tc; 384 txreg_t reg; 385 int slot; 386 387 tc = chip->sc_tc; 388 slot = chip->sc_slot; 389 390 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 391 /* DMA */ 392 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 393 394 /* disable module */ 395 reg &= ~TX39_UARTCTRL1_ENUART; 396 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 397 398 /* Clock */ 399 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 400 reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 401 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 402 403 } 404 405 __inline__ int 406 __txcom_txbufready(struct txcom_chip *chip, int retry) 407 { 408 tx_chipset_tag_t tc = chip->sc_tc; 409 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 410 411 do { 412 if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY) 413 return 1; 414 } while(--retry != 0); 415 416 return 0; 417 } 418 419 void 420 txcom_pulse_mode(struct device *dev) 421 { 422 struct txcom_softc *sc = (void*)dev; 423 struct txcom_chip *chip = sc->sc_chip; 424 tx_chipset_tag_t tc = chip->sc_tc; 425 int ofs; 426 txreg_t reg; 427 428 ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 429 430 reg = tx_conf_read(tc, ofs); 431 /* WindowsCE use this setting */ 432 reg |= TX39_UARTCTRL1_PULSEOPT1; 433 reg &= ~TX39_UARTCTRL1_PULSEOPT2; 434 reg |= TX39_UARTCTRL1_DTINVERT; 435 436 tx_conf_write(tc, ofs, reg); 437 } 438 439 /* 440 * console 441 */ 442 int 443 txcom_cngetc(dev_t dev) 444 { 445 tx_chipset_tag_t tc; 446 int ofs, c, s; 447 448 s = spltty(); 449 450 tc = txcom_chip.sc_tc; 451 ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot); 452 453 while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs))) 454 ; 455 456 c = TX39_UARTRXHOLD_RXDATA( 457 tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot))); 458 459 if (c == '\r') 460 c = '\n'; 461 462 splx(s); 463 464 return c; 465 } 466 467 void 468 txcom_cnputc(dev_t dev, int c) 469 { 470 struct txcom_chip *chip = &txcom_chip; 471 tx_chipset_tag_t tc = chip->sc_tc; 472 int s; 473 474 s = spltty(); 475 476 /* Wait for transmitter to empty */ 477 __txcom_txbufready(chip, -1); 478 479 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 480 (c & TX39_UARTTXHOLD_TXDATA_MASK)); 481 482 __txcom_txbufready(chip, -1); 483 484 splx(s); 485 } 486 487 void 488 txcom_cnpollc(dev_t dev, int on) 489 { 490 } 491 492 void 493 txcom_setmode(struct txcom_chip *chip) 494 { 495 tcflag_t cflag = chip->sc_cflag; 496 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 497 txreg_t reg; 498 499 reg = tx_conf_read(chip->sc_tc, ofs); 500 reg &= ~TX39_UARTCTRL1_ENUART; 501 tx_conf_write(chip->sc_tc, ofs, reg); 502 503 switch (ISSET(cflag, CSIZE)) { 504 default: 505 printf("txcom_setmode: CS7, CS8 only. use CS7"); 506 /* FALL THROUGH */ 507 case CS7: 508 reg |= TX39_UARTCTRL1_BIT7; 509 break; 510 case CS8: 511 reg &= ~TX39_UARTCTRL1_BIT7; 512 break; 513 } 514 515 if (ISSET(cflag, PARENB)) { 516 reg |= TX39_UARTCTRL1_ENPARITY; 517 if (ISSET(cflag, PARODD)) { 518 reg &= ~TX39_UARTCTRL1_EVENPARITY; 519 } else { 520 reg |= TX39_UARTCTRL1_EVENPARITY; 521 } 522 } else { 523 reg &= ~TX39_UARTCTRL1_ENPARITY; 524 } 525 526 if (ISSET(cflag, CSTOPB)) 527 reg |= TX39_UARTCTRL1_TWOSTOP; 528 else 529 reg &= ~TX39_UARTCTRL1_TWOSTOP; 530 531 reg |= TX39_UARTCTRL1_ENUART; 532 tx_conf_write(chip->sc_tc, ofs, reg); 533 } 534 535 void 536 txcom_setbaudrate(struct txcom_chip *chip) 537 { 538 int baudrate; 539 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 540 txreg_t reg, reg1; 541 542 if (chip->sc_speed == 0) 543 return; 544 545 if (!cold) 546 DPRINTF("%d\n", chip->sc_speed); 547 548 reg1 = tx_conf_read(chip->sc_tc, ofs); 549 reg1 &= ~TX39_UARTCTRL1_ENUART; 550 tx_conf_write(chip->sc_tc, ofs, reg1); 551 552 baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1; 553 reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate); 554 555 tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg); 556 557 reg1 |= TX39_UARTCTRL1_ENUART; 558 tx_conf_write(chip->sc_tc, ofs, reg1); 559 } 560 561 int 562 txcom_cnattach(int slot, int speed, int cflag) 563 { 564 cn_tab = &txcomcons; 565 566 txcom_chip.sc_tc = tx_conf_get_tag(); 567 txcom_chip.sc_slot = slot; 568 txcom_chip.sc_cflag = cflag; 569 txcom_chip.sc_speed = speed; 570 txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE; 571 #if notyet 572 txcom_reset(&txcom_chip); 573 #endif 574 txcom_setmode(&txcom_chip); 575 txcom_setbaudrate(&txcom_chip); 576 577 if (txcom_enable(&txcom_chip)) 578 return 1; 579 580 return 0; 581 } 582 583 /* 584 * tty 585 */ 586 void 587 txcom_break(struct txcom_softc *sc, int on) 588 { 589 struct txcom_chip *chip = sc->sc_chip; 590 591 tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 592 on ? TX39_UARTTXHOLD_BREAK : 0); 593 } 594 595 void 596 txcom_modem(struct txcom_softc *sc, int on) 597 { 598 struct txcom_chip *chip = sc->sc_chip; 599 tx_chipset_tag_t tc = chip->sc_tc; 600 int slot = chip->sc_slot; 601 txreg_t reg; 602 603 /* assert DTR */ 604 if (IS_COM0(slot)) { 605 config_hook_call(CONFIG_HOOK_SET, 606 CONFIG_HOOK_COM0_DTR, 607 (void *)on); 608 } 609 610 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 611 reg &= ~TX39_UARTCTRL1_ENUART; 612 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 613 614 if (on) { 615 reg &= ~TX39_UARTCTRL1_DISTXD; 616 } else { 617 reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */ 618 } 619 620 reg |= TX39_UARTCTRL1_ENUART; 621 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 622 } 623 624 void 625 txcom_shutdown(struct txcom_softc *sc) 626 { 627 struct tty *tp = sc->sc_tty; 628 int s = spltty(); 629 630 /* Clear any break condition set with TIOCSBRK. */ 631 txcom_break(sc, 0); 632 633 /* 634 * Hang up if necessary. Wait a bit, so the other side has time to 635 * notice even if we immediately open the port again. 636 */ 637 if (ISSET(tp->t_cflag, HUPCL)) { 638 txcom_modem(sc, 0); 639 (void) tsleep(sc, TTIPRI, ttclos, hz); 640 } 641 642 643 /* Turn off interrupts if not the console. */ 644 if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 645 txcom_disable(sc->sc_chip); 646 } 647 648 splx(s); 649 } 650 651 const char * 652 __txcom_slotname(int slot) 653 { 654 static const char *slotname[] = {"UARTA", "UARTB", "unknown"}; 655 656 if (slot != 0 && slot != 1) 657 return slotname[2]; 658 659 return slotname[slot]; 660 } 661 662 int 663 txcom_frameerr_intr(void *arg) 664 { 665 struct txcom_softc *sc = arg; 666 667 printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 668 669 return 0; 670 } 671 672 int 673 txcom_parityerr_intr(void *arg) 674 { 675 struct txcom_softc *sc = arg; 676 677 printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 678 679 return 0; 680 } 681 682 int 683 txcom_break_intr(void *arg) 684 { 685 struct txcom_softc *sc = arg; 686 687 printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot)); 688 689 return 0; 690 } 691 692 int 693 txcom_rxintr(void *arg) 694 { 695 struct txcom_softc *sc = arg; 696 struct txcom_chip *chip = sc->sc_chip; 697 u_int8_t c; 698 699 c = TX39_UARTRXHOLD_RXDATA( 700 tx_conf_read(chip->sc_tc, 701 TX39_UARTRXHOLD_REG(chip->sc_slot))); 702 703 sc->sc_rbuf[sc->sc_rbput] = c; 704 sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK; 705 706 callout_reset(&sc->sc_rxsoft_ch, 1, txcom_rxsoft, sc); 707 708 return 0; 709 } 710 711 void 712 txcom_rxsoft(void *arg) 713 { 714 struct txcom_softc *sc = arg; 715 struct tty *tp = sc->sc_tty; 716 int (*rint)(int, struct tty *); 717 int code; 718 int s, end, get; 719 720 rint = tp->t_linesw->l_rint; 721 722 s = spltty(); 723 end = sc->sc_rbput; 724 get = sc->sc_rbget; 725 726 while (get != end) { 727 code = sc->sc_rbuf[get]; 728 729 if ((*rint)(code, tp) == -1) { 730 /* 731 * The line discipline's buffer is out of space. 732 */ 733 } 734 get = (get + 1) % TXCOM_RING_MASK; 735 } 736 sc->sc_rbget = get; 737 738 splx(s); 739 } 740 741 int 742 txcom_txintr(void *arg) 743 { 744 struct txcom_softc *sc = arg; 745 struct txcom_chip *chip = sc->sc_chip; 746 tx_chipset_tag_t tc = chip->sc_tc; 747 748 if (sc->sc_tbc > 0) { 749 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 750 (*sc->sc_tba & 751 TX39_UARTTXHOLD_TXDATA_MASK)); 752 sc->sc_tbc--; 753 sc->sc_tba++; 754 } else { 755 callout_reset(&sc->sc_rxsoft_ch, 1, txcom_txsoft, sc); 756 } 757 758 return 0; 759 } 760 761 void 762 txcom_txsoft(void *arg) 763 { 764 struct txcom_softc *sc = arg; 765 struct tty *tp = sc->sc_tty; 766 int s = spltty(); 767 768 CLR(tp->t_state, TS_BUSY); 769 if (ISSET(tp->t_state, TS_FLUSH)) { 770 CLR(tp->t_state, TS_FLUSH); 771 } else { 772 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 773 } 774 775 (*tp->t_linesw->l_start)(tp); 776 777 splx(s); 778 } 779 780 int 781 txcomopen(dev_t dev, int flag, int mode, struct proc *p) 782 { 783 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 784 struct txcom_chip *chip; 785 struct tty *tp; 786 int s, err = ENXIO; 787 ; 788 789 if (!sc) 790 return err; 791 792 chip = sc->sc_chip; 793 tp = sc->sc_tty; 794 795 if (ISSET(tp->t_state, TS_ISOPEN) && 796 ISSET(tp->t_state, TS_XCLUDE) && 797 p->p_ucred->cr_uid != 0) 798 return (EBUSY); 799 800 s = spltty(); 801 802 if (txcom_enable(sc->sc_chip)) { 803 splx(s); 804 goto out; 805 } 806 /* 807 * Do the following iff this is a first open. 808 */ 809 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 810 struct termios t; 811 812 tp->t_dev = dev; 813 814 t.c_ispeed = 0; 815 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 816 t.c_ospeed = chip->sc_speed; 817 t.c_cflag = chip->sc_cflag; 818 } else { 819 t.c_ospeed = TTYDEF_SPEED; 820 t.c_cflag = TTYDEF_CFLAG; 821 } 822 823 if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL)) 824 SET(t.c_cflag, CLOCAL); 825 if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS)) 826 SET(t.c_cflag, CRTSCTS); 827 if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF)) 828 SET(t.c_cflag, MDMBUF); 829 830 /* Make sure txcomparam() will do something. */ 831 tp->t_ospeed = 0; 832 txcomparam(tp, &t); 833 834 tp->t_iflag = TTYDEF_IFLAG; 835 tp->t_oflag = TTYDEF_OFLAG; 836 tp->t_lflag = TTYDEF_LFLAG; 837 838 ttychars(tp); 839 ttsetwater(tp); 840 841 /* 842 * Turn on DTR. We must always do this, even if carrier is not 843 * present, because otherwise we'd have to use TIOCSDTR 844 * immediately after setting CLOCAL, which applications do not 845 * expect. We always assert DTR while the device is open 846 * unless explicitly requested to deassert it. 847 */ 848 txcom_modem(sc, 1); 849 850 /* Clear the input ring, and unblock. */ 851 sc->sc_rbget = sc->sc_rbput = 0; 852 } 853 854 splx(s); 855 #define TXCOMDIALOUT(x) (minor(x) & 0x80000) 856 if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) { 857 DPRINTF("ttyopen failed\n"); 858 goto out; 859 } 860 if ((err = (*tp->t_linesw->l_open)(dev, tp))) { 861 DPRINTF("line dicipline open failed\n"); 862 goto out; 863 } 864 865 return err; 866 867 out: 868 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 869 /* 870 * We failed to open the device, and nobody else had it opened. 871 * Clean up the state as appropriate. 872 */ 873 txcom_shutdown(sc); 874 } 875 876 return err; 877 878 } 879 880 int 881 txcomclose(dev_t dev, int flag, int mode, struct proc *p) 882 { 883 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 884 struct tty *tp = sc->sc_tty; 885 886 /* XXX This is for cons.c. */ 887 if (!ISSET(tp->t_state, TS_ISOPEN)) 888 return 0; 889 890 (*tp->t_linesw->l_close)(tp, flag); 891 ttyclose(tp); 892 893 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 894 /* 895 * Although we got a last close, the device may still be in 896 * use; e.g. if this was the dialout node, and there are still 897 * processes waiting for carrier on the non-dialout node. 898 */ 899 txcom_shutdown(sc); 900 } 901 902 return 0; 903 } 904 905 int 906 txcomread(dev_t dev, struct uio *uio, int flag) 907 { 908 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 909 struct tty *tp = sc->sc_tty; 910 911 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 912 } 913 914 int 915 txcomwrite(dev_t dev, struct uio *uio, int flag) 916 { 917 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 918 struct tty *tp = sc->sc_tty; 919 920 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 921 } 922 923 int 924 txcompoll(dev_t dev, int events, struct proc *p) 925 { 926 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 927 struct tty *tp = sc->sc_tty; 928 929 return ((*tp->t_linesw->l_poll)(tp, events, p)); 930 } 931 932 struct tty * 933 txcomtty(dev_t dev) 934 { 935 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 936 937 return sc->sc_tty; 938 } 939 940 int 941 txcomioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p) 942 { 943 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 944 struct tty *tp = sc->sc_tty; 945 int s, err; 946 947 err = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 948 if (err != EPASSTHROUGH) { 949 return err; 950 } 951 952 err = ttioctl(tp, cmd, data, flag, p); 953 if (err != EPASSTHROUGH) { 954 return err; 955 } 956 957 err = 0; 958 959 s = spltty(); 960 961 switch (cmd) { 962 default: 963 err = EPASSTHROUGH; 964 break; 965 966 case TIOCSBRK: 967 txcom_break(sc, 1); 968 break; 969 970 case TIOCCBRK: 971 txcom_break(sc, 0); 972 break; 973 974 case TIOCSDTR: 975 txcom_modem(sc, 1); 976 break; 977 978 case TIOCCDTR: 979 txcom_modem(sc, 0); 980 break; 981 982 case TIOCGFLAGS: 983 *(int *)data = sc->sc_chip->sc_swflags; 984 break; 985 986 case TIOCSFLAGS: 987 err = suser(p->p_ucred, &p->p_acflag); 988 if (err) { 989 break; 990 } 991 sc->sc_chip->sc_swflags = *(int *)data; 992 break; 993 994 } 995 996 splx(s); 997 998 return err; 999 } 1000 1001 void 1002 txcomstop(struct tty *tp, int flag) 1003 { 1004 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 1005 int s; 1006 1007 s = spltty(); 1008 1009 if (ISSET(tp->t_state, TS_BUSY)) { 1010 /* Stop transmitting at the next chunk. */ 1011 sc->sc_tbc = 0; 1012 sc->sc_heldtbc = 0; 1013 if (!ISSET(tp->t_state, TS_TTSTOP)) 1014 SET(tp->t_state, TS_FLUSH); 1015 } 1016 1017 splx(s); 1018 } 1019 1020 void 1021 txcomstart(struct tty *tp) 1022 { 1023 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 1024 struct txcom_chip *chip = sc->sc_chip; 1025 tx_chipset_tag_t tc = chip->sc_tc; 1026 int slot = chip->sc_slot; 1027 int s; 1028 1029 s = spltty(); 1030 1031 if (!__txcom_txbufready(chip, 0) || 1032 ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1033 goto out; 1034 1035 if (tp->t_outq.c_cc <= tp->t_lowat) { 1036 if (ISSET(tp->t_state, TS_ASLEEP)) { 1037 CLR(tp->t_state, TS_ASLEEP); 1038 wakeup(&tp->t_outq); 1039 } 1040 selwakeup(&tp->t_wsel); 1041 if (tp->t_outq.c_cc == 0) 1042 goto out; 1043 } 1044 1045 sc->sc_tba = tp->t_outq.c_cf; 1046 sc->sc_tbc = ndqb(&tp->t_outq, 0); 1047 SET(tp->t_state, TS_BUSY); 1048 1049 /* Output the first character of the contiguous buffer. */ 1050 tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot), 1051 (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK)); 1052 1053 sc->sc_tbc--; 1054 sc->sc_tba++; 1055 1056 out: 1057 splx(s); 1058 } 1059 1060 /* 1061 * Set TXcom tty parameters from termios. 1062 */ 1063 int 1064 txcomparam(struct tty *tp, struct termios *t) 1065 { 1066 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 1067 struct txcom_chip *chip; 1068 int ospeed; 1069 int s; 1070 1071 if (!sc) 1072 return ENXIO; 1073 1074 ospeed = t->c_ospeed; 1075 1076 /* Check requested parameters. */ 1077 if (ospeed < 0) { 1078 return EINVAL; 1079 } 1080 if (t->c_ispeed && t->c_ispeed != ospeed) { 1081 return EINVAL; 1082 } 1083 1084 s = spltty(); 1085 chip = sc->sc_chip; 1086 /* 1087 * For the console, always force CLOCAL and !HUPCL, so that the port 1088 * is always active. 1089 */ 1090 if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) || 1091 ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 1092 SET(t->c_cflag, CLOCAL); 1093 CLR(t->c_cflag, HUPCL); 1094 } 1095 splx(s); 1096 1097 /* 1098 * If we're not in a mode that assumes a connection is present, then 1099 * ignore carrier changes. 1100 */ 1101 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1102 chip->sc_dcd = 0; 1103 else 1104 chip->sc_dcd = 1; 1105 1106 /* 1107 * Only whack the UART when params change. 1108 * Some callers need to clear tp->t_ospeed 1109 * to make sure initialization gets done. 1110 */ 1111 if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) { 1112 return 0; 1113 } 1114 1115 s = spltty(); 1116 chip = sc->sc_chip; 1117 chip->sc_speed = ospeed; 1118 chip->sc_cflag = t->c_cflag; 1119 1120 txcom_setmode(chip); 1121 txcom_setbaudrate(chip); 1122 1123 /* And copy to tty. */ 1124 tp->t_ispeed = 0; 1125 tp->t_ospeed = chip->sc_speed; 1126 tp->t_cflag = chip->sc_cflag; 1127 1128 /* 1129 * Update the tty layer's idea of the carrier bit, in case we changed 1130 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1131 * explicit request. 1132 */ 1133 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd); 1134 1135 /* 1136 * If hardware flow control is disabled, unblock any hard flow 1137 * control state. 1138 */ 1139 if (!ISSET(chip->sc_cflag, CHWFLOW)) { 1140 txcomstart(tp); 1141 } 1142 1143 splx(s); 1144 1145 return 0; 1146 } 1147 1148 int 1149 txcom_dcd_hook(void *arg, int type, long id, void *msg) 1150 { 1151 struct txcom_softc *sc = arg; 1152 struct tty *tp = sc->sc_tty; 1153 struct txcom_chip *chip = sc->sc_chip; 1154 int modem = !(int)msg; /* p-edge 1, n-edge 0 */ 1155 1156 DPRINTF("DCD %s\n", modem ? "ON" : "OFF"); 1157 1158 if (modem && chip->sc_dcd) 1159 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd); 1160 1161 return 0; 1162 } 1163 1164 int 1165 txcom_cts_hook(void *arg, int type, long id, void *msg) 1166 { 1167 struct txcom_softc *sc = arg; 1168 struct tty *tp = sc->sc_tty; 1169 struct txcom_chip *chip = sc->sc_chip; 1170 int clear = !(int)msg; /* p-edge 1, n-edge 0 */ 1171 1172 DPRINTF("CTS %s\n", clear ? "ON" : "OFF"); 1173 1174 if (chip->sc_msr_cts) { 1175 if (!clear) { 1176 chip->sc_tx_stopped = 1; 1177 } else { 1178 chip->sc_tx_stopped = 0; 1179 (*tp->t_linesw->l_start)(tp); 1180 } 1181 } 1182 1183 return 0; 1184 } 1185 1186 #ifdef TX39UARTDEBUG 1187 void 1188 txcom_dump(struct txcom_chip *chip) 1189 { 1190 tx_chipset_tag_t tc = chip->sc_tc; 1191 int slot = chip->sc_slot; 1192 txreg_t reg; 1193 1194 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 1195 #define ISSETPRINT(r, m) \ 1196 dbg_bitmask_print(r, TX39_UARTCTRL1_##m, #m) 1197 ISSETPRINT(reg, UARTON); 1198 ISSETPRINT(reg, EMPTY); 1199 ISSETPRINT(reg, PRXHOLDFULL); 1200 ISSETPRINT(reg, RXHOLDFULL); 1201 ISSETPRINT(reg, ENDMARX); 1202 ISSETPRINT(reg, ENDMATX); 1203 ISSETPRINT(reg, TESTMODE); 1204 ISSETPRINT(reg, ENBREAHALT); 1205 ISSETPRINT(reg, ENDMATEST); 1206 ISSETPRINT(reg, ENDMALOOP); 1207 ISSETPRINT(reg, PULSEOPT2); 1208 ISSETPRINT(reg, PULSEOPT1); 1209 ISSETPRINT(reg, DTINVERT); 1210 ISSETPRINT(reg, DISTXD); 1211 ISSETPRINT(reg, TWOSTOP); 1212 ISSETPRINT(reg, LOOPBACK); 1213 ISSETPRINT(reg, BIT7); 1214 ISSETPRINT(reg, EVENPARITY); 1215 ISSETPRINT(reg, ENPARITY); 1216 ISSETPRINT(reg, ENUART); 1217 } 1218 #endif /* TX39UARTDEBUG */ 1219
Indexes created Thu Oct 30 23:09:54 GMT 2025