txcom.c revision 1.26
1 /* $NetBSD: txcom.c,v 1.26 2005/12/11 12:17:34 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: txcom.c,v 1.26 2005/12/11 12:17:34 christos Exp $"); 41 42 #include "opt_tx39uart_debug.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/kernel.h> 47 #include <sys/device.h> 48 #include <sys/malloc.h> 49 50 #include <sys/proc.h> /* tsleep/wakeup */ 51 52 #include <sys/ioctl.h> 53 #include <sys/select.h> 54 #include <sys/file.h> 55 56 #include <sys/tty.h> 57 #include <sys/conf.h> 58 #include <dev/cons.h> /* consdev */ 59 60 #include <machine/bus.h> 61 #include <machine/config_hook.h> 62 63 #include <hpcmips/tx/tx39var.h> 64 #include <hpcmips/tx/tx39icureg.h> 65 #include <hpcmips/tx/tx39uartvar.h> 66 #include <hpcmips/tx/tx39uartreg.h> 67 68 #include <hpcmips/tx/tx39irvar.h> 69 70 #include <hpcmips/tx/tx39clockreg.h> /* XXX */ 71 72 #define SET(t, f) (t) |= (f) 73 #define CLR(t, f) (t) &= ~(f) 74 #define ISSET(t, f) ((t) & (f)) 75 /* 76 * UARTA channel has DTR, DSR, RTS, CTS lines. and they wired to MFIO/IO port. 77 */ 78 #define IS_COM0(s) ((s) == 0) 79 #define IS_COM1(s) ((s) == 1) 80 #define ON ((void *)1) 81 #define OFF ((void *)0) 82 83 #ifdef TX39UART_DEBUG 84 #define DPRINTF_ENABLE 85 #define DPRINTF_DEBUG tx39uart_debug 86 #endif 87 #include <machine/debug.h> 88 89 #define TXCOM_HW_CONSOLE 0x40 90 #define TXCOM_RING_SIZE 256 /* must be a power of two! */ 91 #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1) 92 93 struct txcom_chip { 94 tx_chipset_tag_t sc_tc; 95 int sc_slot; /* UARTA or UARTB */ 96 int sc_cflag; 97 int sc_speed; 98 int sc_swflags; 99 int sc_hwflags; 100 101 int sc_dcd; 102 int sc_msr_cts; 103 int sc_tx_stopped; 104 }; 105 106 struct txcom_softc { 107 struct device sc_dev; 108 struct tty *sc_tty; 109 struct txcom_chip *sc_chip; 110 111 struct callout sc_txsoft_ch; 112 struct callout sc_rxsoft_ch; 113 114 u_int8_t *sc_tba; /* transmit buffer address */ 115 int sc_tbc; /* transmit byte count */ 116 int sc_heldtbc; 117 u_int8_t *sc_rbuf; /* receive buffer address */ 118 int sc_rbput; /* receive byte count */ 119 int sc_rbget; 120 }; 121 122 extern struct cfdriver txcom_cd; 123 124 int txcom_match(struct device *, struct cfdata *, void *); 125 void txcom_attach(struct device *, struct device *, void *); 126 int txcom_print(void*, const char *); 127 128 int txcom_txintr(void *); 129 int txcom_rxintr(void *); 130 int txcom_frameerr_intr(void *); 131 int txcom_parityerr_intr(void *); 132 int txcom_break_intr(void *); 133 134 void txcom_rxsoft(void *); 135 void txcom_txsoft(void *); 136 137 int txcom_stsoft(void *); 138 int txcom_stsoft2(void *); 139 int txcom_stsoft3(void *); 140 int txcom_stsoft4(void *); 141 142 143 void txcom_shutdown(struct txcom_softc *); 144 void txcom_break(struct txcom_softc *, int); 145 void txcom_modem(struct txcom_softc *, int); 146 void txcomstart(struct tty *); 147 int txcomparam(struct tty *, struct termios *); 148 149 void txcom_reset (struct txcom_chip *); 150 int txcom_enable (struct txcom_chip *, boolean_t); 151 void txcom_disable (struct txcom_chip *); 152 void txcom_setmode (struct txcom_chip *); 153 void txcom_setbaudrate(struct txcom_chip *); 154 int txcom_cngetc (dev_t); 155 void txcom_cnputc (dev_t, int); 156 void txcom_cnpollc (dev_t, int); 157 158 int txcom_dcd_hook(void *, int, long, void *); 159 int txcom_cts_hook(void *, int, long, void *); 160 161 162 __inline__ int __txcom_txbufready(struct txcom_chip *, int); 163 const char *__txcom_slotname(int); 164 165 #ifdef TX39UARTDEBUG 166 void txcom_dump(struct txcom_chip *); 167 #endif 168 169 struct consdev txcomcons = { 170 NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc, NULL, NULL, 171 NULL, NODEV, CN_NORMAL 172 }; 173 174 /* Serial console */ 175 struct txcom_chip txcom_chip; 176 177 CFATTACH_DECL(txcom, sizeof(struct txcom_softc), 178 txcom_match, txcom_attach, NULL, NULL); 179 180 dev_type_open(txcomopen); 181 dev_type_close(txcomclose); 182 dev_type_read(txcomread); 183 dev_type_write(txcomwrite); 184 dev_type_ioctl(txcomioctl); 185 dev_type_stop(txcomstop); 186 dev_type_tty(txcomtty); 187 dev_type_poll(txcompoll); 188 189 const struct cdevsw txcom_cdevsw = { 190 txcomopen, txcomclose, txcomread, txcomwrite, txcomioctl, 191 txcomstop, txcomtty, txcompoll, nommap, ttykqfilter, D_TTY 192 }; 193 194 int 195 txcom_match(parent, cf, aux) 196 struct device *parent; 197 struct cfdata *cf; 198 void *aux; 199 { 200 /* if the autoconfiguration got this far, there's a slot here */ 201 return 1; 202 } 203 204 void 205 txcom_attach(struct device *parent, struct device *self, void *aux) 206 { 207 struct tx39uart_attach_args *ua = aux; 208 struct txcom_softc *sc = (void*)self; 209 tx_chipset_tag_t tc; 210 struct tty *tp; 211 struct txcom_chip *chip; 212 int slot, console; 213 214 /* Check this slot used as serial console */ 215 console = (ua->ua_slot == txcom_chip.sc_slot) && 216 (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE); 217 218 if (console) { 219 sc->sc_chip = &txcom_chip; 220 } else { 221 if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip), 222 M_DEVBUF, M_WAITOK))) { 223 printf(": can't allocate chip\n"); 224 return; 225 } 226 memset(sc->sc_chip, 0, sizeof(struct txcom_chip)); 227 } 228 229 chip = sc->sc_chip; 230 tc = chip->sc_tc = ua->ua_tc; 231 slot = chip->sc_slot = ua->ua_slot; 232 233 #ifdef TX39UARTDEBUG 234 txcom_dump(chip); 235 #endif 236 if (!console) 237 txcom_reset(chip); 238 239 if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) { 240 printf(": can't allocate buffer.\n"); 241 return; 242 } 243 memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE); 244 245 tp = ttymalloc(); 246 tp->t_oproc = txcomstart; 247 tp->t_param = txcomparam; 248 tp->t_hwiflow = NULL; 249 sc->sc_tty = tp; 250 tty_attach(tp); 251 252 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 253 int maj; 254 /* locate the major number */ 255 maj = cdevsw_lookup_major(&txcom_cdevsw); 256 257 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 258 259 printf(": console"); 260 } 261 262 printf("\n"); 263 264 /* 265 * Enable interrupt 266 */ 267 #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s)) 268 269 tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY, 270 txcom_rxintr, sc); 271 tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY, 272 txcom_txintr, sc); 273 tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY, 274 txcom_rxintr, sc); 275 tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY, 276 txcom_txintr, sc); 277 tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY, 278 txcom_frameerr_intr, sc); 279 tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY, 280 txcom_parityerr_intr, sc); 281 tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY, 282 txcom_break_intr, sc); 283 284 /* 285 * UARTA has external signal line. (its wiring is platform dependent) 286 */ 287 if (IS_COM0(slot)) { 288 /* install DCD, CTS hooks. */ 289 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_DCD, 290 CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc); 291 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_CTS, 292 CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc); 293 } 294 295 /* 296 * UARTB can connect IR module 297 */ 298 if (IS_COM1(slot)) { 299 struct txcom_attach_args tca; 300 tca.tca_tc = tc; 301 tca.tca_parent = self; 302 config_found(self, &tca, txcom_print); 303 } 304 } 305 306 int 307 txcom_print(void *aux, const char *pnp) 308 { 309 return pnp ? QUIET : UNCONF; 310 } 311 312 void 313 txcom_reset(struct txcom_chip *chip) 314 { 315 tx_chipset_tag_t tc; 316 int slot, ofs; 317 txreg_t reg; 318 319 tc = chip->sc_tc; 320 slot = chip->sc_slot; 321 ofs = TX39_UARTCTRL1_REG(slot); 322 323 /* Supply clock */ 324 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 325 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 326 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 327 328 /* reset UART module */ 329 tx_conf_write(tc, ofs, 0); 330 } 331 332 int 333 txcom_enable(struct txcom_chip *chip, boolean_t console) 334 { 335 tx_chipset_tag_t tc; 336 txreg_t reg; 337 int slot, ofs, timeout; 338 339 tc = chip->sc_tc; 340 slot = chip->sc_slot; 341 ofs = TX39_UARTCTRL1_REG(slot); 342 343 /* 344 * External power supply (if any) 345 * When serial console, Windows CE already powered on it. 346 */ 347 if (!console) { 348 config_hook_call(CONFIG_HOOK_POWERCONTROL, 349 CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON); 350 delay(3); 351 } 352 353 /* Supply clock */ 354 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 355 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 356 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 357 358 /* 359 * XXX Disable DMA (DMA not coded yet) 360 */ 361 reg = tx_conf_read(tc, ofs); 362 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 363 tx_conf_write(tc, ofs, reg); 364 365 /* enable */ 366 reg = tx_conf_read(tc, ofs); 367 reg |= TX39_UARTCTRL1_ENUART; 368 reg &= ~TX39_UARTCTRL1_ENBREAHALT; 369 tx_conf_write(tc, ofs, reg); 370 371 timeout = 100000; 372 373 while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) && 374 --timeout > 0) 375 ; 376 377 if (timeout == 0 && !cold) { 378 printf("%s never power up\n", __txcom_slotname(slot)); 379 return 1; 380 } 381 382 return 0; 383 } 384 385 void 386 txcom_disable(struct txcom_chip *chip) 387 { 388 tx_chipset_tag_t tc; 389 txreg_t reg; 390 int slot; 391 392 tc = chip->sc_tc; 393 slot = chip->sc_slot; 394 395 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 396 /* DMA */ 397 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 398 399 /* disable module */ 400 reg &= ~TX39_UARTCTRL1_ENUART; 401 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 402 403 /* Clock */ 404 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 405 reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 406 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 407 408 } 409 410 __inline__ int 411 __txcom_txbufready(struct txcom_chip *chip, int retry) 412 { 413 tx_chipset_tag_t tc = chip->sc_tc; 414 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 415 416 do { 417 if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY) 418 return 1; 419 } while(--retry != 0); 420 421 return 0; 422 } 423 424 void 425 txcom_pulse_mode(struct device *dev) 426 { 427 struct txcom_softc *sc = (void*)dev; 428 struct txcom_chip *chip = sc->sc_chip; 429 tx_chipset_tag_t tc = chip->sc_tc; 430 int ofs; 431 txreg_t reg; 432 433 ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 434 435 reg = tx_conf_read(tc, ofs); 436 /* WindowsCE use this setting */ 437 reg |= TX39_UARTCTRL1_PULSEOPT1; 438 reg &= ~TX39_UARTCTRL1_PULSEOPT2; 439 reg |= TX39_UARTCTRL1_DTINVERT; 440 441 tx_conf_write(tc, ofs, reg); 442 } 443 444 /* 445 * console 446 */ 447 int 448 txcom_cngetc(dev_t dev) 449 { 450 tx_chipset_tag_t tc; 451 int ofs, c, s; 452 453 s = spltty(); 454 455 tc = txcom_chip.sc_tc; 456 ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot); 457 458 while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs))) 459 ; 460 461 c = TX39_UARTRXHOLD_RXDATA( 462 tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot))); 463 464 if (c == '\r') 465 c = '\n'; 466 467 splx(s); 468 469 return c; 470 } 471 472 void 473 txcom_cnputc(dev_t dev, int c) 474 { 475 struct txcom_chip *chip = &txcom_chip; 476 tx_chipset_tag_t tc = chip->sc_tc; 477 int s; 478 479 s = spltty(); 480 481 /* Wait for transmitter to empty */ 482 __txcom_txbufready(chip, -1); 483 484 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 485 (c & TX39_UARTTXHOLD_TXDATA_MASK)); 486 487 __txcom_txbufready(chip, -1); 488 489 splx(s); 490 } 491 492 void 493 txcom_cnpollc(dev_t dev, int on) 494 { 495 } 496 497 void 498 txcom_setmode(struct txcom_chip *chip) 499 { 500 tcflag_t cflag = chip->sc_cflag; 501 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 502 txreg_t reg; 503 504 reg = tx_conf_read(chip->sc_tc, ofs); 505 reg &= ~TX39_UARTCTRL1_ENUART; 506 tx_conf_write(chip->sc_tc, ofs, reg); 507 508 switch (ISSET(cflag, CSIZE)) { 509 default: 510 printf("txcom_setmode: CS7, CS8 only. use CS7"); 511 /* FALL THROUGH */ 512 case CS7: 513 reg |= TX39_UARTCTRL1_BIT7; 514 break; 515 case CS8: 516 reg &= ~TX39_UARTCTRL1_BIT7; 517 break; 518 } 519 520 if (ISSET(cflag, PARENB)) { 521 reg |= TX39_UARTCTRL1_ENPARITY; 522 if (ISSET(cflag, PARODD)) { 523 reg &= ~TX39_UARTCTRL1_EVENPARITY; 524 } else { 525 reg |= TX39_UARTCTRL1_EVENPARITY; 526 } 527 } else { 528 reg &= ~TX39_UARTCTRL1_ENPARITY; 529 } 530 531 if (ISSET(cflag, CSTOPB)) 532 reg |= TX39_UARTCTRL1_TWOSTOP; 533 else 534 reg &= ~TX39_UARTCTRL1_TWOSTOP; 535 536 reg |= TX39_UARTCTRL1_ENUART; 537 tx_conf_write(chip->sc_tc, ofs, reg); 538 } 539 540 void 541 txcom_setbaudrate(struct txcom_chip *chip) 542 { 543 int baudrate; 544 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 545 txreg_t reg, reg1; 546 547 if (chip->sc_speed == 0) 548 return; 549 550 if (!cold) 551 DPRINTF("%d\n", chip->sc_speed); 552 553 reg1 = tx_conf_read(chip->sc_tc, ofs); 554 reg1 &= ~TX39_UARTCTRL1_ENUART; 555 tx_conf_write(chip->sc_tc, ofs, reg1); 556 557 baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1; 558 reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate); 559 560 tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg); 561 562 reg1 |= TX39_UARTCTRL1_ENUART; 563 tx_conf_write(chip->sc_tc, ofs, reg1); 564 } 565 566 int 567 txcom_cnattach(int slot, int speed, int cflag) 568 { 569 cn_tab = &txcomcons; 570 571 txcom_chip.sc_tc = tx_conf_get_tag(); 572 txcom_chip.sc_slot = slot; 573 txcom_chip.sc_cflag = cflag; 574 txcom_chip.sc_speed = speed; 575 txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE; 576 #if notyet 577 txcom_reset(&txcom_chip); 578 #endif 579 txcom_setmode(&txcom_chip); 580 txcom_setbaudrate(&txcom_chip); 581 582 if (txcom_enable(&txcom_chip, TRUE) != 0) 583 return 1; 584 585 return 0; 586 } 587 588 /* 589 * tty 590 */ 591 void 592 txcom_break(struct txcom_softc *sc, int on) 593 { 594 struct txcom_chip *chip = sc->sc_chip; 595 596 tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 597 on ? TX39_UARTTXHOLD_BREAK : 0); 598 } 599 600 void 601 txcom_modem(struct txcom_softc *sc, int on) 602 { 603 struct txcom_chip *chip = sc->sc_chip; 604 tx_chipset_tag_t tc = chip->sc_tc; 605 int slot = chip->sc_slot; 606 txreg_t reg; 607 608 /* assert DTR */ 609 if (IS_COM0(slot)) { 610 config_hook_call(CONFIG_HOOK_SET, 611 CONFIG_HOOK_COM0_DTR, 612 (void *)on); 613 } 614 615 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 616 reg &= ~TX39_UARTCTRL1_ENUART; 617 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 618 619 if (on) { 620 reg &= ~TX39_UARTCTRL1_DISTXD; 621 } else { 622 reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */ 623 } 624 625 reg |= TX39_UARTCTRL1_ENUART; 626 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 627 } 628 629 void 630 txcom_shutdown(struct txcom_softc *sc) 631 { 632 struct tty *tp = sc->sc_tty; 633 int s = spltty(); 634 635 /* Clear any break condition set with TIOCSBRK. */ 636 txcom_break(sc, 0); 637 638 /* 639 * Hang up if necessary. Wait a bit, so the other side has time to 640 * notice even if we immediately open the port again. 641 */ 642 if (ISSET(tp->t_cflag, HUPCL)) { 643 txcom_modem(sc, 0); 644 (void) tsleep(sc, TTIPRI, ttclos, hz); 645 } 646 647 648 /* Turn off interrupts if not the console. */ 649 if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 650 txcom_disable(sc->sc_chip); 651 } 652 653 splx(s); 654 } 655 656 const char * 657 __txcom_slotname(int slot) 658 { 659 static const char *slotname[] = {"UARTA", "UARTB", "unknown"}; 660 661 if (slot != 0 && slot != 1) 662 return slotname[2]; 663 664 return slotname[slot]; 665 } 666 667 int 668 txcom_frameerr_intr(void *arg) 669 { 670 struct txcom_softc *sc = arg; 671 672 printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 673 674 return 0; 675 } 676 677 int 678 txcom_parityerr_intr(void *arg) 679 { 680 struct txcom_softc *sc = arg; 681 682 printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 683 684 return 0; 685 } 686 687 int 688 txcom_break_intr(void *arg) 689 { 690 struct txcom_softc *sc = arg; 691 692 printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot)); 693 694 return 0; 695 } 696 697 int 698 txcom_rxintr(void *arg) 699 { 700 struct txcom_softc *sc = arg; 701 struct txcom_chip *chip = sc->sc_chip; 702 u_int8_t c; 703 704 c = TX39_UARTRXHOLD_RXDATA( 705 tx_conf_read(chip->sc_tc, 706 TX39_UARTRXHOLD_REG(chip->sc_slot))); 707 708 sc->sc_rbuf[sc->sc_rbput] = c; 709 sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK; 710 711 callout_reset(&sc->sc_rxsoft_ch, 1, txcom_rxsoft, sc); 712 713 return 0; 714 } 715 716 void 717 txcom_rxsoft(void *arg) 718 { 719 struct txcom_softc *sc = arg; 720 struct tty *tp = sc->sc_tty; 721 int (*rint)(int, struct tty *); 722 int code; 723 int s, end, get; 724 725 rint = tp->t_linesw->l_rint; 726 727 s = spltty(); 728 end = sc->sc_rbput; 729 get = sc->sc_rbget; 730 731 while (get != end) { 732 code = sc->sc_rbuf[get]; 733 734 if ((*rint)(code, tp) == -1) { 735 /* 736 * The line discipline's buffer is out of space. 737 */ 738 } 739 get = (get + 1) % TXCOM_RING_MASK; 740 } 741 sc->sc_rbget = get; 742 743 splx(s); 744 } 745 746 int 747 txcom_txintr(void *arg) 748 { 749 struct txcom_softc *sc = arg; 750 struct txcom_chip *chip = sc->sc_chip; 751 tx_chipset_tag_t tc = chip->sc_tc; 752 753 if (sc->sc_tbc > 0) { 754 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 755 (*sc->sc_tba & 756 TX39_UARTTXHOLD_TXDATA_MASK)); 757 sc->sc_tbc--; 758 sc->sc_tba++; 759 } else { 760 callout_reset(&sc->sc_rxsoft_ch, 1, txcom_txsoft, sc); 761 } 762 763 return 0; 764 } 765 766 void 767 txcom_txsoft(void *arg) 768 { 769 struct txcom_softc *sc = arg; 770 struct tty *tp = sc->sc_tty; 771 int s = spltty(); 772 773 CLR(tp->t_state, TS_BUSY); 774 if (ISSET(tp->t_state, TS_FLUSH)) { 775 CLR(tp->t_state, TS_FLUSH); 776 } else { 777 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 778 } 779 780 (*tp->t_linesw->l_start)(tp); 781 782 splx(s); 783 } 784 785 int 786 txcomopen(dev_t dev, int flag, int mode, struct lwp *l) 787 { 788 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 789 struct txcom_chip *chip; 790 struct tty *tp; 791 int s, err = ENXIO; 792 ; 793 794 if (!sc) 795 return err; 796 797 chip = sc->sc_chip; 798 tp = sc->sc_tty; 799 800 if (ISSET(tp->t_state, TS_ISOPEN) && 801 ISSET(tp->t_state, TS_XCLUDE) && 802 suser(l->l_proc->p_ucred, &l->l_proc->p_acflag) != 0) 803 return (EBUSY); 804 805 s = spltty(); 806 807 if (txcom_enable(sc->sc_chip, FALSE)) { 808 splx(s); 809 goto out; 810 } 811 /* 812 * Do the following iff this is a first open. 813 */ 814 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 815 struct termios t; 816 817 tp->t_dev = dev; 818 819 t.c_ispeed = 0; 820 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 821 t.c_ospeed = chip->sc_speed; 822 t.c_cflag = chip->sc_cflag; 823 } else { 824 t.c_ospeed = TTYDEF_SPEED; 825 t.c_cflag = TTYDEF_CFLAG; 826 } 827 828 if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL)) 829 SET(t.c_cflag, CLOCAL); 830 if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS)) 831 SET(t.c_cflag, CRTSCTS); 832 if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF)) 833 SET(t.c_cflag, MDMBUF); 834 835 /* Make sure txcomparam() will do something. */ 836 tp->t_ospeed = 0; 837 txcomparam(tp, &t); 838 839 tp->t_iflag = TTYDEF_IFLAG; 840 tp->t_oflag = TTYDEF_OFLAG; 841 tp->t_lflag = TTYDEF_LFLAG; 842 843 ttychars(tp); 844 ttsetwater(tp); 845 846 /* 847 * Turn on DTR. We must always do this, even if carrier is not 848 * present, because otherwise we'd have to use TIOCSDTR 849 * immediately after setting CLOCAL, which applications do not 850 * expect. We always assert DTR while the device is open 851 * unless explicitly requested to deassert it. 852 */ 853 txcom_modem(sc, 1); 854 855 /* Clear the input ring, and unblock. */ 856 sc->sc_rbget = sc->sc_rbput = 0; 857 } 858 859 splx(s); 860 #define TXCOMDIALOUT(x) (minor(x) & 0x80000) 861 if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) { 862 DPRINTF("ttyopen failed\n"); 863 goto out; 864 } 865 if ((err = (*tp->t_linesw->l_open)(dev, tp))) { 866 DPRINTF("line dicipline open failed\n"); 867 goto out; 868 } 869 870 return err; 871 872 out: 873 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 874 /* 875 * We failed to open the device, and nobody else had it opened. 876 * Clean up the state as appropriate. 877 */ 878 txcom_shutdown(sc); 879 } 880 881 return err; 882 883 } 884 885 int 886 txcomclose(dev_t dev, int flag, int mode, struct lwp *l) 887 { 888 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 889 struct tty *tp = sc->sc_tty; 890 891 /* XXX This is for cons.c. */ 892 if (!ISSET(tp->t_state, TS_ISOPEN)) 893 return 0; 894 895 (*tp->t_linesw->l_close)(tp, flag); 896 ttyclose(tp); 897 898 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 899 /* 900 * Although we got a last close, the device may still be in 901 * use; e.g. if this was the dialout node, and there are still 902 * processes waiting for carrier on the non-dialout node. 903 */ 904 txcom_shutdown(sc); 905 } 906 907 return 0; 908 } 909 910 int 911 txcomread(dev_t dev, struct uio *uio, int flag) 912 { 913 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 914 struct tty *tp = sc->sc_tty; 915 916 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 917 } 918 919 int 920 txcomwrite(dev_t dev, struct uio *uio, int flag) 921 { 922 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 923 struct tty *tp = sc->sc_tty; 924 925 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 926 } 927 928 int 929 txcompoll(dev_t dev, int events, struct lwp *l) 930 { 931 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 932 struct tty *tp = sc->sc_tty; 933 934 return ((*tp->t_linesw->l_poll)(tp, events, l)); 935 } 936 937 struct tty * 938 txcomtty(dev_t dev) 939 { 940 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 941 942 return sc->sc_tty; 943 } 944 945 int 946 txcomioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct lwp *l) 947 { 948 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 949 struct tty *tp = sc->sc_tty; 950 int s, err; 951 952 err = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 953 if (err != EPASSTHROUGH) { 954 return err; 955 } 956 957 err = ttioctl(tp, cmd, data, flag, l); 958 if (err != EPASSTHROUGH) { 959 return err; 960 } 961 962 err = 0; 963 964 s = spltty(); 965 966 switch (cmd) { 967 default: 968 err = EPASSTHROUGH; 969 break; 970 971 case TIOCSBRK: 972 txcom_break(sc, 1); 973 break; 974 975 case TIOCCBRK: 976 txcom_break(sc, 0); 977 break; 978 979 case TIOCSDTR: 980 txcom_modem(sc, 1); 981 break; 982 983 case TIOCCDTR: 984 txcom_modem(sc, 0); 985 break; 986 987 case TIOCGFLAGS: 988 *(int *)data = sc->sc_chip->sc_swflags; 989 break; 990 991 case TIOCSFLAGS: 992 err = suser(l->l_proc->p_ucred, &l->l_proc->p_acflag); 993 if (err) { 994 break; 995 } 996 sc->sc_chip->sc_swflags = *(int *)data; 997 break; 998 999 } 1000 1001 splx(s); 1002 1003 return err; 1004 } 1005 1006 void 1007 txcomstop(struct tty *tp, int flag) 1008 { 1009 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 1010 int s; 1011 1012 s = spltty(); 1013 1014 if (ISSET(tp->t_state, TS_BUSY)) { 1015 /* Stop transmitting at the next chunk. */ 1016 sc->sc_tbc = 0; 1017 sc->sc_heldtbc = 0; 1018 if (!ISSET(tp->t_state, TS_TTSTOP)) 1019 SET(tp->t_state, TS_FLUSH); 1020 } 1021 1022 splx(s); 1023 } 1024 1025 void 1026 txcomstart(struct tty *tp) 1027 { 1028 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 1029 struct txcom_chip *chip = sc->sc_chip; 1030 tx_chipset_tag_t tc = chip->sc_tc; 1031 int slot = chip->sc_slot; 1032 int s; 1033 1034 s = spltty(); 1035 1036 if (!__txcom_txbufready(chip, 0) || 1037 ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1038 goto out; 1039 1040 if (tp->t_outq.c_cc <= tp->t_lowat) { 1041 if (ISSET(tp->t_state, TS_ASLEEP)) { 1042 CLR(tp->t_state, TS_ASLEEP); 1043 wakeup(&tp->t_outq); 1044 } 1045 selwakeup(&tp->t_wsel); 1046 if (tp->t_outq.c_cc == 0) 1047 goto out; 1048 } 1049 1050 sc->sc_tba = tp->t_outq.c_cf; 1051 sc->sc_tbc = ndqb(&tp->t_outq, 0); 1052 SET(tp->t_state, TS_BUSY); 1053 1054 /* Output the first character of the contiguous buffer. */ 1055 tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot), 1056 (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK)); 1057 1058 sc->sc_tbc--; 1059 sc->sc_tba++; 1060 1061 out: 1062 splx(s); 1063 } 1064 1065 /* 1066 * Set TXcom tty parameters from termios. 1067 */ 1068 int 1069 txcomparam(struct tty *tp, struct termios *t) 1070 { 1071 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 1072 struct txcom_chip *chip; 1073 int ospeed; 1074 int s; 1075 1076 if (!sc) 1077 return ENXIO; 1078 1079 ospeed = t->c_ospeed; 1080 1081 /* Check requested parameters. */ 1082 if (ospeed < 0) { 1083 return EINVAL; 1084 } 1085 if (t->c_ispeed && t->c_ispeed != ospeed) { 1086 return EINVAL; 1087 } 1088 1089 s = spltty(); 1090 chip = sc->sc_chip; 1091 /* 1092 * For the console, always force CLOCAL and !HUPCL, so that the port 1093 * is always active. 1094 */ 1095 if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) || 1096 ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 1097 SET(t->c_cflag, CLOCAL); 1098 CLR(t->c_cflag, HUPCL); 1099 } 1100 splx(s); 1101 1102 /* 1103 * If we're not in a mode that assumes a connection is present, then 1104 * ignore carrier changes. 1105 */ 1106 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1107 chip->sc_dcd = 0; 1108 else 1109 chip->sc_dcd = 1; 1110 1111 /* 1112 * Only whack the UART when params change. 1113 * Some callers need to clear tp->t_ospeed 1114 * to make sure initialization gets done. 1115 */ 1116 if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) { 1117 return 0; 1118 } 1119 1120 s = spltty(); 1121 chip = sc->sc_chip; 1122 chip->sc_speed = ospeed; 1123 chip->sc_cflag = t->c_cflag; 1124 1125 txcom_setmode(chip); 1126 txcom_setbaudrate(chip); 1127 1128 /* And copy to tty. */ 1129 tp->t_ispeed = 0; 1130 tp->t_ospeed = chip->sc_speed; 1131 tp->t_cflag = chip->sc_cflag; 1132 1133 /* 1134 * Update the tty layer's idea of the carrier bit, in case we changed 1135 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1136 * explicit request. 1137 */ 1138 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd); 1139 1140 /* 1141 * If hardware flow control is disabled, unblock any hard flow 1142 * control state. 1143 */ 1144 if (!ISSET(chip->sc_cflag, CHWFLOW)) { 1145 txcomstart(tp); 1146 } 1147 1148 splx(s); 1149 1150 return 0; 1151 } 1152 1153 int 1154 txcom_dcd_hook(void *arg, int type, long id, void *msg) 1155 { 1156 struct txcom_softc *sc = arg; 1157 struct tty *tp = sc->sc_tty; 1158 struct txcom_chip *chip = sc->sc_chip; 1159 int modem = !(int)msg; /* p-edge 1, n-edge 0 */ 1160 1161 DPRINTF("DCD %s\n", modem ? "ON" : "OFF"); 1162 1163 if (modem && chip->sc_dcd) 1164 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd); 1165 1166 return 0; 1167 } 1168 1169 int 1170 txcom_cts_hook(void *arg, int type, long id, void *msg) 1171 { 1172 struct txcom_softc *sc = arg; 1173 struct tty *tp = sc->sc_tty; 1174 struct txcom_chip *chip = sc->sc_chip; 1175 int clear = !(int)msg; /* p-edge 1, n-edge 0 */ 1176 1177 DPRINTF("CTS %s\n", clear ? "ON" : "OFF"); 1178 1179 if (chip->sc_msr_cts) { 1180 if (!clear) { 1181 chip->sc_tx_stopped = 1; 1182 } else { 1183 chip->sc_tx_stopped = 0; 1184 (*tp->t_linesw->l_start)(tp); 1185 } 1186 } 1187 1188 return 0; 1189 } 1190 1191 #ifdef TX39UARTDEBUG 1192 void 1193 txcom_dump(struct txcom_chip *chip) 1194 { 1195 tx_chipset_tag_t tc = chip->sc_tc; 1196 int slot = chip->sc_slot; 1197 txreg_t reg; 1198 1199 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 1200 #define ISSETPRINT(r, m) \ 1201 dbg_bitmask_print(r, TX39_UARTCTRL1_##m, #m) 1202 ISSETPRINT(reg, UARTON); 1203 ISSETPRINT(reg, EMPTY); 1204 ISSETPRINT(reg, PRXHOLDFULL); 1205 ISSETPRINT(reg, RXHOLDFULL); 1206 ISSETPRINT(reg, ENDMARX); 1207 ISSETPRINT(reg, ENDMATX); 1208 ISSETPRINT(reg, TESTMODE); 1209 ISSETPRINT(reg, ENBREAHALT); 1210 ISSETPRINT(reg, ENDMATEST); 1211 ISSETPRINT(reg, ENDMALOOP); 1212 ISSETPRINT(reg, PULSEOPT2); 1213 ISSETPRINT(reg, PULSEOPT1); 1214 ISSETPRINT(reg, DTINVERT); 1215 ISSETPRINT(reg, DISTXD); 1216 ISSETPRINT(reg, TWOSTOP); 1217 ISSETPRINT(reg, LOOPBACK); 1218 ISSETPRINT(reg, BIT7); 1219 ISSETPRINT(reg, EVENPARITY); 1220 ISSETPRINT(reg, ENPARITY); 1221 ISSETPRINT(reg, ENUART); 1222 } 1223 #endif /* TX39UARTDEBUG */ 1224
Indexes created Thu Oct 30 22:09:55 GMT 2025