txcom.c revision 1.35
1 /* $NetBSD: txcom.c,v 1.35 2007/02/21 22:59:43 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: txcom.c,v 1.35 2007/02/21 22:59:43 thorpej Exp $"); 41 42 #include "opt_tx39uart_debug.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/kernel.h> 47 #include <sys/device.h> 48 #include <sys/malloc.h> 49 #include <sys/kauth.h> 50 51 #include <sys/proc.h> /* tsleep/wakeup */ 52 53 #include <sys/ioctl.h> 54 #include <sys/select.h> 55 #include <sys/file.h> 56 57 #include <sys/tty.h> 58 #include <sys/conf.h> 59 #include <dev/cons.h> /* consdev */ 60 61 #include <machine/bus.h> 62 #include <machine/config_hook.h> 63 64 #include <hpcmips/tx/tx39var.h> 65 #include <hpcmips/tx/tx39icureg.h> 66 #include <hpcmips/tx/tx39uartvar.h> 67 #include <hpcmips/tx/tx39uartreg.h> 68 69 #include <hpcmips/tx/tx39irvar.h> 70 71 #include <hpcmips/tx/tx39clockreg.h> /* XXX */ 72 73 /* 74 * UARTA channel has DTR, DSR, RTS, CTS lines. and they wired to MFIO/IO port. 75 */ 76 #define IS_COM0(s) ((s) == 0) 77 #define IS_COM1(s) ((s) == 1) 78 #define ON ((void *)1) 79 #define OFF ((void *)0) 80 81 #ifdef TX39UART_DEBUG 82 #define DPRINTF_ENABLE 83 #define DPRINTF_DEBUG tx39uart_debug 84 #endif 85 #include <machine/debug.h> 86 87 #define TXCOM_HW_CONSOLE 0x40 88 #define TXCOM_RING_SIZE 256 /* must be a power of two! */ 89 #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1) 90 91 struct txcom_chip { 92 tx_chipset_tag_t sc_tc; 93 int sc_slot; /* UARTA or UARTB */ 94 int sc_cflag; 95 int sc_speed; 96 int sc_swflags; 97 int sc_hwflags; 98 99 int sc_dcd; 100 int sc_msr_cts; 101 int sc_tx_stopped; 102 }; 103 104 struct txcom_softc { 105 struct device sc_dev; 106 struct tty *sc_tty; 107 struct txcom_chip *sc_chip; 108 109 struct callout sc_txsoft_ch; 110 struct callout sc_rxsoft_ch; 111 112 u_int8_t *sc_tba; /* transmit buffer address */ 113 int sc_tbc; /* transmit byte count */ 114 int sc_heldtbc; 115 u_int8_t *sc_rbuf; /* receive buffer address */ 116 int sc_rbput; /* receive byte count */ 117 int sc_rbget; 118 }; 119 120 extern struct cfdriver txcom_cd; 121 122 int txcom_match(struct device *, struct cfdata *, void *); 123 void txcom_attach(struct device *, struct device *, void *); 124 int txcom_print(void*, const char *); 125 126 int txcom_txintr(void *); 127 int txcom_rxintr(void *); 128 int txcom_frameerr_intr(void *); 129 int txcom_parityerr_intr(void *); 130 int txcom_break_intr(void *); 131 132 void txcom_rxsoft(void *); 133 void txcom_txsoft(void *); 134 135 int txcom_stsoft(void *); 136 int txcom_stsoft2(void *); 137 int txcom_stsoft3(void *); 138 int txcom_stsoft4(void *); 139 140 141 void txcom_shutdown(struct txcom_softc *); 142 void txcom_break(struct txcom_softc *, int); 143 void txcom_modem(struct txcom_softc *, int); 144 void txcomstart(struct tty *); 145 int txcomparam(struct tty *, struct termios *); 146 147 void txcom_reset (struct txcom_chip *); 148 int txcom_enable (struct txcom_chip *, bool); 149 void txcom_disable (struct txcom_chip *); 150 void txcom_setmode (struct txcom_chip *); 151 void txcom_setbaudrate(struct txcom_chip *); 152 int txcom_cngetc (dev_t); 153 void txcom_cnputc (dev_t, int); 154 void txcom_cnpollc (dev_t, int); 155 156 int txcom_dcd_hook(void *, int, long, void *); 157 int txcom_cts_hook(void *, int, long, void *); 158 159 160 inline int __txcom_txbufready(struct txcom_chip *, int); 161 const char *__txcom_slotname(int); 162 163 #ifdef TX39UARTDEBUG 164 void txcom_dump(struct txcom_chip *); 165 #endif 166 167 struct consdev txcomcons = { 168 NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc, NULL, NULL, 169 NULL, NODEV, CN_NORMAL 170 }; 171 172 /* Serial console */ 173 struct txcom_chip txcom_chip; 174 175 CFATTACH_DECL(txcom, sizeof(struct txcom_softc), 176 txcom_match, txcom_attach, NULL, NULL); 177 178 dev_type_open(txcomopen); 179 dev_type_close(txcomclose); 180 dev_type_read(txcomread); 181 dev_type_write(txcomwrite); 182 dev_type_ioctl(txcomioctl); 183 dev_type_stop(txcomstop); 184 dev_type_tty(txcomtty); 185 dev_type_poll(txcompoll); 186 187 const struct cdevsw txcom_cdevsw = { 188 txcomopen, txcomclose, txcomread, txcomwrite, txcomioctl, 189 txcomstop, txcomtty, txcompoll, nommap, ttykqfilter, D_TTY 190 }; 191 192 int 193 txcom_match(parent, cf, aux) 194 struct device *parent; 195 struct cfdata *cf; 196 void *aux; 197 { 198 /* if the autoconfiguration got this far, there's a slot here */ 199 return 1; 200 } 201 202 void 203 txcom_attach(struct device *parent, struct device *self, void *aux) 204 { 205 struct tx39uart_attach_args *ua = aux; 206 struct txcom_softc *sc = (void*)self; 207 tx_chipset_tag_t tc; 208 struct tty *tp; 209 struct txcom_chip *chip; 210 int slot, console; 211 212 /* Check this slot used as serial console */ 213 console = (ua->ua_slot == txcom_chip.sc_slot) && 214 (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE); 215 216 if (console) { 217 sc->sc_chip = &txcom_chip; 218 } else { 219 if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip), 220 M_DEVBUF, M_WAITOK))) { 221 printf(": can't allocate chip\n"); 222 return; 223 } 224 memset(sc->sc_chip, 0, sizeof(struct txcom_chip)); 225 } 226 227 chip = sc->sc_chip; 228 tc = chip->sc_tc = ua->ua_tc; 229 slot = chip->sc_slot = ua->ua_slot; 230 231 #ifdef TX39UARTDEBUG 232 txcom_dump(chip); 233 #endif 234 if (!console) 235 txcom_reset(chip); 236 237 if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) { 238 printf(": can't allocate buffer.\n"); 239 return; 240 } 241 memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE); 242 243 tp = ttymalloc(); 244 tp->t_oproc = txcomstart; 245 tp->t_param = txcomparam; 246 tp->t_hwiflow = NULL; 247 sc->sc_tty = tp; 248 tty_attach(tp); 249 250 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 251 int maj; 252 /* locate the major number */ 253 maj = cdevsw_lookup_major(&txcom_cdevsw); 254 255 cn_tab->cn_dev = makedev(maj, device_unit(&sc->sc_dev)); 256 257 printf(": console"); 258 } 259 260 printf("\n"); 261 262 /* 263 * Enable interrupt 264 */ 265 #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s)) 266 267 tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY, 268 txcom_rxintr, sc); 269 tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY, 270 txcom_txintr, sc); 271 tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY, 272 txcom_rxintr, sc); 273 tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY, 274 txcom_txintr, sc); 275 tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY, 276 txcom_frameerr_intr, sc); 277 tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY, 278 txcom_parityerr_intr, sc); 279 tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY, 280 txcom_break_intr, sc); 281 282 /* 283 * UARTA has external signal line. (its wiring is platform dependent) 284 */ 285 if (IS_COM0(slot)) { 286 /* install DCD, CTS hooks. */ 287 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_DCD, 288 CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc); 289 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_CTS, 290 CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc); 291 } 292 293 /* 294 * UARTB can connect IR module 295 */ 296 if (IS_COM1(slot)) { 297 struct txcom_attach_args tca; 298 tca.tca_tc = tc; 299 tca.tca_parent = self; 300 config_found(self, &tca, txcom_print); 301 } 302 } 303 304 int 305 txcom_print(void *aux, const char *pnp) 306 { 307 return pnp ? QUIET : UNCONF; 308 } 309 310 void 311 txcom_reset(struct txcom_chip *chip) 312 { 313 tx_chipset_tag_t tc; 314 int slot, ofs; 315 txreg_t reg; 316 317 tc = chip->sc_tc; 318 slot = chip->sc_slot; 319 ofs = TX39_UARTCTRL1_REG(slot); 320 321 /* Supply clock */ 322 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 323 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 324 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 325 326 /* reset UART module */ 327 tx_conf_write(tc, ofs, 0); 328 } 329 330 int 331 txcom_enable(struct txcom_chip *chip, bool console) 332 { 333 tx_chipset_tag_t tc; 334 txreg_t reg; 335 int slot, ofs, timeout; 336 337 tc = chip->sc_tc; 338 slot = chip->sc_slot; 339 ofs = TX39_UARTCTRL1_REG(slot); 340 341 /* 342 * External power supply (if any) 343 * When serial console, Windows CE already powered on it. 344 */ 345 if (!console) { 346 config_hook_call(CONFIG_HOOK_POWERCONTROL, 347 CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON); 348 delay(3); 349 } 350 351 /* Supply clock */ 352 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 353 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 354 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 355 356 /* 357 * XXX Disable DMA (DMA not coded yet) 358 */ 359 reg = tx_conf_read(tc, ofs); 360 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 361 tx_conf_write(tc, ofs, reg); 362 363 /* enable */ 364 reg = tx_conf_read(tc, ofs); 365 reg |= TX39_UARTCTRL1_ENUART; 366 reg &= ~TX39_UARTCTRL1_ENBREAHALT; 367 tx_conf_write(tc, ofs, reg); 368 369 timeout = 100000; 370 371 while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) && 372 --timeout > 0) 373 ; 374 375 if (timeout == 0 && !cold) { 376 printf("%s never power up\n", __txcom_slotname(slot)); 377 return 1; 378 } 379 380 return 0; 381 } 382 383 void 384 txcom_disable(struct txcom_chip *chip) 385 { 386 tx_chipset_tag_t tc; 387 txreg_t reg; 388 int slot; 389 390 tc = chip->sc_tc; 391 slot = chip->sc_slot; 392 393 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 394 /* DMA */ 395 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 396 397 /* disable module */ 398 reg &= ~TX39_UARTCTRL1_ENUART; 399 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 400 401 /* Clock */ 402 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 403 reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 404 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 405 406 } 407 408 inline int 409 __txcom_txbufready(struct txcom_chip *chip, int retry) 410 { 411 tx_chipset_tag_t tc = chip->sc_tc; 412 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 413 414 do { 415 if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY) 416 return 1; 417 } while(--retry != 0); 418 419 return 0; 420 } 421 422 void 423 txcom_pulse_mode(struct device *dev) 424 { 425 struct txcom_softc *sc = (void*)dev; 426 struct txcom_chip *chip = sc->sc_chip; 427 tx_chipset_tag_t tc = chip->sc_tc; 428 int ofs; 429 txreg_t reg; 430 431 ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 432 433 reg = tx_conf_read(tc, ofs); 434 /* WindowsCE use this setting */ 435 reg |= TX39_UARTCTRL1_PULSEOPT1; 436 reg &= ~TX39_UARTCTRL1_PULSEOPT2; 437 reg |= TX39_UARTCTRL1_DTINVERT; 438 439 tx_conf_write(tc, ofs, reg); 440 } 441 442 /* 443 * console 444 */ 445 int 446 txcom_cngetc(dev_t dev) 447 { 448 tx_chipset_tag_t tc; 449 int ofs, c, s; 450 451 s = spltty(); 452 453 tc = txcom_chip.sc_tc; 454 ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot); 455 456 while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs))) 457 ; 458 459 c = TX39_UARTRXHOLD_RXDATA( 460 tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot))); 461 462 if (c == '\r') 463 c = '\n'; 464 465 splx(s); 466 467 return c; 468 } 469 470 void 471 txcom_cnputc(dev_t dev, int c) 472 { 473 struct txcom_chip *chip = &txcom_chip; 474 tx_chipset_tag_t tc = chip->sc_tc; 475 int s; 476 477 s = spltty(); 478 479 /* Wait for transmitter to empty */ 480 __txcom_txbufready(chip, -1); 481 482 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 483 (c & TX39_UARTTXHOLD_TXDATA_MASK)); 484 485 __txcom_txbufready(chip, -1); 486 487 splx(s); 488 } 489 490 void 491 txcom_cnpollc(dev_t dev, int on) 492 { 493 } 494 495 void 496 txcom_setmode(struct txcom_chip *chip) 497 { 498 tcflag_t cflag = chip->sc_cflag; 499 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 500 txreg_t reg; 501 502 reg = tx_conf_read(chip->sc_tc, ofs); 503 reg &= ~TX39_UARTCTRL1_ENUART; 504 tx_conf_write(chip->sc_tc, ofs, reg); 505 506 switch (ISSET(cflag, CSIZE)) { 507 default: 508 printf("txcom_setmode: CS7, CS8 only. use CS7"); 509 /* FALL THROUGH */ 510 case CS7: 511 reg |= TX39_UARTCTRL1_BIT7; 512 break; 513 case CS8: 514 reg &= ~TX39_UARTCTRL1_BIT7; 515 break; 516 } 517 518 if (ISSET(cflag, PARENB)) { 519 reg |= TX39_UARTCTRL1_ENPARITY; 520 if (ISSET(cflag, PARODD)) { 521 reg &= ~TX39_UARTCTRL1_EVENPARITY; 522 } else { 523 reg |= TX39_UARTCTRL1_EVENPARITY; 524 } 525 } else { 526 reg &= ~TX39_UARTCTRL1_ENPARITY; 527 } 528 529 if (ISSET(cflag, CSTOPB)) 530 reg |= TX39_UARTCTRL1_TWOSTOP; 531 else 532 reg &= ~TX39_UARTCTRL1_TWOSTOP; 533 534 reg |= TX39_UARTCTRL1_ENUART; 535 tx_conf_write(chip->sc_tc, ofs, reg); 536 } 537 538 void 539 txcom_setbaudrate(struct txcom_chip *chip) 540 { 541 int baudrate; 542 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 543 txreg_t reg, reg1; 544 545 if (chip->sc_speed == 0) 546 return; 547 548 if (!cold) 549 DPRINTF("%d\n", chip->sc_speed); 550 551 reg1 = tx_conf_read(chip->sc_tc, ofs); 552 reg1 &= ~TX39_UARTCTRL1_ENUART; 553 tx_conf_write(chip->sc_tc, ofs, reg1); 554 555 baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1; 556 reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate); 557 558 tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg); 559 560 reg1 |= TX39_UARTCTRL1_ENUART; 561 tx_conf_write(chip->sc_tc, ofs, reg1); 562 } 563 564 int 565 txcom_cnattach(int slot, int speed, int cflag) 566 { 567 cn_tab = &txcomcons; 568 569 txcom_chip.sc_tc = tx_conf_get_tag(); 570 txcom_chip.sc_slot = slot; 571 txcom_chip.sc_cflag = cflag; 572 txcom_chip.sc_speed = speed; 573 txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE; 574 #if notyet 575 txcom_reset(&txcom_chip); 576 #endif 577 txcom_setmode(&txcom_chip); 578 txcom_setbaudrate(&txcom_chip); 579 580 if (txcom_enable(&txcom_chip, TRUE) != 0) 581 return 1; 582 583 return 0; 584 } 585 586 /* 587 * tty 588 */ 589 void 590 txcom_break(struct txcom_softc *sc, int on) 591 { 592 struct txcom_chip *chip = sc->sc_chip; 593 594 tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 595 on ? TX39_UARTTXHOLD_BREAK : 0); 596 } 597 598 void 599 txcom_modem(struct txcom_softc *sc, int on) 600 { 601 struct txcom_chip *chip = sc->sc_chip; 602 tx_chipset_tag_t tc = chip->sc_tc; 603 int slot = chip->sc_slot; 604 txreg_t reg; 605 606 /* assert DTR */ 607 if (IS_COM0(slot)) { 608 config_hook_call(CONFIG_HOOK_SET, 609 CONFIG_HOOK_COM0_DTR, 610 (void *)on); 611 } 612 613 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 614 reg &= ~TX39_UARTCTRL1_ENUART; 615 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 616 617 if (on) { 618 reg &= ~TX39_UARTCTRL1_DISTXD; 619 } else { 620 reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */ 621 } 622 623 reg |= TX39_UARTCTRL1_ENUART; 624 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 625 } 626 627 void 628 txcom_shutdown(struct txcom_softc *sc) 629 { 630 struct tty *tp = sc->sc_tty; 631 int s = spltty(); 632 633 /* Clear any break condition set with TIOCSBRK. */ 634 txcom_break(sc, 0); 635 636 /* 637 * Hang up if necessary. Wait a bit, so the other side has time to 638 * notice even if we immediately open the port again. 639 */ 640 if (ISSET(tp->t_cflag, HUPCL)) { 641 txcom_modem(sc, 0); 642 (void) tsleep(sc, TTIPRI, ttclos, hz); 643 } 644 645 646 /* Turn off interrupts if not the console. */ 647 if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 648 txcom_disable(sc->sc_chip); 649 } 650 651 splx(s); 652 } 653 654 const char * 655 __txcom_slotname(int slot) 656 { 657 static const char *slotname[] = {"UARTA", "UARTB", "unknown"}; 658 659 if (slot != 0 && slot != 1) 660 return slotname[2]; 661 662 return slotname[slot]; 663 } 664 665 int 666 txcom_frameerr_intr(void *arg) 667 { 668 struct txcom_softc *sc = arg; 669 670 printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 671 672 return 0; 673 } 674 675 int 676 txcom_parityerr_intr(void *arg) 677 { 678 struct txcom_softc *sc = arg; 679 680 printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 681 682 return 0; 683 } 684 685 int 686 txcom_break_intr(void *arg) 687 { 688 struct txcom_softc *sc = arg; 689 690 printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot)); 691 692 return 0; 693 } 694 695 int 696 txcom_rxintr(void *arg) 697 { 698 struct txcom_softc *sc = arg; 699 struct txcom_chip *chip = sc->sc_chip; 700 u_int8_t c; 701 702 c = TX39_UARTRXHOLD_RXDATA( 703 tx_conf_read(chip->sc_tc, 704 TX39_UARTRXHOLD_REG(chip->sc_slot))); 705 706 sc->sc_rbuf[sc->sc_rbput] = c; 707 sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK; 708 709 callout_reset(&sc->sc_rxsoft_ch, 1, txcom_rxsoft, sc); 710 711 return 0; 712 } 713 714 void 715 txcom_rxsoft(void *arg) 716 { 717 struct txcom_softc *sc = arg; 718 struct tty *tp = sc->sc_tty; 719 int (*rint)(int, struct tty *); 720 int code; 721 int s, end, get; 722 723 rint = tp->t_linesw->l_rint; 724 725 s = spltty(); 726 end = sc->sc_rbput; 727 get = sc->sc_rbget; 728 729 while (get != end) { 730 code = sc->sc_rbuf[get]; 731 732 if ((*rint)(code, tp) == -1) { 733 /* 734 * The line discipline's buffer is out of space. 735 */ 736 } 737 get = (get + 1) % TXCOM_RING_MASK; 738 } 739 sc->sc_rbget = get; 740 741 splx(s); 742 } 743 744 int 745 txcom_txintr(void *arg) 746 { 747 struct txcom_softc *sc = arg; 748 struct txcom_chip *chip = sc->sc_chip; 749 tx_chipset_tag_t tc = chip->sc_tc; 750 751 if (sc->sc_tbc > 0) { 752 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 753 (*sc->sc_tba & 754 TX39_UARTTXHOLD_TXDATA_MASK)); 755 sc->sc_tbc--; 756 sc->sc_tba++; 757 } else { 758 callout_reset(&sc->sc_rxsoft_ch, 1, txcom_txsoft, sc); 759 } 760 761 return 0; 762 } 763 764 void 765 txcom_txsoft(void *arg) 766 { 767 struct txcom_softc *sc = arg; 768 struct tty *tp = sc->sc_tty; 769 int s = spltty(); 770 771 CLR(tp->t_state, TS_BUSY); 772 if (ISSET(tp->t_state, TS_FLUSH)) { 773 CLR(tp->t_state, TS_FLUSH); 774 } else { 775 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 776 } 777 778 (*tp->t_linesw->l_start)(tp); 779 780 splx(s); 781 } 782 783 int 784 txcomopen(dev_t dev, int flag, int mode, struct lwp *l) 785 { 786 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 787 struct txcom_chip *chip; 788 struct tty *tp; 789 int s, err = ENXIO; 790 791 if (!sc) 792 return err; 793 794 chip = sc->sc_chip; 795 tp = sc->sc_tty; 796 797 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 798 return (EBUSY); 799 800 s = spltty(); 801 802 if (txcom_enable(sc->sc_chip, FALSE)) { 803 splx(s); 804 goto out; 805 } 806 /* 807 * Do the following iff this is a first open. 808 */ 809 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 810 struct termios t; 811 812 tp->t_dev = dev; 813 814 t.c_ispeed = 0; 815 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 816 t.c_ospeed = chip->sc_speed; 817 t.c_cflag = chip->sc_cflag; 818 } else { 819 t.c_ospeed = TTYDEF_SPEED; 820 t.c_cflag = TTYDEF_CFLAG; 821 } 822 823 if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL)) 824 SET(t.c_cflag, CLOCAL); 825 if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS)) 826 SET(t.c_cflag, CRTSCTS); 827 if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF)) 828 SET(t.c_cflag, MDMBUF); 829 830 /* Make sure txcomparam() will do something. */ 831 tp->t_ospeed = 0; 832 txcomparam(tp, &t); 833 834 tp->t_iflag = TTYDEF_IFLAG; 835 tp->t_oflag = TTYDEF_OFLAG; 836 tp->t_lflag = TTYDEF_LFLAG; 837 838 ttychars(tp); 839 ttsetwater(tp); 840 841 /* 842 * Turn on DTR. We must always do this, even if carrier is not 843 * present, because otherwise we'd have to use TIOCSDTR 844 * immediately after setting CLOCAL, which applications do not 845 * expect. We always assert DTR while the device is open 846 * unless explicitly requested to deassert it. 847 */ 848 txcom_modem(sc, 1); 849 850 /* Clear the input ring, and unblock. */ 851 sc->sc_rbget = sc->sc_rbput = 0; 852 } 853 854 splx(s); 855 #define TXCOMDIALOUT(x) (minor(x) & 0x80000) 856 if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) { 857 DPRINTF("ttyopen failed\n"); 858 goto out; 859 } 860 if ((err = (*tp->t_linesw->l_open)(dev, tp))) { 861 DPRINTF("line dicipline open failed\n"); 862 goto out; 863 } 864 865 return err; 866 867 out: 868 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 869 /* 870 * We failed to open the device, and nobody else had it opened. 871 * Clean up the state as appropriate. 872 */ 873 txcom_shutdown(sc); 874 } 875 876 return err; 877 878 } 879 880 int 881 txcomclose(dev_t dev, int flag, int mode, struct lwp *l) 882 { 883 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 884 struct tty *tp = sc->sc_tty; 885 886 /* XXX This is for cons.c. */ 887 if (!ISSET(tp->t_state, TS_ISOPEN)) 888 return 0; 889 890 (*tp->t_linesw->l_close)(tp, flag); 891 ttyclose(tp); 892 893 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 894 /* 895 * Although we got a last close, the device may still be in 896 * use; e.g. if this was the dialout node, and there are still 897 * processes waiting for carrier on the non-dialout node. 898 */ 899 txcom_shutdown(sc); 900 } 901 902 return 0; 903 } 904 905 int 906 txcomread(dev_t dev, struct uio *uio, int flag) 907 { 908 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 909 struct tty *tp = sc->sc_tty; 910 911 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 912 } 913 914 int 915 txcomwrite(dev_t dev, struct uio *uio, int flag) 916 { 917 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 918 struct tty *tp = sc->sc_tty; 919 920 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 921 } 922 923 int 924 txcompoll(dev_t dev, int events, struct lwp *l) 925 { 926 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 927 struct tty *tp = sc->sc_tty; 928 929 return ((*tp->t_linesw->l_poll)(tp, events, l)); 930 } 931 932 struct tty * 933 txcomtty(dev_t dev) 934 { 935 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 936 937 return sc->sc_tty; 938 } 939 940 int 941 txcomioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct lwp *l) 942 { 943 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 944 struct tty *tp = sc->sc_tty; 945 int s, err; 946 947 err = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 948 if (err != EPASSTHROUGH) { 949 return err; 950 } 951 952 err = ttioctl(tp, cmd, data, flag, l); 953 if (err != EPASSTHROUGH) { 954 return err; 955 } 956 957 err = 0; 958 959 s = spltty(); 960 961 switch (cmd) { 962 default: 963 err = EPASSTHROUGH; 964 break; 965 966 case TIOCSBRK: 967 txcom_break(sc, 1); 968 break; 969 970 case TIOCCBRK: 971 txcom_break(sc, 0); 972 break; 973 974 case TIOCSDTR: 975 txcom_modem(sc, 1); 976 break; 977 978 case TIOCCDTR: 979 txcom_modem(sc, 0); 980 break; 981 982 case TIOCGFLAGS: 983 *(int *)data = sc->sc_chip->sc_swflags; 984 break; 985 986 case TIOCSFLAGS: 987 err = kauth_authorize_device_tty(l->l_cred, 988 KAUTH_DEVICE_TTY_PRIVSET, tp); 989 if (err) { 990 break; 991 } 992 sc->sc_chip->sc_swflags = *(int *)data; 993 break; 994 995 } 996 997 splx(s); 998 999 return err; 1000 } 1001 1002 void 1003 txcomstop(struct tty *tp, int flag) 1004 { 1005 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 1006 int s; 1007 1008 s = spltty(); 1009 1010 if (ISSET(tp->t_state, TS_BUSY)) { 1011 /* Stop transmitting at the next chunk. */ 1012 sc->sc_tbc = 0; 1013 sc->sc_heldtbc = 0; 1014 if (!ISSET(tp->t_state, TS_TTSTOP)) 1015 SET(tp->t_state, TS_FLUSH); 1016 } 1017 1018 splx(s); 1019 } 1020 1021 void 1022 txcomstart(struct tty *tp) 1023 { 1024 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 1025 struct txcom_chip *chip = sc->sc_chip; 1026 tx_chipset_tag_t tc = chip->sc_tc; 1027 int slot = chip->sc_slot; 1028 int s; 1029 1030 s = spltty(); 1031 1032 if (!__txcom_txbufready(chip, 0) || 1033 ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1034 goto out; 1035 1036 if (tp->t_outq.c_cc <= tp->t_lowat) { 1037 if (ISSET(tp->t_state, TS_ASLEEP)) { 1038 CLR(tp->t_state, TS_ASLEEP); 1039 wakeup(&tp->t_outq); 1040 } 1041 selwakeup(&tp->t_wsel); 1042 if (tp->t_outq.c_cc == 0) 1043 goto out; 1044 } 1045 1046 sc->sc_tba = tp->t_outq.c_cf; 1047 sc->sc_tbc = ndqb(&tp->t_outq, 0); 1048 SET(tp->t_state, TS_BUSY); 1049 1050 /* Output the first character of the contiguous buffer. */ 1051 tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot), 1052 (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK)); 1053 1054 sc->sc_tbc--; 1055 sc->sc_tba++; 1056 1057 out: 1058 splx(s); 1059 } 1060 1061 /* 1062 * Set TXcom tty parameters from termios. 1063 */ 1064 int 1065 txcomparam(struct tty *tp, struct termios *t) 1066 { 1067 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 1068 struct txcom_chip *chip; 1069 int ospeed; 1070 int s; 1071 1072 if (!sc) 1073 return ENXIO; 1074 1075 ospeed = t->c_ospeed; 1076 1077 /* Check requested parameters. */ 1078 if (ospeed < 0) { 1079 return EINVAL; 1080 } 1081 if (t->c_ispeed && t->c_ispeed != ospeed) { 1082 return EINVAL; 1083 } 1084 1085 s = spltty(); 1086 chip = sc->sc_chip; 1087 /* 1088 * For the console, always force CLOCAL and !HUPCL, so that the port 1089 * is always active. 1090 */ 1091 if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) || 1092 ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 1093 SET(t->c_cflag, CLOCAL); 1094 CLR(t->c_cflag, HUPCL); 1095 } 1096 splx(s); 1097 1098 /* 1099 * If we're not in a mode that assumes a connection is present, then 1100 * ignore carrier changes. 1101 */ 1102 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1103 chip->sc_dcd = 0; 1104 else 1105 chip->sc_dcd = 1; 1106 1107 /* 1108 * Only whack the UART when params change. 1109 * Some callers need to clear tp->t_ospeed 1110 * to make sure initialization gets done. 1111 */ 1112 if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) { 1113 return 0; 1114 } 1115 1116 s = spltty(); 1117 chip = sc->sc_chip; 1118 chip->sc_speed = ospeed; 1119 chip->sc_cflag = t->c_cflag; 1120 1121 txcom_setmode(chip); 1122 txcom_setbaudrate(chip); 1123 1124 /* And copy to tty. */ 1125 tp->t_ispeed = 0; 1126 tp->t_ospeed = chip->sc_speed; 1127 tp->t_cflag = chip->sc_cflag; 1128 1129 /* 1130 * Update the tty layer's idea of the carrier bit, in case we changed 1131 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1132 * explicit request. 1133 */ 1134 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd); 1135 1136 /* 1137 * If hardware flow control is disabled, unblock any hard flow 1138 * control state. 1139 */ 1140 if (!ISSET(chip->sc_cflag, CHWFLOW)) { 1141 txcomstart(tp); 1142 } 1143 1144 splx(s); 1145 1146 return 0; 1147 } 1148 1149 int 1150 txcom_dcd_hook(void *arg, int type, long id, void *msg) 1151 { 1152 struct txcom_softc *sc = arg; 1153 struct tty *tp = sc->sc_tty; 1154 struct txcom_chip *chip = sc->sc_chip; 1155 int modem = !(int)msg; /* p-edge 1, n-edge 0 */ 1156 1157 DPRINTF("DCD %s\n", modem ? "ON" : "OFF"); 1158 1159 if (modem && chip->sc_dcd) 1160 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd); 1161 1162 return 0; 1163 } 1164 1165 int 1166 txcom_cts_hook(void *arg, int type, long id, void *msg) 1167 { 1168 struct txcom_softc *sc = arg; 1169 struct tty *tp = sc->sc_tty; 1170 struct txcom_chip *chip = sc->sc_chip; 1171 int clear = !(int)msg; /* p-edge 1, n-edge 0 */ 1172 1173 DPRINTF("CTS %s\n", clear ? "ON" : "OFF"); 1174 1175 if (chip->sc_msr_cts) { 1176 if (!clear) { 1177 chip->sc_tx_stopped = 1; 1178 } else { 1179 chip->sc_tx_stopped = 0; 1180 (*tp->t_linesw->l_start)(tp); 1181 } 1182 } 1183 1184 return 0; 1185 } 1186 1187 #ifdef TX39UARTDEBUG 1188 void 1189 txcom_dump(struct txcom_chip *chip) 1190 { 1191 tx_chipset_tag_t tc = chip->sc_tc; 1192 int slot = chip->sc_slot; 1193 txreg_t reg; 1194 1195 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 1196 #define ISSETPRINT(r, m) \ 1197 dbg_bitmask_print(r, TX39_UARTCTRL1_##m, #m) 1198 ISSETPRINT(reg, UARTON); 1199 ISSETPRINT(reg, EMPTY); 1200 ISSETPRINT(reg, PRXHOLDFULL); 1201 ISSETPRINT(reg, RXHOLDFULL); 1202 ISSETPRINT(reg, ENDMARX); 1203 ISSETPRINT(reg, ENDMATX); 1204 ISSETPRINT(reg, TESTMODE); 1205 ISSETPRINT(reg, ENBREAHALT); 1206 ISSETPRINT(reg, ENDMATEST); 1207 ISSETPRINT(reg, ENDMALOOP); 1208 ISSETPRINT(reg, PULSEOPT2); 1209 ISSETPRINT(reg, PULSEOPT1); 1210 ISSETPRINT(reg, DTINVERT); 1211 ISSETPRINT(reg, DISTXD); 1212 ISSETPRINT(reg, TWOSTOP); 1213 ISSETPRINT(reg, LOOPBACK); 1214 ISSETPRINT(reg, BIT7); 1215 ISSETPRINT(reg, EVENPARITY); 1216 ISSETPRINT(reg, ENPARITY); 1217 ISSETPRINT(reg, ENUART); 1218 } 1219 #endif /* TX39UARTDEBUG */ 1220
Indexes created Thu Oct 30 22:09:55 GMT 2025