txcom.c revision 1.40
1 /* $NetBSD: txcom.c,v 1.40 2008/06/12 16:50:53 tsutsui Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: txcom.c,v 1.40 2008/06/12 16:50:53 tsutsui Exp $"); 34 35 #include "opt_tx39uart_debug.h" 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/device.h> 41 #include <sys/malloc.h> 42 #include <sys/kauth.h> 43 44 #include <sys/proc.h> /* tsleep/wakeup */ 45 46 #include <sys/ioctl.h> 47 #include <sys/select.h> 48 #include <sys/file.h> 49 50 #include <sys/tty.h> 51 #include <sys/conf.h> 52 #include <dev/cons.h> /* consdev */ 53 54 #include <machine/bus.h> 55 #include <machine/config_hook.h> 56 57 #include <hpcmips/tx/tx39var.h> 58 #include <hpcmips/tx/tx39icureg.h> 59 #include <hpcmips/tx/tx39uartvar.h> 60 #include <hpcmips/tx/tx39uartreg.h> 61 62 #include <hpcmips/tx/tx39irvar.h> 63 64 #include <hpcmips/tx/tx39clockreg.h> /* XXX */ 65 66 /* 67 * UARTA channel has DTR, DSR, RTS, CTS lines. and they wired to MFIO/IO port. 68 */ 69 #define IS_COM0(s) ((s) == 0) 70 #define IS_COM1(s) ((s) == 1) 71 #define ON ((void *)1) 72 #define OFF ((void *)0) 73 74 #ifdef TX39UART_DEBUG 75 #define DPRINTF_ENABLE 76 #define DPRINTF_DEBUG tx39uart_debug 77 #endif 78 #include <machine/debug.h> 79 80 #define TXCOM_HW_CONSOLE 0x40 81 #define TXCOM_RING_SIZE 256 /* must be a power of two! */ 82 #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1) 83 84 struct txcom_chip { 85 tx_chipset_tag_t sc_tc; 86 int sc_slot; /* UARTA or UARTB */ 87 int sc_cflag; 88 int sc_speed; 89 int sc_swflags; 90 int sc_hwflags; 91 92 int sc_dcd; 93 int sc_msr_cts; 94 int sc_tx_stopped; 95 }; 96 97 struct txcom_softc { 98 struct device sc_dev; 99 struct tty *sc_tty; 100 struct txcom_chip *sc_chip; 101 102 struct callout sc_txsoft_ch; 103 struct callout sc_rxsoft_ch; 104 105 u_int8_t *sc_tba; /* transmit buffer address */ 106 int sc_tbc; /* transmit byte count */ 107 int sc_heldtbc; 108 u_int8_t *sc_rbuf; /* receive buffer address */ 109 int sc_rbput; /* receive byte count */ 110 int sc_rbget; 111 }; 112 113 extern struct cfdriver txcom_cd; 114 115 int txcom_match(struct device *, struct cfdata *, void *); 116 void txcom_attach(struct device *, struct device *, void *); 117 int txcom_print(void*, const char *); 118 119 int txcom_txintr(void *); 120 int txcom_rxintr(void *); 121 int txcom_frameerr_intr(void *); 122 int txcom_parityerr_intr(void *); 123 int txcom_break_intr(void *); 124 125 void txcom_rxsoft(void *); 126 void txcom_txsoft(void *); 127 128 int txcom_stsoft(void *); 129 int txcom_stsoft2(void *); 130 int txcom_stsoft3(void *); 131 int txcom_stsoft4(void *); 132 133 134 void txcom_shutdown(struct txcom_softc *); 135 void txcom_break(struct txcom_softc *, int); 136 void txcom_modem(struct txcom_softc *, int); 137 void txcomstart(struct tty *); 138 int txcomparam(struct tty *, struct termios *); 139 140 void txcom_reset (struct txcom_chip *); 141 int txcom_enable (struct txcom_chip *, bool); 142 void txcom_disable (struct txcom_chip *); 143 void txcom_setmode (struct txcom_chip *); 144 void txcom_setbaudrate(struct txcom_chip *); 145 int txcom_cngetc (dev_t); 146 void txcom_cnputc (dev_t, int); 147 void txcom_cnpollc (dev_t, int); 148 149 int txcom_dcd_hook(void *, int, long, void *); 150 int txcom_cts_hook(void *, int, long, void *); 151 152 153 inline int __txcom_txbufready(struct txcom_chip *, int); 154 const char *__txcom_slotname(int); 155 156 #ifdef TX39UARTDEBUG 157 void txcom_dump(struct txcom_chip *); 158 #endif 159 160 struct consdev txcomcons = { 161 NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc, NULL, NULL, 162 NULL, NODEV, CN_NORMAL 163 }; 164 165 /* Serial console */ 166 struct txcom_chip txcom_chip; 167 168 CFATTACH_DECL(txcom, sizeof(struct txcom_softc), 169 txcom_match, txcom_attach, NULL, NULL); 170 171 dev_type_open(txcomopen); 172 dev_type_close(txcomclose); 173 dev_type_read(txcomread); 174 dev_type_write(txcomwrite); 175 dev_type_ioctl(txcomioctl); 176 dev_type_stop(txcomstop); 177 dev_type_tty(txcomtty); 178 dev_type_poll(txcompoll); 179 180 const struct cdevsw txcom_cdevsw = { 181 txcomopen, txcomclose, txcomread, txcomwrite, txcomioctl, 182 txcomstop, txcomtty, txcompoll, nommap, ttykqfilter, D_TTY 183 }; 184 185 int 186 txcom_match(parent, cf, aux) 187 struct device *parent; 188 struct cfdata *cf; 189 void *aux; 190 { 191 /* if the autoconfiguration got this far, there's a slot here */ 192 return 1; 193 } 194 195 void 196 txcom_attach(struct device *parent, struct device *self, void *aux) 197 { 198 struct tx39uart_attach_args *ua = aux; 199 struct txcom_softc *sc = (void*)self; 200 tx_chipset_tag_t tc; 201 struct tty *tp; 202 struct txcom_chip *chip; 203 int slot, console; 204 205 /* Check this slot used as serial console */ 206 console = (ua->ua_slot == txcom_chip.sc_slot) && 207 (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE); 208 209 if (console) { 210 sc->sc_chip = &txcom_chip; 211 } else { 212 if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip), 213 M_DEVBUF, M_WAITOK))) { 214 printf(": can't allocate chip\n"); 215 return; 216 } 217 memset(sc->sc_chip, 0, sizeof(struct txcom_chip)); 218 } 219 220 chip = sc->sc_chip; 221 tc = chip->sc_tc = ua->ua_tc; 222 slot = chip->sc_slot = ua->ua_slot; 223 224 #ifdef TX39UARTDEBUG 225 txcom_dump(chip); 226 #endif 227 if (!console) 228 txcom_reset(chip); 229 230 if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) { 231 printf(": can't allocate buffer.\n"); 232 return; 233 } 234 memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE); 235 236 tp = ttymalloc(); 237 tp->t_oproc = txcomstart; 238 tp->t_param = txcomparam; 239 tp->t_hwiflow = NULL; 240 sc->sc_tty = tp; 241 tty_attach(tp); 242 243 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 244 int maj; 245 /* locate the major number */ 246 maj = cdevsw_lookup_major(&txcom_cdevsw); 247 248 cn_tab->cn_dev = makedev(maj, device_unit(&sc->sc_dev)); 249 250 printf(": console"); 251 } 252 253 printf("\n"); 254 255 /* 256 * Enable interrupt 257 */ 258 #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s)) 259 260 tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY, 261 txcom_rxintr, sc); 262 tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY, 263 txcom_txintr, sc); 264 tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY, 265 txcom_rxintr, sc); 266 tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY, 267 txcom_txintr, sc); 268 tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY, 269 txcom_frameerr_intr, sc); 270 tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY, 271 txcom_parityerr_intr, sc); 272 tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY, 273 txcom_break_intr, sc); 274 275 /* 276 * UARTA has external signal line. (its wiring is platform dependent) 277 */ 278 if (IS_COM0(slot)) { 279 /* install DCD, CTS hooks. */ 280 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_DCD, 281 CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc); 282 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_CTS, 283 CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc); 284 } 285 286 /* 287 * UARTB can connect IR module 288 */ 289 if (IS_COM1(slot)) { 290 struct txcom_attach_args tca; 291 tca.tca_tc = tc; 292 tca.tca_parent = self; 293 config_found(self, &tca, txcom_print); 294 } 295 } 296 297 int 298 txcom_print(void *aux, const char *pnp) 299 { 300 return pnp ? QUIET : UNCONF; 301 } 302 303 void 304 txcom_reset(struct txcom_chip *chip) 305 { 306 tx_chipset_tag_t tc; 307 int slot, ofs; 308 txreg_t reg; 309 310 tc = chip->sc_tc; 311 slot = chip->sc_slot; 312 ofs = TX39_UARTCTRL1_REG(slot); 313 314 /* Supply clock */ 315 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 316 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 317 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 318 319 /* reset UART module */ 320 tx_conf_write(tc, ofs, 0); 321 } 322 323 int 324 txcom_enable(struct txcom_chip *chip, bool console) 325 { 326 tx_chipset_tag_t tc; 327 txreg_t reg; 328 int slot, ofs, timeout; 329 330 tc = chip->sc_tc; 331 slot = chip->sc_slot; 332 ofs = TX39_UARTCTRL1_REG(slot); 333 334 /* 335 * External power supply (if any) 336 * When serial console, Windows CE already powered on it. 337 */ 338 if (!console) { 339 config_hook_call(CONFIG_HOOK_POWERCONTROL, 340 CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON); 341 delay(3); 342 } 343 344 /* Supply clock */ 345 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 346 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 347 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 348 349 /* 350 * XXX Disable DMA (DMA not coded yet) 351 */ 352 reg = tx_conf_read(tc, ofs); 353 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 354 tx_conf_write(tc, ofs, reg); 355 356 /* enable */ 357 reg = tx_conf_read(tc, ofs); 358 reg |= TX39_UARTCTRL1_ENUART; 359 reg &= ~TX39_UARTCTRL1_ENBREAHALT; 360 tx_conf_write(tc, ofs, reg); 361 362 timeout = 100000; 363 364 while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) && 365 --timeout > 0) 366 ; 367 368 if (timeout == 0 && !cold) { 369 printf("%s never power up\n", __txcom_slotname(slot)); 370 return 1; 371 } 372 373 return 0; 374 } 375 376 void 377 txcom_disable(struct txcom_chip *chip) 378 { 379 tx_chipset_tag_t tc; 380 txreg_t reg; 381 int slot; 382 383 tc = chip->sc_tc; 384 slot = chip->sc_slot; 385 386 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 387 /* DMA */ 388 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 389 390 /* disable module */ 391 reg &= ~TX39_UARTCTRL1_ENUART; 392 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 393 394 /* Clock */ 395 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 396 reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 397 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 398 399 } 400 401 inline int 402 __txcom_txbufready(struct txcom_chip *chip, int retry) 403 { 404 tx_chipset_tag_t tc = chip->sc_tc; 405 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 406 407 do { 408 if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY) 409 return 1; 410 } while(--retry != 0); 411 412 return 0; 413 } 414 415 void 416 txcom_pulse_mode(struct device *dev) 417 { 418 struct txcom_softc *sc = (void*)dev; 419 struct txcom_chip *chip = sc->sc_chip; 420 tx_chipset_tag_t tc = chip->sc_tc; 421 int ofs; 422 txreg_t reg; 423 424 ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 425 426 reg = tx_conf_read(tc, ofs); 427 /* WindowsCE use this setting */ 428 reg |= TX39_UARTCTRL1_PULSEOPT1; 429 reg &= ~TX39_UARTCTRL1_PULSEOPT2; 430 reg |= TX39_UARTCTRL1_DTINVERT; 431 432 tx_conf_write(tc, ofs, reg); 433 } 434 435 /* 436 * console 437 */ 438 int 439 txcom_cngetc(dev_t dev) 440 { 441 tx_chipset_tag_t tc; 442 int ofs, c, s; 443 444 s = spltty(); 445 446 tc = txcom_chip.sc_tc; 447 ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot); 448 449 while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs))) 450 ; 451 452 c = TX39_UARTRXHOLD_RXDATA( 453 tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot))); 454 455 if (c == '\r') 456 c = '\n'; 457 458 splx(s); 459 460 return c; 461 } 462 463 void 464 txcom_cnputc(dev_t dev, int c) 465 { 466 struct txcom_chip *chip = &txcom_chip; 467 tx_chipset_tag_t tc = chip->sc_tc; 468 int s; 469 470 s = spltty(); 471 472 /* Wait for transmitter to empty */ 473 __txcom_txbufready(chip, -1); 474 475 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 476 (c & TX39_UARTTXHOLD_TXDATA_MASK)); 477 478 __txcom_txbufready(chip, -1); 479 480 splx(s); 481 } 482 483 void 484 txcom_cnpollc(dev_t dev, int on) 485 { 486 } 487 488 void 489 txcom_setmode(struct txcom_chip *chip) 490 { 491 tcflag_t cflag = chip->sc_cflag; 492 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 493 txreg_t reg; 494 495 reg = tx_conf_read(chip->sc_tc, ofs); 496 reg &= ~TX39_UARTCTRL1_ENUART; 497 tx_conf_write(chip->sc_tc, ofs, reg); 498 499 switch (ISSET(cflag, CSIZE)) { 500 default: 501 printf("txcom_setmode: CS7, CS8 only. use CS7"); 502 /* FALL THROUGH */ 503 case CS7: 504 reg |= TX39_UARTCTRL1_BIT7; 505 break; 506 case CS8: 507 reg &= ~TX39_UARTCTRL1_BIT7; 508 break; 509 } 510 511 if (ISSET(cflag, PARENB)) { 512 reg |= TX39_UARTCTRL1_ENPARITY; 513 if (ISSET(cflag, PARODD)) { 514 reg &= ~TX39_UARTCTRL1_EVENPARITY; 515 } else { 516 reg |= TX39_UARTCTRL1_EVENPARITY; 517 } 518 } else { 519 reg &= ~TX39_UARTCTRL1_ENPARITY; 520 } 521 522 if (ISSET(cflag, CSTOPB)) 523 reg |= TX39_UARTCTRL1_TWOSTOP; 524 else 525 reg &= ~TX39_UARTCTRL1_TWOSTOP; 526 527 reg |= TX39_UARTCTRL1_ENUART; 528 tx_conf_write(chip->sc_tc, ofs, reg); 529 } 530 531 void 532 txcom_setbaudrate(struct txcom_chip *chip) 533 { 534 int baudrate; 535 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 536 txreg_t reg, reg1; 537 538 if (chip->sc_speed == 0) 539 return; 540 541 if (!cold) 542 DPRINTF("%d\n", chip->sc_speed); 543 544 reg1 = tx_conf_read(chip->sc_tc, ofs); 545 reg1 &= ~TX39_UARTCTRL1_ENUART; 546 tx_conf_write(chip->sc_tc, ofs, reg1); 547 548 baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1; 549 reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate); 550 551 tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg); 552 553 reg1 |= TX39_UARTCTRL1_ENUART; 554 tx_conf_write(chip->sc_tc, ofs, reg1); 555 } 556 557 int 558 txcom_cnattach(int slot, int speed, int cflag) 559 { 560 cn_tab = &txcomcons; 561 562 txcom_chip.sc_tc = tx_conf_get_tag(); 563 txcom_chip.sc_slot = slot; 564 txcom_chip.sc_cflag = cflag; 565 txcom_chip.sc_speed = speed; 566 txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE; 567 #if notyet 568 txcom_reset(&txcom_chip); 569 #endif 570 txcom_setmode(&txcom_chip); 571 txcom_setbaudrate(&txcom_chip); 572 573 if (txcom_enable(&txcom_chip, true) != 0) 574 return 1; 575 576 return 0; 577 } 578 579 /* 580 * tty 581 */ 582 void 583 txcom_break(struct txcom_softc *sc, int on) 584 { 585 struct txcom_chip *chip = sc->sc_chip; 586 587 tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 588 on ? TX39_UARTTXHOLD_BREAK : 0); 589 } 590 591 void 592 txcom_modem(struct txcom_softc *sc, int on) 593 { 594 struct txcom_chip *chip = sc->sc_chip; 595 tx_chipset_tag_t tc = chip->sc_tc; 596 int slot = chip->sc_slot; 597 txreg_t reg; 598 599 /* assert DTR */ 600 if (IS_COM0(slot)) { 601 config_hook_call(CONFIG_HOOK_SET, 602 CONFIG_HOOK_COM0_DTR, 603 (void *)on); 604 } 605 606 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 607 reg &= ~TX39_UARTCTRL1_ENUART; 608 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 609 610 if (on) { 611 reg &= ~TX39_UARTCTRL1_DISTXD; 612 } else { 613 reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */ 614 } 615 616 reg |= TX39_UARTCTRL1_ENUART; 617 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 618 } 619 620 void 621 txcom_shutdown(struct txcom_softc *sc) 622 { 623 struct tty *tp = sc->sc_tty; 624 int s = spltty(); 625 626 /* Clear any break condition set with TIOCSBRK. */ 627 txcom_break(sc, 0); 628 629 /* 630 * Hang up if necessary. Wait a bit, so the other side has time to 631 * notice even if we immediately open the port again. 632 */ 633 if (ISSET(tp->t_cflag, HUPCL)) { 634 txcom_modem(sc, 0); 635 (void) tsleep(sc, TTIPRI, ttclos, hz); 636 } 637 638 639 /* Turn off interrupts if not the console. */ 640 if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 641 txcom_disable(sc->sc_chip); 642 } 643 644 splx(s); 645 } 646 647 const char * 648 __txcom_slotname(int slot) 649 { 650 static const char *slotname[] = {"UARTA", "UARTB", "unknown"}; 651 652 if (slot != 0 && slot != 1) 653 return slotname[2]; 654 655 return slotname[slot]; 656 } 657 658 int 659 txcom_frameerr_intr(void *arg) 660 { 661 struct txcom_softc *sc = arg; 662 663 printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 664 665 return 0; 666 } 667 668 int 669 txcom_parityerr_intr(void *arg) 670 { 671 struct txcom_softc *sc = arg; 672 673 printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 674 675 return 0; 676 } 677 678 int 679 txcom_break_intr(void *arg) 680 { 681 struct txcom_softc *sc = arg; 682 683 printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot)); 684 685 return 0; 686 } 687 688 int 689 txcom_rxintr(void *arg) 690 { 691 struct txcom_softc *sc = arg; 692 struct txcom_chip *chip = sc->sc_chip; 693 u_int8_t c; 694 695 c = TX39_UARTRXHOLD_RXDATA( 696 tx_conf_read(chip->sc_tc, 697 TX39_UARTRXHOLD_REG(chip->sc_slot))); 698 699 sc->sc_rbuf[sc->sc_rbput] = c; 700 sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK; 701 702 callout_reset(&sc->sc_rxsoft_ch, 1, txcom_rxsoft, sc); 703 704 return 0; 705 } 706 707 void 708 txcom_rxsoft(void *arg) 709 { 710 struct txcom_softc *sc = arg; 711 struct tty *tp = sc->sc_tty; 712 int (*rint)(int, struct tty *); 713 int code; 714 int s, end, get; 715 716 rint = tp->t_linesw->l_rint; 717 718 s = spltty(); 719 end = sc->sc_rbput; 720 get = sc->sc_rbget; 721 722 while (get != end) { 723 code = sc->sc_rbuf[get]; 724 725 if ((*rint)(code, tp) == -1) { 726 /* 727 * The line discipline's buffer is out of space. 728 */ 729 } 730 get = (get + 1) % TXCOM_RING_MASK; 731 } 732 sc->sc_rbget = get; 733 734 splx(s); 735 } 736 737 int 738 txcom_txintr(void *arg) 739 { 740 struct txcom_softc *sc = arg; 741 struct txcom_chip *chip = sc->sc_chip; 742 tx_chipset_tag_t tc = chip->sc_tc; 743 744 if (sc->sc_tbc > 0) { 745 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 746 (*sc->sc_tba & 747 TX39_UARTTXHOLD_TXDATA_MASK)); 748 sc->sc_tbc--; 749 sc->sc_tba++; 750 } else { 751 callout_reset(&sc->sc_rxsoft_ch, 1, txcom_txsoft, sc); 752 } 753 754 return 0; 755 } 756 757 void 758 txcom_txsoft(void *arg) 759 { 760 struct txcom_softc *sc = arg; 761 struct tty *tp = sc->sc_tty; 762 int s = spltty(); 763 764 CLR(tp->t_state, TS_BUSY); 765 if (ISSET(tp->t_state, TS_FLUSH)) { 766 CLR(tp->t_state, TS_FLUSH); 767 } else { 768 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 769 } 770 771 (*tp->t_linesw->l_start)(tp); 772 773 splx(s); 774 } 775 776 int 777 txcomopen(dev_t dev, int flag, int mode, struct lwp *l) 778 { 779 struct txcom_softc *sc; 780 struct txcom_chip *chip; 781 struct tty *tp; 782 int s, err = ENXIO; 783 784 sc = device_lookup_private(&txcom_cd, minor(dev)); 785 if (sc == NULL) 786 return err; 787 788 chip = sc->sc_chip; 789 tp = sc->sc_tty; 790 791 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 792 return (EBUSY); 793 794 s = spltty(); 795 796 if (txcom_enable(sc->sc_chip, false)) { 797 splx(s); 798 goto out; 799 } 800 /* 801 * Do the following iff this is a first open. 802 */ 803 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 804 struct termios t; 805 806 tp->t_dev = dev; 807 808 t.c_ispeed = 0; 809 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 810 t.c_ospeed = chip->sc_speed; 811 t.c_cflag = chip->sc_cflag; 812 } else { 813 t.c_ospeed = TTYDEF_SPEED; 814 t.c_cflag = TTYDEF_CFLAG; 815 } 816 817 if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL)) 818 SET(t.c_cflag, CLOCAL); 819 if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS)) 820 SET(t.c_cflag, CRTSCTS); 821 if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF)) 822 SET(t.c_cflag, MDMBUF); 823 824 /* Make sure txcomparam() will do something. */ 825 tp->t_ospeed = 0; 826 txcomparam(tp, &t); 827 828 tp->t_iflag = TTYDEF_IFLAG; 829 tp->t_oflag = TTYDEF_OFLAG; 830 tp->t_lflag = TTYDEF_LFLAG; 831 832 ttychars(tp); 833 ttsetwater(tp); 834 835 /* 836 * Turn on DTR. We must always do this, even if carrier is not 837 * present, because otherwise we'd have to use TIOCSDTR 838 * immediately after setting CLOCAL, which applications do not 839 * expect. We always assert DTR while the device is open 840 * unless explicitly requested to deassert it. 841 */ 842 txcom_modem(sc, 1); 843 844 /* Clear the input ring, and unblock. */ 845 sc->sc_rbget = sc->sc_rbput = 0; 846 } 847 848 splx(s); 849 #define TXCOMDIALOUT(x) (minor(x) & 0x80000) 850 if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) { 851 DPRINTF("ttyopen failed\n"); 852 goto out; 853 } 854 if ((err = (*tp->t_linesw->l_open)(dev, tp))) { 855 DPRINTF("line dicipline open failed\n"); 856 goto out; 857 } 858 859 return err; 860 861 out: 862 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 863 /* 864 * We failed to open the device, and nobody else had it opened. 865 * Clean up the state as appropriate. 866 */ 867 txcom_shutdown(sc); 868 } 869 870 return err; 871 872 } 873 874 int 875 txcomclose(dev_t dev, int flag, int mode, struct lwp *l) 876 { 877 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev)); 878 struct tty *tp = sc->sc_tty; 879 880 /* XXX This is for cons.c. */ 881 if (!ISSET(tp->t_state, TS_ISOPEN)) 882 return 0; 883 884 (*tp->t_linesw->l_close)(tp, flag); 885 ttyclose(tp); 886 887 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 888 /* 889 * Although we got a last close, the device may still be in 890 * use; e.g. if this was the dialout node, and there are still 891 * processes waiting for carrier on the non-dialout node. 892 */ 893 txcom_shutdown(sc); 894 } 895 896 return 0; 897 } 898 899 int 900 txcomread(dev_t dev, struct uio *uio, int flag) 901 { 902 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev)); 903 struct tty *tp = sc->sc_tty; 904 905 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 906 } 907 908 int 909 txcomwrite(dev_t dev, struct uio *uio, int flag) 910 { 911 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev)); 912 struct tty *tp = sc->sc_tty; 913 914 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 915 } 916 917 int 918 txcompoll(dev_t dev, int events, struct lwp *l) 919 { 920 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev)); 921 struct tty *tp = sc->sc_tty; 922 923 return ((*tp->t_linesw->l_poll)(tp, events, l)); 924 } 925 926 struct tty * 927 txcomtty(dev_t dev) 928 { 929 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev)); 930 931 return sc->sc_tty; 932 } 933 934 int 935 txcomioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 936 { 937 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev)); 938 struct tty *tp = sc->sc_tty; 939 int s, err; 940 941 err = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 942 if (err != EPASSTHROUGH) { 943 return err; 944 } 945 946 err = ttioctl(tp, cmd, data, flag, l); 947 if (err != EPASSTHROUGH) { 948 return err; 949 } 950 951 err = 0; 952 953 s = spltty(); 954 955 switch (cmd) { 956 default: 957 err = EPASSTHROUGH; 958 break; 959 960 case TIOCSBRK: 961 txcom_break(sc, 1); 962 break; 963 964 case TIOCCBRK: 965 txcom_break(sc, 0); 966 break; 967 968 case TIOCSDTR: 969 txcom_modem(sc, 1); 970 break; 971 972 case TIOCCDTR: 973 txcom_modem(sc, 0); 974 break; 975 976 case TIOCGFLAGS: 977 *(int *)data = sc->sc_chip->sc_swflags; 978 break; 979 980 case TIOCSFLAGS: 981 err = kauth_authorize_device_tty(l->l_cred, 982 KAUTH_DEVICE_TTY_PRIVSET, tp); 983 if (err) { 984 break; 985 } 986 sc->sc_chip->sc_swflags = *(int *)data; 987 break; 988 989 } 990 991 splx(s); 992 993 return err; 994 } 995 996 void 997 txcomstop(struct tty *tp, int flag) 998 { 999 struct txcom_softc *sc; 1000 int s; 1001 1002 sc = device_lookup_private(&txcom_cd, minor(tp->t_dev)); 1003 1004 s = spltty(); 1005 1006 if (ISSET(tp->t_state, TS_BUSY)) { 1007 /* Stop transmitting at the next chunk. */ 1008 sc->sc_tbc = 0; 1009 sc->sc_heldtbc = 0; 1010 if (!ISSET(tp->t_state, TS_TTSTOP)) 1011 SET(tp->t_state, TS_FLUSH); 1012 } 1013 1014 splx(s); 1015 } 1016 1017 void 1018 txcomstart(struct tty *tp) 1019 { 1020 struct txcom_softc *sc; 1021 struct txcom_chip *chip; 1022 tx_chipset_tag_t tc; 1023 int slot; 1024 int s; 1025 1026 sc = device_lookup_private(&txcom_cd, minor(tp->t_dev)); 1027 chip = sc->sc_chip; 1028 tc = chip->sc_tc; 1029 slot = chip->sc_slot; 1030 1031 s = spltty(); 1032 1033 if (!__txcom_txbufready(chip, 0) || 1034 ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1035 goto out; 1036 1037 if (!ttypull(tp)) 1038 goto out; 1039 1040 sc->sc_tba = tp->t_outq.c_cf; 1041 sc->sc_tbc = ndqb(&tp->t_outq, 0); 1042 SET(tp->t_state, TS_BUSY); 1043 1044 /* Output the first character of the contiguous buffer. */ 1045 tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot), 1046 (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK)); 1047 1048 sc->sc_tbc--; 1049 sc->sc_tba++; 1050 1051 out: 1052 splx(s); 1053 } 1054 1055 /* 1056 * Set TXcom tty parameters from termios. 1057 */ 1058 int 1059 txcomparam(struct tty *tp, struct termios *t) 1060 { 1061 struct txcom_softc *sc; 1062 struct txcom_chip *chip; 1063 int ospeed; 1064 int s; 1065 1066 sc = device_lookup_private(&txcom_cd, minor(tp->t_dev)); 1067 if (sc == NULL) 1068 return ENXIO; 1069 1070 ospeed = t->c_ospeed; 1071 1072 /* Check requested parameters. */ 1073 if (ospeed < 0) { 1074 return EINVAL; 1075 } 1076 if (t->c_ispeed && t->c_ispeed != ospeed) { 1077 return EINVAL; 1078 } 1079 1080 s = spltty(); 1081 chip = sc->sc_chip; 1082 /* 1083 * For the console, always force CLOCAL and !HUPCL, so that the port 1084 * is always active. 1085 */ 1086 if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) || 1087 ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 1088 SET(t->c_cflag, CLOCAL); 1089 CLR(t->c_cflag, HUPCL); 1090 } 1091 splx(s); 1092 1093 /* 1094 * If we're not in a mode that assumes a connection is present, then 1095 * ignore carrier changes. 1096 */ 1097 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1098 chip->sc_dcd = 0; 1099 else 1100 chip->sc_dcd = 1; 1101 1102 /* 1103 * Only whack the UART when params change. 1104 * Some callers need to clear tp->t_ospeed 1105 * to make sure initialization gets done. 1106 */ 1107 if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) { 1108 return 0; 1109 } 1110 1111 s = spltty(); 1112 chip = sc->sc_chip; 1113 chip->sc_speed = ospeed; 1114 chip->sc_cflag = t->c_cflag; 1115 1116 txcom_setmode(chip); 1117 txcom_setbaudrate(chip); 1118 1119 /* And copy to tty. */ 1120 tp->t_ispeed = 0; 1121 tp->t_ospeed = chip->sc_speed; 1122 tp->t_cflag = chip->sc_cflag; 1123 1124 /* 1125 * Update the tty layer's idea of the carrier bit, in case we changed 1126 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1127 * explicit request. 1128 */ 1129 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd); 1130 1131 /* 1132 * If hardware flow control is disabled, unblock any hard flow 1133 * control state. 1134 */ 1135 if (!ISSET(chip->sc_cflag, CHWFLOW)) { 1136 txcomstart(tp); 1137 } 1138 1139 splx(s); 1140 1141 return 0; 1142 } 1143 1144 int 1145 txcom_dcd_hook(void *arg, int type, long id, void *msg) 1146 { 1147 struct txcom_softc *sc = arg; 1148 struct tty *tp = sc->sc_tty; 1149 struct txcom_chip *chip = sc->sc_chip; 1150 int modem = !(int)msg; /* p-edge 1, n-edge 0 */ 1151 1152 DPRINTF("DCD %s\n", modem ? "ON" : "OFF"); 1153 1154 if (modem && chip->sc_dcd) 1155 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd); 1156 1157 return 0; 1158 } 1159 1160 int 1161 txcom_cts_hook(void *arg, int type, long id, void *msg) 1162 { 1163 struct txcom_softc *sc = arg; 1164 struct tty *tp = sc->sc_tty; 1165 struct txcom_chip *chip = sc->sc_chip; 1166 int clear = !(int)msg; /* p-edge 1, n-edge 0 */ 1167 1168 DPRINTF("CTS %s\n", clear ? "ON" : "OFF"); 1169 1170 if (chip->sc_msr_cts) { 1171 if (!clear) { 1172 chip->sc_tx_stopped = 1; 1173 } else { 1174 chip->sc_tx_stopped = 0; 1175 (*tp->t_linesw->l_start)(tp); 1176 } 1177 } 1178 1179 return 0; 1180 } 1181 1182 #ifdef TX39UARTDEBUG 1183 void 1184 txcom_dump(struct txcom_chip *chip) 1185 { 1186 tx_chipset_tag_t tc = chip->sc_tc; 1187 int slot = chip->sc_slot; 1188 txreg_t reg; 1189 1190 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 1191 #define ISSETPRINT(r, m) \ 1192 dbg_bitmask_print(r, TX39_UARTCTRL1_##m, #m) 1193 ISSETPRINT(reg, UARTON); 1194 ISSETPRINT(reg, EMPTY); 1195 ISSETPRINT(reg, PRXHOLDFULL); 1196 ISSETPRINT(reg, RXHOLDFULL); 1197 ISSETPRINT(reg, ENDMARX); 1198 ISSETPRINT(reg, ENDMATX); 1199 ISSETPRINT(reg, TESTMODE); 1200 ISSETPRINT(reg, ENBREAHALT); 1201 ISSETPRINT(reg, ENDMATEST); 1202 ISSETPRINT(reg, ENDMALOOP); 1203 ISSETPRINT(reg, PULSEOPT2); 1204 ISSETPRINT(reg, PULSEOPT1); 1205 ISSETPRINT(reg, DTINVERT); 1206 ISSETPRINT(reg, DISTXD); 1207 ISSETPRINT(reg, TWOSTOP); 1208 ISSETPRINT(reg, LOOPBACK); 1209 ISSETPRINT(reg, BIT7); 1210 ISSETPRINT(reg, EVENPARITY); 1211 ISSETPRINT(reg, ENPARITY); 1212 ISSETPRINT(reg, ENUART); 1213 } 1214 #endif /* TX39UARTDEBUG */ 1215
Indexes created Thu Oct 30 16:09:53 GMT 2025