txcom.c revision 1.45 1 /* $NetBSD: txcom.c,v 1.45 2011/04/24 16:26:56 rmind Exp $ */
2
3 /*-
4 * Copyright (c) 1999, 2000, 2004 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by UCHIYAMA Yasushi.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: txcom.c,v 1.45 2011/04/24 16:26:56 rmind Exp $");
34
35 #include "opt_tx39uart_debug.h"
36
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/kernel.h>
40 #include <sys/device.h>
41 #include <sys/malloc.h>
42 #include <sys/kauth.h>
43
44 #include <sys/proc.h> /* tsleep/wakeup */
45
46 #include <sys/ioctl.h>
47 #include <sys/select.h>
48 #include <sys/file.h>
49
50 #include <sys/tty.h>
51 #include <sys/conf.h>
52 #include <dev/cons.h> /* consdev */
53
54 #include <machine/bus.h>
55 #include <machine/config_hook.h>
56
57 #include <hpcmips/tx/tx39var.h>
58 #include <hpcmips/tx/tx39icureg.h>
59 #include <hpcmips/tx/tx39uartvar.h>
60 #include <hpcmips/tx/tx39uartreg.h>
61
62 #include <hpcmips/tx/tx39irvar.h>
63
64 #include <hpcmips/tx/tx39clockreg.h> /* XXX */
65
66 /*
67 * UARTA channel has DTR, DSR, RTS, CTS lines. and they wired to MFIO/IO port.
68 */
69 #define IS_COM0(s) ((s) == 0)
70 #define IS_COM1(s) ((s) == 1)
71 #define ON ((void *)1)
72 #define OFF ((void *)0)
73
74 #ifdef TX39UART_DEBUG
75 #define DPRINTF_ENABLE
76 #define DPRINTF_DEBUG tx39uart_debug
77 #endif
78 #include <machine/debug.h>
79
80 #define TXCOM_HW_CONSOLE 0x40
81 #define TXCOM_RING_SIZE 256 /* must be a power of two! */
82 #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1)
83
84 struct txcom_chip {
85 tx_chipset_tag_t sc_tc;
86 int sc_slot; /* UARTA or UARTB */
87 int sc_cflag;
88 int sc_speed;
89 int sc_swflags;
90 int sc_hwflags;
91
92 int sc_dcd;
93 int sc_msr_cts;
94 int sc_tx_stopped;
95 };
96
97 struct txcom_softc {
98 struct device sc_dev;
99 struct tty *sc_tty;
100 struct txcom_chip *sc_chip;
101
102 void *sc_txsoft_cookie;
103 void *sc_rxsoft_cookie;
104
105 u_int8_t *sc_tba; /* transmit buffer address */
106 int sc_tbc; /* transmit byte count */
107 int sc_heldtbc;
108 u_int8_t *sc_rbuf; /* receive buffer address */
109 int sc_rbput; /* receive byte count */
110 int sc_rbget;
111 };
112
113 extern struct cfdriver txcom_cd;
114
115 int txcom_match(struct device *, struct cfdata *, void *);
116 void txcom_attach(struct device *, struct device *, void *);
117 int txcom_print(void*, const char *);
118
119 int txcom_txintr(void *);
120 int txcom_rxintr(void *);
121 int txcom_frameerr_intr(void *);
122 int txcom_parityerr_intr(void *);
123 int txcom_break_intr(void *);
124
125 void txcom_rxsoft(void *);
126 void txcom_txsoft(void *);
127
128 int txcom_stsoft(void *);
129 int txcom_stsoft2(void *);
130 int txcom_stsoft3(void *);
131 int txcom_stsoft4(void *);
132
133
134 void txcom_shutdown(struct txcom_softc *);
135 void txcom_break(struct txcom_softc *, int);
136 void txcom_modem(struct txcom_softc *, int);
137 void txcomstart(struct tty *);
138 int txcomparam(struct tty *, struct termios *);
139
140 void txcom_reset (struct txcom_chip *);
141 int txcom_enable (struct txcom_chip *, bool);
142 void txcom_disable (struct txcom_chip *);
143 void txcom_setmode (struct txcom_chip *);
144 void txcom_setbaudrate(struct txcom_chip *);
145 int txcom_cngetc (dev_t);
146 void txcom_cnputc (dev_t, int);
147 void txcom_cnpollc (dev_t, int);
148
149 int txcom_dcd_hook(void *, int, long, void *);
150 int txcom_cts_hook(void *, int, long, void *);
151
152
153 inline int __txcom_txbufready(struct txcom_chip *, int);
154 const char *__txcom_slotname(int);
155
156 #ifdef TX39UARTDEBUG
157 void txcom_dump(struct txcom_chip *);
158 #endif
159
160 struct consdev txcomcons = {
161 NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc, NULL, NULL,
162 NULL, NODEV, CN_NORMAL
163 };
164
165 /* Serial console */
166 struct txcom_chip txcom_chip;
167
168 CFATTACH_DECL(txcom, sizeof(struct txcom_softc),
169 txcom_match, txcom_attach, NULL, NULL);
170
171 dev_type_open(txcomopen);
172 dev_type_close(txcomclose);
173 dev_type_read(txcomread);
174 dev_type_write(txcomwrite);
175 dev_type_ioctl(txcomioctl);
176 dev_type_stop(txcomstop);
177 dev_type_tty(txcomtty);
178 dev_type_poll(txcompoll);
179
180 const struct cdevsw txcom_cdevsw = {
181 txcomopen, txcomclose, txcomread, txcomwrite, txcomioctl,
182 txcomstop, txcomtty, txcompoll, nommap, ttykqfilter, D_TTY
183 };
184
185 int
186 txcom_match(struct device *parent, struct cfdata *cf, void *aux)
187 {
188 /* if the autoconfiguration got this far, there's a slot here */
189 return 1;
190 }
191
192 void
193 txcom_attach(struct device *parent, struct device *self, void *aux)
194 {
195 struct tx39uart_attach_args *ua = aux;
196 struct txcom_softc *sc = (void*)self;
197 tx_chipset_tag_t tc;
198 struct tty *tp;
199 struct txcom_chip *chip;
200 int slot, console;
201
202 /* Check this slot used as serial console */
203 console = (ua->ua_slot == txcom_chip.sc_slot) &&
204 (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE);
205
206 if (console) {
207 sc->sc_chip = &txcom_chip;
208 } else {
209 if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip),
210 M_DEVBUF, M_WAITOK))) {
211 printf(": can't allocate chip\n");
212 return;
213 }
214 memset(sc->sc_chip, 0, sizeof(struct txcom_chip));
215 }
216
217 chip = sc->sc_chip;
218 tc = chip->sc_tc = ua->ua_tc;
219 slot = chip->sc_slot = ua->ua_slot;
220
221 #ifdef TX39UARTDEBUG
222 txcom_dump(chip);
223 #endif
224 if (!console)
225 txcom_reset(chip);
226
227 if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) {
228 printf(": can't allocate buffer.\n");
229 return;
230 }
231 memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE);
232
233 tp = tty_alloc();
234 tp->t_oproc = txcomstart;
235 tp->t_param = txcomparam;
236 tp->t_hwiflow = NULL;
237 sc->sc_tty = tp;
238 tty_attach(tp);
239
240 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
241 int maj;
242 /* locate the major number */
243 maj = cdevsw_lookup_major(&txcom_cdevsw);
244
245 cn_tab->cn_dev = makedev(maj, device_unit(&sc->sc_dev));
246
247 printf(": console");
248 }
249
250 printf("\n");
251
252 /*
253 * Enable interrupt
254 */
255 #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s))
256
257 tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY,
258 txcom_rxintr, sc);
259 tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY,
260 txcom_txintr, sc);
261 tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY,
262 txcom_rxintr, sc);
263 tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY,
264 txcom_txintr, sc);
265 tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY,
266 txcom_frameerr_intr, sc);
267 tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY,
268 txcom_parityerr_intr, sc);
269 tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY,
270 txcom_break_intr, sc);
271
272 sc->sc_txsoft_cookie =
273 softint_establish(SOFTINT_SERIAL, txcom_txsoft, sc);
274 sc->sc_rxsoft_cookie =
275 softint_establish(SOFTINT_SERIAL, txcom_rxsoft, sc);
276
277 /*
278 * UARTA has external signal line. (its wiring is platform dependent)
279 */
280 if (IS_COM0(slot)) {
281 /* install DCD, CTS hooks. */
282 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_DCD,
283 CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc);
284 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_CTS,
285 CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc);
286 }
287
288 /*
289 * UARTB can connect IR module
290 */
291 if (IS_COM1(slot)) {
292 struct txcom_attach_args tca;
293 tca.tca_tc = tc;
294 tca.tca_parent = self;
295 config_found(self, &tca, txcom_print);
296 }
297 }
298
299 int
300 txcom_print(void *aux, const char *pnp)
301 {
302 return pnp ? QUIET : UNCONF;
303 }
304
305 void
306 txcom_reset(struct txcom_chip *chip)
307 {
308 tx_chipset_tag_t tc;
309 int slot, ofs;
310 txreg_t reg;
311
312 tc = chip->sc_tc;
313 slot = chip->sc_slot;
314 ofs = TX39_UARTCTRL1_REG(slot);
315
316 /* Supply clock */
317 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
318 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
319 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
320
321 /* reset UART module */
322 tx_conf_write(tc, ofs, 0);
323 }
324
325 int
326 txcom_enable(struct txcom_chip *chip, bool console)
327 {
328 tx_chipset_tag_t tc;
329 txreg_t reg;
330 int slot, ofs, timeout;
331
332 tc = chip->sc_tc;
333 slot = chip->sc_slot;
334 ofs = TX39_UARTCTRL1_REG(slot);
335
336 /*
337 * External power supply (if any)
338 * When serial console, Windows CE already powered on it.
339 */
340 if (!console) {
341 config_hook_call(CONFIG_HOOK_POWERCONTROL,
342 CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON);
343 delay(3);
344 }
345
346 /* Supply clock */
347 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
348 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
349 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
350
351 /*
352 * XXX Disable DMA (DMA not coded yet)
353 */
354 reg = tx_conf_read(tc, ofs);
355 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
356 tx_conf_write(tc, ofs, reg);
357
358 /* enable */
359 reg = tx_conf_read(tc, ofs);
360 reg |= TX39_UARTCTRL1_ENUART;
361 reg &= ~TX39_UARTCTRL1_ENBREAHALT;
362 tx_conf_write(tc, ofs, reg);
363
364 timeout = 100000;
365
366 while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) &&
367 --timeout > 0)
368 ;
369
370 if (timeout == 0 && !cold) {
371 printf("%s never power up\n", __txcom_slotname(slot));
372 return 1;
373 }
374
375 return 0;
376 }
377
378 void
379 txcom_disable(struct txcom_chip *chip)
380 {
381 tx_chipset_tag_t tc;
382 txreg_t reg;
383 int slot;
384
385 tc = chip->sc_tc;
386 slot = chip->sc_slot;
387
388 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
389 /* DMA */
390 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
391
392 /* disable module */
393 reg &= ~TX39_UARTCTRL1_ENUART;
394 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
395
396 /* Clock */
397 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
398 reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
399 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
400
401 }
402
403 inline int
404 __txcom_txbufready(struct txcom_chip *chip, int retry)
405 {
406 tx_chipset_tag_t tc = chip->sc_tc;
407 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
408
409 do {
410 if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY)
411 return 1;
412 } while(--retry != 0);
413
414 return 0;
415 }
416
417 void
418 txcom_pulse_mode(struct device *dev)
419 {
420 struct txcom_softc *sc = (void*)dev;
421 struct txcom_chip *chip = sc->sc_chip;
422 tx_chipset_tag_t tc = chip->sc_tc;
423 int ofs;
424 txreg_t reg;
425
426 ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
427
428 reg = tx_conf_read(tc, ofs);
429 /* WindowsCE use this setting */
430 reg |= TX39_UARTCTRL1_PULSEOPT1;
431 reg &= ~TX39_UARTCTRL1_PULSEOPT2;
432 reg |= TX39_UARTCTRL1_DTINVERT;
433
434 tx_conf_write(tc, ofs, reg);
435 }
436
437 /*
438 * console
439 */
440 int
441 txcom_cngetc(dev_t dev)
442 {
443 tx_chipset_tag_t tc;
444 int ofs, c, s;
445
446 s = spltty();
447
448 tc = txcom_chip.sc_tc;
449 ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot);
450
451 while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs)))
452 ;
453
454 c = TX39_UARTRXHOLD_RXDATA(
455 tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot)));
456
457 if (c == '\r')
458 c = '\n';
459
460 splx(s);
461
462 return c;
463 }
464
465 void
466 txcom_cnputc(dev_t dev, int c)
467 {
468 struct txcom_chip *chip = &txcom_chip;
469 tx_chipset_tag_t tc = chip->sc_tc;
470 int s;
471
472 s = spltty();
473
474 /* Wait for transmitter to empty */
475 __txcom_txbufready(chip, -1);
476
477 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
478 (c & TX39_UARTTXHOLD_TXDATA_MASK));
479
480 __txcom_txbufready(chip, -1);
481
482 splx(s);
483 }
484
485 void
486 txcom_cnpollc(dev_t dev, int on)
487 {
488 }
489
490 void
491 txcom_setmode(struct txcom_chip *chip)
492 {
493 tcflag_t cflag = chip->sc_cflag;
494 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
495 txreg_t reg;
496
497 reg = tx_conf_read(chip->sc_tc, ofs);
498 reg &= ~TX39_UARTCTRL1_ENUART;
499 tx_conf_write(chip->sc_tc, ofs, reg);
500
501 switch (ISSET(cflag, CSIZE)) {
502 default:
503 printf("txcom_setmode: CS7, CS8 only. use CS7");
504 /* FALL THROUGH */
505 case CS7:
506 reg |= TX39_UARTCTRL1_BIT7;
507 break;
508 case CS8:
509 reg &= ~TX39_UARTCTRL1_BIT7;
510 break;
511 }
512
513 if (ISSET(cflag, PARENB)) {
514 reg |= TX39_UARTCTRL1_ENPARITY;
515 if (ISSET(cflag, PARODD)) {
516 reg &= ~TX39_UARTCTRL1_EVENPARITY;
517 } else {
518 reg |= TX39_UARTCTRL1_EVENPARITY;
519 }
520 } else {
521 reg &= ~TX39_UARTCTRL1_ENPARITY;
522 }
523
524 if (ISSET(cflag, CSTOPB))
525 reg |= TX39_UARTCTRL1_TWOSTOP;
526 else
527 reg &= ~TX39_UARTCTRL1_TWOSTOP;
528
529 reg |= TX39_UARTCTRL1_ENUART;
530 tx_conf_write(chip->sc_tc, ofs, reg);
531 }
532
533 void
534 txcom_setbaudrate(struct txcom_chip *chip)
535 {
536 int baudrate;
537 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
538 txreg_t reg, reg1;
539
540 if (chip->sc_speed == 0)
541 return;
542
543 if (!cold)
544 DPRINTF("%d\n", chip->sc_speed);
545
546 reg1 = tx_conf_read(chip->sc_tc, ofs);
547 reg1 &= ~TX39_UARTCTRL1_ENUART;
548 tx_conf_write(chip->sc_tc, ofs, reg1);
549
550 baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1;
551 reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate);
552
553 tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg);
554
555 reg1 |= TX39_UARTCTRL1_ENUART;
556 tx_conf_write(chip->sc_tc, ofs, reg1);
557 }
558
559 int
560 txcom_cnattach(int slot, int speed, int cflag)
561 {
562 cn_tab = &txcomcons;
563
564 txcom_chip.sc_tc = tx_conf_get_tag();
565 txcom_chip.sc_slot = slot;
566 txcom_chip.sc_cflag = cflag;
567 txcom_chip.sc_speed = speed;
568 txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE;
569 #if notyet
570 txcom_reset(&txcom_chip);
571 #endif
572 txcom_setmode(&txcom_chip);
573 txcom_setbaudrate(&txcom_chip);
574
575 if (txcom_enable(&txcom_chip, true) != 0)
576 return 1;
577
578 return 0;
579 }
580
581 /*
582 * tty
583 */
584 void
585 txcom_break(struct txcom_softc *sc, int on)
586 {
587 struct txcom_chip *chip = sc->sc_chip;
588
589 tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
590 on ? TX39_UARTTXHOLD_BREAK : 0);
591 }
592
593 void
594 txcom_modem(struct txcom_softc *sc, int on)
595 {
596 struct txcom_chip *chip = sc->sc_chip;
597 tx_chipset_tag_t tc = chip->sc_tc;
598 int slot = chip->sc_slot;
599 txreg_t reg;
600
601 /* assert DTR */
602 if (IS_COM0(slot)) {
603 config_hook_call(CONFIG_HOOK_SET,
604 CONFIG_HOOK_COM0_DTR,
605 (void *)on);
606 }
607
608 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
609 reg &= ~TX39_UARTCTRL1_ENUART;
610 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
611
612 if (on) {
613 reg &= ~TX39_UARTCTRL1_DISTXD;
614 } else {
615 reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */
616 }
617
618 reg |= TX39_UARTCTRL1_ENUART;
619 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
620 }
621
622 void
623 txcom_shutdown(struct txcom_softc *sc)
624 {
625 struct tty *tp = sc->sc_tty;
626 int s = spltty();
627
628 /* Clear any break condition set with TIOCSBRK. */
629 txcom_break(sc, 0);
630
631 /*
632 * Hang up if necessary. Wait a bit, so the other side has time to
633 * notice even if we immediately open the port again.
634 */
635 if (ISSET(tp->t_cflag, HUPCL)) {
636 txcom_modem(sc, 0);
637 (void) tsleep(sc, TTIPRI, ttclos, hz);
638 }
639
640
641 /* Turn off interrupts if not the console. */
642 if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
643 txcom_disable(sc->sc_chip);
644 }
645
646 splx(s);
647 }
648
649 const char *
650 __txcom_slotname(int slot)
651 {
652 static const char *slotname[] = {"UARTA", "UARTB", "unknown"};
653
654 if (slot != 0 && slot != 1)
655 return slotname[2];
656
657 return slotname[slot];
658 }
659
660 int
661 txcom_frameerr_intr(void *arg)
662 {
663 struct txcom_softc *sc = arg;
664
665 printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot));
666
667 return 0;
668 }
669
670 int
671 txcom_parityerr_intr(void *arg)
672 {
673 struct txcom_softc *sc = arg;
674
675 printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot));
676
677 return 0;
678 }
679
680 int
681 txcom_break_intr(void *arg)
682 {
683 struct txcom_softc *sc = arg;
684
685 printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot));
686
687 return 0;
688 }
689
690 int
691 txcom_rxintr(void *arg)
692 {
693 struct txcom_softc *sc = arg;
694 struct txcom_chip *chip = sc->sc_chip;
695 u_int8_t c;
696
697 c = TX39_UARTRXHOLD_RXDATA(
698 tx_conf_read(chip->sc_tc,
699 TX39_UARTRXHOLD_REG(chip->sc_slot)));
700
701 sc->sc_rbuf[sc->sc_rbput] = c;
702 sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK;
703
704 softint_schedule(sc->sc_rxsoft_cookie);
705
706 return 0;
707 }
708
709 void
710 txcom_rxsoft(void *arg)
711 {
712 struct txcom_softc *sc = arg;
713 struct tty *tp = sc->sc_tty;
714 int (*rint)(int, struct tty *);
715 int code;
716 int s, end, get;
717
718 rint = tp->t_linesw->l_rint;
719
720 s = spltty();
721 end = sc->sc_rbput;
722 get = sc->sc_rbget;
723
724 while (get != end) {
725 code = sc->sc_rbuf[get];
726
727 if ((*rint)(code, tp) == -1) {
728 /*
729 * The line discipline's buffer is out of space.
730 */
731 }
732 get = (get + 1) % TXCOM_RING_MASK;
733 }
734 sc->sc_rbget = get;
735
736 splx(s);
737 }
738
739 int
740 txcom_txintr(void *arg)
741 {
742 struct txcom_softc *sc = arg;
743 struct txcom_chip *chip = sc->sc_chip;
744 tx_chipset_tag_t tc = chip->sc_tc;
745
746 if (sc->sc_tbc > 0) {
747 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
748 (*sc->sc_tba &
749 TX39_UARTTXHOLD_TXDATA_MASK));
750 sc->sc_tbc--;
751 sc->sc_tba++;
752 } else {
753 softint_schedule(sc->sc_txsoft_cookie);
754 }
755
756 return 0;
757 }
758
759 void
760 txcom_txsoft(void *arg)
761 {
762 struct txcom_softc *sc = arg;
763 struct tty *tp = sc->sc_tty;
764 int s = spltty();
765
766 CLR(tp->t_state, TS_BUSY);
767 if (ISSET(tp->t_state, TS_FLUSH)) {
768 CLR(tp->t_state, TS_FLUSH);
769 } else {
770 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
771 }
772
773 (*tp->t_linesw->l_start)(tp);
774
775 splx(s);
776 }
777
778 int
779 txcomopen(dev_t dev, int flag, int mode, struct lwp *l)
780 {
781 struct txcom_softc *sc;
782 struct txcom_chip *chip;
783 struct tty *tp;
784 int s, err = ENXIO;
785
786 sc = device_lookup_private(&txcom_cd, minor(dev));
787 if (sc == NULL)
788 return err;
789
790 chip = sc->sc_chip;
791 tp = sc->sc_tty;
792
793 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp))
794 return (EBUSY);
795
796 s = spltty();
797
798 if (txcom_enable(sc->sc_chip, false)) {
799 splx(s);
800 goto out;
801 }
802 /*
803 * Do the following iff this is a first open.
804 */
805 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
806 struct termios t;
807
808 tp->t_dev = dev;
809
810 t.c_ispeed = 0;
811 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
812 t.c_ospeed = chip->sc_speed;
813 t.c_cflag = chip->sc_cflag;
814 } else {
815 t.c_ospeed = TTYDEF_SPEED;
816 t.c_cflag = TTYDEF_CFLAG;
817 }
818
819 if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL))
820 SET(t.c_cflag, CLOCAL);
821 if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS))
822 SET(t.c_cflag, CRTSCTS);
823 if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF))
824 SET(t.c_cflag, MDMBUF);
825
826 /* Make sure txcomparam() will do something. */
827 tp->t_ospeed = 0;
828 txcomparam(tp, &t);
829
830 tp->t_iflag = TTYDEF_IFLAG;
831 tp->t_oflag = TTYDEF_OFLAG;
832 tp->t_lflag = TTYDEF_LFLAG;
833
834 ttychars(tp);
835 ttsetwater(tp);
836
837 /*
838 * Turn on DTR. We must always do this, even if carrier is not
839 * present, because otherwise we'd have to use TIOCSDTR
840 * immediately after setting CLOCAL, which applications do not
841 * expect. We always assert DTR while the device is open
842 * unless explicitly requested to deassert it.
843 */
844 txcom_modem(sc, 1);
845
846 /* Clear the input ring, and unblock. */
847 sc->sc_rbget = sc->sc_rbput = 0;
848 }
849
850 splx(s);
851 #define TXCOMDIALOUT(x) (minor(x) & 0x80000)
852 if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) {
853 DPRINTF("ttyopen failed\n");
854 goto out;
855 }
856 if ((err = (*tp->t_linesw->l_open)(dev, tp))) {
857 DPRINTF("line dicipline open failed\n");
858 goto out;
859 }
860
861 return err;
862
863 out:
864 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
865 /*
866 * We failed to open the device, and nobody else had it opened.
867 * Clean up the state as appropriate.
868 */
869 txcom_shutdown(sc);
870 }
871
872 return err;
873
874 }
875
876 int
877 txcomclose(dev_t dev, int flag, int mode, struct lwp *l)
878 {
879 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
880 struct tty *tp = sc->sc_tty;
881
882 /* XXX This is for cons.c. */
883 if (!ISSET(tp->t_state, TS_ISOPEN))
884 return 0;
885
886 (*tp->t_linesw->l_close)(tp, flag);
887 ttyclose(tp);
888
889 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
890 /*
891 * Although we got a last close, the device may still be in
892 * use; e.g. if this was the dialout node, and there are still
893 * processes waiting for carrier on the non-dialout node.
894 */
895 txcom_shutdown(sc);
896 }
897
898 return 0;
899 }
900
901 int
902 txcomread(dev_t dev, struct uio *uio, int flag)
903 {
904 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
905 struct tty *tp = sc->sc_tty;
906
907 return ((*tp->t_linesw->l_read)(tp, uio, flag));
908 }
909
910 int
911 txcomwrite(dev_t dev, struct uio *uio, int flag)
912 {
913 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
914 struct tty *tp = sc->sc_tty;
915
916 return ((*tp->t_linesw->l_write)(tp, uio, flag));
917 }
918
919 int
920 txcompoll(dev_t dev, int events, struct lwp *l)
921 {
922 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
923 struct tty *tp = sc->sc_tty;
924
925 return ((*tp->t_linesw->l_poll)(tp, events, l));
926 }
927
928 struct tty *
929 txcomtty(dev_t dev)
930 {
931 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
932
933 return sc->sc_tty;
934 }
935
936 int
937 txcomioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
938 {
939 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev));
940 struct tty *tp = sc->sc_tty;
941 int s, err;
942
943 err = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
944 if (err != EPASSTHROUGH) {
945 return err;
946 }
947
948 err = ttioctl(tp, cmd, data, flag, l);
949 if (err != EPASSTHROUGH) {
950 return err;
951 }
952
953 err = 0;
954
955 s = spltty();
956
957 switch (cmd) {
958 default:
959 err = EPASSTHROUGH;
960 break;
961
962 case TIOCSBRK:
963 txcom_break(sc, 1);
964 break;
965
966 case TIOCCBRK:
967 txcom_break(sc, 0);
968 break;
969
970 case TIOCSDTR:
971 txcom_modem(sc, 1);
972 break;
973
974 case TIOCCDTR:
975 txcom_modem(sc, 0);
976 break;
977
978 case TIOCGFLAGS:
979 *(int *)data = sc->sc_chip->sc_swflags;
980 break;
981
982 case TIOCSFLAGS:
983 err = kauth_authorize_device_tty(l->l_cred,
984 KAUTH_DEVICE_TTY_PRIVSET, tp);
985 if (err) {
986 break;
987 }
988 sc->sc_chip->sc_swflags = *(int *)data;
989 break;
990
991 }
992
993 splx(s);
994
995 return err;
996 }
997
998 void
999 txcomstop(struct tty *tp, int flag)
1000 {
1001 struct txcom_softc *sc;
1002 int s;
1003
1004 sc = device_lookup_private(&txcom_cd, minor(tp->t_dev));
1005
1006 s = spltty();
1007
1008 if (ISSET(tp->t_state, TS_BUSY)) {
1009 /* Stop transmitting at the next chunk. */
1010 sc->sc_tbc = 0;
1011 sc->sc_heldtbc = 0;
1012 if (!ISSET(tp->t_state, TS_TTSTOP))
1013 SET(tp->t_state, TS_FLUSH);
1014 }
1015
1016 splx(s);
1017 }
1018
1019 void
1020 txcomstart(struct tty *tp)
1021 {
1022 struct txcom_softc *sc;
1023 struct txcom_chip *chip;
1024 tx_chipset_tag_t tc;
1025 int slot;
1026 int s;
1027
1028 sc = device_lookup_private(&txcom_cd, minor(tp->t_dev));
1029 chip = sc->sc_chip;
1030 tc = chip->sc_tc;
1031 slot = chip->sc_slot;
1032
1033 s = spltty();
1034
1035 if (!__txcom_txbufready(chip, 0) ||
1036 ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
1037 goto out;
1038
1039 if (!ttypull(tp))
1040 goto out;
1041
1042 sc->sc_tba = tp->t_outq.c_cf;
1043 sc->sc_tbc = ndqb(&tp->t_outq, 0);
1044 SET(tp->t_state, TS_BUSY);
1045
1046 /* Output the first character of the contiguous buffer. */
1047 tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot),
1048 (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK));
1049
1050 sc->sc_tbc--;
1051 sc->sc_tba++;
1052
1053 out:
1054 splx(s);
1055 }
1056
1057 /*
1058 * Set TXcom tty parameters from termios.
1059 */
1060 int
1061 txcomparam(struct tty *tp, struct termios *t)
1062 {
1063 struct txcom_softc *sc;
1064 struct txcom_chip *chip;
1065 int ospeed;
1066 int s;
1067
1068 sc = device_lookup_private(&txcom_cd, minor(tp->t_dev));
1069 if (sc == NULL)
1070 return ENXIO;
1071
1072 ospeed = t->c_ospeed;
1073
1074 /* Check requested parameters. */
1075 if (ospeed < 0) {
1076 return EINVAL;
1077 }
1078 if (t->c_ispeed && t->c_ispeed != ospeed) {
1079 return EINVAL;
1080 }
1081
1082 s = spltty();
1083 chip = sc->sc_chip;
1084 /*
1085 * For the console, always force CLOCAL and !HUPCL, so that the port
1086 * is always active.
1087 */
1088 if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) ||
1089 ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
1090 SET(t->c_cflag, CLOCAL);
1091 CLR(t->c_cflag, HUPCL);
1092 }
1093 splx(s);
1094
1095 /*
1096 * If we're not in a mode that assumes a connection is present, then
1097 * ignore carrier changes.
1098 */
1099 if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
1100 chip->sc_dcd = 0;
1101 else
1102 chip->sc_dcd = 1;
1103
1104 /*
1105 * Only whack the UART when params change.
1106 * Some callers need to clear tp->t_ospeed
1107 * to make sure initialization gets done.
1108 */
1109 if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) {
1110 return 0;
1111 }
1112
1113 s = spltty();
1114 chip = sc->sc_chip;
1115 chip->sc_speed = ospeed;
1116 chip->sc_cflag = t->c_cflag;
1117
1118 txcom_setmode(chip);
1119 txcom_setbaudrate(chip);
1120
1121 /* And copy to tty. */
1122 tp->t_ispeed = 0;
1123 tp->t_ospeed = chip->sc_speed;
1124 tp->t_cflag = chip->sc_cflag;
1125
1126 /*
1127 * Update the tty layer's idea of the carrier bit, in case we changed
1128 * CLOCAL or MDMBUF. We don't hang up here; we only do that by
1129 * explicit request.
1130 */
1131 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd);
1132
1133 /*
1134 * If hardware flow control is disabled, unblock any hard flow
1135 * control state.
1136 */
1137 if (!ISSET(chip->sc_cflag, CHWFLOW)) {
1138 txcomstart(tp);
1139 }
1140
1141 splx(s);
1142
1143 return 0;
1144 }
1145
1146 int
1147 txcom_dcd_hook(void *arg, int type, long id, void *msg)
1148 {
1149 struct txcom_softc *sc = arg;
1150 struct tty *tp = sc->sc_tty;
1151 struct txcom_chip *chip = sc->sc_chip;
1152 int modem = !(int)msg; /* p-edge 1, n-edge 0 */
1153
1154 DPRINTF("DCD %s\n", modem ? "ON" : "OFF");
1155
1156 if (modem && chip->sc_dcd)
1157 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd);
1158
1159 return 0;
1160 }
1161
1162 int
1163 txcom_cts_hook(void *arg, int type, long id, void *msg)
1164 {
1165 struct txcom_softc *sc = arg;
1166 struct tty *tp = sc->sc_tty;
1167 struct txcom_chip *chip = sc->sc_chip;
1168 int clear = !(int)msg; /* p-edge 1, n-edge 0 */
1169
1170 DPRINTF("CTS %s\n", clear ? "ON" : "OFF");
1171
1172 if (chip->sc_msr_cts) {
1173 if (!clear) {
1174 chip->sc_tx_stopped = 1;
1175 } else {
1176 chip->sc_tx_stopped = 0;
1177 (*tp->t_linesw->l_start)(tp);
1178 }
1179 }
1180
1181 return 0;
1182 }
1183
1184 #ifdef TX39UARTDEBUG
1185 void
1186 txcom_dump(struct txcom_chip *chip)
1187 {
1188 tx_chipset_tag_t tc = chip->sc_tc;
1189 int slot = chip->sc_slot;
1190 txreg_t reg;
1191
1192 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
1193 #define ISSETPRINT(r, m) \
1194 dbg_bitmask_print(r, TX39_UARTCTRL1_##m, #m)
1195 ISSETPRINT(reg, UARTON);
1196 ISSETPRINT(reg, EMPTY);
1197 ISSETPRINT(reg, PRXHOLDFULL);
1198 ISSETPRINT(reg, RXHOLDFULL);
1199 ISSETPRINT(reg, ENDMARX);
1200 ISSETPRINT(reg, ENDMATX);
1201 ISSETPRINT(reg, TESTMODE);
1202 ISSETPRINT(reg, ENBREAHALT);
1203 ISSETPRINT(reg, ENDMATEST);
1204 ISSETPRINT(reg, ENDMALOOP);
1205 ISSETPRINT(reg, PULSEOPT2);
1206 ISSETPRINT(reg, PULSEOPT1);
1207 ISSETPRINT(reg, DTINVERT);
1208 ISSETPRINT(reg, DISTXD);
1209 ISSETPRINT(reg, TWOSTOP);
1210 ISSETPRINT(reg, LOOPBACK);
1211 ISSETPRINT(reg, BIT7);
1212 ISSETPRINT(reg, EVENPARITY);
1213 ISSETPRINT(reg, ENPARITY);
1214 ISSETPRINT(reg, ENUART);
1215 }
1216 #endif /* TX39UARTDEBUG */
1217