txcom.c revision 1.46
1 /* $NetBSD: txcom.c,v 1.46 2012/10/27 17:17:54 chs Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: txcom.c,v 1.46 2012/10/27 17:17:54 chs Exp $"); 34 35 #include "opt_tx39uart_debug.h" 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/device.h> 41 #include <sys/malloc.h> 42 #include <sys/kauth.h> 43 44 #include <sys/proc.h> /* tsleep/wakeup */ 45 46 #include <sys/ioctl.h> 47 #include <sys/select.h> 48 #include <sys/file.h> 49 50 #include <sys/tty.h> 51 #include <sys/conf.h> 52 #include <dev/cons.h> /* consdev */ 53 54 #include <machine/bus.h> 55 #include <machine/config_hook.h> 56 57 #include <hpcmips/tx/tx39var.h> 58 #include <hpcmips/tx/tx39icureg.h> 59 #include <hpcmips/tx/tx39uartvar.h> 60 #include <hpcmips/tx/tx39uartreg.h> 61 62 #include <hpcmips/tx/tx39irvar.h> 63 64 #include <hpcmips/tx/tx39clockreg.h> /* XXX */ 65 66 /* 67 * UARTA channel has DTR, DSR, RTS, CTS lines. and they wired to MFIO/IO port. 68 */ 69 #define IS_COM0(s) ((s) == 0) 70 #define IS_COM1(s) ((s) == 1) 71 #define ON ((void *)1) 72 #define OFF ((void *)0) 73 74 #ifdef TX39UART_DEBUG 75 #define DPRINTF_ENABLE 76 #define DPRINTF_DEBUG tx39uart_debug 77 #endif 78 #include <machine/debug.h> 79 80 #define TXCOM_HW_CONSOLE 0x40 81 #define TXCOM_RING_SIZE 256 /* must be a power of two! */ 82 #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1) 83 84 struct txcom_chip { 85 tx_chipset_tag_t sc_tc; 86 int sc_slot; /* UARTA or UARTB */ 87 int sc_cflag; 88 int sc_speed; 89 int sc_swflags; 90 int sc_hwflags; 91 92 int sc_dcd; 93 int sc_msr_cts; 94 int sc_tx_stopped; 95 }; 96 97 struct txcom_softc { 98 struct tty *sc_tty; 99 struct txcom_chip *sc_chip; 100 101 void *sc_txsoft_cookie; 102 void *sc_rxsoft_cookie; 103 104 u_int8_t *sc_tba; /* transmit buffer address */ 105 int sc_tbc; /* transmit byte count */ 106 int sc_heldtbc; 107 u_int8_t *sc_rbuf; /* receive buffer address */ 108 int sc_rbput; /* receive byte count */ 109 int sc_rbget; 110 }; 111 112 extern struct cfdriver txcom_cd; 113 114 int txcom_match(device_t, cfdata_t, void *); 115 void txcom_attach(device_t, device_t, void *); 116 int txcom_print(void *, const char *); 117 118 int txcom_txintr(void *); 119 int txcom_rxintr(void *); 120 int txcom_frameerr_intr(void *); 121 int txcom_parityerr_intr(void *); 122 int txcom_break_intr(void *); 123 124 void txcom_rxsoft(void *); 125 void txcom_txsoft(void *); 126 127 int txcom_stsoft(void *); 128 int txcom_stsoft2(void *); 129 int txcom_stsoft3(void *); 130 int txcom_stsoft4(void *); 131 132 133 void txcom_shutdown(struct txcom_softc *); 134 void txcom_break(struct txcom_softc *, int); 135 void txcom_modem(struct txcom_softc *, int); 136 void txcomstart(struct tty *); 137 int txcomparam(struct tty *, struct termios *); 138 139 void txcom_reset (struct txcom_chip *); 140 int txcom_enable (struct txcom_chip *, bool); 141 void txcom_disable (struct txcom_chip *); 142 void txcom_setmode (struct txcom_chip *); 143 void txcom_setbaudrate(struct txcom_chip *); 144 int txcom_cngetc (dev_t); 145 void txcom_cnputc (dev_t, int); 146 void txcom_cnpollc (dev_t, int); 147 148 int txcom_dcd_hook(void *, int, long, void *); 149 int txcom_cts_hook(void *, int, long, void *); 150 151 152 inline int __txcom_txbufready(struct txcom_chip *, int); 153 const char *__txcom_slotname(int); 154 155 #ifdef TX39UARTDEBUG 156 void txcom_dump(struct txcom_chip *); 157 #endif 158 159 struct consdev txcomcons = { 160 NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc, NULL, NULL, 161 NULL, NODEV, CN_NORMAL 162 }; 163 164 /* Serial console */ 165 struct txcom_chip txcom_chip; 166 167 CFATTACH_DECL_NEW(txcom, sizeof(struct txcom_softc), 168 txcom_match, txcom_attach, NULL, NULL); 169 170 dev_type_open(txcomopen); 171 dev_type_close(txcomclose); 172 dev_type_read(txcomread); 173 dev_type_write(txcomwrite); 174 dev_type_ioctl(txcomioctl); 175 dev_type_stop(txcomstop); 176 dev_type_tty(txcomtty); 177 dev_type_poll(txcompoll); 178 179 const struct cdevsw txcom_cdevsw = { 180 txcomopen, txcomclose, txcomread, txcomwrite, txcomioctl, 181 txcomstop, txcomtty, txcompoll, nommap, ttykqfilter, D_TTY 182 }; 183 184 int 185 txcom_match(device_t parent, cfdata_t cf, void *aux) 186 { 187 /* if the autoconfiguration got this far, there's a slot here */ 188 return 1; 189 } 190 191 void 192 txcom_attach(device_t parent, device_t self, void *aux) 193 { 194 struct tx39uart_attach_args *ua = aux; 195 struct txcom_softc *sc = device_private(self); 196 tx_chipset_tag_t tc; 197 struct tty *tp; 198 struct txcom_chip *chip; 199 int slot, console; 200 201 /* Check this slot used as serial console */ 202 console = (ua->ua_slot == txcom_chip.sc_slot) && 203 (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE); 204 205 if (console) { 206 sc->sc_chip = &txcom_chip; 207 } else { 208 if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip), 209 M_DEVBUF, M_WAITOK))) { 210 printf(": can't allocate chip\n"); 211 return; 212 } 213 memset(sc->sc_chip, 0, sizeof(struct txcom_chip)); 214 } 215 216 chip = sc->sc_chip; 217 tc = chip->sc_tc = ua->ua_tc; 218 slot = chip->sc_slot = ua->ua_slot; 219 220 #ifdef TX39UARTDEBUG 221 txcom_dump(chip); 222 #endif 223 if (!console) 224 txcom_reset(chip); 225 226 if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) { 227 printf(": can't allocate buffer.\n"); 228 return; 229 } 230 memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE); 231 232 tp = tty_alloc(); 233 tp->t_oproc = txcomstart; 234 tp->t_param = txcomparam; 235 tp->t_hwiflow = NULL; 236 sc->sc_tty = tp; 237 tty_attach(tp); 238 239 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 240 int maj; 241 /* locate the major number */ 242 maj = cdevsw_lookup_major(&txcom_cdevsw); 243 244 cn_tab->cn_dev = makedev(maj, device_unit(self)); 245 246 printf(": console"); 247 } 248 249 printf("\n"); 250 251 /* 252 * Enable interrupt 253 */ 254 #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s)) 255 256 tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY, 257 txcom_rxintr, sc); 258 tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY, 259 txcom_txintr, sc); 260 tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY, 261 txcom_rxintr, sc); 262 tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY, 263 txcom_txintr, sc); 264 tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY, 265 txcom_frameerr_intr, sc); 266 tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY, 267 txcom_parityerr_intr, sc); 268 tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY, 269 txcom_break_intr, sc); 270 271 sc->sc_txsoft_cookie = 272 softint_establish(SOFTINT_SERIAL, txcom_txsoft, sc); 273 sc->sc_rxsoft_cookie = 274 softint_establish(SOFTINT_SERIAL, txcom_rxsoft, sc); 275 276 /* 277 * UARTA has external signal line. (its wiring is platform dependent) 278 */ 279 if (IS_COM0(slot)) { 280 /* install DCD, CTS hooks. */ 281 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_DCD, 282 CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc); 283 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_CTS, 284 CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc); 285 } 286 287 /* 288 * UARTB can connect IR module 289 */ 290 if (IS_COM1(slot)) { 291 struct txcom_attach_args tca; 292 tca.tca_tc = tc; 293 tca.tca_parent = self; 294 config_found(self, &tca, txcom_print); 295 } 296 } 297 298 int 299 txcom_print(void *aux, const char *pnp) 300 { 301 return pnp ? QUIET : UNCONF; 302 } 303 304 void 305 txcom_reset(struct txcom_chip *chip) 306 { 307 tx_chipset_tag_t tc; 308 int slot, ofs; 309 txreg_t reg; 310 311 tc = chip->sc_tc; 312 slot = chip->sc_slot; 313 ofs = TX39_UARTCTRL1_REG(slot); 314 315 /* Supply clock */ 316 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 317 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 318 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 319 320 /* reset UART module */ 321 tx_conf_write(tc, ofs, 0); 322 } 323 324 int 325 txcom_enable(struct txcom_chip *chip, bool console) 326 { 327 tx_chipset_tag_t tc; 328 txreg_t reg; 329 int slot, ofs, timeout; 330 331 tc = chip->sc_tc; 332 slot = chip->sc_slot; 333 ofs = TX39_UARTCTRL1_REG(slot); 334 335 /* 336 * External power supply (if any) 337 * When serial console, Windows CE already powered on it. 338 */ 339 if (!console) { 340 config_hook_call(CONFIG_HOOK_POWERCONTROL, 341 CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON); 342 delay(3); 343 } 344 345 /* Supply clock */ 346 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 347 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 348 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 349 350 /* 351 * XXX Disable DMA (DMA not coded yet) 352 */ 353 reg = tx_conf_read(tc, ofs); 354 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 355 tx_conf_write(tc, ofs, reg); 356 357 /* enable */ 358 reg = tx_conf_read(tc, ofs); 359 reg |= TX39_UARTCTRL1_ENUART; 360 reg &= ~TX39_UARTCTRL1_ENBREAHALT; 361 tx_conf_write(tc, ofs, reg); 362 363 timeout = 100000; 364 365 while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) && 366 --timeout > 0) 367 ; 368 369 if (timeout == 0 && !cold) { 370 printf("%s never power up\n", __txcom_slotname(slot)); 371 return 1; 372 } 373 374 return 0; 375 } 376 377 void 378 txcom_disable(struct txcom_chip *chip) 379 { 380 tx_chipset_tag_t tc; 381 txreg_t reg; 382 int slot; 383 384 tc = chip->sc_tc; 385 slot = chip->sc_slot; 386 387 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 388 /* DMA */ 389 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 390 391 /* disable module */ 392 reg &= ~TX39_UARTCTRL1_ENUART; 393 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 394 395 /* Clock */ 396 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 397 reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 398 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 399 400 } 401 402 inline int 403 __txcom_txbufready(struct txcom_chip *chip, int retry) 404 { 405 tx_chipset_tag_t tc = chip->sc_tc; 406 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 407 408 do { 409 if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY) 410 return 1; 411 } while(--retry != 0); 412 413 return 0; 414 } 415 416 void 417 txcom_pulse_mode(device_t dev) 418 { 419 struct txcom_softc *sc = device_private(dev); 420 struct txcom_chip *chip = sc->sc_chip; 421 tx_chipset_tag_t tc = chip->sc_tc; 422 int ofs; 423 txreg_t reg; 424 425 ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 426 427 reg = tx_conf_read(tc, ofs); 428 /* WindowsCE use this setting */ 429 reg |= TX39_UARTCTRL1_PULSEOPT1; 430 reg &= ~TX39_UARTCTRL1_PULSEOPT2; 431 reg |= TX39_UARTCTRL1_DTINVERT; 432 433 tx_conf_write(tc, ofs, reg); 434 } 435 436 /* 437 * console 438 */ 439 int 440 txcom_cngetc(dev_t dev) 441 { 442 tx_chipset_tag_t tc; 443 int ofs, c, s; 444 445 s = spltty(); 446 447 tc = txcom_chip.sc_tc; 448 ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot); 449 450 while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs))) 451 ; 452 453 c = TX39_UARTRXHOLD_RXDATA( 454 tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot))); 455 456 if (c == '\r') 457 c = '\n'; 458 459 splx(s); 460 461 return c; 462 } 463 464 void 465 txcom_cnputc(dev_t dev, int c) 466 { 467 struct txcom_chip *chip = &txcom_chip; 468 tx_chipset_tag_t tc = chip->sc_tc; 469 int s; 470 471 s = spltty(); 472 473 /* Wait for transmitter to empty */ 474 __txcom_txbufready(chip, -1); 475 476 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 477 (c & TX39_UARTTXHOLD_TXDATA_MASK)); 478 479 __txcom_txbufready(chip, -1); 480 481 splx(s); 482 } 483 484 void 485 txcom_cnpollc(dev_t dev, int on) 486 { 487 } 488 489 void 490 txcom_setmode(struct txcom_chip *chip) 491 { 492 tcflag_t cflag = chip->sc_cflag; 493 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 494 txreg_t reg; 495 496 reg = tx_conf_read(chip->sc_tc, ofs); 497 reg &= ~TX39_UARTCTRL1_ENUART; 498 tx_conf_write(chip->sc_tc, ofs, reg); 499 500 switch (ISSET(cflag, CSIZE)) { 501 default: 502 printf("txcom_setmode: CS7, CS8 only. use CS7"); 503 /* FALL THROUGH */ 504 case CS7: 505 reg |= TX39_UARTCTRL1_BIT7; 506 break; 507 case CS8: 508 reg &= ~TX39_UARTCTRL1_BIT7; 509 break; 510 } 511 512 if (ISSET(cflag, PARENB)) { 513 reg |= TX39_UARTCTRL1_ENPARITY; 514 if (ISSET(cflag, PARODD)) { 515 reg &= ~TX39_UARTCTRL1_EVENPARITY; 516 } else { 517 reg |= TX39_UARTCTRL1_EVENPARITY; 518 } 519 } else { 520 reg &= ~TX39_UARTCTRL1_ENPARITY; 521 } 522 523 if (ISSET(cflag, CSTOPB)) 524 reg |= TX39_UARTCTRL1_TWOSTOP; 525 else 526 reg &= ~TX39_UARTCTRL1_TWOSTOP; 527 528 reg |= TX39_UARTCTRL1_ENUART; 529 tx_conf_write(chip->sc_tc, ofs, reg); 530 } 531 532 void 533 txcom_setbaudrate(struct txcom_chip *chip) 534 { 535 int baudrate; 536 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 537 txreg_t reg, reg1; 538 539 if (chip->sc_speed == 0) 540 return; 541 542 if (!cold) 543 DPRINTF("%d\n", chip->sc_speed); 544 545 reg1 = tx_conf_read(chip->sc_tc, ofs); 546 reg1 &= ~TX39_UARTCTRL1_ENUART; 547 tx_conf_write(chip->sc_tc, ofs, reg1); 548 549 baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1; 550 reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate); 551 552 tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg); 553 554 reg1 |= TX39_UARTCTRL1_ENUART; 555 tx_conf_write(chip->sc_tc, ofs, reg1); 556 } 557 558 int 559 txcom_cnattach(int slot, int speed, int cflag) 560 { 561 cn_tab = &txcomcons; 562 563 txcom_chip.sc_tc = tx_conf_get_tag(); 564 txcom_chip.sc_slot = slot; 565 txcom_chip.sc_cflag = cflag; 566 txcom_chip.sc_speed = speed; 567 txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE; 568 #if notyet 569 txcom_reset(&txcom_chip); 570 #endif 571 txcom_setmode(&txcom_chip); 572 txcom_setbaudrate(&txcom_chip); 573 574 if (txcom_enable(&txcom_chip, true) != 0) 575 return 1; 576 577 return 0; 578 } 579 580 /* 581 * tty 582 */ 583 void 584 txcom_break(struct txcom_softc *sc, int on) 585 { 586 struct txcom_chip *chip = sc->sc_chip; 587 588 tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 589 on ? TX39_UARTTXHOLD_BREAK : 0); 590 } 591 592 void 593 txcom_modem(struct txcom_softc *sc, int on) 594 { 595 struct txcom_chip *chip = sc->sc_chip; 596 tx_chipset_tag_t tc = chip->sc_tc; 597 int slot = chip->sc_slot; 598 txreg_t reg; 599 600 /* assert DTR */ 601 if (IS_COM0(slot)) { 602 config_hook_call(CONFIG_HOOK_SET, 603 CONFIG_HOOK_COM0_DTR, 604 (void *)on); 605 } 606 607 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 608 reg &= ~TX39_UARTCTRL1_ENUART; 609 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 610 611 if (on) { 612 reg &= ~TX39_UARTCTRL1_DISTXD; 613 } else { 614 reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */ 615 } 616 617 reg |= TX39_UARTCTRL1_ENUART; 618 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 619 } 620 621 void 622 txcom_shutdown(struct txcom_softc *sc) 623 { 624 struct tty *tp = sc->sc_tty; 625 int s = spltty(); 626 627 /* Clear any break condition set with TIOCSBRK. */ 628 txcom_break(sc, 0); 629 630 /* 631 * Hang up if necessary. Wait a bit, so the other side has time to 632 * notice even if we immediately open the port again. 633 */ 634 if (ISSET(tp->t_cflag, HUPCL)) { 635 txcom_modem(sc, 0); 636 (void) tsleep(sc, TTIPRI, ttclos, hz); 637 } 638 639 640 /* Turn off interrupts if not the console. */ 641 if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 642 txcom_disable(sc->sc_chip); 643 } 644 645 splx(s); 646 } 647 648 const char * 649 __txcom_slotname(int slot) 650 { 651 static const char *slotname[] = {"UARTA", "UARTB", "unknown"}; 652 653 if (slot != 0 && slot != 1) 654 return slotname[2]; 655 656 return slotname[slot]; 657 } 658 659 int 660 txcom_frameerr_intr(void *arg) 661 { 662 struct txcom_softc *sc = arg; 663 664 printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 665 666 return 0; 667 } 668 669 int 670 txcom_parityerr_intr(void *arg) 671 { 672 struct txcom_softc *sc = arg; 673 674 printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 675 676 return 0; 677 } 678 679 int 680 txcom_break_intr(void *arg) 681 { 682 struct txcom_softc *sc = arg; 683 684 printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot)); 685 686 return 0; 687 } 688 689 int 690 txcom_rxintr(void *arg) 691 { 692 struct txcom_softc *sc = arg; 693 struct txcom_chip *chip = sc->sc_chip; 694 u_int8_t c; 695 696 c = TX39_UARTRXHOLD_RXDATA( 697 tx_conf_read(chip->sc_tc, 698 TX39_UARTRXHOLD_REG(chip->sc_slot))); 699 700 sc->sc_rbuf[sc->sc_rbput] = c; 701 sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK; 702 703 softint_schedule(sc->sc_rxsoft_cookie); 704 705 return 0; 706 } 707 708 void 709 txcom_rxsoft(void *arg) 710 { 711 struct txcom_softc *sc = arg; 712 struct tty *tp = sc->sc_tty; 713 int (*rint)(int, struct tty *); 714 int code; 715 int s, end, get; 716 717 rint = tp->t_linesw->l_rint; 718 719 s = spltty(); 720 end = sc->sc_rbput; 721 get = sc->sc_rbget; 722 723 while (get != end) { 724 code = sc->sc_rbuf[get]; 725 726 if ((*rint)(code, tp) == -1) { 727 /* 728 * The line discipline's buffer is out of space. 729 */ 730 } 731 get = (get + 1) % TXCOM_RING_MASK; 732 } 733 sc->sc_rbget = get; 734 735 splx(s); 736 } 737 738 int 739 txcom_txintr(void *arg) 740 { 741 struct txcom_softc *sc = arg; 742 struct txcom_chip *chip = sc->sc_chip; 743 tx_chipset_tag_t tc = chip->sc_tc; 744 745 if (sc->sc_tbc > 0) { 746 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 747 (*sc->sc_tba & 748 TX39_UARTTXHOLD_TXDATA_MASK)); 749 sc->sc_tbc--; 750 sc->sc_tba++; 751 } else { 752 softint_schedule(sc->sc_txsoft_cookie); 753 } 754 755 return 0; 756 } 757 758 void 759 txcom_txsoft(void *arg) 760 { 761 struct txcom_softc *sc = arg; 762 struct tty *tp = sc->sc_tty; 763 int s = spltty(); 764 765 CLR(tp->t_state, TS_BUSY); 766 if (ISSET(tp->t_state, TS_FLUSH)) { 767 CLR(tp->t_state, TS_FLUSH); 768 } else { 769 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 770 } 771 772 (*tp->t_linesw->l_start)(tp); 773 774 splx(s); 775 } 776 777 int 778 txcomopen(dev_t dev, int flag, int mode, struct lwp *l) 779 { 780 struct txcom_softc *sc; 781 struct txcom_chip *chip; 782 struct tty *tp; 783 int s, err = ENXIO; 784 785 sc = device_lookup_private(&txcom_cd, minor(dev)); 786 if (sc == NULL) 787 return err; 788 789 chip = sc->sc_chip; 790 tp = sc->sc_tty; 791 792 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 793 return (EBUSY); 794 795 s = spltty(); 796 797 if (txcom_enable(sc->sc_chip, false)) { 798 splx(s); 799 goto out; 800 } 801 /* 802 * Do the following iff this is a first open. 803 */ 804 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 805 struct termios t; 806 807 tp->t_dev = dev; 808 809 t.c_ispeed = 0; 810 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 811 t.c_ospeed = chip->sc_speed; 812 t.c_cflag = chip->sc_cflag; 813 } else { 814 t.c_ospeed = TTYDEF_SPEED; 815 t.c_cflag = TTYDEF_CFLAG; 816 } 817 818 if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL)) 819 SET(t.c_cflag, CLOCAL); 820 if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS)) 821 SET(t.c_cflag, CRTSCTS); 822 if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF)) 823 SET(t.c_cflag, MDMBUF); 824 825 /* Make sure txcomparam() will do something. */ 826 tp->t_ospeed = 0; 827 txcomparam(tp, &t); 828 829 tp->t_iflag = TTYDEF_IFLAG; 830 tp->t_oflag = TTYDEF_OFLAG; 831 tp->t_lflag = TTYDEF_LFLAG; 832 833 ttychars(tp); 834 ttsetwater(tp); 835 836 /* 837 * Turn on DTR. We must always do this, even if carrier is not 838 * present, because otherwise we'd have to use TIOCSDTR 839 * immediately after setting CLOCAL, which applications do not 840 * expect. We always assert DTR while the device is open 841 * unless explicitly requested to deassert it. 842 */ 843 txcom_modem(sc, 1); 844 845 /* Clear the input ring, and unblock. */ 846 sc->sc_rbget = sc->sc_rbput = 0; 847 } 848 849 splx(s); 850 #define TXCOMDIALOUT(x) (minor(x) & 0x80000) 851 if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) { 852 DPRINTF("ttyopen failed\n"); 853 goto out; 854 } 855 if ((err = (*tp->t_linesw->l_open)(dev, tp))) { 856 DPRINTF("line dicipline open failed\n"); 857 goto out; 858 } 859 860 return err; 861 862 out: 863 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 864 /* 865 * We failed to open the device, and nobody else had it opened. 866 * Clean up the state as appropriate. 867 */ 868 txcom_shutdown(sc); 869 } 870 871 return err; 872 873 } 874 875 int 876 txcomclose(dev_t dev, int flag, int mode, struct lwp *l) 877 { 878 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev)); 879 struct tty *tp = sc->sc_tty; 880 881 /* XXX This is for cons.c. */ 882 if (!ISSET(tp->t_state, TS_ISOPEN)) 883 return 0; 884 885 (*tp->t_linesw->l_close)(tp, flag); 886 ttyclose(tp); 887 888 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 889 /* 890 * Although we got a last close, the device may still be in 891 * use; e.g. if this was the dialout node, and there are still 892 * processes waiting for carrier on the non-dialout node. 893 */ 894 txcom_shutdown(sc); 895 } 896 897 return 0; 898 } 899 900 int 901 txcomread(dev_t dev, struct uio *uio, int flag) 902 { 903 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev)); 904 struct tty *tp = sc->sc_tty; 905 906 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 907 } 908 909 int 910 txcomwrite(dev_t dev, struct uio *uio, int flag) 911 { 912 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev)); 913 struct tty *tp = sc->sc_tty; 914 915 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 916 } 917 918 int 919 txcompoll(dev_t dev, int events, struct lwp *l) 920 { 921 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev)); 922 struct tty *tp = sc->sc_tty; 923 924 return ((*tp->t_linesw->l_poll)(tp, events, l)); 925 } 926 927 struct tty * 928 txcomtty(dev_t dev) 929 { 930 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev)); 931 932 return sc->sc_tty; 933 } 934 935 int 936 txcomioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 937 { 938 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev)); 939 struct tty *tp = sc->sc_tty; 940 int s, err; 941 942 err = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 943 if (err != EPASSTHROUGH) { 944 return err; 945 } 946 947 err = ttioctl(tp, cmd, data, flag, l); 948 if (err != EPASSTHROUGH) { 949 return err; 950 } 951 952 err = 0; 953 954 s = spltty(); 955 956 switch (cmd) { 957 default: 958 err = EPASSTHROUGH; 959 break; 960 961 case TIOCSBRK: 962 txcom_break(sc, 1); 963 break; 964 965 case TIOCCBRK: 966 txcom_break(sc, 0); 967 break; 968 969 case TIOCSDTR: 970 txcom_modem(sc, 1); 971 break; 972 973 case TIOCCDTR: 974 txcom_modem(sc, 0); 975 break; 976 977 case TIOCGFLAGS: 978 *(int *)data = sc->sc_chip->sc_swflags; 979 break; 980 981 case TIOCSFLAGS: 982 err = kauth_authorize_device_tty(l->l_cred, 983 KAUTH_DEVICE_TTY_PRIVSET, tp); 984 if (err) { 985 break; 986 } 987 sc->sc_chip->sc_swflags = *(int *)data; 988 break; 989 990 } 991 992 splx(s); 993 994 return err; 995 } 996 997 void 998 txcomstop(struct tty *tp, int flag) 999 { 1000 struct txcom_softc *sc; 1001 int s; 1002 1003 sc = device_lookup_private(&txcom_cd, minor(tp->t_dev)); 1004 1005 s = spltty(); 1006 1007 if (ISSET(tp->t_state, TS_BUSY)) { 1008 /* Stop transmitting at the next chunk. */ 1009 sc->sc_tbc = 0; 1010 sc->sc_heldtbc = 0; 1011 if (!ISSET(tp->t_state, TS_TTSTOP)) 1012 SET(tp->t_state, TS_FLUSH); 1013 } 1014 1015 splx(s); 1016 } 1017 1018 void 1019 txcomstart(struct tty *tp) 1020 { 1021 struct txcom_softc *sc; 1022 struct txcom_chip *chip; 1023 tx_chipset_tag_t tc; 1024 int slot; 1025 int s; 1026 1027 sc = device_lookup_private(&txcom_cd, minor(tp->t_dev)); 1028 chip = sc->sc_chip; 1029 tc = chip->sc_tc; 1030 slot = chip->sc_slot; 1031 1032 s = spltty(); 1033 1034 if (!__txcom_txbufready(chip, 0) || 1035 ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1036 goto out; 1037 1038 if (!ttypull(tp)) 1039 goto out; 1040 1041 sc->sc_tba = tp->t_outq.c_cf; 1042 sc->sc_tbc = ndqb(&tp->t_outq, 0); 1043 SET(tp->t_state, TS_BUSY); 1044 1045 /* Output the first character of the contiguous buffer. */ 1046 tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot), 1047 (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK)); 1048 1049 sc->sc_tbc--; 1050 sc->sc_tba++; 1051 1052 out: 1053 splx(s); 1054 } 1055 1056 /* 1057 * Set TXcom tty parameters from termios. 1058 */ 1059 int 1060 txcomparam(struct tty *tp, struct termios *t) 1061 { 1062 struct txcom_softc *sc; 1063 struct txcom_chip *chip; 1064 int ospeed; 1065 int s; 1066 1067 sc = device_lookup_private(&txcom_cd, minor(tp->t_dev)); 1068 if (sc == NULL) 1069 return ENXIO; 1070 1071 ospeed = t->c_ospeed; 1072 1073 /* Check requested parameters. */ 1074 if (ospeed < 0) { 1075 return EINVAL; 1076 } 1077 if (t->c_ispeed && t->c_ispeed != ospeed) { 1078 return EINVAL; 1079 } 1080 1081 s = spltty(); 1082 chip = sc->sc_chip; 1083 /* 1084 * For the console, always force CLOCAL and !HUPCL, so that the port 1085 * is always active. 1086 */ 1087 if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) || 1088 ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 1089 SET(t->c_cflag, CLOCAL); 1090 CLR(t->c_cflag, HUPCL); 1091 } 1092 splx(s); 1093 1094 /* 1095 * If we're not in a mode that assumes a connection is present, then 1096 * ignore carrier changes. 1097 */ 1098 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1099 chip->sc_dcd = 0; 1100 else 1101 chip->sc_dcd = 1; 1102 1103 /* 1104 * Only whack the UART when params change. 1105 * Some callers need to clear tp->t_ospeed 1106 * to make sure initialization gets done. 1107 */ 1108 if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) { 1109 return 0; 1110 } 1111 1112 s = spltty(); 1113 chip = sc->sc_chip; 1114 chip->sc_speed = ospeed; 1115 chip->sc_cflag = t->c_cflag; 1116 1117 txcom_setmode(chip); 1118 txcom_setbaudrate(chip); 1119 1120 /* And copy to tty. */ 1121 tp->t_ispeed = 0; 1122 tp->t_ospeed = chip->sc_speed; 1123 tp->t_cflag = chip->sc_cflag; 1124 1125 /* 1126 * Update the tty layer's idea of the carrier bit, in case we changed 1127 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1128 * explicit request. 1129 */ 1130 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd); 1131 1132 /* 1133 * If hardware flow control is disabled, unblock any hard flow 1134 * control state. 1135 */ 1136 if (!ISSET(chip->sc_cflag, CHWFLOW)) { 1137 txcomstart(tp); 1138 } 1139 1140 splx(s); 1141 1142 return 0; 1143 } 1144 1145 int 1146 txcom_dcd_hook(void *arg, int type, long id, void *msg) 1147 { 1148 struct txcom_softc *sc = arg; 1149 struct tty *tp = sc->sc_tty; 1150 struct txcom_chip *chip = sc->sc_chip; 1151 int modem = !(int)msg; /* p-edge 1, n-edge 0 */ 1152 1153 DPRINTF("DCD %s\n", modem ? "ON" : "OFF"); 1154 1155 if (modem && chip->sc_dcd) 1156 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd); 1157 1158 return 0; 1159 } 1160 1161 int 1162 txcom_cts_hook(void *arg, int type, long id, void *msg) 1163 { 1164 struct txcom_softc *sc = arg; 1165 struct tty *tp = sc->sc_tty; 1166 struct txcom_chip *chip = sc->sc_chip; 1167 int clear = !(int)msg; /* p-edge 1, n-edge 0 */ 1168 1169 DPRINTF("CTS %s\n", clear ? "ON" : "OFF"); 1170 1171 if (chip->sc_msr_cts) { 1172 if (!clear) { 1173 chip->sc_tx_stopped = 1; 1174 } else { 1175 chip->sc_tx_stopped = 0; 1176 (*tp->t_linesw->l_start)(tp); 1177 } 1178 } 1179 1180 return 0; 1181 } 1182 1183 #ifdef TX39UARTDEBUG 1184 void 1185 txcom_dump(struct txcom_chip *chip) 1186 { 1187 tx_chipset_tag_t tc = chip->sc_tc; 1188 int slot = chip->sc_slot; 1189 txreg_t reg; 1190 1191 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 1192 #define ISSETPRINT(r, m) \ 1193 dbg_bitmask_print(r, TX39_UARTCTRL1_##m, #m) 1194 ISSETPRINT(reg, UARTON); 1195 ISSETPRINT(reg, EMPTY); 1196 ISSETPRINT(reg, PRXHOLDFULL); 1197 ISSETPRINT(reg, RXHOLDFULL); 1198 ISSETPRINT(reg, ENDMARX); 1199 ISSETPRINT(reg, ENDMATX); 1200 ISSETPRINT(reg, TESTMODE); 1201 ISSETPRINT(reg, ENBREAHALT); 1202 ISSETPRINT(reg, ENDMATEST); 1203 ISSETPRINT(reg, ENDMALOOP); 1204 ISSETPRINT(reg, PULSEOPT2); 1205 ISSETPRINT(reg, PULSEOPT1); 1206 ISSETPRINT(reg, DTINVERT); 1207 ISSETPRINT(reg, DISTXD); 1208 ISSETPRINT(reg, TWOSTOP); 1209 ISSETPRINT(reg, LOOPBACK); 1210 ISSETPRINT(reg, BIT7); 1211 ISSETPRINT(reg, EVENPARITY); 1212 ISSETPRINT(reg, ENPARITY); 1213 ISSETPRINT(reg, ENUART); 1214 } 1215 #endif /* TX39UARTDEBUG */ 1216
Indexes created Thu Oct 30 22:09:55 GMT 2025