txcom.c revision 1.47
1 /* $NetBSD: txcom.c,v 1.47 2014/03/16 05:20:24 dholland Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: txcom.c,v 1.47 2014/03/16 05:20:24 dholland Exp $"); 34 35 #include "opt_tx39uart_debug.h" 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/device.h> 41 #include <sys/malloc.h> 42 #include <sys/kauth.h> 43 44 #include <sys/proc.h> /* tsleep/wakeup */ 45 46 #include <sys/ioctl.h> 47 #include <sys/select.h> 48 #include <sys/file.h> 49 50 #include <sys/tty.h> 51 #include <sys/conf.h> 52 #include <dev/cons.h> /* consdev */ 53 54 #include <machine/bus.h> 55 #include <machine/config_hook.h> 56 57 #include <hpcmips/tx/tx39var.h> 58 #include <hpcmips/tx/tx39icureg.h> 59 #include <hpcmips/tx/tx39uartvar.h> 60 #include <hpcmips/tx/tx39uartreg.h> 61 62 #include <hpcmips/tx/tx39irvar.h> 63 64 #include <hpcmips/tx/tx39clockreg.h> /* XXX */ 65 66 /* 67 * UARTA channel has DTR, DSR, RTS, CTS lines. and they wired to MFIO/IO port. 68 */ 69 #define IS_COM0(s) ((s) == 0) 70 #define IS_COM1(s) ((s) == 1) 71 #define ON ((void *)1) 72 #define OFF ((void *)0) 73 74 #ifdef TX39UART_DEBUG 75 #define DPRINTF_ENABLE 76 #define DPRINTF_DEBUG tx39uart_debug 77 #endif 78 #include <machine/debug.h> 79 80 #define TXCOM_HW_CONSOLE 0x40 81 #define TXCOM_RING_SIZE 256 /* must be a power of two! */ 82 #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1) 83 84 struct txcom_chip { 85 tx_chipset_tag_t sc_tc; 86 int sc_slot; /* UARTA or UARTB */ 87 int sc_cflag; 88 int sc_speed; 89 int sc_swflags; 90 int sc_hwflags; 91 92 int sc_dcd; 93 int sc_msr_cts; 94 int sc_tx_stopped; 95 }; 96 97 struct txcom_softc { 98 struct tty *sc_tty; 99 struct txcom_chip *sc_chip; 100 101 void *sc_txsoft_cookie; 102 void *sc_rxsoft_cookie; 103 104 u_int8_t *sc_tba; /* transmit buffer address */ 105 int sc_tbc; /* transmit byte count */ 106 int sc_heldtbc; 107 u_int8_t *sc_rbuf; /* receive buffer address */ 108 int sc_rbput; /* receive byte count */ 109 int sc_rbget; 110 }; 111 112 extern struct cfdriver txcom_cd; 113 114 int txcom_match(device_t, cfdata_t, void *); 115 void txcom_attach(device_t, device_t, void *); 116 int txcom_print(void *, const char *); 117 118 int txcom_txintr(void *); 119 int txcom_rxintr(void *); 120 int txcom_frameerr_intr(void *); 121 int txcom_parityerr_intr(void *); 122 int txcom_break_intr(void *); 123 124 void txcom_rxsoft(void *); 125 void txcom_txsoft(void *); 126 127 int txcom_stsoft(void *); 128 int txcom_stsoft2(void *); 129 int txcom_stsoft3(void *); 130 int txcom_stsoft4(void *); 131 132 133 void txcom_shutdown(struct txcom_softc *); 134 void txcom_break(struct txcom_softc *, int); 135 void txcom_modem(struct txcom_softc *, int); 136 void txcomstart(struct tty *); 137 int txcomparam(struct tty *, struct termios *); 138 139 void txcom_reset (struct txcom_chip *); 140 int txcom_enable (struct txcom_chip *, bool); 141 void txcom_disable (struct txcom_chip *); 142 void txcom_setmode (struct txcom_chip *); 143 void txcom_setbaudrate(struct txcom_chip *); 144 int txcom_cngetc (dev_t); 145 void txcom_cnputc (dev_t, int); 146 void txcom_cnpollc (dev_t, int); 147 148 int txcom_dcd_hook(void *, int, long, void *); 149 int txcom_cts_hook(void *, int, long, void *); 150 151 152 inline int __txcom_txbufready(struct txcom_chip *, int); 153 const char *__txcom_slotname(int); 154 155 #ifdef TX39UARTDEBUG 156 void txcom_dump(struct txcom_chip *); 157 #endif 158 159 struct consdev txcomcons = { 160 NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc, NULL, NULL, 161 NULL, NODEV, CN_NORMAL 162 }; 163 164 /* Serial console */ 165 struct txcom_chip txcom_chip; 166 167 CFATTACH_DECL_NEW(txcom, sizeof(struct txcom_softc), 168 txcom_match, txcom_attach, NULL, NULL); 169 170 dev_type_open(txcomopen); 171 dev_type_close(txcomclose); 172 dev_type_read(txcomread); 173 dev_type_write(txcomwrite); 174 dev_type_ioctl(txcomioctl); 175 dev_type_stop(txcomstop); 176 dev_type_tty(txcomtty); 177 dev_type_poll(txcompoll); 178 179 const struct cdevsw txcom_cdevsw = { 180 .d_open = txcomopen, 181 .d_close = txcomclose, 182 .d_read = txcomread, 183 .d_write = txcomwrite, 184 .d_ioctl = txcomioctl, 185 .d_stop = txcomstop, 186 .d_tty = txcomtty, 187 .d_poll = txcompoll, 188 .d_mmap = nommap, 189 .d_kqfilter = ttykqfilter, 190 .d_flag = D_TTY 191 }; 192 193 int 194 txcom_match(device_t parent, cfdata_t cf, void *aux) 195 { 196 /* if the autoconfiguration got this far, there's a slot here */ 197 return 1; 198 } 199 200 void 201 txcom_attach(device_t parent, device_t self, void *aux) 202 { 203 struct tx39uart_attach_args *ua = aux; 204 struct txcom_softc *sc = device_private(self); 205 tx_chipset_tag_t tc; 206 struct tty *tp; 207 struct txcom_chip *chip; 208 int slot, console; 209 210 /* Check this slot used as serial console */ 211 console = (ua->ua_slot == txcom_chip.sc_slot) && 212 (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE); 213 214 if (console) { 215 sc->sc_chip = &txcom_chip; 216 } else { 217 if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip), 218 M_DEVBUF, M_WAITOK))) { 219 printf(": can't allocate chip\n"); 220 return; 221 } 222 memset(sc->sc_chip, 0, sizeof(struct txcom_chip)); 223 } 224 225 chip = sc->sc_chip; 226 tc = chip->sc_tc = ua->ua_tc; 227 slot = chip->sc_slot = ua->ua_slot; 228 229 #ifdef TX39UARTDEBUG 230 txcom_dump(chip); 231 #endif 232 if (!console) 233 txcom_reset(chip); 234 235 if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) { 236 printf(": can't allocate buffer.\n"); 237 return; 238 } 239 memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE); 240 241 tp = tty_alloc(); 242 tp->t_oproc = txcomstart; 243 tp->t_param = txcomparam; 244 tp->t_hwiflow = NULL; 245 sc->sc_tty = tp; 246 tty_attach(tp); 247 248 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 249 int maj; 250 /* locate the major number */ 251 maj = cdevsw_lookup_major(&txcom_cdevsw); 252 253 cn_tab->cn_dev = makedev(maj, device_unit(self)); 254 255 printf(": console"); 256 } 257 258 printf("\n"); 259 260 /* 261 * Enable interrupt 262 */ 263 #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s)) 264 265 tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY, 266 txcom_rxintr, sc); 267 tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY, 268 txcom_txintr, sc); 269 tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY, 270 txcom_rxintr, sc); 271 tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY, 272 txcom_txintr, sc); 273 tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY, 274 txcom_frameerr_intr, sc); 275 tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY, 276 txcom_parityerr_intr, sc); 277 tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY, 278 txcom_break_intr, sc); 279 280 sc->sc_txsoft_cookie = 281 softint_establish(SOFTINT_SERIAL, txcom_txsoft, sc); 282 sc->sc_rxsoft_cookie = 283 softint_establish(SOFTINT_SERIAL, txcom_rxsoft, sc); 284 285 /* 286 * UARTA has external signal line. (its wiring is platform dependent) 287 */ 288 if (IS_COM0(slot)) { 289 /* install DCD, CTS hooks. */ 290 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_DCD, 291 CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc); 292 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_CTS, 293 CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc); 294 } 295 296 /* 297 * UARTB can connect IR module 298 */ 299 if (IS_COM1(slot)) { 300 struct txcom_attach_args tca; 301 tca.tca_tc = tc; 302 tca.tca_parent = self; 303 config_found(self, &tca, txcom_print); 304 } 305 } 306 307 int 308 txcom_print(void *aux, const char *pnp) 309 { 310 return pnp ? QUIET : UNCONF; 311 } 312 313 void 314 txcom_reset(struct txcom_chip *chip) 315 { 316 tx_chipset_tag_t tc; 317 int slot, ofs; 318 txreg_t reg; 319 320 tc = chip->sc_tc; 321 slot = chip->sc_slot; 322 ofs = TX39_UARTCTRL1_REG(slot); 323 324 /* Supply clock */ 325 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 326 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 327 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 328 329 /* reset UART module */ 330 tx_conf_write(tc, ofs, 0); 331 } 332 333 int 334 txcom_enable(struct txcom_chip *chip, bool console) 335 { 336 tx_chipset_tag_t tc; 337 txreg_t reg; 338 int slot, ofs, timeout; 339 340 tc = chip->sc_tc; 341 slot = chip->sc_slot; 342 ofs = TX39_UARTCTRL1_REG(slot); 343 344 /* 345 * External power supply (if any) 346 * When serial console, Windows CE already powered on it. 347 */ 348 if (!console) { 349 config_hook_call(CONFIG_HOOK_POWERCONTROL, 350 CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON); 351 delay(3); 352 } 353 354 /* Supply clock */ 355 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 356 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 357 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 358 359 /* 360 * XXX Disable DMA (DMA not coded yet) 361 */ 362 reg = tx_conf_read(tc, ofs); 363 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 364 tx_conf_write(tc, ofs, reg); 365 366 /* enable */ 367 reg = tx_conf_read(tc, ofs); 368 reg |= TX39_UARTCTRL1_ENUART; 369 reg &= ~TX39_UARTCTRL1_ENBREAHALT; 370 tx_conf_write(tc, ofs, reg); 371 372 timeout = 100000; 373 374 while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) && 375 --timeout > 0) 376 ; 377 378 if (timeout == 0 && !cold) { 379 printf("%s never power up\n", __txcom_slotname(slot)); 380 return 1; 381 } 382 383 return 0; 384 } 385 386 void 387 txcom_disable(struct txcom_chip *chip) 388 { 389 tx_chipset_tag_t tc; 390 txreg_t reg; 391 int slot; 392 393 tc = chip->sc_tc; 394 slot = chip->sc_slot; 395 396 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 397 /* DMA */ 398 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 399 400 /* disable module */ 401 reg &= ~TX39_UARTCTRL1_ENUART; 402 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 403 404 /* Clock */ 405 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 406 reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 407 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 408 409 } 410 411 inline int 412 __txcom_txbufready(struct txcom_chip *chip, int retry) 413 { 414 tx_chipset_tag_t tc = chip->sc_tc; 415 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 416 417 do { 418 if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY) 419 return 1; 420 } while(--retry != 0); 421 422 return 0; 423 } 424 425 void 426 txcom_pulse_mode(device_t dev) 427 { 428 struct txcom_softc *sc = device_private(dev); 429 struct txcom_chip *chip = sc->sc_chip; 430 tx_chipset_tag_t tc = chip->sc_tc; 431 int ofs; 432 txreg_t reg; 433 434 ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 435 436 reg = tx_conf_read(tc, ofs); 437 /* WindowsCE use this setting */ 438 reg |= TX39_UARTCTRL1_PULSEOPT1; 439 reg &= ~TX39_UARTCTRL1_PULSEOPT2; 440 reg |= TX39_UARTCTRL1_DTINVERT; 441 442 tx_conf_write(tc, ofs, reg); 443 } 444 445 /* 446 * console 447 */ 448 int 449 txcom_cngetc(dev_t dev) 450 { 451 tx_chipset_tag_t tc; 452 int ofs, c, s; 453 454 s = spltty(); 455 456 tc = txcom_chip.sc_tc; 457 ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot); 458 459 while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs))) 460 ; 461 462 c = TX39_UARTRXHOLD_RXDATA( 463 tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot))); 464 465 if (c == '\r') 466 c = '\n'; 467 468 splx(s); 469 470 return c; 471 } 472 473 void 474 txcom_cnputc(dev_t dev, int c) 475 { 476 struct txcom_chip *chip = &txcom_chip; 477 tx_chipset_tag_t tc = chip->sc_tc; 478 int s; 479 480 s = spltty(); 481 482 /* Wait for transmitter to empty */ 483 __txcom_txbufready(chip, -1); 484 485 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 486 (c & TX39_UARTTXHOLD_TXDATA_MASK)); 487 488 __txcom_txbufready(chip, -1); 489 490 splx(s); 491 } 492 493 void 494 txcom_cnpollc(dev_t dev, int on) 495 { 496 } 497 498 void 499 txcom_setmode(struct txcom_chip *chip) 500 { 501 tcflag_t cflag = chip->sc_cflag; 502 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 503 txreg_t reg; 504 505 reg = tx_conf_read(chip->sc_tc, ofs); 506 reg &= ~TX39_UARTCTRL1_ENUART; 507 tx_conf_write(chip->sc_tc, ofs, reg); 508 509 switch (ISSET(cflag, CSIZE)) { 510 default: 511 printf("txcom_setmode: CS7, CS8 only. use CS7"); 512 /* FALL THROUGH */ 513 case CS7: 514 reg |= TX39_UARTCTRL1_BIT7; 515 break; 516 case CS8: 517 reg &= ~TX39_UARTCTRL1_BIT7; 518 break; 519 } 520 521 if (ISSET(cflag, PARENB)) { 522 reg |= TX39_UARTCTRL1_ENPARITY; 523 if (ISSET(cflag, PARODD)) { 524 reg &= ~TX39_UARTCTRL1_EVENPARITY; 525 } else { 526 reg |= TX39_UARTCTRL1_EVENPARITY; 527 } 528 } else { 529 reg &= ~TX39_UARTCTRL1_ENPARITY; 530 } 531 532 if (ISSET(cflag, CSTOPB)) 533 reg |= TX39_UARTCTRL1_TWOSTOP; 534 else 535 reg &= ~TX39_UARTCTRL1_TWOSTOP; 536 537 reg |= TX39_UARTCTRL1_ENUART; 538 tx_conf_write(chip->sc_tc, ofs, reg); 539 } 540 541 void 542 txcom_setbaudrate(struct txcom_chip *chip) 543 { 544 int baudrate; 545 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 546 txreg_t reg, reg1; 547 548 if (chip->sc_speed == 0) 549 return; 550 551 if (!cold) 552 DPRINTF("%d\n", chip->sc_speed); 553 554 reg1 = tx_conf_read(chip->sc_tc, ofs); 555 reg1 &= ~TX39_UARTCTRL1_ENUART; 556 tx_conf_write(chip->sc_tc, ofs, reg1); 557 558 baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1; 559 reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate); 560 561 tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg); 562 563 reg1 |= TX39_UARTCTRL1_ENUART; 564 tx_conf_write(chip->sc_tc, ofs, reg1); 565 } 566 567 int 568 txcom_cnattach(int slot, int speed, int cflag) 569 { 570 cn_tab = &txcomcons; 571 572 txcom_chip.sc_tc = tx_conf_get_tag(); 573 txcom_chip.sc_slot = slot; 574 txcom_chip.sc_cflag = cflag; 575 txcom_chip.sc_speed = speed; 576 txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE; 577 #if notyet 578 txcom_reset(&txcom_chip); 579 #endif 580 txcom_setmode(&txcom_chip); 581 txcom_setbaudrate(&txcom_chip); 582 583 if (txcom_enable(&txcom_chip, true) != 0) 584 return 1; 585 586 return 0; 587 } 588 589 /* 590 * tty 591 */ 592 void 593 txcom_break(struct txcom_softc *sc, int on) 594 { 595 struct txcom_chip *chip = sc->sc_chip; 596 597 tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 598 on ? TX39_UARTTXHOLD_BREAK : 0); 599 } 600 601 void 602 txcom_modem(struct txcom_softc *sc, int on) 603 { 604 struct txcom_chip *chip = sc->sc_chip; 605 tx_chipset_tag_t tc = chip->sc_tc; 606 int slot = chip->sc_slot; 607 txreg_t reg; 608 609 /* assert DTR */ 610 if (IS_COM0(slot)) { 611 config_hook_call(CONFIG_HOOK_SET, 612 CONFIG_HOOK_COM0_DTR, 613 (void *)on); 614 } 615 616 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 617 reg &= ~TX39_UARTCTRL1_ENUART; 618 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 619 620 if (on) { 621 reg &= ~TX39_UARTCTRL1_DISTXD; 622 } else { 623 reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */ 624 } 625 626 reg |= TX39_UARTCTRL1_ENUART; 627 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 628 } 629 630 void 631 txcom_shutdown(struct txcom_softc *sc) 632 { 633 struct tty *tp = sc->sc_tty; 634 int s = spltty(); 635 636 /* Clear any break condition set with TIOCSBRK. */ 637 txcom_break(sc, 0); 638 639 /* 640 * Hang up if necessary. Wait a bit, so the other side has time to 641 * notice even if we immediately open the port again. 642 */ 643 if (ISSET(tp->t_cflag, HUPCL)) { 644 txcom_modem(sc, 0); 645 (void) tsleep(sc, TTIPRI, ttclos, hz); 646 } 647 648 649 /* Turn off interrupts if not the console. */ 650 if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 651 txcom_disable(sc->sc_chip); 652 } 653 654 splx(s); 655 } 656 657 const char * 658 __txcom_slotname(int slot) 659 { 660 static const char *slotname[] = {"UARTA", "UARTB", "unknown"}; 661 662 if (slot != 0 && slot != 1) 663 return slotname[2]; 664 665 return slotname[slot]; 666 } 667 668 int 669 txcom_frameerr_intr(void *arg) 670 { 671 struct txcom_softc *sc = arg; 672 673 printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 674 675 return 0; 676 } 677 678 int 679 txcom_parityerr_intr(void *arg) 680 { 681 struct txcom_softc *sc = arg; 682 683 printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 684 685 return 0; 686 } 687 688 int 689 txcom_break_intr(void *arg) 690 { 691 struct txcom_softc *sc = arg; 692 693 printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot)); 694 695 return 0; 696 } 697 698 int 699 txcom_rxintr(void *arg) 700 { 701 struct txcom_softc *sc = arg; 702 struct txcom_chip *chip = sc->sc_chip; 703 u_int8_t c; 704 705 c = TX39_UARTRXHOLD_RXDATA( 706 tx_conf_read(chip->sc_tc, 707 TX39_UARTRXHOLD_REG(chip->sc_slot))); 708 709 sc->sc_rbuf[sc->sc_rbput] = c; 710 sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK; 711 712 softint_schedule(sc->sc_rxsoft_cookie); 713 714 return 0; 715 } 716 717 void 718 txcom_rxsoft(void *arg) 719 { 720 struct txcom_softc *sc = arg; 721 struct tty *tp = sc->sc_tty; 722 int (*rint)(int, struct tty *); 723 int code; 724 int s, end, get; 725 726 rint = tp->t_linesw->l_rint; 727 728 s = spltty(); 729 end = sc->sc_rbput; 730 get = sc->sc_rbget; 731 732 while (get != end) { 733 code = sc->sc_rbuf[get]; 734 735 if ((*rint)(code, tp) == -1) { 736 /* 737 * The line discipline's buffer is out of space. 738 */ 739 } 740 get = (get + 1) % TXCOM_RING_MASK; 741 } 742 sc->sc_rbget = get; 743 744 splx(s); 745 } 746 747 int 748 txcom_txintr(void *arg) 749 { 750 struct txcom_softc *sc = arg; 751 struct txcom_chip *chip = sc->sc_chip; 752 tx_chipset_tag_t tc = chip->sc_tc; 753 754 if (sc->sc_tbc > 0) { 755 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 756 (*sc->sc_tba & 757 TX39_UARTTXHOLD_TXDATA_MASK)); 758 sc->sc_tbc--; 759 sc->sc_tba++; 760 } else { 761 softint_schedule(sc->sc_txsoft_cookie); 762 } 763 764 return 0; 765 } 766 767 void 768 txcom_txsoft(void *arg) 769 { 770 struct txcom_softc *sc = arg; 771 struct tty *tp = sc->sc_tty; 772 int s = spltty(); 773 774 CLR(tp->t_state, TS_BUSY); 775 if (ISSET(tp->t_state, TS_FLUSH)) { 776 CLR(tp->t_state, TS_FLUSH); 777 } else { 778 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 779 } 780 781 (*tp->t_linesw->l_start)(tp); 782 783 splx(s); 784 } 785 786 int 787 txcomopen(dev_t dev, int flag, int mode, struct lwp *l) 788 { 789 struct txcom_softc *sc; 790 struct txcom_chip *chip; 791 struct tty *tp; 792 int s, err = ENXIO; 793 794 sc = device_lookup_private(&txcom_cd, minor(dev)); 795 if (sc == NULL) 796 return err; 797 798 chip = sc->sc_chip; 799 tp = sc->sc_tty; 800 801 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 802 return (EBUSY); 803 804 s = spltty(); 805 806 if (txcom_enable(sc->sc_chip, false)) { 807 splx(s); 808 goto out; 809 } 810 /* 811 * Do the following iff this is a first open. 812 */ 813 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 814 struct termios t; 815 816 tp->t_dev = dev; 817 818 t.c_ispeed = 0; 819 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 820 t.c_ospeed = chip->sc_speed; 821 t.c_cflag = chip->sc_cflag; 822 } else { 823 t.c_ospeed = TTYDEF_SPEED; 824 t.c_cflag = TTYDEF_CFLAG; 825 } 826 827 if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL)) 828 SET(t.c_cflag, CLOCAL); 829 if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS)) 830 SET(t.c_cflag, CRTSCTS); 831 if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF)) 832 SET(t.c_cflag, MDMBUF); 833 834 /* Make sure txcomparam() will do something. */ 835 tp->t_ospeed = 0; 836 txcomparam(tp, &t); 837 838 tp->t_iflag = TTYDEF_IFLAG; 839 tp->t_oflag = TTYDEF_OFLAG; 840 tp->t_lflag = TTYDEF_LFLAG; 841 842 ttychars(tp); 843 ttsetwater(tp); 844 845 /* 846 * Turn on DTR. We must always do this, even if carrier is not 847 * present, because otherwise we'd have to use TIOCSDTR 848 * immediately after setting CLOCAL, which applications do not 849 * expect. We always assert DTR while the device is open 850 * unless explicitly requested to deassert it. 851 */ 852 txcom_modem(sc, 1); 853 854 /* Clear the input ring, and unblock. */ 855 sc->sc_rbget = sc->sc_rbput = 0; 856 } 857 858 splx(s); 859 #define TXCOMDIALOUT(x) (minor(x) & 0x80000) 860 if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) { 861 DPRINTF("ttyopen failed\n"); 862 goto out; 863 } 864 if ((err = (*tp->t_linesw->l_open)(dev, tp))) { 865 DPRINTF("line dicipline open failed\n"); 866 goto out; 867 } 868 869 return err; 870 871 out: 872 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 873 /* 874 * We failed to open the device, and nobody else had it opened. 875 * Clean up the state as appropriate. 876 */ 877 txcom_shutdown(sc); 878 } 879 880 return err; 881 882 } 883 884 int 885 txcomclose(dev_t dev, int flag, int mode, struct lwp *l) 886 { 887 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev)); 888 struct tty *tp = sc->sc_tty; 889 890 /* XXX This is for cons.c. */ 891 if (!ISSET(tp->t_state, TS_ISOPEN)) 892 return 0; 893 894 (*tp->t_linesw->l_close)(tp, flag); 895 ttyclose(tp); 896 897 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 898 /* 899 * Although we got a last close, the device may still be in 900 * use; e.g. if this was the dialout node, and there are still 901 * processes waiting for carrier on the non-dialout node. 902 */ 903 txcom_shutdown(sc); 904 } 905 906 return 0; 907 } 908 909 int 910 txcomread(dev_t dev, struct uio *uio, int flag) 911 { 912 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev)); 913 struct tty *tp = sc->sc_tty; 914 915 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 916 } 917 918 int 919 txcomwrite(dev_t dev, struct uio *uio, int flag) 920 { 921 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev)); 922 struct tty *tp = sc->sc_tty; 923 924 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 925 } 926 927 int 928 txcompoll(dev_t dev, int events, struct lwp *l) 929 { 930 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev)); 931 struct tty *tp = sc->sc_tty; 932 933 return ((*tp->t_linesw->l_poll)(tp, events, l)); 934 } 935 936 struct tty * 937 txcomtty(dev_t dev) 938 { 939 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev)); 940 941 return sc->sc_tty; 942 } 943 944 int 945 txcomioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 946 { 947 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev)); 948 struct tty *tp = sc->sc_tty; 949 int s, err; 950 951 err = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 952 if (err != EPASSTHROUGH) { 953 return err; 954 } 955 956 err = ttioctl(tp, cmd, data, flag, l); 957 if (err != EPASSTHROUGH) { 958 return err; 959 } 960 961 err = 0; 962 963 s = spltty(); 964 965 switch (cmd) { 966 default: 967 err = EPASSTHROUGH; 968 break; 969 970 case TIOCSBRK: 971 txcom_break(sc, 1); 972 break; 973 974 case TIOCCBRK: 975 txcom_break(sc, 0); 976 break; 977 978 case TIOCSDTR: 979 txcom_modem(sc, 1); 980 break; 981 982 case TIOCCDTR: 983 txcom_modem(sc, 0); 984 break; 985 986 case TIOCGFLAGS: 987 *(int *)data = sc->sc_chip->sc_swflags; 988 break; 989 990 case TIOCSFLAGS: 991 err = kauth_authorize_device_tty(l->l_cred, 992 KAUTH_DEVICE_TTY_PRIVSET, tp); 993 if (err) { 994 break; 995 } 996 sc->sc_chip->sc_swflags = *(int *)data; 997 break; 998 999 } 1000 1001 splx(s); 1002 1003 return err; 1004 } 1005 1006 void 1007 txcomstop(struct tty *tp, int flag) 1008 { 1009 struct txcom_softc *sc; 1010 int s; 1011 1012 sc = device_lookup_private(&txcom_cd, minor(tp->t_dev)); 1013 1014 s = spltty(); 1015 1016 if (ISSET(tp->t_state, TS_BUSY)) { 1017 /* Stop transmitting at the next chunk. */ 1018 sc->sc_tbc = 0; 1019 sc->sc_heldtbc = 0; 1020 if (!ISSET(tp->t_state, TS_TTSTOP)) 1021 SET(tp->t_state, TS_FLUSH); 1022 } 1023 1024 splx(s); 1025 } 1026 1027 void 1028 txcomstart(struct tty *tp) 1029 { 1030 struct txcom_softc *sc; 1031 struct txcom_chip *chip; 1032 tx_chipset_tag_t tc; 1033 int slot; 1034 int s; 1035 1036 sc = device_lookup_private(&txcom_cd, minor(tp->t_dev)); 1037 chip = sc->sc_chip; 1038 tc = chip->sc_tc; 1039 slot = chip->sc_slot; 1040 1041 s = spltty(); 1042 1043 if (!__txcom_txbufready(chip, 0) || 1044 ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1045 goto out; 1046 1047 if (!ttypull(tp)) 1048 goto out; 1049 1050 sc->sc_tba = tp->t_outq.c_cf; 1051 sc->sc_tbc = ndqb(&tp->t_outq, 0); 1052 SET(tp->t_state, TS_BUSY); 1053 1054 /* Output the first character of the contiguous buffer. */ 1055 tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot), 1056 (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK)); 1057 1058 sc->sc_tbc--; 1059 sc->sc_tba++; 1060 1061 out: 1062 splx(s); 1063 } 1064 1065 /* 1066 * Set TXcom tty parameters from termios. 1067 */ 1068 int 1069 txcomparam(struct tty *tp, struct termios *t) 1070 { 1071 struct txcom_softc *sc; 1072 struct txcom_chip *chip; 1073 int ospeed; 1074 int s; 1075 1076 sc = device_lookup_private(&txcom_cd, minor(tp->t_dev)); 1077 if (sc == NULL) 1078 return ENXIO; 1079 1080 ospeed = t->c_ospeed; 1081 1082 /* Check requested parameters. */ 1083 if (ospeed < 0) { 1084 return EINVAL; 1085 } 1086 if (t->c_ispeed && t->c_ispeed != ospeed) { 1087 return EINVAL; 1088 } 1089 1090 s = spltty(); 1091 chip = sc->sc_chip; 1092 /* 1093 * For the console, always force CLOCAL and !HUPCL, so that the port 1094 * is always active. 1095 */ 1096 if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) || 1097 ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 1098 SET(t->c_cflag, CLOCAL); 1099 CLR(t->c_cflag, HUPCL); 1100 } 1101 splx(s); 1102 1103 /* 1104 * If we're not in a mode that assumes a connection is present, then 1105 * ignore carrier changes. 1106 */ 1107 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1108 chip->sc_dcd = 0; 1109 else 1110 chip->sc_dcd = 1; 1111 1112 /* 1113 * Only whack the UART when params change. 1114 * Some callers need to clear tp->t_ospeed 1115 * to make sure initialization gets done. 1116 */ 1117 if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) { 1118 return 0; 1119 } 1120 1121 s = spltty(); 1122 chip = sc->sc_chip; 1123 chip->sc_speed = ospeed; 1124 chip->sc_cflag = t->c_cflag; 1125 1126 txcom_setmode(chip); 1127 txcom_setbaudrate(chip); 1128 1129 /* And copy to tty. */ 1130 tp->t_ispeed = 0; 1131 tp->t_ospeed = chip->sc_speed; 1132 tp->t_cflag = chip->sc_cflag; 1133 1134 /* 1135 * Update the tty layer's idea of the carrier bit, in case we changed 1136 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1137 * explicit request. 1138 */ 1139 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd); 1140 1141 /* 1142 * If hardware flow control is disabled, unblock any hard flow 1143 * control state. 1144 */ 1145 if (!ISSET(chip->sc_cflag, CHWFLOW)) { 1146 txcomstart(tp); 1147 } 1148 1149 splx(s); 1150 1151 return 0; 1152 } 1153 1154 int 1155 txcom_dcd_hook(void *arg, int type, long id, void *msg) 1156 { 1157 struct txcom_softc *sc = arg; 1158 struct tty *tp = sc->sc_tty; 1159 struct txcom_chip *chip = sc->sc_chip; 1160 int modem = !(int)msg; /* p-edge 1, n-edge 0 */ 1161 1162 DPRINTF("DCD %s\n", modem ? "ON" : "OFF"); 1163 1164 if (modem && chip->sc_dcd) 1165 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd); 1166 1167 return 0; 1168 } 1169 1170 int 1171 txcom_cts_hook(void *arg, int type, long id, void *msg) 1172 { 1173 struct txcom_softc *sc = arg; 1174 struct tty *tp = sc->sc_tty; 1175 struct txcom_chip *chip = sc->sc_chip; 1176 int clear = !(int)msg; /* p-edge 1, n-edge 0 */ 1177 1178 DPRINTF("CTS %s\n", clear ? "ON" : "OFF"); 1179 1180 if (chip->sc_msr_cts) { 1181 if (!clear) { 1182 chip->sc_tx_stopped = 1; 1183 } else { 1184 chip->sc_tx_stopped = 0; 1185 (*tp->t_linesw->l_start)(tp); 1186 } 1187 } 1188 1189 return 0; 1190 } 1191 1192 #ifdef TX39UARTDEBUG 1193 void 1194 txcom_dump(struct txcom_chip *chip) 1195 { 1196 tx_chipset_tag_t tc = chip->sc_tc; 1197 int slot = chip->sc_slot; 1198 txreg_t reg; 1199 1200 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 1201 #define ISSETPRINT(r, m) \ 1202 dbg_bitmask_print(r, TX39_UARTCTRL1_##m, #m) 1203 ISSETPRINT(reg, UARTON); 1204 ISSETPRINT(reg, EMPTY); 1205 ISSETPRINT(reg, PRXHOLDFULL); 1206 ISSETPRINT(reg, RXHOLDFULL); 1207 ISSETPRINT(reg, ENDMARX); 1208 ISSETPRINT(reg, ENDMATX); 1209 ISSETPRINT(reg, TESTMODE); 1210 ISSETPRINT(reg, ENBREAHALT); 1211 ISSETPRINT(reg, ENDMATEST); 1212 ISSETPRINT(reg, ENDMALOOP); 1213 ISSETPRINT(reg, PULSEOPT2); 1214 ISSETPRINT(reg, PULSEOPT1); 1215 ISSETPRINT(reg, DTINVERT); 1216 ISSETPRINT(reg, DISTXD); 1217 ISSETPRINT(reg, TWOSTOP); 1218 ISSETPRINT(reg, LOOPBACK); 1219 ISSETPRINT(reg, BIT7); 1220 ISSETPRINT(reg, EVENPARITY); 1221 ISSETPRINT(reg, ENPARITY); 1222 ISSETPRINT(reg, ENUART); 1223 } 1224 #endif /* TX39UARTDEBUG */ 1225
Indexes created Thu Oct 30 16:09:53 GMT 2025