txcom.c revision 1.5
1 /* $NetBSD: txcom.c,v 1.5 2000/01/13 17:53:37 uch Exp $ */ 2 3 /* 4 * Copyright (c) 1999, 2000, by UCHIYAMA Yasushi 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. The name of the developer may NOT be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 #include "opt_tx39_debug.h" 29 #include "opt_tx39uartdebug.h" 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/device.h> 35 #include <sys/malloc.h> 36 37 #include <sys/proc.h> /* tsleep/wakeup */ 38 39 #include <sys/ioctl.h> 40 #include <sys/select.h> 41 #include <sys/file.h> 42 43 #include <sys/tty.h> 44 #include <sys/conf.h> 45 #include <dev/cons.h> /* consdev */ 46 47 #include <machine/bus.h> 48 49 #include <hpcmips/tx/tx39var.h> 50 #include <hpcmips/tx/tx39icureg.h> 51 #include <hpcmips/tx/tx39uartvar.h> 52 #include <hpcmips/tx/tx39uartreg.h> 53 54 #include <hpcmips/tx/tx39irvar.h> 55 56 #include <hpcmips/tx/tx39clockreg.h> /* XXX */ 57 58 #define SET(t, f) (t) |= (f) 59 #define CLR(t, f) (t) &= ~(f) 60 #define ISSET(t, f) ((t) & (f)) 61 62 #ifdef TX39UARTDEBUG 63 #define DPRINTF(arg) printf arg 64 #else 65 #define DPRINTF(arg) 66 #endif 67 68 #define TXCOM_HW_CONSOLE 0x40 69 #define TXCOM_RING_SIZE 256 /* must be a power of two! */ 70 #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1) 71 72 struct txcom_chip { 73 tx_chipset_tag_t sc_tc; 74 int sc_slot; /* UARTA or UARTB */ 75 int sc_cflag; 76 int sc_speed; 77 int sc_swflags; 78 int sc_hwflags; 79 }; 80 81 struct txcom_softc { 82 struct device sc_dev; 83 struct tty *sc_tty; 84 struct txcom_chip *sc_chip; 85 86 u_int8_t *sc_tba; /* transmit buffer address */ 87 int sc_tbc; /* transmit byte count */ 88 int sc_heldtbc; 89 u_int8_t *sc_rbuf; /* receive buffer address */ 90 int sc_rbput; /* receive byte count */ 91 int sc_rbget; 92 }; 93 94 extern struct cfdriver txcom_cd; 95 96 int txcom_match __P((struct device*, struct cfdata*, void*)); 97 void txcom_attach __P((struct device*, struct device*, void*)); 98 int txcom_print __P((void*, const char*)); 99 100 int txcom_txintr __P((void*)); 101 int txcom_rxintr __P((void*)); 102 int txcom_overrun_intr __P((void*)); 103 int txcom_frameerr_intr __P((void*)); 104 int txcom_parityerr_intr __P((void*)); 105 int txcom_break_intr __P((void*)); 106 107 void txcom_rxsoft __P((void*)); 108 void txcom_txsoft __P((void*)); 109 110 void txcom_shutdown __P((struct txcom_softc*)); 111 void txcom_break __P((struct txcom_softc*, int)); 112 void txcom_modem __P((struct txcom_softc*, int)); 113 void txcomstart __P((struct tty*)); 114 int txcomparam __P((struct tty*, struct termios*)); 115 116 int txcom_enable __P((struct txcom_chip*)); 117 void txcom_disable __P((struct txcom_chip*)); 118 void txcom_setmode __P((struct txcom_chip*)); 119 void txcom_setbaudrate __P((struct txcom_chip*)); 120 int txcom_cngetc __P((dev_t)); 121 void txcom_cnputc __P((dev_t, int)); 122 void txcom_cnpollc __P((dev_t, int)); 123 124 __inline int __txcom_txbufready __P((struct txcom_chip*, int)); 125 __inline const char *__txcom_slotname __P((int)); 126 127 cdev_decl(txcom); 128 129 struct consdev txcomcons = { 130 NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc, 131 NODEV, CN_NORMAL 132 }; 133 134 /* Serial console */ 135 struct txcom_chip txcom_chip; 136 137 struct cfattach txcom_ca = { 138 sizeof(struct txcom_softc), txcom_match, txcom_attach 139 }; 140 141 int 142 txcom_match(parent, cf, aux) 143 struct device *parent; 144 struct cfdata *cf; 145 void *aux; 146 { 147 /* if the autoconfiguration got this far, there's a slot here */ 148 return 1; 149 } 150 151 void 152 txcom_attach(parent, self, aux) 153 struct device *parent; 154 struct device *self; 155 void *aux; 156 { 157 struct tx39uart_attach_args *ua = aux; 158 struct txcom_softc *sc = (void*)self; 159 tx_chipset_tag_t tc; 160 struct tty *tp; 161 struct txcom_chip *chip; 162 int slot; 163 164 /* Check this slot used as serial console */ 165 if (ua->ua_slot == txcom_chip.sc_slot && 166 (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE)) { 167 sc->sc_chip = &txcom_chip; 168 } else { 169 if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip), 170 M_DEVBUF, M_WAITOK))) { 171 printf(": can't allocate chip\n"); 172 return; 173 } 174 memset(sc->sc_chip, 0, sizeof(struct txcom_chip)); 175 } 176 177 chip = sc->sc_chip; 178 tc = chip->sc_tc = ua->ua_tc; 179 slot = chip->sc_slot = ua->ua_slot; 180 181 if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) { 182 printf(": can't allocate buffer.\n"); 183 return; 184 } 185 memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE); 186 187 tp = ttymalloc(); 188 tp->t_oproc = txcomstart; 189 tp->t_param = txcomparam; 190 tp->t_hwiflow = NULL; 191 sc->sc_tty = tp; 192 tty_attach(tp); 193 194 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 195 int maj; 196 /* locate the major number */ 197 for (maj = 0; maj < nchrdev; maj++) 198 if (cdevsw[maj].d_open == txcomopen) 199 break; 200 201 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 202 203 printf(": console"); 204 } 205 206 printf("\n"); 207 208 /* 209 * Enable interrupt 210 */ 211 #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s)) 212 213 tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY, 214 txcom_rxintr, sc); 215 tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY, 216 txcom_txintr, sc); 217 tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY, 218 txcom_rxintr, sc); 219 tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY, 220 txcom_txintr, sc); 221 tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY, 222 txcom_frameerr_intr, sc); 223 tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY, 224 txcom_parityerr_intr, sc); 225 tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY, 226 txcom_break_intr, sc); 227 228 /* 229 * UARTB can connect IR module 230 */ 231 if (ua->ua_slot == 1) { 232 struct txcom_attach_args tca; 233 tca.tca_tc = tc; 234 tca.tca_parent = self; 235 config_found(self, &tca, txcom_print); 236 } 237 } 238 239 int 240 txcom_print(aux, pnp) 241 void *aux; 242 const char *pnp; 243 { 244 return pnp ? QUIET : UNCONF; 245 } 246 247 int 248 txcom_enable(chip) 249 struct txcom_chip *chip; 250 { 251 tx_chipset_tag_t tc; 252 253 txreg_t reg; 254 int slot, ofs, timeout; 255 256 tc = chip->sc_tc; 257 slot = chip->sc_slot; 258 ofs = TX39_UARTCTRL1_REG(slot); 259 260 /* Supply clock XXX should call clock module routine. */ 261 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 262 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 263 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 264 265 /* Power on */ 266 reg = tx_conf_read(tc, ofs); 267 reg |= TX39_UARTCTRL1_ENUART; 268 reg &= ~TX39_UARTCTRL1_ENBREAHALT; 269 tx_conf_write(tc, ofs, reg); 270 271 timeout = 100; 272 273 while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) && 274 --timeout > 0) 275 ; 276 277 if (timeout == 0 && !cold) { 278 printf("UART%c never power up\n", "AB"[chip->sc_slot]); 279 return 1; 280 } 281 282 /* 283 * XXX Disable DMA (DMA not coded yet) 284 */ 285 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 286 tx_conf_write(tc, ofs, reg); 287 288 return 0; 289 } 290 291 void 292 txcom_disable(chip) 293 struct txcom_chip *chip; 294 { 295 tx_chipset_tag_t tc; 296 txreg_t reg; 297 int slot; 298 299 tc = chip->sc_tc; 300 slot = chip->sc_slot; 301 302 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 303 /* DMA */ 304 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 305 306 /* Power */ 307 reg &= ~TX39_UARTCTRL1_ENUART; 308 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 309 310 /* Clock */ 311 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 312 reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 313 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 314 315 } 316 317 __inline int 318 __txcom_txbufready(chip, retry) 319 struct txcom_chip *chip; 320 int retry; 321 { 322 tx_chipset_tag_t tc = chip->sc_tc; 323 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 324 325 do { 326 if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY) 327 return 1; 328 } while(--retry != 0); 329 330 return 0; 331 } 332 333 void 334 txcom_pulse_mode(dev) 335 struct device *dev; 336 { 337 struct txcom_softc *sc = (void*)dev; 338 struct txcom_chip *chip = sc->sc_chip; 339 tx_chipset_tag_t tc = chip->sc_tc; 340 int ofs; 341 txreg_t reg; 342 343 ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 344 345 reg = tx_conf_read(tc, ofs); 346 reg |= (TX39_UARTCTRL1_PULSEOPT2 | TX39_UARTCTRL1_PULSEOPT1); 347 tx_conf_write(tc, ofs, reg); 348 } 349 350 /* 351 * console 352 */ 353 int 354 txcom_cngetc(dev) 355 dev_t dev; 356 { 357 tx_chipset_tag_t tc; 358 int ofs, c, s; 359 360 s = spltty(); 361 362 tc = txcom_chip.sc_tc; 363 ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot); 364 365 while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs))) 366 ; 367 368 c = TX39_UARTRXHOLD_RXDATA( 369 tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot))); 370 371 if (c == '\r') 372 c = '\n'; 373 374 splx(s); 375 376 return c; 377 } 378 379 void 380 txcom_cnputc(dev, c) 381 dev_t dev; 382 int c; 383 { 384 struct txcom_chip *chip = &txcom_chip; 385 tx_chipset_tag_t tc = chip->sc_tc; 386 int s; 387 388 s = spltty(); 389 390 /* Wait for transmitter to empty */ 391 __txcom_txbufready(chip, -1); 392 393 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 394 (c & TX39_UARTTXHOLD_TXDATA_MASK)); 395 396 __txcom_txbufready(chip, -1); 397 398 splx(s); 399 } 400 401 void 402 txcom_cnpollc(dev, on) 403 dev_t dev; 404 int on; 405 { 406 } 407 408 void 409 txcom_setmode(chip) 410 struct txcom_chip *chip; 411 { 412 tcflag_t cflag = chip->sc_cflag; 413 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 414 txreg_t reg; 415 416 reg = tx_conf_read(chip->sc_tc, ofs); 417 418 switch (ISSET(cflag, CSIZE)) { 419 default: 420 printf("txcom_setmode: CS7, CS8 only. use CS7"); 421 /* FALL THROUGH */ 422 case CS7: 423 reg |= TX39_UARTCTRL1_BIT7; 424 break; 425 case CS8: 426 reg &= ~TX39_UARTCTRL1_BIT7; 427 break; 428 } 429 430 if (ISSET(cflag, PARENB)) { 431 reg |= TX39_UARTCTRL1_ENPARITY; 432 if (ISSET(cflag, PARODD)) { 433 reg &= ~TX39_UARTCTRL1_EVENPARITY; 434 } else { 435 reg |= TX39_UARTCTRL1_EVENPARITY; 436 } 437 } else { 438 reg &= ~TX39_UARTCTRL1_ENPARITY; 439 } 440 441 if (ISSET(cflag, CSTOPB)) { 442 reg |= TX39_UARTCTRL1_TWOSTOP; 443 } 444 445 tx_conf_write(chip->sc_tc, ofs, reg); 446 } 447 448 void 449 txcom_setbaudrate(chip) 450 struct txcom_chip *chip; 451 { 452 int baudrate; 453 txreg_t reg; 454 455 if (chip->sc_speed == 0) 456 return; 457 458 if (!cold) 459 DPRINTF(("txcom_setbaudrate: %d\n", chip->sc_speed)); 460 461 baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1; 462 reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate); 463 464 tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg); 465 } 466 467 int 468 txcom_cnattach(slot, speed, cflag) 469 int slot, speed, cflag; 470 { 471 cn_tab = &txcomcons; 472 473 txcom_chip.sc_tc = tx_conf_get_tag(); 474 txcom_chip.sc_slot = slot; 475 txcom_chip.sc_cflag = cflag; 476 txcom_chip.sc_speed = speed; 477 txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE; 478 479 if (txcom_enable(&txcom_chip)) 480 return 1; 481 482 txcom_setmode(&txcom_chip); 483 txcom_setbaudrate(&txcom_chip); 484 485 return 0; 486 } 487 488 /* 489 * tty 490 */ 491 void 492 txcom_break(sc, on) 493 struct txcom_softc *sc; 494 int on; 495 { 496 struct txcom_chip *chip = sc->sc_chip; 497 498 tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 499 on ? TX39_UARTTXHOLD_BREAK : 0); 500 } 501 502 void 503 txcom_modem(sc, on) 504 struct txcom_softc *sc; 505 int on; 506 { 507 struct txcom_chip *chip = sc->sc_chip; 508 tx_chipset_tag_t tc = chip->sc_tc; 509 int slot = chip->sc_slot; 510 txreg_t reg; 511 512 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 513 514 if (on) { 515 reg &= ~TX39_UARTCTRL1_DISTXD; 516 } else { 517 reg |= TX39_UARTCTRL1_DISTXD; 518 } 519 520 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 521 } 522 523 void 524 txcom_shutdown(sc) 525 struct txcom_softc *sc; 526 { 527 struct tty *tp = sc->sc_tty; 528 int s = spltty(); 529 530 /* Clear any break condition set with TIOCSBRK. */ 531 txcom_break(sc, 0); 532 533 /* 534 * Hang up if necessary. Wait a bit, so the other side has time to 535 * notice even if we immediately open the port again. 536 */ 537 if (ISSET(tp->t_cflag, HUPCL)) { 538 txcom_modem(sc, 0); 539 (void) tsleep(sc, TTIPRI, ttclos, hz); 540 } 541 542 543 /* Turn off interrupts if not the console. */ 544 if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 545 txcom_disable(sc->sc_chip); 546 } 547 548 splx(s); 549 } 550 551 __inline const char * 552 __txcom_slotname(slot) 553 int slot; 554 { 555 static const char *slotname[] = {"UARTA", "UARTB"}; 556 if (slot != 0 && slot != 1) { 557 return "bogus slot"; 558 } else { 559 return slotname[slot]; 560 } 561 } 562 563 int 564 txcom_overrun_intr(arg) 565 void *arg; 566 { 567 struct txcom_softc *sc = arg; 568 569 printf("%s overrun\n", __txcom_slotname(sc->sc_chip->sc_slot)); 570 571 return 0; 572 } 573 574 int 575 txcom_frameerr_intr(arg) 576 void *arg; 577 { 578 struct txcom_softc *sc = arg; 579 580 printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 581 582 return 0; 583 } 584 585 int 586 txcom_parityerr_intr(arg) 587 void *arg; 588 { 589 struct txcom_softc *sc = arg; 590 591 printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 592 593 return 0; 594 } 595 596 int 597 txcom_break_intr(arg) 598 void *arg; 599 { 600 struct txcom_softc *sc = arg; 601 602 printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot)); 603 604 return 0; 605 } 606 607 int 608 txcom_rxintr(arg) 609 void *arg; 610 { 611 struct txcom_softc *sc = arg; 612 struct txcom_chip *chip = sc->sc_chip; 613 u_int8_t c; 614 615 c = TX39_UARTRXHOLD_RXDATA( 616 tx_conf_read(chip->sc_tc, 617 TX39_UARTRXHOLD_REG(chip->sc_slot))); 618 619 sc->sc_rbuf[sc->sc_rbput] = c; 620 sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK; 621 622 timeout(txcom_rxsoft, arg, 1); 623 624 return 0; 625 } 626 627 void 628 txcom_rxsoft(arg) 629 void *arg; 630 { 631 struct txcom_softc *sc = arg; 632 struct tty *tp = sc->sc_tty; 633 int (*rint) __P((int c, struct tty *tp)); 634 int code; 635 int s, end, get; 636 637 rint = linesw[tp->t_line].l_rint; 638 639 s = spltty(); 640 end = sc->sc_rbput; 641 get = sc->sc_rbget; 642 643 while (get != end) { 644 code = sc->sc_rbuf[get]; 645 646 if ((*rint)(code, tp) == -1) { 647 /* 648 * The line discipline's buffer is out of space. 649 */ 650 } 651 get = (get + 1) % TXCOM_RING_MASK; 652 } 653 sc->sc_rbget = get; 654 655 splx(s); 656 } 657 658 int 659 txcom_txintr(arg) 660 void *arg; 661 { 662 struct txcom_softc *sc = arg; 663 struct txcom_chip *chip = sc->sc_chip; 664 tx_chipset_tag_t tc = chip->sc_tc; 665 666 if (sc->sc_tbc > 0) { 667 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 668 (*sc->sc_tba & 669 TX39_UARTTXHOLD_TXDATA_MASK)); 670 sc->sc_tbc--; 671 sc->sc_tba++; 672 } else { 673 timeout(txcom_txsoft, arg, 1); 674 } 675 676 return 0; 677 } 678 679 void 680 txcom_txsoft(arg) 681 void *arg; 682 { 683 struct txcom_softc *sc = arg; 684 struct tty *tp = sc->sc_tty; 685 int s = spltty(); 686 687 CLR(tp->t_state, TS_BUSY); 688 if (ISSET(tp->t_state, TS_FLUSH)) { 689 CLR(tp->t_state, TS_FLUSH); 690 } else { 691 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 692 } 693 694 (*linesw[tp->t_line].l_start)(tp); 695 696 splx(s); 697 } 698 699 int 700 txcomopen(dev, flag, mode, p) 701 dev_t dev; 702 int flag, mode; 703 struct proc *p; 704 { 705 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 706 struct txcom_chip *chip; 707 struct tty *tp; 708 int s, err; 709 710 if (!sc) 711 return ENXIO; 712 713 chip = sc->sc_chip; 714 tp = sc->sc_tty; 715 716 if (ISSET(tp->t_state, TS_ISOPEN) && 717 ISSET(tp->t_state, TS_XCLUDE) && 718 p->p_ucred->cr_uid != 0) 719 return (EBUSY); 720 721 s = spltty(); 722 723 if (txcom_enable(sc->sc_chip)) 724 goto out; 725 726 /* 727 * Do the following iff this is a first open. 728 */ 729 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 730 struct termios t; 731 732 tp->t_dev = dev; 733 734 t.c_ispeed = 0; 735 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 736 t.c_ospeed = chip->sc_speed; 737 t.c_cflag = chip->sc_cflag; 738 } else { 739 t.c_ospeed = TTYDEF_SPEED; 740 t.c_cflag = TTYDEF_CFLAG; 741 } 742 743 if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL)) 744 SET(t.c_cflag, CLOCAL); 745 if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS)) 746 SET(t.c_cflag, CRTSCTS); 747 if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF)) 748 SET(t.c_cflag, MDMBUF); 749 750 /* Make sure txcomparam() will do something. */ 751 tp->t_ospeed = 0; 752 txcomparam(tp, &t); 753 754 tp->t_iflag = TTYDEF_IFLAG; 755 tp->t_oflag = TTYDEF_OFLAG; 756 tp->t_lflag = TTYDEF_LFLAG; 757 758 ttychars(tp); 759 ttsetwater(tp); 760 761 /* 762 * Turn on DTR. We must always do this, even if carrier is not 763 * present, because otherwise we'd have to use TIOCSDTR 764 * immediately after setting CLOCAL, which applications do not 765 * expect. We always assert DTR while the device is open 766 * unless explicitly requested to deassert it. 767 */ 768 txcom_modem(sc, 1); 769 770 /* Clear the input ring, and unblock. */ 771 sc->sc_rbget = sc->sc_rbput = 0; 772 } 773 774 splx(s); 775 776 if ((err = ttyopen(tp, minor(dev), ISSET(flag, O_NONBLOCK)))) { 777 DPRINTF(("txcomopen: ttyopen failed\n")); 778 goto out; 779 } 780 if ((err = (*linesw[tp->t_line].l_open)(dev, tp))) { 781 DPRINTF(("txcomopen: line dicipline open failed\n")); 782 goto out; 783 } 784 785 return err; 786 787 out: 788 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 789 /* 790 * We failed to open the device, and nobody else had it opened. 791 * Clean up the state as appropriate. 792 */ 793 txcom_shutdown(sc); 794 } 795 796 return err; 797 798 } 799 800 int 801 txcomclose(dev, flag, mode, p) 802 dev_t dev; 803 int flag, mode; 804 struct proc *p; 805 { 806 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 807 struct tty *tp = sc->sc_tty; 808 809 /* XXX This is for cons.c. */ 810 if (!ISSET(tp->t_state, TS_ISOPEN)) 811 return 0; 812 813 (*linesw[tp->t_line].l_close)(tp, flag); 814 ttyclose(tp); 815 816 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 817 /* 818 * Although we got a last close, the device may still be in 819 * use; e.g. if this was the dialout node, and there are still 820 * processes waiting for carrier on the non-dialout node. 821 */ 822 txcom_shutdown(sc); 823 } 824 825 return 0; 826 } 827 828 int 829 txcomread(dev, uio, flag) 830 dev_t dev; 831 struct uio *uio; 832 int flag; 833 { 834 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 835 struct tty *tp = sc->sc_tty; 836 837 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 838 } 839 840 int 841 txcomwrite(dev, uio, flag) 842 dev_t dev; 843 struct uio *uio; 844 int flag; 845 { 846 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 847 struct tty *tp = sc->sc_tty; 848 849 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 850 } 851 852 struct tty * 853 txcomtty(dev) 854 dev_t dev; 855 { 856 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 857 858 return sc->sc_tty; 859 } 860 861 int 862 txcomioctl(dev, cmd, data, flag, p) 863 dev_t dev; 864 u_long cmd; 865 caddr_t data; 866 int flag; 867 struct proc *p; 868 { 869 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 870 struct tty *tp = sc->sc_tty; 871 int s, err; 872 873 err = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 874 if (err >= 0) { 875 return err; 876 } 877 878 err = ttioctl(tp, cmd, data, flag, p); 879 if (err >= 0) { 880 return err; 881 } 882 883 err = 0; 884 885 s = spltty(); 886 887 switch (cmd) { 888 default: 889 err = ENOTTY; 890 break; 891 892 case TIOCSBRK: 893 txcom_break(sc, 1); 894 break; 895 896 case TIOCCBRK: 897 txcom_break(sc, 0); 898 break; 899 900 case TIOCSDTR: 901 txcom_modem(sc, 1); 902 break; 903 904 case TIOCCDTR: 905 txcom_modem(sc, 0); 906 break; 907 908 case TIOCGFLAGS: 909 *(int *)data = sc->sc_chip->sc_swflags; 910 break; 911 912 case TIOCSFLAGS: 913 err = suser(p->p_ucred, &p->p_acflag); 914 if (err) { 915 break; 916 } 917 sc->sc_chip->sc_swflags = *(int *)data; 918 break; 919 920 } 921 922 splx(s); 923 924 return err; 925 } 926 927 void 928 txcomstop(tp, flag) 929 struct tty *tp; 930 int flag; 931 { 932 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 933 int s; 934 935 s = spltty(); 936 937 if (ISSET(tp->t_state, TS_BUSY)) { 938 /* Stop transmitting at the next chunk. */ 939 sc->sc_tbc = 0; 940 sc->sc_heldtbc = 0; 941 if (!ISSET(tp->t_state, TS_TTSTOP)) 942 SET(tp->t_state, TS_FLUSH); 943 } 944 945 splx(s); 946 } 947 948 void 949 txcomstart(tp) 950 struct tty *tp; 951 { 952 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 953 struct txcom_chip *chip = sc->sc_chip; 954 tx_chipset_tag_t tc = chip->sc_tc; 955 int slot = chip->sc_slot; 956 int s; 957 958 s = spltty(); 959 960 if (!__txcom_txbufready(chip, 0) || 961 ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 962 goto out; 963 964 if (tp->t_outq.c_cc <= tp->t_lowat) { 965 if (ISSET(tp->t_state, TS_ASLEEP)) { 966 CLR(tp->t_state, TS_ASLEEP); 967 wakeup(&tp->t_outq); 968 } 969 selwakeup(&tp->t_wsel); 970 if (tp->t_outq.c_cc == 0) 971 goto out; 972 } 973 974 sc->sc_tba = tp->t_outq.c_cf; 975 sc->sc_tbc = ndqb(&tp->t_outq, 0); 976 SET(tp->t_state, TS_BUSY); 977 978 /* Output the first character of the contiguous buffer. */ 979 tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot), 980 (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK)); 981 982 sc->sc_tbc--; 983 sc->sc_tba++; 984 985 out: 986 splx(s); 987 } 988 989 /* 990 * Set TXcom tty parameters from termios. 991 */ 992 int 993 txcomparam(tp, t) 994 struct tty *tp; 995 struct termios *t; 996 { 997 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 998 struct txcom_chip *chip; 999 int ospeed; 1000 int s; 1001 1002 if (!sc) 1003 return ENXIO; 1004 1005 ospeed = t->c_ospeed; 1006 1007 /* Check requested parameters. */ 1008 if (ospeed < 0) { 1009 return EINVAL; 1010 } 1011 if (t->c_ispeed && t->c_ispeed != ospeed) { 1012 return EINVAL; 1013 } 1014 1015 s = spltty(); 1016 chip = sc->sc_chip; 1017 /* 1018 * For the console, always force CLOCAL and !HUPCL, so that the port 1019 * is always active. 1020 */ 1021 if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) || 1022 ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 1023 SET(t->c_cflag, CLOCAL); 1024 CLR(t->c_cflag, HUPCL); 1025 } 1026 splx(s); 1027 1028 /* 1029 * Only whack the UART when params change. 1030 * Some callers need to clear tp->t_ospeed 1031 * to make sure initialization gets done. 1032 */ 1033 if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) { 1034 return 0; 1035 } 1036 1037 s = spltty(); 1038 chip = sc->sc_chip; 1039 chip->sc_speed = ospeed; 1040 chip->sc_cflag = t->c_cflag; 1041 1042 txcom_setmode(chip); 1043 txcom_setbaudrate(chip); 1044 1045 /* And copy to tty. */ 1046 tp->t_ispeed = 0; 1047 tp->t_ospeed = chip->sc_speed; 1048 tp->t_cflag = chip->sc_cflag; 1049 1050 /* 1051 * If hardware flow control is disabled, unblock any hard flow 1052 * control state. 1053 */ 1054 if (!ISSET(chip->sc_cflag, CHWFLOW)) { 1055 txcomstart(tp); 1056 } 1057 1058 splx(s); 1059 1060 return 0; 1061 } 1062
Indexes created Thu Oct 30 23:09:54 GMT 2025