bcu_vrip.c revision 1.11
1 /* $NetBSD: bcu_vrip.c,v 1.11 2001/09/07 16:06:03 sato Exp $ */ 2 3 /*- 4 * Copyright (c) 1999-2001 SATO Kazumi. All rights reserved. 5 * Copyright (c) 1999 PocketBSD Project. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by the PocketBSD project 18 * and its contributors. 19 * 4. Neither the name of the project nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 */ 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/device.h> 40 #include <sys/reboot.h> 41 42 #include <machine/bus.h> 43 44 #include <mips/cpuregs.h> 45 46 #include "opt_vr41xx.h" 47 #include <hpcmips/vr/vr.h> 48 #include <hpcmips/vr/vrcpudef.h> 49 #include <hpcmips/vr/vripvar.h> 50 #include <hpcmips/vr/vripreg.h> 51 #include <hpcmips/vr/bcureg.h> 52 #include <hpcmips/vr/bcuvar.h> 53 54 static int vrbcu_match __P((struct device *, struct cfdata *, void *)); 55 static void vrbcu_attach __P((struct device *, struct device *, void *)); 56 57 static void vrbcu_write __P((struct vrbcu_softc *, int, unsigned short)); 58 static unsigned short vrbcu_read __P((struct vrbcu_softc *, int)); 59 60 static void vrbcu_dump_regs __P((void)); 61 62 char *vr_cpuname=NULL; 63 int vr_major=-1; 64 int vr_minor=-1; 65 int vr_cpuid=-1; 66 67 struct cfattach vrbcu_ca = { 68 sizeof(struct vrbcu_softc), vrbcu_match, vrbcu_attach 69 }; 70 71 struct vrbcu_softc *the_bcu_sc = NULL; 72 73 static inline void 74 vrbcu_write(sc, port, val) 75 struct vrbcu_softc *sc; 76 int port; 77 unsigned short val; 78 { 79 bus_space_write_2(sc->sc_iot, sc->sc_ioh, port, val); 80 } 81 82 static inline unsigned short 83 vrbcu_read(sc, port) 84 struct vrbcu_softc *sc; 85 int port; 86 { 87 return bus_space_read_2(sc->sc_iot, sc->sc_ioh, port); 88 } 89 90 static int 91 vrbcu_match(parent, cf, aux) 92 struct device *parent; 93 struct cfdata *cf; 94 void *aux; 95 { 96 return 2; 97 } 98 99 static void 100 vrbcu_attach(parent, self, aux) 101 struct device *parent; 102 struct device *self; 103 void *aux; 104 { 105 struct vrip_attach_args *va = aux; 106 struct vrbcu_softc *sc = (struct vrbcu_softc *)self; 107 108 sc->sc_iot = va->va_iot; 109 bus_space_map(sc->sc_iot, va->va_addr, va->va_size, 110 0, /* no flags */ 111 &sc->sc_ioh); 112 113 printf("\n"); 114 the_bcu_sc = sc; 115 vrbcu_dump_regs(); 116 } 117 118 static void 119 vrbcu_dump_regs() 120 { 121 struct vrbcu_softc *sc = the_bcu_sc; 122 int cpuclock = 0, tclock = 0, vtclock = 0, cpuid; 123 #if !defined(ONLY_VR4102) 124 int spdreg; 125 #endif 126 #ifdef VRBCUDEBUG 127 int reg; 128 #endif /* VRBCUDEBUG */ 129 130 cpuid = vrbcu_vrip_getcpuid(); 131 #if !defined(ONLY_VR4181) && !defined(ONLY_VR4102) 132 if (cpuid != BCUREVID_FIXRID_4181 133 && cpuid <= BCUREVID_RID_4131 134 && cpuid >= BCUREVID_RID_4111) { 135 spdreg = vrbcu_read(sc, BCUCLKSPEED_REG_W); 136 #ifdef VRBCUDEBUG 137 printf("vrbcu: CLKSPEED %x: \n", spdreg); 138 #endif /* VRBCUDEBUG */ 139 } 140 #endif 141 #if defined VR4181 142 if (cpuid == BCUREVID_FIXRID_4181){ 143 spdreg = vrbcu_read(sc, BCU81CLKSPEED_REG_W); 144 #ifdef VRBCUDEBUG 145 printf("vrbcu: CLKSPEED %x: \n", spdreg); 146 #endif /* VRBCUDEBUG */ 147 } 148 #endif 149 150 cpuclock = vrbcu_vrip_getcpuclock(); 151 152 switch (cpuid) { 153 #if defined VR4181 154 case BCUREVID_FIXRID_4181: 155 switch ((spdreg&BCU81CLKSPEED_DIVTMASK)>>BCU81CLKSPEED_DIVTSHFT){ 156 case BCU81CLKSPEED_DIVT1: 157 vtclock = tclock = cpuclock; 158 break; 159 case BCU81CLKSPEED_DIVT2: 160 vtclock = tclock = cpuclock/2; 161 break; 162 case BCU81CLKSPEED_DIVT3: 163 vtclock = tclock = cpuclock/3; 164 break; 165 case BCU81CLKSPEED_DIVT4: 166 vtclock = tclock = cpuclock/4; 167 break; 168 default: 169 vtclock = tclock = 0; 170 } 171 break; 172 #endif /* VR4181 */ 173 case BCUREVID_RID_4101: 174 case BCUREVID_RID_4102: 175 vtclock = tclock = cpuclock/2; 176 break; 177 #if defined VR4111 178 case BCUREVID_RID_4111: 179 if ((spdreg&BCUCLKSPEED_DIVT2B) == 0) 180 vtclock = tclock = cpuclock/2; 181 else if ((spdreg&BCUCLKSPEED_DIVT3B) == 0) 182 vtclock = tclock = cpuclock/3; 183 else if ((spdreg&BCUCLKSPEED_DIVT4B) == 0) 184 vtclock = tclock = cpuclock/4; 185 else 186 vtclock = tclock = 0; /* XXX */ 187 break; 188 #endif /* VR4111 */ 189 #if defined VR4121 190 case BCUREVID_RID_4121: 191 { 192 int vt; 193 tclock = cpuclock / ((spdreg&BCUCLKSPEED_DIVTMASK)>>BCUCLKSPEED_DIVTSHFT); 194 vt = ((spdreg&BCUCLKSPEED_DIVVTMASK)>>BCUCLKSPEED_DIVVTSHFT); 195 if (vt == 0) 196 vtclock = 0; /* XXX */ 197 else if (vt < 0x9) 198 vtclock = cpuclock / vt; 199 else 200 vtclock = cpuclock / ((vt - 8)*2+1) * 2; 201 } 202 break; 203 #endif /* VR4121 */ 204 #if defined VR4122 || defined VR4131 205 case BCUREVID_RID_4122: 206 case BCUREVID_RID_4131: 207 { 208 int vtdiv; 209 210 vtdiv = ((spdreg & BCUCLKSPEED_VTDIVMODE) >> 211 BCUCLKSPEED_VTDIVSHFT); 212 if (vtdiv == 0 || vtdiv > BCUCLKSPEED_VTDIV6) 213 vtclock = 0; /* XXX */ 214 else 215 vtclock = cpuclock / vtdiv; 216 tclock = vtclock / 217 (((spdreg & BCUCLKSPEED_TDIVMODE) >> 218 BCUCLKSPEED_TDIVSHFT) ? 4 : 2); 219 } 220 break; 221 #endif /* VR4122 || VR4131 */ 222 default: 223 break; 224 } 225 if (tclock) 226 printf("%s: cpu %d.%03dMHz, bus %d.%03dMHz, ram %d.%03dMHz\n", 227 sc->sc_dev.dv_xname, 228 cpuclock/1000000, (cpuclock%1000000)/1000, 229 tclock/1000000, (tclock%1000000)/1000, 230 vtclock/1000000, (vtclock%1000000)/1000); 231 else { 232 printf("%s: cpu %d.%03dMHz\n", 233 sc->sc_dev.dv_xname, 234 cpuclock/1000000, (cpuclock%1000000)/1000); 235 printf("%s: UNKNOWN BUS CLOCK SPEED: CPU is UNKNOWN or NOT CONFIGURED\n", 236 sc->sc_dev.dv_xname); 237 } 238 #ifdef VRBCUDEBUG 239 reg = vrbcu_read(sc, BCUCNT1_REG_W); 240 printf("vrbcu: CNT1 %x: ", reg); 241 bitdisp16(reg); 242 #if !defined(ONLY_VR4181) 243 if (cpuid != BCUREVID_FIXRID_4181 244 && cpuid <= BCUREVID_RID_4121 245 && cpuid >= BCUREVID_RID_4102) { 246 reg = vrbcu_read(sc, BCUCNT2_REG_W); 247 printf("vrbcu: CNT2 %x: ", reg); 248 bitdisp16(reg); 249 } 250 #endif /* !defined ONLY_VR4181 */ 251 #if !defined(ONLY_VR4181) || !defined(ONLY_VR4122_4131) 252 if (cpuid != BCUREVID_FIXRID_4181 253 && cpuid <= BCUREVID_RID_4121 254 && cpuid >= BCUREVID_RID_4102) { 255 reg = vrbcu_read(sc, BCUSPEED_REG_W); 256 printf("vrbcu: SPEED %x: ", reg); 257 bitdisp16(reg); 258 reg = vrbcu_read(sc, BCUERRST_REG_W); 259 printf("vrbcu: ERRST %x: ", reg); 260 bitdisp16(reg); 261 reg = vrbcu_read(sc, BCURFCNT_REG_W); 262 printf("vrbcu: RFCNT %x\n", reg); 263 reg = vrbcu_read(sc, BCUREFCOUNT_REG_W); 264 printf("vrbcu: RFCOUNT %x\n", reg); 265 } 266 #endif /* !defined(ONLY_VR4181) || !defined(ONLY_VR4122_4131) */ 267 #if !defined(ONLY_VR4181) 268 if (cpuid != BCUREVID_FIXRID_4181 269 && cpuid <= BCUREVID_RID_4131 270 && cpuid >= BCUREVID_RID_4111) 271 { 272 reg = vrbcu_read(sc, BCUCNT3_REG_W); 273 printf("vrbcu: CNT3 %x: ", reg); 274 bitdisp16(reg); 275 } 276 #endif /* !defined ONLY_VR4181 */ 277 #endif /* VRBCUDEBUG */ 278 279 } 280 281 static char *cpuname[] = { 282 "VR4101", /* 0 */ 283 "VR4102", /* 1 */ 284 "VR4111", /* 2 */ 285 "VR4121", /* 3 */ 286 "VR4122", /* 4 */ 287 "VR4131", /* 5 */ 288 "UNKNOWN", 289 "UNKNOWN", 290 "UNKNOWN", 291 "UNKNOWN", 292 "UNKNOWN", 293 "UNKNOWN", 294 "UNKNOWN", 295 "UNKNOWN", 296 "UNKNOWN", 297 "UNKNOWN", 298 "VR4181", /* 0x10 + 0 */ 299 }; 300 301 int 302 vrbcu_vrip_getcpuid(void) 303 { 304 volatile u_int16_t *revreg; 305 306 if (vr_cpuid != -1) 307 return vr_cpuid; 308 309 if (vr_cpuid == -1) { 310 if (VRIP_BCU_ADDR == VR4181_BCU_ADDR) 311 revreg = (u_int16_t *)MIPS_PHYS_TO_KSEG1((VRIP_BCU_ADDR+BCU81REVID_REG_W)); 312 else 313 revreg = (u_int16_t *)MIPS_PHYS_TO_KSEG1((VRIP_BCU_ADDR+BCUREVID_REG_W)); 314 315 vr_cpuid = *revreg; 316 vr_cpuid = (vr_cpuid&BCUREVID_RIDMASK)>>BCUREVID_RIDSHFT; 317 if (VRIP_BCU_ADDR == VR4181_BCU_ADDR 318 && vr_cpuid == BCUREVID_RID_4181) /* conflict vr4101 */ 319 vr_cpuid = BCUREVID_FIXRID_4181; 320 } 321 return vr_cpuid; 322 } 323 324 char * 325 vrbcu_vrip_getcpuname(void) 326 { 327 int cpuid; 328 329 if (vr_cpuname != NULL) 330 return vr_cpuname; 331 332 cpuid = vrbcu_vrip_getcpuid(); 333 vr_cpuname = cpuname[cpuid]; 334 return vr_cpuname; 335 } 336 337 338 int 339 vrbcu_vrip_getcpumajor(void) 340 { 341 volatile u_int16_t *revreg; 342 343 if (vr_major != -1) 344 return vr_major; 345 346 revreg = (u_int16_t *)MIPS_PHYS_TO_KSEG1((VRIP_BCU_ADDR+BCUREVID_REG_W)); 347 348 vr_major = *revreg; 349 vr_major = (vr_major&BCUREVID_MJREVMASK)>>BCUREVID_MJREVSHFT; 350 return vr_major; 351 } 352 353 int 354 vrbcu_vrip_getcpuminor(void) 355 { 356 volatile u_int16_t *revreg; 357 358 if (vr_minor != -1) 359 return vr_minor; 360 361 revreg = (u_int16_t *)MIPS_PHYS_TO_KSEG1((VRIP_BCU_ADDR+BCUREVID_REG_W)); 362 363 vr_minor = *revreg; 364 vr_minor = (vr_minor&BCUREVID_MNREVMASK)>>BCUREVID_MNREVSHFT; 365 return vr_minor; 366 } 367 368 #define CLKX 18432000 /* CLKX1,CLKX2: 18.432MHz */ 369 #define MHZ 1000000 370 371 int 372 vrbcu_vrip_getcpuclock(void) 373 { 374 u_int16_t clksp; 375 int cpuid, cpuclock; 376 377 cpuid = vrbcu_vrip_getcpuid(); 378 if (cpuid != BCUREVID_FIXRID_4181 && cpuid >= BCUREVID_RID_4111) { 379 clksp = *(u_int16_t *)MIPS_PHYS_TO_KSEG1((VRIP_BCU_ADDR+BCUCLKSPEED_REG_W)) & BCUCLKSPEED_CLKSPMASK; 380 } else if (cpuid == BCUREVID_FIXRID_4181) { 381 clksp = *(u_int16_t *)MIPS_PHYS_TO_KSEG1((VRIP_BCU_ADDR+BCU81CLKSPEED_REG_W)) & BCUCLKSPEED_CLKSPMASK; 382 } 383 384 switch (cpuid) { 385 case BCUREVID_FIXRID_4181: 386 cpuclock = CLKX / clksp * 64; 387 /* branch delay is 1 clock; 2 clock/loop */ 388 cpuspeed = (cpuclock / 2 + MHZ / 2) / MHZ; 389 break; 390 case BCUREVID_RID_4101: 391 /* assume 33MHz */ 392 cpuclock = 33000000; 393 /* branch delay is 1 clock; 2 clock/loop */ 394 cpuspeed = (cpuclock / 2 + MHZ / 2) / MHZ; 395 break; 396 case BCUREVID_RID_4102: 397 cpuclock = CLKX / clksp * 32; 398 /* branch delay is 1 clock; 2 clock/loop */ 399 cpuspeed = (cpuclock / 2 + MHZ / 2) / MHZ; 400 break; 401 case BCUREVID_RID_4111: 402 cpuclock = CLKX / clksp * 64; 403 /* branch delay is 1 clock; 2 clock/loop */ 404 cpuspeed = (cpuclock / 2 + MHZ / 2) / MHZ; 405 break; 406 case BCUREVID_RID_4121: 407 cpuclock = CLKX / clksp * 64; 408 /* branch delay is 2 clock; 3 clock/loop */ 409 cpuspeed = (cpuclock / 3 + MHZ / 2) / MHZ; 410 break; 411 case BCUREVID_RID_4122: 412 cpuclock = CLKX / clksp * 98; 413 /* branch delay is 2 clock; 3 clock/loop */ 414 cpuspeed = (cpuclock / 3 + MHZ / 2) / MHZ; 415 break; 416 case BCUREVID_RID_4131: 417 cpuclock = CLKX / clksp * 98; 418 /* branch delay is 2 clock; 3 clock/loop */ 419 cpuspeed = (cpuclock / 3 + MHZ / 2) / MHZ; 420 break; 421 default: 422 panic("unknown CPU type %d\n", cpuid); 423 break; 424 } 425 return cpuclock; 426 } 427
Indexes created Tue Sep 30 06:09:59 GMT 2025