1 1.2 martin /* $NetBSD: cfireg.h,v 1.2 2008/04/28 20:23:22 martin Exp $ */ 2 1.1 igy 3 1.1 igy /* 4 1.1 igy * Copyright (c) 2002 The NetBSD Foundation, Inc. 5 1.1 igy * All rights reserved. 6 1.1 igy * 7 1.1 igy * This code is derived from software contributed to The NetBSD Foundation 8 1.1 igy * by Naoto Shimazaki of YOKOGAWA Electric Corporation. 9 1.1 igy * 10 1.1 igy * Redistribution and use in source and binary forms, with or without 11 1.1 igy * modification, are permitted provided that the following conditions 12 1.1 igy * are met: 13 1.1 igy * 1. Redistributions of source code must retain the above copyright 14 1.1 igy * notice, this list of conditions and the following disclaimer. 15 1.1 igy * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 igy * notice, this list of conditions and the following disclaimer in the 17 1.1 igy * documentation and/or other materials provided with the distribution. 18 1.1 igy * 19 1.1 igy * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.1 igy * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1 igy * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.1 igy * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.1 igy * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1 igy * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1 igy * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1 igy * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1 igy * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1 igy * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1 igy * POSSIBILITY OF SUCH DAMAGE. 30 1.1 igy */ 31 1.1 igy 32 1.1 igy /* 33 1.1 igy * Common Flash Interface 34 1.1 igy */ 35 1.1 igy 36 1.1 igy #define CFI_TOTAL_SIZE 0x50 37 1.1 igy 38 1.1 igy #define CFI_READ_CFI_QUERY 0x98 39 1.1 igy #define CFI_QUERY_OFFSET 0xaa /* AMD/Fujitu needs this */ 40 1.1 igy 41 1.1 igy #define CFI_MANUFACT_REG 0x00 42 1.1 igy #define CFI_DEVCODE_REG 0x01 43 1.1 igy #define CFI_BLOCK_STAT_REG 0x02 44 1.1 igy #define CFI_QUERY_ID_STR_REG 0x10 45 1.1 igy #define CFI_QUERY_ID_STR "QRY" 46 1.1 igy #define CFI_QUERY_ID_STR0 'Q' 47 1.1 igy #define CFI_QUERY_ID_STR1 'R' 48 1.1 igy #define CFI_QUERY_ID_STR2 'Y' 49 1.1 igy #define CFI_PRIM_COMM_REG0 0x13 50 1.1 igy #define CFI_PRIM_COMM_REG1 0x14 51 1.1 igy #define CFI_PRIM_EXT_TBL_REG0 0x15 52 1.1 igy #define CFI_PRIM_EXT_TBL_REG1 0x16 53 1.1 igy #define CFI_ALT_COMM_REG0 0x17 54 1.1 igy #define CFI_ALT_COMM_REG1 0x18 55 1.1 igy #define CFI_ALT_EXT_TBL_REG0 0x19 56 1.1 igy #define CFI_ALT_EXT_TBL_REG1 0x1a 57 1.1 igy #define CFI_VCC_MIN_REG 0x1b 58 1.1 igy #define CFI_VCC_MAX_REG 0x1c 59 1.1 igy #define CFI_VPP_MIN_REG 0x1d 60 1.1 igy #define CFI_VPP_MAX_REG 0x1e 61 1.1 igy #define CFI_TYP_WORD_PROG_REG 0x1f 62 1.1 igy #define CFI_TYP_BUF_WRITE_REG 0x20 63 1.1 igy #define CFI_TYP_BLOCK_ERASE_REG 0x21 64 1.1 igy #define CFI_TYP_CHIP_ERASE_REG 0x22 65 1.1 igy #define CFI_MAX_WORD_PROG_REG 0x23 66 1.1 igy #define CFI_MAX_BUF_WRITE_REG 0x24 67 1.1 igy #define CFI_MAX_BLOCK_ERASE_REG 0x25 68 1.1 igy #define CFI_MAX_CHIP_ERASE_REG 0x26 69 1.1 igy #define CFI_DEVICE_SIZE_REG 0x27 70 1.1 igy #define CFI_DEVICE_IF_REG0 0x28 71 1.1 igy #define CFI_DEVICE_IF_REG1 0x29 72 1.1 igy #define CFI_MAX_WBUF_SIZE_REG0 0x2a 73 1.1 igy #define CFI_MAX_WBUF_SIZE_REG1 0x2b 74 1.1 igy #define CFI_NUM_ERASE_BLK_REG 0x2c 75 1.1 igy 76 1.1 igy #define CFI_EBLK1_INFO_REG 0x2d 77 1.1 igy #define CFI_EBLK_INFO_SIZE 4 78 1.1 igy #define CFI_EBLK_INFO_NSECT0 0x00 79 1.1 igy #define CFI_EBLK_INFO_NSECT1 0x01 80 1.1 igy #define CFI_EBLK_INFO_SECSIZE0 0x02 81 1.1 igy #define CFI_EBLK_INFO_SECSIZE1 0x03 82 1.1 igy 83 1.1 igy #define CFI_EBLK1_INFO_REG0 0x2d 84 1.1 igy #define CFI_EBLK1_INFO_REG1 0x2e 85 1.1 igy #define CFI_EBLK1_INFO_REG2 0x2f 86 1.1 igy #define CFI_EBLK1_INFO_REG3 0x30 87 1.1 igy #define CFI_EBLK2_INFO_REG0 0x31 88 1.1 igy #define CFI_EBLK2_INFO_REG1 0x32 89 1.1 igy #define CFI_EBLK2_INFO_REG2 0x33 90 1.1 igy #define CFI_EBLK2_INFO_REG3 0x34 91 1.1 igy #define CFI_EBLK3_INFO_REG0 0x35 92 1.1 igy #define CFI_EBLK3_INFO_REG1 0x36 93 1.1 igy #define CFI_EBLK3_INFO_REG2 0x37 94 1.1 igy #define CFI_EBLK3_INFO_REG3 0x38 95 1.1 igy #define CFI_EBLK4_INFO_REG0 0x39 96 1.1 igy #define CFI_EBLK4_INFO_REG1 0x3a 97 1.1 igy #define CFI_EBLK4_INFO_REG2 0x3b 98 1.1 igy #define CFI_EBLK4_INFO_REG3 0x3c 99 1.1 igy 100 1.1 igy 101 1.1 igy #define CFI_COMMSET_INTEL0 0x01 102 1.1 igy #define CFI_COMMSET_INTEL1 0x00 103 1.1 igy #define CFI_COMMSET_AMDFJITU0 0x02 104 1.1 igy #define CFI_COMMSET_AMDFJITU1 0x00 105