flashreg.h revision 1.1 1 /* $NetBSD: flashreg.h,v 1.1 2003/05/01 07:02:04 igy Exp $ */
2
3 /*
4 * Copyright (c) 2002 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Naoto Shimazaki of YOKOGAWA Electric Corporation.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * Intel 28F128 Flash Memory registers
41 */
42
43 #define I28F128_BLOCK_SIZE 0x20000 /* 128Kbyte */
44 #define I28F128_BLOCK_MASK 0x1ffff /* 128Kbyte */
45
46 #define I28F128_MANUFACT 0x89
47 #define I28F128_DEVCODE 0x18
48 #define I28F128_PRIM_COMM0 0x01
49 #define I28F128_PRIM_COMM1 0x00
50 #define I28F128_PRIM_EXT_TBL0 0x31
51 #define I28F128_PRIM_EXT_TBL1 0x00
52
53 #define I28F128_RESET 0xff
54 #define I28F128_READ_ARRAY I28F128_RESET
55 #define I28F128_READ_ID 0x90
56 #define I28F128_READ_STATUS 0x70
57 #define I28F128_CLEAR_STATUS 0x50
58
59 #define I28F128_BLK_ERASE_1ST 0x20
60 #define I28F128_BLK_ERASE_2ND 0xd0
61 #define I28F128_WORDBYTE_PROG 0x40
62 #define I28F128_WRITE_BUFFER 0xe8
63 #define I28F128_WBUF_CONFIRM 0xd0
64
65 #define I28F128_S_READY 0x80
66 #define I28F128_S_ERASE_SUSPEND 0x40
67 #define I28F128_S_COMSEQ_ERROR 0x30
68 #define I28F128_S_ERASE_ERROR 0x20
69 #define I28F128_S_PROG_ERROR 0x10
70 #define I28F128_S_LOW_VOLTAGE 0x08
71 #define I28F128_S_PROG_SUSPEND 0x04
72 #define I28F128_S_BLOCK_LOCKED 0x02
73
74 #define I28F128_XS_BUF_AVAIL 0x80
75
76 #define I28F128_BUFFER_SIZE 0x20
77
78 #define I28F128_BLOCK_ERASE_TIME 1000000 /* usec */
79 #define I28F128_WRITE_BUFFER_TIMEOUT 800 /* usec */
80 #define I28F128_WRITE_WORD_TIMEOUT 800 /* usec */
81
82
83 #define MBM29LV160_MANUFACT 0x04
84 #define MBM29LV160TE_DEVCODE 0x22c4
85 #define MBM29LV160BE_DEVCODE 0x2249
86
87 #define MBM29LV160_SUBSECT_MASK 0x000f8000
88 #define MBM29LV160TE_SUBSECT_ADDR 0x000f8000
89 #define MBM29LV160BE_SUBSECT_ADDR 0x00000000
90
91 #define MBM29LV160_COMM_ADDR0 (0x555 << 1)
92 #define MBM29LV160_COMM_ADDR1 (0x2aa << 1)
93 #define MBM29LV160_COMM_ADDR2 (0x555 << 1)
94 #define MBM29LV160_COMM_ADDR3 (0x555 << 1)
95 #define MBM29LV160_COMM_ADDR4 (0x2aa << 1)
96 #define MBM29LV160_COMM_ADDR5 (0x555 << 1)
97
98 #define MBM29LV160_COMM_CMD0 0xaa
99 #define MBM29LV160_COMM_CMD1 0x55
100
101 #define MBM29LV160_SIGN_CMD2 0x90
102 #define MBM29LV160_PROG_CMD2 0xa0
103 #define MBM29LV160_ESECT_CMD2 0x80
104 #define MBM29LV160_ESECT_CMD3 0xaa
105 #define MBM29LV160_ESECT_CMD4 0x55
106 #define MBM29LV160_ESECT_CMD5 0x30
107
108 #define MBM29LV160_DEVCODE_REG 0x02
109
110 #define MBM29LV160_SECT_SIZE 0x00010000
111 #define MBM29LV160_SUBSECT_SIZE 0x00002000
112