rtc.c revision 1.2 1 /* $NetBSD: rtc.c,v 1.2 1999/12/07 04:54:54 sato Exp $ */
2
3 /*-
4 * Copyright (c) 1999 Shin Takemura. All rights reserved.
5 * Copyright (c) 1999 SATO Kazumi. All rights reserved.
6 * Copyright (c) 1999 PocketBSD Project. All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by the PocketBSD project
19 * and its contributors.
20 * 4. Neither the name of the project nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 */
37
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/device.h>
41 #include <sys/reboot.h>
42
43 #include <machine/bus.h>
44 #include <machine/clock_machdep.h>
45 #include <machine/cpu.h>
46
47 #include <hpcmips/vr/vr.h>
48 #include <hpcmips/vr/vripvar.h>
49 #include <hpcmips/vr/rtcreg.h>
50 #include <dev/dec/clockvar.h>
51
52 #if 0
53 #define RTCDEBUG /* rtc debugging infomation */
54 #define RTC_HEARTBEAT /* HEARTBEAT print */
55 #define RECALC_CPUSPEED /* cpuspeed recalculaton */
56 #define RECALC_CPUSPEED_DEBUG /* XXX */
57 #endif
58
59
60 struct vrrtc_softc {
61 struct device sc_dev;
62 bus_space_tag_t sc_iot;
63 bus_space_handle_t sc_ioh;
64 void *sc_ih;
65 };
66
67 void clock_init __P((struct device *));
68 void clock_get __P((struct device *, time_t, struct clocktime *));
69 void clock_set __P((struct device *, struct clocktime *));
70
71 static const struct clockfns clockfns = {
72 clock_init, clock_get, clock_set,
73 };
74
75 int vrrtc_match __P((struct device *, struct cfdata *, void *));
76 void vrrtc_attach __P((struct device *, struct device *, void *));
77 int vrrtc_intr __P((void*, u_int32_t, u_int32_t));
78
79 struct cfattach vrrtc_ca = {
80 sizeof(struct vrrtc_softc), vrrtc_match, vrrtc_attach
81 };
82
83 void vrrtc_write __P((struct vrrtc_softc *, int, unsigned short));
84 unsigned short vrrtc_read __P((struct vrrtc_softc *, int));
85 void cvt_timehl_ct __P((u_long, u_long, struct clocktime *));
86 int vrrtc_recalc_cpuspeed __P((struct device *));
87
88
89 extern int rtc_offset;
90
91 int
92 vrrtc_match(parent, cf, aux)
93 struct device *parent;
94 struct cfdata *cf;
95 void *aux;
96 {
97 return(1);
98 }
99
100 inline void
101 vrrtc_write(sc, port, val)
102 struct vrrtc_softc *sc;
103 int port;
104 unsigned short val;
105 {
106 bus_space_write_2(sc->sc_iot, sc->sc_ioh, port, val);
107 }
108
109 inline unsigned short
110 vrrtc_read(sc, port)
111 struct vrrtc_softc *sc;
112 int port;
113 {
114 return bus_space_read_2(sc->sc_iot, sc->sc_ioh, port);
115 }
116
117 void
118 vrrtc_attach(parent, self, aux)
119 struct device *parent;
120 struct device *self;
121 void *aux;
122 {
123 struct vrip_attach_args *va = aux;
124 struct vrrtc_softc *sc = (void*)self;
125
126 sc->sc_iot = va->va_iot;
127 if (bus_space_map(sc->sc_iot, va->va_addr, va->va_size,
128 0 /* no flags */, &sc->sc_ioh)) {
129 printf("vrrtc_attach: can't map i/o space\n");
130 return;
131 }
132 /* RTC interrupt handler is directly dispatched from CPU intr */
133 vr_intr_establish(VR_INTR1, vrrtc_intr, sc);
134 /* But need to set level 1 interupt mask register,
135 * so regsiter fake interrurpt handler
136 */
137 if (!(sc->sc_ih = vrip_intr_establish(va->va_vc, va->va_intr,
138 IPL_CLOCK, 0, 0))) {
139 printf (":can't map interrupt.\n");
140 return;
141 }
142 /*
143 * Rtc is attached to call this routine
144 * before cpu_initclock() calls clock_init().
145 * So we must disable all interrupt for now.
146 */
147 /*
148 * Disable all rtc interrupts
149 */
150 /* Disable Elapse compare intr */
151 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ECMP_H_REG_W, 0);
152 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ECMP_M_REG_W, 0);
153 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ECMP_L_REG_W, 0);
154 /* Disable RTC Long1 intr */
155 bus_space_write_2(sc->sc_iot, sc->sc_ioh, RTCL1_H_REG_W, 0);
156 bus_space_write_2(sc->sc_iot, sc->sc_ioh, RTCL1_L_REG_W, 0);
157 /* Disable RTC Long2 intr */
158 bus_space_write_2(sc->sc_iot, sc->sc_ioh, RTCL2_H_REG_W, 0);
159 bus_space_write_2(sc->sc_iot, sc->sc_ioh, RTCL2_L_REG_W, 0);
160 /* Disable RTC TCLK intr */
161 bus_space_write_2(sc->sc_iot, sc->sc_ioh, TCLK_H_REG_W, 0);
162 bus_space_write_2(sc->sc_iot, sc->sc_ioh, TCLK_L_REG_W, 0);
163 /*
164 * Clear all rtc intrrupts.
165 */
166 bus_space_write_2(sc->sc_iot, sc->sc_ioh, RTCINT_REG_W, RTCINT_ALL);
167
168 clockattach(&sc->sc_dev, &clockfns);
169 }
170
171 int
172 vrrtc_intr(arg, pc, statusReg)
173 void *arg;
174 u_int32_t pc;
175 u_int32_t statusReg;
176 {
177 struct vrrtc_softc *sc = arg;
178 struct clockframe cf;
179
180 bus_space_write_2(sc->sc_iot, sc->sc_ioh, RTCINT_REG_W, RTCINT_ALL);
181 cf.pc = pc;
182 cf.sr = statusReg;
183 hardclock(&cf);
184 intrcnt[HARDCLOCK]++;
185
186 #ifdef RTC_HEARTBEAT
187 if ((intrcnt[HARDCLOCK] % (CLOCK_RATE * 5)) == 0) {
188 struct clocktime ct;
189 clock_get((struct device *)sc, NULL, &ct);
190 printf("%s(%d): rtc_intr: %2d.%2d.%2d %02d:%02d:%02d\n",
191 __FILE__, __LINE__,
192 ct.year, ct.mon, ct.day,
193 ct.hour, ct.min, ct.sec);
194 }
195 #endif
196 return 0;
197 }
198
199
200 int
201 vrrtc_recalc_cpuspeed(dev)
202 struct device *dev;
203 {
204 struct vrrtc_softc *sc = (struct vrrtc_softc *)dev;
205 u_long otimeh;
206 u_long otimel;
207 u_long timeh;
208 u_long timel;
209
210 otimeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ETIME_H_REG_W);
211 otimel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ETIME_M_REG_W);
212 otimel = (otimel << 16)
213 | bus_space_read_2(sc->sc_iot, sc->sc_ioh, ETIME_L_REG_W);
214
215 #define MSEC 1000
216 /* wait 1msec */
217 DELAY(MSEC);
218
219 timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ETIME_H_REG_W);
220 timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ETIME_M_REG_W);
221 timel = (timel << 16)
222 | bus_space_read_2(sc->sc_iot, sc->sc_ioh, ETIME_L_REG_W);
223
224 if (timeh-otimeh > 0){
225 /* cpuspeed is too large (> 2 sec)*/
226 cpuspeed = cpuspeed/((timeh-otimeh)*2*MSEC);
227 cpuspeed +=1;
228 return 0;
229 }
230 if (timel-otimel < (ETIME_L_HZ/MSEC/10)) {
231 /* cpuspeed is too small (< 0.1msec) */
232 cpuspeed *=10;
233 return -1;
234 }
235 cpuspeed = cpuspeed * (ETIME_L_HZ/MSEC) / (timel-otimel);
236 return 0;
237 }
238
239 void
240 clock_init(dev)
241 struct device *dev;
242 {
243 struct vrrtc_softc *sc = (struct vrrtc_softc *)dev;
244 #ifdef RTCDEBUG
245 int timeh;
246 int timel;
247 #endif /* RTCDEBUG */
248 #ifdef RECALC_CPUSPEED
249 int maxrecalc = 3;
250 #endif /* RECALC_CPUSPEED */
251
252 #ifdef RTCDEBUG
253 timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ETIME_H_REG_W);
254 timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ETIME_M_REG_W);
255 timel = (timel << 16)
256 | bus_space_read_2(sc->sc_iot, sc->sc_ioh, ETIME_L_REG_W);
257 printf("clock_init() Elapse Time %04x%04x\n", timeh, timel);
258
259 timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ECMP_H_REG_W);
260 timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ECMP_M_REG_W);
261 timel = (timel << 16)
262 | bus_space_read_2(sc->sc_iot, sc->sc_ioh, ECMP_L_REG_W);
263 printf("clock_init() Elapse Compare %04x%04x\n", timeh, timel);
264
265 timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, RTCL1_H_REG_W);
266 timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, RTCL1_L_REG_W);
267 printf("clock_init() LONG1 %04x%04x\n", timeh, timel);
268
269 timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, RTCL1_CNT_H_REG_W);
270 timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, RTCL1_CNT_L_REG_W);
271 printf("clock_init() LONG1 CNTL %04x%04x\n", timeh, timel);
272
273 timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, RTCL2_H_REG_W);
274 timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, RTCL2_L_REG_W);
275 printf("clock_init() LONG2 %04x%04x\n", timeh, timel);
276
277 timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, RTCL2_CNT_H_REG_W);
278 timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, RTCL2_CNT_L_REG_W);
279 printf("clock_init() LONG2 CNTL %04x%04x\n", timeh, timel);
280
281 timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, TCLK_H_REG_W);
282 timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, TCLK_L_REG_W);
283 printf("clock_init() TCLK %04x%04x\n", timeh, timel);
284
285 timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, TCLK_CNT_H_REG_W);
286 timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, TCLK_CNT_L_REG_W);
287 printf("clock_init() TCLK CNTL %04x%04x\n", timeh, timel);
288 #endif /* RTCDEBUG */
289 /*
290 * Set tick (CLOCK_RATE)
291 */
292 bus_space_write_2(sc->sc_iot, sc->sc_ioh, RTCL1_H_REG_W, 0);
293 bus_space_write_2(sc->sc_iot, sc->sc_ioh,
294 RTCL1_L_REG_W, RTCL1_L_HZ/CLOCK_RATE);
295
296 #ifdef RECALC_CPUSPEED
297 /* calcurate cpu speed */
298 while (maxrecalc-- > 0 && vrrtc_recalc_cpuspeed(dev))
299 ;
300 #ifdef RECALC_CPUSPEED_DEBUG
301 printf("clock_init() cpuspeed = %d\n", cpuspeed);
302 #endif /* RECALC_CPUSPEED_DEBUG */
303 #endif /* RECALC_CPUSPEED */
304 }
305
306 static int m2d[12] = { 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
307
308 void
309 cvt_timehl_ct(timeh, timel, ct)
310 u_long timeh; /* 2 sec */
311 u_long timel; /* 1/32768 sec */
312 struct clocktime *ct;
313 {
314 u_long year, month, date, hour, min, sec, sec2;
315
316 timeh -= EPOCHOFF;
317
318 timeh += (rtc_offset*SEC2MIN);
319
320 year = EPOCHYEAR;
321 sec2 = LEAPYEAR4(year)?SEC2YR+SEC2DAY:SEC2YR;
322 while (timeh > sec2) {
323 year++;
324 timeh -= sec2;
325 sec2 = LEAPYEAR4(year)?SEC2YR+SEC2DAY:SEC2YR;
326 }
327
328 #ifdef RTCDEBUG
329 printf("cvt_timehl_ct: timeh %08lx year %ld yrref %ld\n",
330 timeh, year, sec2);
331 #endif /* RTCDEBUG */
332
333 month = 0; /* now month is 0..11 */
334 sec2 = SEC2DAY * m2d[month];
335 while (timeh > sec2) {
336 timeh -= sec2;
337 month++;
338 sec2 = SEC2DAY * m2d[month];
339 if (month == 1 && LEAPYEAR4(year)) /* feb. and leapyear */
340 sec2 += SEC2DAY;
341 }
342 month +=1; /* now month is 1..12 */
343
344 #ifdef RTCDEBUG
345 printf("cvt_timehl_ct: timeh %08lx month %ld mref %ld\n",
346 timeh, month, sec2);
347 #endif /* RTCDEBUG */
348
349 sec2 = SEC2DAY;
350 date = timeh/sec2+1; /* date is 1..31 */
351 timeh -= (date-1)*sec2;
352
353 #ifdef RTCDEBUG
354 printf("cvt_timehl_ct: timeh %08lx date %ld dref %ld\n",
355 timeh, date, sec2);
356 #endif /* RTCDEBUG */
357
358 sec2 = SEC2HOUR;
359 hour = timeh/sec2;
360 timeh -= hour*sec2;
361
362 sec2 = SEC2MIN;
363 min = timeh/sec2;
364 timeh -= min*sec2;
365
366 sec = timeh*2 + timel/ETIME_L_HZ;
367
368 #ifdef RTCDEBUG
369 printf("cvt_timehl_ct: hour %ld min %ld sec %ld\n", hour, min, sec);
370 #endif /* RTCDEBUG */
371
372 if (ct) {
373 ct->year = year - YBASE; /* base 1900 */
374 ct->mon = month;
375 ct->day = date;
376 ct->hour = hour;
377 ct->min = min;
378 ct->sec = sec;
379 }
380 }
381
382 void
383 clock_get(dev, base, ct)
384 struct device *dev;
385 time_t base;
386 struct clocktime *ct;
387 {
388
389 struct vrrtc_softc *sc = (struct vrrtc_softc *)dev;
390 u_long timeh; /* elapse time (2*timeh sec) */
391 u_long timel; /* timel/32768 sec */
392
393 timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ETIME_H_REG_W);
394 timeh = (timeh << 16)
395 | bus_space_read_2(sc->sc_iot, sc->sc_ioh, ETIME_M_REG_W);
396 timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ETIME_L_REG_W);
397
398 #ifdef RTCDEBUG
399 printf("clock_get: timeh %08lx timel %08lx\n", timeh, timel);
400 #endif /* RTCDEBUG */
401
402 cvt_timehl_ct(timeh, timel, ct);
403
404 #ifdef RTCDEBUG
405 printf("clock_get: %d/%d/%d/%d/%d/%d\n",
406 ct->year, ct->mon, ct->day, ct->hour, ct->min, ct->sec);
407 #endif /* RTCDEBUG */
408 }
409
410
411 void
412 clock_set(dev, ct)
413 struct device *dev;
414 struct clocktime *ct;
415 {
416 struct vrrtc_softc *sc = (struct vrrtc_softc *)dev;
417 u_long timeh; /* elapse time (2*timeh sec) */
418 u_long timel; /* timel/32768 sec */
419 int year, month, sec2;
420
421 timeh = 0;
422 timel = 0;
423
424 #ifdef RTCDEBUG
425 printf("clock_set: %d/%d/%d/%d/%d/%d\n",
426 ct->year, ct->mon, ct->day, ct->hour, ct->min, ct->sec);
427 #endif /* RTCDEBUG */
428 ct->year += YBASE;
429 #ifdef RTCDEBUG
430 printf("clock_set: %d/%d/%d/%d/%d/%d\n",
431 ct->year, ct->mon, ct->day, ct->hour, ct->min, ct->sec);
432 #endif /* RTCDEBUG */
433 year = EPOCHYEAR;
434 sec2 = LEAPYEAR4(year)?SEC2YR+SEC2DAY:SEC2YR;
435 while (year < ct->year) {
436 year++;
437 timeh += sec2;
438 sec2 = LEAPYEAR4(year)?SEC2YR+SEC2DAY:SEC2YR;
439 }
440 month = 1; /* now month is 1..12 */
441 sec2 = SEC2DAY * m2d[month-1];
442 while (month < ct->mon) {
443 month++;
444 timeh += sec2;
445 sec2 = SEC2DAY * m2d[month-1];
446 if (month == 2 && LEAPYEAR4(year)) /* feb. and leapyear */
447 sec2 += SEC2DAY;
448 }
449
450 timeh += (ct->day - 1)*SEC2DAY;
451
452 timeh += ct->hour*SEC2HOUR;
453
454 timeh += ct->min*SEC2MIN;
455
456 timeh += ct->sec/2;
457 timel += (ct->sec%2)*ETIME_L_HZ;
458
459 timeh += EPOCHOFF;
460 timeh -= (rtc_offset*SEC2MIN);
461
462 #ifdef RTCDEBUG
463 cvt_timehl_ct(timeh, timel, NULL);
464 #endif /* RTCDEBUG */
465
466 bus_space_write_2(sc->sc_iot, sc->sc_ioh,
467 ETIME_H_REG_W, (timeh>>16)&0xffff);
468 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ETIME_M_REG_W, timeh&0xffff);
469 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ETIME_L_REG_W, timel);
470
471 }
472
473