rtc.c revision 1.4
1 /* $NetBSD: rtc.c,v 1.4 2000/03/17 09:54:15 sato Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 Shin Takemura. All rights reserved. 5 * Copyright (c) 1999 SATO Kazumi. All rights reserved. 6 * Copyright (c) 1999 PocketBSD Project. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the PocketBSD project 19 * and its contributors. 20 * 4. Neither the name of the project nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 */ 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/device.h> 41 #include <sys/reboot.h> 42 43 #include <machine/bus.h> 44 #include <machine/clock_machdep.h> 45 #include <machine/cpu.h> 46 47 #include <hpcmips/vr/vr.h> 48 #include <hpcmips/vr/vripvar.h> 49 #include <hpcmips/vr/rtcreg.h> 50 #include <dev/dec/clockvar.h> 51 52 /* 53 * for debugging definitions 54 * VRRTCDEBUG print rtc debugging infomation 55 * VRRTC_HEARTBEAT print HEARTBEAT (too many print...) 56 */ 57 #ifdef VRRTCDEBUG 58 #ifndef VRRTCDEBUG_CONF 59 #define VRRTCDEBUG_CONF 0 60 #endif 61 int vrrtc_debug = VRRTCDEBUG_CONF; 62 #define DPRINTF(arg) if (vrrtc_debug) printf arg; 63 #define DDUMP_REGS(arg) if (vrrtc_debug) vrrtc_dump_regs(arg); 64 #else /* VRRTCDEBUG */ 65 #define DPRINTF(arg) 66 #define DDUMP_REGS(arg) 67 #endif /* VRRTCDEBUG */ 68 69 struct vrrtc_softc { 70 struct device sc_dev; 71 bus_space_tag_t sc_iot; 72 bus_space_handle_t sc_ioh; 73 void *sc_ih; 74 }; 75 76 void clock_init __P((struct device *)); 77 void clock_get __P((struct device *, time_t, struct clocktime *)); 78 void clock_set __P((struct device *, struct clocktime *)); 79 80 static const struct clockfns clockfns = { 81 clock_init, clock_get, clock_set, 82 }; 83 84 int vrrtc_match __P((struct device *, struct cfdata *, void *)); 85 void vrrtc_attach __P((struct device *, struct device *, void *)); 86 int vrrtc_intr __P((void*, u_int32_t, u_int32_t)); 87 void vrrtc_dump_regs __P((struct vrrtc_softc *)); 88 89 struct cfattach vrrtc_ca = { 90 sizeof(struct vrrtc_softc), vrrtc_match, vrrtc_attach 91 }; 92 93 void vrrtc_write __P((struct vrrtc_softc *, int, unsigned short)); 94 unsigned short vrrtc_read __P((struct vrrtc_softc *, int)); 95 void cvt_timehl_ct __P((u_long, u_long, struct clocktime *)); 96 97 extern int rtc_offset; 98 99 int 100 vrrtc_match(parent, cf, aux) 101 struct device *parent; 102 struct cfdata *cf; 103 void *aux; 104 { 105 return(1); 106 } 107 108 inline void 109 vrrtc_write(sc, port, val) 110 struct vrrtc_softc *sc; 111 int port; 112 unsigned short val; 113 { 114 bus_space_write_2(sc->sc_iot, sc->sc_ioh, port, val); 115 } 116 117 inline unsigned short 118 vrrtc_read(sc, port) 119 struct vrrtc_softc *sc; 120 int port; 121 { 122 return bus_space_read_2(sc->sc_iot, sc->sc_ioh, port); 123 } 124 125 void 126 vrrtc_attach(parent, self, aux) 127 struct device *parent; 128 struct device *self; 129 void *aux; 130 { 131 struct vrip_attach_args *va = aux; 132 struct vrrtc_softc *sc = (void*)self; 133 134 sc->sc_iot = va->va_iot; 135 if (bus_space_map(sc->sc_iot, va->va_addr, va->va_size, 136 0 /* no flags */, &sc->sc_ioh)) { 137 printf("vrrtc_attach: can't map i/o space\n"); 138 return; 139 } 140 /* RTC interrupt handler is directly dispatched from CPU intr */ 141 vr_intr_establish(VR_INTR1, vrrtc_intr, sc); 142 /* But need to set level 1 interupt mask register, 143 * so regsiter fake interrurpt handler 144 */ 145 if (!(sc->sc_ih = vrip_intr_establish(va->va_vc, va->va_intr, 146 IPL_CLOCK, 0, 0))) { 147 printf (":can't map interrupt.\n"); 148 return; 149 } 150 /* 151 * Rtc is attached to call this routine 152 * before cpu_initclock() calls clock_init(). 153 * So we must disable all interrupt for now. 154 */ 155 /* 156 * Disable all rtc interrupts 157 */ 158 /* Disable Elapse compare intr */ 159 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ECMP_H_REG_W, 0); 160 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ECMP_M_REG_W, 0); 161 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ECMP_L_REG_W, 0); 162 /* Disable RTC Long1 intr */ 163 bus_space_write_2(sc->sc_iot, sc->sc_ioh, RTCL1_H_REG_W, 0); 164 bus_space_write_2(sc->sc_iot, sc->sc_ioh, RTCL1_L_REG_W, 0); 165 /* Disable RTC Long2 intr */ 166 bus_space_write_2(sc->sc_iot, sc->sc_ioh, RTCL2_H_REG_W, 0); 167 bus_space_write_2(sc->sc_iot, sc->sc_ioh, RTCL2_L_REG_W, 0); 168 /* Disable RTC TCLK intr */ 169 bus_space_write_2(sc->sc_iot, sc->sc_ioh, TCLK_H_REG_W, 0); 170 bus_space_write_2(sc->sc_iot, sc->sc_ioh, TCLK_L_REG_W, 0); 171 /* 172 * Clear all rtc intrrupts. 173 */ 174 bus_space_write_2(sc->sc_iot, sc->sc_ioh, RTCINT_REG_W, RTCINT_ALL); 175 176 clockattach(&sc->sc_dev, &clockfns); 177 } 178 179 int 180 vrrtc_intr(arg, pc, statusReg) 181 void *arg; 182 u_int32_t pc; 183 u_int32_t statusReg; 184 { 185 struct vrrtc_softc *sc = arg; 186 struct clockframe cf; 187 188 bus_space_write_2(sc->sc_iot, sc->sc_ioh, RTCINT_REG_W, RTCINT_ALL); 189 cf.pc = pc; 190 cf.sr = statusReg; 191 hardclock(&cf); 192 intrcnt[HARDCLOCK]++; 193 194 #ifdef VRRTC_HEARTBEAT 195 if ((intrcnt[HARDCLOCK] % (CLOCK_RATE * 5)) == 0) { 196 struct clocktime ct; 197 clock_get((struct device *)sc, NULL, &ct); 198 printf("%s(%d): rtc_intr: %2d.%2d.%2d %02d:%02d:%02d\n", 199 __FILE__, __LINE__, 200 ct.year, ct.mon, ct.day, 201 ct.hour, ct.min, ct.sec); 202 } 203 #endif 204 return 0; 205 } 206 207 void 208 vrrtc_dump_regs(sc) 209 struct vrrtc_softc *sc; 210 { 211 int timeh; 212 int timel; 213 214 timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ETIME_H_REG_W); 215 timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ETIME_M_REG_W); 216 timel = (timel << 16) 217 | bus_space_read_2(sc->sc_iot, sc->sc_ioh, ETIME_L_REG_W); 218 printf("clock_init() Elapse Time %04x%04x\n", timeh, timel); 219 220 timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ECMP_H_REG_W); 221 timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ECMP_M_REG_W); 222 timel = (timel << 16) 223 | bus_space_read_2(sc->sc_iot, sc->sc_ioh, ECMP_L_REG_W); 224 printf("clock_init() Elapse Compare %04x%04x\n", timeh, timel); 225 226 timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, RTCL1_H_REG_W); 227 timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, RTCL1_L_REG_W); 228 printf("clock_init() LONG1 %04x%04x\n", timeh, timel); 229 230 timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, RTCL1_CNT_H_REG_W); 231 timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, RTCL1_CNT_L_REG_W); 232 printf("clock_init() LONG1 CNTL %04x%04x\n", timeh, timel); 233 234 timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, RTCL2_H_REG_W); 235 timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, RTCL2_L_REG_W); 236 printf("clock_init() LONG2 %04x%04x\n", timeh, timel); 237 238 timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, RTCL2_CNT_H_REG_W); 239 timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, RTCL2_CNT_L_REG_W); 240 printf("clock_init() LONG2 CNTL %04x%04x\n", timeh, timel); 241 242 timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, TCLK_H_REG_W); 243 timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, TCLK_L_REG_W); 244 printf("clock_init() TCLK %04x%04x\n", timeh, timel); 245 246 timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, TCLK_CNT_H_REG_W); 247 timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, TCLK_CNT_L_REG_W); 248 printf("clock_init() TCLK CNTL %04x%04x\n", timeh, timel); 249 } 250 251 void 252 clock_init(dev) 253 struct device *dev; 254 { 255 struct vrrtc_softc *sc = (struct vrrtc_softc *)dev; 256 257 DDUMP_REGS(sc); 258 /* 259 * Set tick (CLOCK_RATE) 260 */ 261 bus_space_write_2(sc->sc_iot, sc->sc_ioh, RTCL1_H_REG_W, 0); 262 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 263 RTCL1_L_REG_W, RTCL1_L_HZ/CLOCK_RATE); 264 } 265 266 static int m2d[12] = { 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31}; 267 268 void 269 cvt_timehl_ct(timeh, timel, ct) 270 u_long timeh; /* 2 sec */ 271 u_long timel; /* 1/32768 sec */ 272 struct clocktime *ct; 273 { 274 u_long year, month, date, hour, min, sec, sec2; 275 276 timeh -= EPOCHOFF; 277 278 timeh += (rtc_offset*SEC2MIN); 279 280 year = EPOCHYEAR; 281 sec2 = LEAPYEAR4(year)?SEC2YR+SEC2DAY:SEC2YR; 282 while (timeh > sec2) { 283 year++; 284 timeh -= sec2; 285 sec2 = LEAPYEAR4(year)?SEC2YR+SEC2DAY:SEC2YR; 286 } 287 288 DPRINTF(("cvt_timehl_ct: timeh %08lx year %ld yrref %ld\n", 289 timeh, year, sec2)); 290 291 month = 0; /* now month is 0..11 */ 292 sec2 = SEC2DAY * m2d[month]; 293 while (timeh > sec2) { 294 timeh -= sec2; 295 month++; 296 sec2 = SEC2DAY * m2d[month]; 297 if (month == 1 && LEAPYEAR4(year)) /* feb. and leapyear */ 298 sec2 += SEC2DAY; 299 } 300 month +=1; /* now month is 1..12 */ 301 302 DPRINTF(("cvt_timehl_ct: timeh %08lx month %ld mref %ld\n", 303 timeh, month, sec2)); 304 305 sec2 = SEC2DAY; 306 date = timeh/sec2+1; /* date is 1..31 */ 307 timeh -= (date-1)*sec2; 308 309 DPRINTF(("cvt_timehl_ct: timeh %08lx date %ld dref %ld\n", 310 timeh, date, sec2)); 311 312 sec2 = SEC2HOUR; 313 hour = timeh/sec2; 314 timeh -= hour*sec2; 315 316 sec2 = SEC2MIN; 317 min = timeh/sec2; 318 timeh -= min*sec2; 319 320 sec = timeh*2 + timel/ETIME_L_HZ; 321 322 DPRINTF(("cvt_timehl_ct: hour %ld min %ld sec %ld\n", hour, min, sec)); 323 324 if (ct) { 325 ct->year = year - YBASE; /* base 1900 */ 326 ct->mon = month; 327 ct->day = date; 328 ct->hour = hour; 329 ct->min = min; 330 ct->sec = sec; 331 } 332 } 333 334 void 335 clock_get(dev, base, ct) 336 struct device *dev; 337 time_t base; 338 struct clocktime *ct; 339 { 340 341 struct vrrtc_softc *sc = (struct vrrtc_softc *)dev; 342 u_long timeh; /* elapse time (2*timeh sec) */ 343 u_long timel; /* timel/32768 sec */ 344 345 timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ETIME_H_REG_W); 346 timeh = (timeh << 16) 347 | bus_space_read_2(sc->sc_iot, sc->sc_ioh, ETIME_M_REG_W); 348 timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ETIME_L_REG_W); 349 350 DPRINTF(("clock_get: timeh %08lx timel %08lx\n", timeh, timel)); 351 352 cvt_timehl_ct(timeh, timel, ct); 353 354 DPRINTF(("clock_get: %d/%d/%d/%d/%d/%d\n", 355 ct->year, ct->mon, ct->day, ct->hour, ct->min, ct->sec)); 356 } 357 358 359 void 360 clock_set(dev, ct) 361 struct device *dev; 362 struct clocktime *ct; 363 { 364 struct vrrtc_softc *sc = (struct vrrtc_softc *)dev; 365 u_long timeh; /* elapse time (2*timeh sec) */ 366 u_long timel; /* timel/32768 sec */ 367 int year, month, sec2; 368 369 timeh = 0; 370 timel = 0; 371 372 DPRINTF(("clock_set: %d/%d/%d/%d/%d/%d\n", 373 ct->year, ct->mon, ct->day, ct->hour, ct->min, ct->sec)); 374 375 ct->year += YBASE; 376 377 DPRINTF(("clock_set: %d/%d/%d/%d/%d/%d\n", 378 ct->year, ct->mon, ct->day, ct->hour, ct->min, ct->sec)); 379 380 year = EPOCHYEAR; 381 sec2 = LEAPYEAR4(year)?SEC2YR+SEC2DAY:SEC2YR; 382 while (year < ct->year) { 383 year++; 384 timeh += sec2; 385 sec2 = LEAPYEAR4(year)?SEC2YR+SEC2DAY:SEC2YR; 386 } 387 month = 1; /* now month is 1..12 */ 388 sec2 = SEC2DAY * m2d[month-1]; 389 while (month < ct->mon) { 390 month++; 391 timeh += sec2; 392 sec2 = SEC2DAY * m2d[month-1]; 393 if (month == 2 && LEAPYEAR4(year)) /* feb. and leapyear */ 394 sec2 += SEC2DAY; 395 } 396 397 timeh += (ct->day - 1)*SEC2DAY; 398 399 timeh += ct->hour*SEC2HOUR; 400 401 timeh += ct->min*SEC2MIN; 402 403 timeh += ct->sec/2; 404 timel += (ct->sec%2)*ETIME_L_HZ; 405 406 timeh += EPOCHOFF; 407 timeh -= (rtc_offset*SEC2MIN); 408 409 #ifdef VRRTCDEBUG 410 cvt_timehl_ct(timeh, timel, NULL); 411 #endif /* RTCDEBUG */ 412 413 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 414 ETIME_H_REG_W, (timeh>>16)&0xffff); 415 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ETIME_M_REG_W, timeh&0xffff); 416 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ETIME_L_REG_W, timel); 417 418 } 419 420
Indexes created Tue Sep 30 11:09:46 GMT 2025