vr.c revision 1.13 1 1.13 shin /* $NetBSD: vr.c,v 1.13 2000/02/21 13:46:05 shin Exp $ */
2 1.1 takemura
3 1.1 takemura /*-
4 1.1 takemura * Copyright (c) 1999
5 1.1 takemura * Shin Takemura and PocketBSD Project. All rights reserved.
6 1.1 takemura *
7 1.1 takemura * Redistribution and use in source and binary forms, with or without
8 1.1 takemura * modification, are permitted provided that the following conditions
9 1.1 takemura * are met:
10 1.1 takemura * 1. Redistributions of source code must retain the above copyright
11 1.1 takemura * notice, this list of conditions and the following disclaimer.
12 1.1 takemura * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 takemura * notice, this list of conditions and the following disclaimer in the
14 1.1 takemura * documentation and/or other materials provided with the distribution.
15 1.1 takemura * 3. All advertising materials mentioning features or use of this software
16 1.1 takemura * must display the following acknowledgement:
17 1.1 takemura * This product includes software developed by the PocketBSD project
18 1.1 takemura * and its contributors.
19 1.1 takemura * 4. Neither the name of the project nor the names of its contributors
20 1.1 takemura * may be used to endorse or promote products derived from this software
21 1.1 takemura * without specific prior written permission.
22 1.1 takemura *
23 1.1 takemura * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24 1.1 takemura * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 1.1 takemura * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 1.1 takemura * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27 1.1 takemura * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 1.1 takemura * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 1.1 takemura * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 1.1 takemura * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 1.1 takemura * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 1.1 takemura * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 1.1 takemura * SUCH DAMAGE.
34 1.1 takemura *
35 1.1 takemura */
36 1.1 takemura #include <sys/param.h>
37 1.1 takemura #include <sys/types.h>
38 1.1 takemura #include <sys/systm.h>
39 1.1 takemura #include <sys/device.h>
40 1.5 takemura #include <sys/reboot.h>
41 1.13 shin #include <sys/kcore.h>
42 1.1 takemura
43 1.1 takemura #include <machine/cpu.h>
44 1.1 takemura #include <machine/intr.h>
45 1.1 takemura #include <machine/reg.h>
46 1.1 takemura #include <machine/psl.h>
47 1.1 takemura #include <machine/locore.h>
48 1.1 takemura #include <machine/sysconf.h>
49 1.1 takemura #include <machine/bus.h>
50 1.1 takemura #include <machine/autoconf.h>
51 1.1 takemura
52 1.1 takemura #include <mips/mips_param.h> /* hokey spl()s */
53 1.1 takemura #include <mips/mips/mips_mcclock.h> /* mcclock CPUspeed estimation */
54 1.1 takemura
55 1.1 takemura #include <hpcmips/vr/vr.h>
56 1.11 takemura #include <hpcmips/vr/vr_asm.h>
57 1.3 takemura #include <hpcmips/vr/vripreg.h>
58 1.1 takemura #include <hpcmips/vr/rtcreg.h>
59 1.12 sato #include <hpcmips/hpcmips/machdep.h> /* cpu_name */
60 1.1 takemura #include <machine/bootinfo.h>
61 1.1 takemura
62 1.8 takemura #include "vrip.h"
63 1.8 takemura #if NVRIP > 0
64 1.8 takemura #include <hpcmips/vr/vripvar.h>
65 1.8 takemura #endif
66 1.8 takemura
67 1.9 sato #include "vrbcu.h"
68 1.9 sato #if NVRBCU > 0
69 1.9 sato #include <hpcmips/vr/bcuvar.h>
70 1.9 sato #endif
71 1.9 sato
72 1.5 takemura #include "vrdsu.h"
73 1.5 takemura #if NVRDSU > 0
74 1.5 takemura #include <hpcmips/vr/vrdsuvar.h>
75 1.5 takemura #endif
76 1.5 takemura
77 1.1 takemura #include "com.h"
78 1.1 takemura #if NCOM > 0
79 1.1 takemura #include <sys/termios.h>
80 1.1 takemura #include <sys/ttydefaults.h>
81 1.1 takemura #include <dev/ic/comreg.h>
82 1.1 takemura #include <dev/ic/comvar.h>
83 1.1 takemura #include <hpcmips/vr/siureg.h>
84 1.1 takemura #include <hpcmips/vr/com_vripvar.h>
85 1.1 takemura #ifndef CONSPEED
86 1.1 takemura #define CONSPEED TTYDEF_SPEED
87 1.1 takemura #endif
88 1.1 takemura #endif
89 1.1 takemura
90 1.3 takemura #include "fb.h"
91 1.3 takemura #include "vrkiu.h"
92 1.3 takemura #if NFB > 0 || NVRKIU > 0
93 1.3 takemura #include <dev/rcons/raster.h>
94 1.3 takemura #include <dev/wscons/wsdisplayvar.h>
95 1.3 takemura #endif
96 1.3 takemura
97 1.3 takemura #if NFB > 0
98 1.3 takemura #include <arch/hpcmips/dev/fbvar.h>
99 1.3 takemura #endif
100 1.3 takemura
101 1.3 takemura #if NFB > 0
102 1.3 takemura #include <arch/hpcmips/vr/vrkiuvar.h>
103 1.3 takemura #endif
104 1.3 takemura
105 1.1 takemura void vr_init __P((void));
106 1.1 takemura void vr_os_init __P((void));
107 1.1 takemura void vr_bus_reset __P((void));
108 1.1 takemura int vr_intr __P((u_int32_t mask, u_int32_t pc, u_int32_t statusReg, u_int32_t causeReg));
109 1.1 takemura void vr_cons_init __P((void));
110 1.1 takemura void vr_device_register __P((struct device *, void *));
111 1.4 uch void vr_fb_init __P((caddr_t*));
112 1.13 shin void vr_mem_init __P((paddr_t));
113 1.13 shin void vr_find_dram __P((paddr_t, paddr_t));
114 1.5 takemura void vr_reboot __P((int howto, char *bootstr));
115 1.1 takemura
116 1.1 takemura extern unsigned nullclkread __P((void));
117 1.1 takemura extern unsigned (*clkread) __P((void));
118 1.1 takemura
119 1.1 takemura /*
120 1.1 takemura * CPU interrupt dispatch table (HwInt[0:3])
121 1.1 takemura */
122 1.1 takemura int null_handler __P((void*, u_int32_t, u_int32_t));
123 1.1 takemura static int (*intr_handler[4]) __P((void*, u_int32_t, u_int32_t)) =
124 1.1 takemura {
125 1.1 takemura null_handler,
126 1.1 takemura null_handler,
127 1.1 takemura null_handler,
128 1.1 takemura null_handler
129 1.1 takemura };
130 1.1 takemura static void *intr_arg[4];
131 1.1 takemura
132 1.13 shin extern phys_ram_seg_t mem_clusters[];
133 1.13 shin extern int mem_cluster_cnt;
134 1.13 shin
135 1.1 takemura void
136 1.1 takemura vr_init()
137 1.1 takemura {
138 1.1 takemura /*
139 1.1 takemura * Platform Information.
140 1.1 takemura */
141 1.1 takemura
142 1.1 takemura /*
143 1.1 takemura * Platform Specific Function Hooks
144 1.1 takemura */
145 1.1 takemura platform.os_init = vr_os_init;
146 1.1 takemura platform.bus_reset = vr_bus_reset;
147 1.1 takemura platform.cons_init = vr_cons_init;
148 1.1 takemura platform.device_register = vr_device_register;
149 1.4 uch platform.fb_init = vr_fb_init;
150 1.4 uch platform.mem_init = vr_mem_init;
151 1.5 takemura platform.reboot = vr_reboot;
152 1.1 takemura
153 1.9 sato #if NVRBCU > 0
154 1.12 sato sprintf(cpu_name, "NEC %s rev%d.%d %d.%03dMHz",
155 1.1 takemura vrbcu_vrip_getcpuname(),
156 1.1 takemura vrbcu_vrip_getcpumajor(),
157 1.10 shin vrbcu_vrip_getcpuminor(),
158 1.10 shin vrbcu_vrip_getcpuclock() / 1000000,
159 1.10 shin (vrbcu_vrip_getcpuclock() % 1000000) / 1000);
160 1.9 sato #else
161 1.12 sato sprintf(cpu_name, "NEC VR41xx");
162 1.9 sato #endif
163 1.4 uch }
164 1.4 uch
165 1.13 shin void
166 1.4 uch vr_mem_init(kernend)
167 1.13 shin paddr_t kernend;
168 1.4 uch {
169 1.13 shin mem_clusters[0].start = 0;
170 1.13 shin mem_clusters[0].size = kernend;
171 1.13 shin mem_cluster_cnt = 1;
172 1.13 shin vr_find_dram(kernend, 0x02000000);
173 1.13 shin vr_find_dram(0x02000000, 0x04000000);
174 1.13 shin vr_find_dram(0x04000000, 0x06000000);
175 1.13 shin vr_find_dram(0x06000000, 0x08000000);
176 1.13 shin
177 1.13 shin /* Clear currently unused D-RAM area (For reboot Windows CE clearly)*/
178 1.13 shin memset((void *)(KERNBASE + 0x400), 0, KERNTEXTOFF - (KERNBASE + 0x800));
179 1.13 shin }
180 1.13 shin
181 1.13 shin void
182 1.13 shin vr_find_dram(addr, end)
183 1.13 shin paddr_t addr, end;
184 1.13 shin {
185 1.13 shin int n;
186 1.13 shin caddr_t page;
187 1.13 shin #ifdef NARLY_MEMORY_PROBE
188 1.13 shin int x, i;
189 1.13 shin #endif
190 1.13 shin
191 1.13 shin n = mem_cluster_cnt;
192 1.13 shin for (; addr < end; addr += NBPG) {
193 1.13 shin
194 1.13 shin page = (void *)MIPS_PHYS_TO_KSEG1(addr);
195 1.13 shin if (badaddr(page, 4))
196 1.13 shin goto bad;
197 1.13 shin
198 1.13 shin *(volatile int *)(page+0) = 0xa5a5a5a5;
199 1.13 shin *(volatile int *)(page+4) = 0x5a5a5a5a;
200 1.13 shin wbflush();
201 1.13 shin if (*(volatile int *)(page+0) != 0xa5a5a5a5)
202 1.13 shin goto bad;
203 1.13 shin
204 1.13 shin *(volatile int *)(page+0) = 0x5a5a5a5a;
205 1.13 shin *(volatile int *)(page+4) = 0xa5a5a5a5;
206 1.13 shin wbflush();
207 1.13 shin if (*(volatile int *)(page+0) != 0x5a5a5a5a)
208 1.13 shin goto bad;
209 1.13 shin
210 1.13 shin #ifdef NARLY_MEMORY_PROBE
211 1.13 shin x = random();
212 1.13 shin for (i = 0; i < NBPG; i += 4)
213 1.13 shin *(volatile int *)(page+i) = (x ^ i);
214 1.4 uch wbflush();
215 1.13 shin for (i = 0; i < NBPG; i += 4)
216 1.13 shin if (*(volatile int *)(page+i) != (x ^ i))
217 1.13 shin goto bad;
218 1.13 shin
219 1.13 shin x = random();
220 1.13 shin for (i = 0; i < NBPG; i += 4)
221 1.13 shin *(volatile int *)(page+i) = (x ^ i);
222 1.13 shin wbflush();
223 1.13 shin for (i = 0; i < NBPG; i += 4)
224 1.13 shin if (*(volatile int *)(page+i) != (x ^ i))
225 1.13 shin goto bad;
226 1.13 shin #endif
227 1.13 shin
228 1.13 shin if (!mem_clusters[n].size)
229 1.13 shin mem_clusters[n].start = addr;
230 1.13 shin mem_clusters[n].size += NBPG;
231 1.13 shin continue;
232 1.13 shin
233 1.13 shin bad:
234 1.13 shin if (mem_clusters[n].size)
235 1.13 shin ++n;
236 1.13 shin continue;
237 1.4 uch }
238 1.13 shin if (mem_clusters[n].size)
239 1.13 shin ++n;
240 1.13 shin mem_cluster_cnt = n;
241 1.4 uch }
242 1.4 uch
243 1.4 uch void
244 1.4 uch vr_fb_init(kernend)
245 1.4 uch caddr_t *kernend;
246 1.4 uch {
247 1.4 uch /* Nothing to do */
248 1.1 takemura }
249 1.1 takemura
250 1.1 takemura void
251 1.1 takemura vr_os_init()
252 1.1 takemura {
253 1.1 takemura /*
254 1.1 takemura * Set up interrupt handling and I/O addresses.
255 1.1 takemura */
256 1.1 takemura mips_hardware_intr = vr_intr;
257 1.1 takemura
258 1.1 takemura splvec.splbio = MIPS_SPL0;
259 1.1 takemura splvec.splnet = MIPS_SPL0;
260 1.1 takemura splvec.spltty = MIPS_SPL0;
261 1.1 takemura splvec.splimp = MIPS_SPL0;
262 1.1 takemura splvec.splclock = MIPS_SPL_0_1;
263 1.1 takemura splvec.splstatclock = MIPS_SPL_0_1;
264 1.1 takemura
265 1.1 takemura /* no high resolution timer circuit; possibly never called */
266 1.1 takemura clkread = nullclkread;
267 1.1 takemura
268 1.1 takemura #ifdef NOT_YET
269 1.1 takemura mcclock_addr = (volatile struct chiptime *)
270 1.1 takemura MIPS_PHYS_TO_KSEG1(Vr_SYS_CLOCK);
271 1.1 takemura mc_cpuspeed(mcclock_addr, MIPS_INT_MASK_1);
272 1.1 takemura #else
273 1.1 takemura printf("%s(%d): cpuspeed estimation is notimplemented\n",
274 1.1 takemura __FILE__, __LINE__);
275 1.1 takemura #endif
276 1.1 takemura #ifdef HPCMIPS_L1CACHE_DISABLE
277 1.1 takemura cpuspeed = 1; /* XXX, CPU is very very slow because L1 cache is */
278 1.1 takemura /* disabled. */
279 1.1 takemura #endif /* HPCMIPS_L1CAHCE_DISABLE */
280 1.1 takemura }
281 1.1 takemura
282 1.1 takemura
283 1.1 takemura /*
284 1.1 takemura * Initalize the memory system and I/O buses.
285 1.1 takemura */
286 1.1 takemura void
287 1.1 takemura vr_bus_reset()
288 1.1 takemura {
289 1.1 takemura printf("%s(%d): vr_bus_reset() not implemented.\n",
290 1.1 takemura __FILE__, __LINE__);
291 1.1 takemura }
292 1.1 takemura
293 1.1 takemura void
294 1.1 takemura vr_cons_init()
295 1.1 takemura {
296 1.3 takemura #if NCOM > 0 || NFB > 0 || NVRKIU > 0
297 1.1 takemura extern bus_space_tag_t system_bus_iot;
298 1.1 takemura extern bus_space_tag_t mb_bus_space_init __P((void));
299 1.1 takemura #endif
300 1.1 takemura
301 1.1 takemura #if NCOM > 0
302 1.1 takemura if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) {
303 1.1 takemura /* Serial console */
304 1.1 takemura mb_bus_space_init(); /* At this time, not initialized yet */
305 1.1 takemura if(com_vrip_cnattach(system_bus_iot, 0x0c000000, CONSPEED,
306 1.1 takemura VRCOM_FREQ,
307 1.1 takemura (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8)) {
308 1.1 takemura printf("%s(%d): can't init serial console", __FILE__, __LINE__);
309 1.1 takemura } else {
310 1.1 takemura return;
311 1.1 takemura }
312 1.1 takemura }
313 1.1 takemura #endif
314 1.1 takemura
315 1.3 takemura #if NFB > 0
316 1.3 takemura mb_bus_space_init(); /* At this time, not initialized yet */
317 1.3 takemura if(fb_cnattach(system_bus_iot, 0x0c000000, 0, 0)) {
318 1.3 takemura printf("%s(%d): can't init fb console", __FILE__, __LINE__);
319 1.3 takemura } else {
320 1.3 takemura goto find_keyboard;
321 1.3 takemura }
322 1.3 takemura #endif
323 1.3 takemura
324 1.3 takemura find_keyboard:
325 1.3 takemura #if NVRKIU > 0
326 1.3 takemura if (vrkiu_cnattach(system_bus_iot, VRIP_KIU_ADDR)) {
327 1.3 takemura printf("%s(%d): can't init vrkiu as console",
328 1.3 takemura __FILE__, __LINE__);
329 1.3 takemura } else {
330 1.3 takemura return;
331 1.3 takemura }
332 1.3 takemura #endif
333 1.1 takemura }
334 1.1 takemura
335 1.1 takemura void
336 1.1 takemura vr_device_register(dev, aux)
337 1.1 takemura struct device *dev;
338 1.1 takemura void *aux;
339 1.1 takemura {
340 1.2 shin printf("%s(%d): vr_device_register() not implemented.\n",
341 1.1 takemura __FILE__, __LINE__);
342 1.1 takemura panic("abort");
343 1.5 takemura }
344 1.5 takemura
345 1.5 takemura void
346 1.5 takemura vr_reboot(howto, bootstr)
347 1.5 takemura int howto;
348 1.5 takemura char *bootstr;
349 1.5 takemura {
350 1.7 takemura /*
351 1.7 takemura * power down
352 1.7 takemura */
353 1.7 takemura if ((howto & RB_POWERDOWN) == RB_POWERDOWN) {
354 1.7 takemura printf("fake powerdown\n");
355 1.7 takemura __asm(__CONCAT(".word ",___STRING(VR_OPCODE_HIBERNATE)));
356 1.7 takemura __asm("nop");
357 1.7 takemura __asm("nop");
358 1.7 takemura __asm("nop");
359 1.7 takemura __asm("nop");
360 1.7 takemura __asm("nop");
361 1.7 takemura __asm(".set reorder");
362 1.7 takemura /* not reach */
363 1.7 takemura vr_reboot(howto&~RB_HALT, bootstr);
364 1.7 takemura }
365 1.7 takemura /*
366 1.8 takemura * halt
367 1.7 takemura */
368 1.8 takemura if (howto & RB_HALT) {
369 1.8 takemura #if NVRIP > 0
370 1.8 takemura _spllower(~MIPS_INT_MASK_0);
371 1.8 takemura vrip_intr_suspend();
372 1.5 takemura #else
373 1.8 takemura splhigh();
374 1.5 takemura #endif
375 1.7 takemura __asm(".set noreorder");
376 1.7 takemura __asm(__CONCAT(".word ",___STRING(VR_OPCODE_SUSPEND)));
377 1.6 sato __asm("nop");
378 1.6 sato __asm("nop");
379 1.6 sato __asm("nop");
380 1.6 sato __asm("nop");
381 1.6 sato __asm("nop");
382 1.7 takemura __asm(".set reorder");
383 1.8 takemura #if NVRIP > 0
384 1.8 takemura vrip_intr_resume();
385 1.8 takemura #endif
386 1.6 sato }
387 1.8 takemura /*
388 1.8 takemura * reset
389 1.8 takemura */
390 1.8 takemura #if NVRDSU
391 1.8 takemura vrdsu_reset();
392 1.8 takemura #else
393 1.8 takemura printf("%s(%d): There is no DSU.", __FILE__, __LINE__);
394 1.8 takemura #endif
395 1.1 takemura }
396 1.1 takemura
397 1.1 takemura void *
398 1.1 takemura vr_intr_establish(line, ih_fun, ih_arg)
399 1.1 takemura int line;
400 1.1 takemura int (*ih_fun) __P((void*, u_int32_t, u_int32_t));
401 1.1 takemura void *ih_arg;
402 1.1 takemura {
403 1.1 takemura if (intr_handler[line] != null_handler) {
404 1.1 takemura panic("vr_intr_establish: can't establish duplicated intr handler.");
405 1.1 takemura }
406 1.1 takemura intr_handler[line] = ih_fun;
407 1.1 takemura intr_arg[line] = ih_arg;
408 1.1 takemura
409 1.1 takemura return (void*)line;
410 1.1 takemura }
411 1.1 takemura
412 1.1 takemura
413 1.1 takemura void
414 1.1 takemura vr_intr_disestablish(ih)
415 1.1 takemura void *ih;
416 1.1 takemura {
417 1.1 takemura int line = (int)ih;
418 1.1 takemura intr_handler[line] = null_handler;
419 1.1 takemura intr_arg[line] = NULL;
420 1.1 takemura }
421 1.1 takemura
422 1.1 takemura int
423 1.1 takemura null_handler(arg, pc, statusReg)
424 1.1 takemura void *arg;
425 1.1 takemura u_int32_t pc;
426 1.1 takemura u_int32_t statusReg;
427 1.1 takemura {
428 1.1 takemura printf("null_handler\n");
429 1.1 takemura return 0;
430 1.1 takemura }
431 1.1 takemura
432 1.1 takemura /*
433 1.1 takemura * Handle interrupts.
434 1.1 takemura */
435 1.1 takemura int
436 1.1 takemura vr_intr(mask, pc, status, cause)
437 1.1 takemura u_int32_t mask;
438 1.1 takemura u_int32_t pc;
439 1.1 takemura u_int32_t status;
440 1.1 takemura u_int32_t cause;
441 1.1 takemura {
442 1.1 takemura int hwintr;
443 1.1 takemura
444 1.1 takemura hwintr = (ffs(mask >> 10) -1) & 0x3;
445 1.1 takemura (*intr_handler[hwintr])(intr_arg[hwintr], pc, status);
446 1.1 takemura return (MIPS_SR_INT_IE | (status & ~cause & MIPS_HARD_INT_MASK));
447 1.1 takemura }
448